Baseboard management controller and baseboard management controller control method and device

Abstract

The invention discloses a substrate management controller and a substrate management controller control method and device, and relates to the technical field of servers, and the substrate management controller comprises a processor module which is used for obtaining configuration information of a firmware program and an enable signal of the substrate management controller, and running the substrate management controller based on the firmware program, the configuration information is sent to the electrifying control module; and the power-on control module is used for receiving the configuration information, generating an enable signal based on the configuration information, and controlling the power-on time sequence of different devices on the server mainboard based on the enable signal. According to the technical scheme, the functions of the CPLD are integrated into the BMC, the functions of the CPLD and the functions of the BMC are achieved at the same time through the BMC, the technical problems that in the related technology, the functions of the BMC and the functions of the CPLD are achieved through corresponding independent chips, and consequently system power consumption is increased, and cost is increased are solved, and the technical effects of reducing the system power consumption and reducing the cost are achieved.

Description

Technical Field

[0001] The present application relates to the field of server technology, and in particular to a baseboard management controller, a baseboard management controller control method, and a baseboard management controller control device. Background Art

[0002] The baseboard management controller (BMC) and complex programmable logic device (CPLD) are crucial components of the server. The BMC monitors, controls, and manages the server, while the CPLD controls the power-on sequencing of each chip on the server motherboard, ensuring that the power modules deliver power to each chip in the correct order and voltage. These two components play different roles in server design, working together to ensure stable server operation.

[0003] However, in the related art, the BMC and CPLD respectively implement their functions through their corresponding independent chips, which leads to increased system power consumption and increased costs. Summary of the Invention

[0004] The present application provides a baseboard management controller, a baseboard management controller control method and an apparatus to at least solve the problem in the related art that BMC and CPLD respectively implement their functions through their corresponding independent chips, resulting in increased system power consumption and increased costs.

[0005] The present application provides a baseboard management controller, comprising:

[0006] The processor module is used to obtain the firmware program and configuration information of the enable signal of the baseboard management controller, run the baseboard management controller based on the firmware program, and send the configuration information to the power-on control module, wherein the enable signal is used to control the power output of the power module;

[0007] The power-on control module is used to receive configuration information, generate an enable signal based on the configuration information, and control the power-on timing of different components on the server mainboard based on the enable signal.

[0008] The present application also provides a baseboard management controller control method, including:

[0009] Based on the processor module, obtain the firmware program and configuration information of the enable signal of the baseboard management controller, run the baseboard management controller based on the firmware program, and send the configuration information to the power-on control module, wherein the enable signal is used to control the power output of the power module;

[0010] Based on the power-on control module, configuration information is received, an enable signal is generated based on the configuration information, and the power-on timing of different components on the server mainboard is controlled based on the enable signal.

[0011] The present application also provides a baseboard management controller control device, comprising:

[0012] An acquisition module is used to acquire configuration information of a firmware program and an enable signal of a baseboard management controller based on the processor module, run the baseboard management controller based on the firmware program, and send the configuration information to the power-on control module, wherein the enable signal is used to control the power output of the power module;

[0013] The control module is used to receive configuration information based on the power-on control module, generate an enable signal based on the configuration information, and control the power-on timing of different components on the server mainboard based on the enable signal.

[0014] The present application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of the above-mentioned baseboard management controller control method when executing the computer program.

[0015] The present application also provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of the above-mentioned baseboard management controller control method are implemented.

[0016] The present application also provides a computer program product, including a computer program, which implements the steps of the above-mentioned baseboard management controller control method when executed by a processor.

[0017] Through this application, since the baseboard management controller includes a processor module for obtaining the configuration information of the baseboard management controller firmware program and enable signal, the baseboard management controller is operated based on the firmware program, and the configuration information is sent to the power-on control module, wherein the enable signal is used to control the power output of the power module; the power-on control module is used to receive the configuration information, generate an enable signal based on the configuration information, and control the power-on timing of different components on the server motherboard based on the enable signal. The functions of the CPLD are integrated into the BMC, and the BMC is used to simultaneously realize the functions of the CPLD and the functions of the BMC itself. This solves the technical problem in the related art that the BMC and CPLD each realize their functions through their corresponding independent chips, resulting in increased system power consumption and increased costs, and achieves the technical effect of reducing system power consumption and reducing costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0019] Figure 1 A schematic diagram of the structure of a baseboard management controller provided in an embodiment of the present application;

[0020] Figure 2 A schematic structural diagram of another baseboard management controller provided in an embodiment of the present application;

[0021] Figure 3 A schematic diagram of the structure of the enabling logic module provided in an embodiment of the present application;

[0022] Figure 4 A schematic diagram of the structure of the register module provided in an embodiment of the present application;

[0023] Figure 5 A flow chart of a baseboard management controller control method provided in an embodiment of the present application;

[0024] Figure 6 A structural block diagram of a baseboard management controller control device provided in an embodiment of the present application;

[0025] Figure 7 This is a structural block diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0026] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0027] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.

[0028] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0029] The BMC chip is an embedded chip specifically designed to monitor and manage server hardware resources. It's the physical chip that carries the BMC's functions and is a crucial component of any server. It can be installed in a variety of ways. It's typically integrated into the server motherboard, but it can also be plugged into the server motherboard as a standalone hardware device via the Peripheral Component Interconnect Express (PCIE) bus.

[0030] The BMC chip is like a small, independent computer system, complete with its own processor, memory, and operating system. It can operate independently of the server's central processing unit (CPU), memory, operating system, and other hardware and software components. By communicating with other hardware components, the BMC chip enables remote monitoring, control, installation, and management of the server. These capabilities include remote control of server power on / off, reboot, hardware resource classification and configuration, power control, Basic Input / Output System (BIOS) settings, and fault alarms.

[0031] In terms of communication protocol support, the BMC chip complies with standard protocols such as the Intelligent Platform Management Interface (IPMI), allowing administrators to remotely access and manage servers over the network, greatly improving the manageability and maintainability of the server.

[0032] In addition, the BMC chip also has functions such as logging and security management. It can record the server's operating status and events in real time, provide security measures such as remote authentication and access control, and ensure the safe and stable operation of the server.

[0033] A CPLD is a special digital integrated circuit that allows users to customize its logic functions according to their needs. CPLDs utilize programming technologies such as complementary metal-oxide semiconductor (CMOS) and erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, and static random-access memory (SRAM), offering high density, high speed, and low power consumption.

[0034] A CPLD primarily consists of three components: logic blocks, programmable interconnects, and input / output (I / O) blocks. When designing an application, users utilize an integrated development software platform, schematics, hardware description languages, and other methods to generate target files. The code is then transferred to the target chip via a download cable, completing the design of the digital system.

[0035] Due to the advantages of CPLD such as flexible programming, high integration, short design and development cycle, and wide range of applicable scenarios, it is widely used in many fields such as networks, instrumentation, automotive electronics, CNC machine tools, aerospace measurement and control equipment, etc.

[0036] CPLDs are essential components in servers. Their primary function in server systems is to control the power-up sequence of each chip on the server motherboard. Server motherboards contain numerous chips, and key chips like the CPU require power modules with varying voltages. For each chip to function properly, the power modules supplying each chip must be powered up in a specific order, requiring high precision. Therefore, CPLDs are used to control the power-up sequence of each chip on the server motherboard, ensuring that each power module delivers power to the corresponding chip at the appropriate time and in the correct order, ensuring proper server startup.

[0037] Among them, the BMC and CPLD respectively implement corresponding functions through their corresponding independent chips. In other words, the functions of the BMC and CPLD are implemented by two different chips. This leads to increased power consumption and cost of the server system. In addition, there is also the problem of the printed circuit board (PCB), that is, the server motherboard, being too large in size, which increases the difficulty of server design and development.

[0038] In response to the above problems, the embodiments of the present application provide a baseboard management controller, a baseboard management controller control method and a device. The baseboard management controller includes a processor module for obtaining the firmware program and configuration information of the enable signal of the baseboard management controller, running the baseboard management controller based on the firmware program, and sending the configuration information to the power-on control module, wherein the enable signal is used to control the power output of the power module; the power-on control module is used to receive the configuration information, generate an enable signal based on the configuration information, and control the power-on timing of different devices on the server motherboard based on the enable signal. The baseboard management controller provided by the above scheme integrates the power-on control function of different devices on the server motherboard implemented by CPLD into the BMC, so as to utilize the BMC to simultaneously implement the functions of the CPLD and the functions of the BMC itself, solving the technical problem in the related art that the BMC and CPLD respectively implement their functions through their corresponding independent chips, resulting in increased system power consumption and increased costs, and achieves the technical effect of reducing system power consumption and reducing costs.

[0039] It should be noted that the BMC chip is an indispensable chip in the server. Therefore, the precise power-on control function of the CPLD can be integrated into the BMC chip to integrate the functions of the CPLD and the BMC itself into one chip.

[0040] The following specific embodiments may be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0041] The embodiment of the present application provides a baseboard management controller. It can be understood that the baseboard management controller exists in the form of a BMC chip. Figure 1 A schematic diagram of the structure of a baseboard management controller provided in an embodiment of the present application is shown in FIG. Figure 1 As shown, the baseboard management controller includes:

[0042] The processor module 101 is used to obtain the configuration information of the firmware program and enable signal of the baseboard management controller, run the baseboard management controller based on the firmware program, and send the configuration information to the power-on control module, wherein the enable signal is used to control the power output of the power module.

[0043] It should be noted that the processor module is the internal processor of the BMC chip in related technologies, which is used to run the BMC chip's firmware program. The processor module calls the firmware program in external storage space and runs the BMC according to the firmware program, implementing various BMC chip functions, such as monitoring and management of server hardware resources. The firmware program is pre-written and stored in the external storage space.

[0044] It is understood that the processor module is a must-have module for such a system on a chip (SOC). However, in the embodiment of the present application, in addition to implementing the functions of the processor within the BMC chip in the related art, the processor module is also used to read the control register value set in the external storage space. The control register value is the configuration information of the enable signal, and the configuration information of the enable signal is sent to the power-on control module.

[0045] The power-on control module 102 is configured to receive configuration information, generate an enable signal based on the configuration information, and control the power-on sequence of different components on the server mainboard based on the enable signal.

[0046] It is understandable that the enable signal controls the power-on sequence of different components on the server mainboard by controlling the power output of the power modules corresponding to the different components on the server mainboard.

[0047] The baseboard management controller provided in an embodiment of the present application includes a processor module for obtaining configuration information of a firmware program and an enable signal of the baseboard management controller, running the baseboard management controller based on the firmware program, and sending the configuration information to a power-on control module; the power-on control module is used to receive the configuration information, generate an enable signal based on the configuration information, and control the power-on timing of different components on the server motherboard based on the enable signal. By integrating the power-on control function of different components on the server motherboard implemented by the CPLD into the BMC, the BMC can be used to simultaneously implement the functions of the CPLD and the functions of the BMC itself, thereby solving the technical problem in the related art that the BMC and CPLD each implement their functions through their corresponding independent chips, resulting in increased system power consumption and increased costs, thereby achieving the technical effect of reducing system power consumption and reducing costs.

[0048] By integrating the power-on control functions of different devices on the server motherboard implemented by CPLD into the BMC, the BMC can be used to simultaneously implement the functions of the CPLD and the BMC itself, reducing interface redundancy, lowering the difficulty of designing and developing server hardware circuits, and reducing the area of PCB boards.

[0049] The embodiment of the present application provides a baseboard management controller. It can be understood that the baseboard management controller exists in the form of a BMC chip. Figure 2 A schematic diagram of the structure of a baseboard management controller provided in an embodiment of the present application is shown in FIG. Figure 2 As shown, the baseboard management controller includes:

[0050] The processor module 201 is used to obtain the firmware program and the configuration information of the enable signal of the baseboard management controller, run the baseboard management controller based on the firmware program, and send the configuration information to the power control module, wherein the enable signal is used to control the power output of the power module. Figure 1 The processor module 101 of the illustrated embodiment will not be described in detail here.

[0051] The power-on control module 202 is configured to receive configuration information, generate an enable signal based on the configuration information, and control the power-on sequence of different components on the server mainboard based on the enable signal.

[0052] Specifically, the power-on control module 202 includes:

[0053] The register module 2021 is used to receive configuration information and configure the enable signal output logic in the enable logic module based on the configuration information.

[0054] The configuration information generally includes which pins in the output interface of the enabling logic module are to implement the external control function, wherein the pins that implement the external control function are target external control output pins.

[0055] The configuration information also includes whether the external control output pin of each target is valid at a high level or a low level, how long each level is valid, and what the timing relationship between the external control output pins of each target is.

[0056] Among them, high level is valid means that when the target outputs a high level to the external control output pin, the external device will respond and perform the corresponding operation, and low level is valid on the contrary.

[0057] The effective time of each level is the length of time that the high or low level lasts. For example, it may be specified that a target outputs a high level for 1 second and then returns to a low level after 1 second.

[0058] The timing relationships between the target external control output pins, or the enable signals output by each target external control output pin, include the relationships between the enable signals output by each target external control output pin and the relationship between the enable signal output by each target external control output pin and the input signal. For example, after a specific signal is input to a certain input pin, the delay time before the target external control output pin outputs a high or low level is determined. Another example is that after a target external control output pin outputs a high or low level, a configurable delay time is required before a specific signal is output. Delay times and delay relationships are recorded in the registers within the register module.

[0059] The enable logic module 2022 is configured to output a corresponding enable signal based on the enable signal output logic configured in the register module.

[0060] Among them, the enable signal output logic in the enable logic module is configured through configuration information, so that the output logic module outputs the corresponding enable signal according to the enable signal output logic, thereby realizing power-on timing control of different devices on the server motherboard.

[0061] It's understandable that the enable logic module's primary function is to output various enable signals. These enable signals control the power output of the external power module and the power-on and power-off sequences of various components on the server motherboard. It's understandable that the various components on the server motherboard are the various chips on the motherboard.

[0062] Different devices have timing requirements for powering different power modules. The internal logic circuit of the enable logic module controls various enable signals to output logic according to the set enable signal output, that is, according to the power-on timing of different devices.

[0063] In the baseboard management controller provided in the embodiment of the present application, the enable logic module generates an enable signal based on the enable signal output logic configured by the register module. This hierarchical design helps reduce the possibility of incorrect configuration, thereby improving the stability and reliability of the system.

[0064] In some optional embodiments, the register module 2021 is specifically configured to:

[0065] Based on the configuration information, the target external control output pin of the enabled logic module is determined.

[0066] Configure the effective working level of each target's external control output pin and the effective time corresponding to the effective working level.

[0067] The effective working level is whether the high level is effective or the low level is effective. The effective time corresponding to the effective working level is how long each level is effective.

[0068] Configure the timing relationship between the enable signals output by each target external control output pin. The timing relationship includes the delay relationship between the enable signals output by each target external control output pin and the delay time between the enable signals output by each target external control output pin.

[0069] It can be understood that the delay relationship is the order of the enable signals output by the external control output pins of each target, and the delay time is the interval time between adjacent enable signals.

[0070] Configure the timing relationship between the enable signal output by each target external control output pin and the target input signal.

[0071] As previously mentioned, for example, after a specific signal, i.e., a target input signal, is input to a certain input pin, how long does it take for a target external control output pin to output a high or low level, i.e., an enable signal? It is understood that the timing relationship between the enable signal output by each target external control output pin and the target input signal includes both the delay relationship between the enable signal output by each target external control output pin and the target input signal and the delay time between the enable signal output by each target external control output pin and the target input signal.

[0072] The target external control output pin is used to output a corresponding enable signal based on the timing relationship between the enable signals output by each target external control output pin and the timing relationship between the enable signal output by each target external control output pin and the target input signal.

[0073] The baseboard management controller provided in the embodiments of this application ensures that each output pin operates at the correct level at the correct time by explicitly configuring the effective operating level and effective operating time of the target external control output pins. This precise control capability significantly improves system stability and reliability. By integrating the CPLD's power-on sequence control function for various components on the server motherboard into the BMC, the hardware complexity and cost of the entire system are reduced.

[0074] In some optional embodiments, the enabling logic module 2022 includes:

[0075] Phase-locked loop module, used to generate clock signals of various frequencies.

[0076] Multiple counting modules are used to count the clock signal of the target frequency based on the enable signal output logic and send the counting information to the multiplexer module, wherein one counting module is used to count the clock signal of one frequency.

[0077] The multiplexer module is used to receive counting information, output logic and counting information based on the enable signal, and output a corresponding enable signal.

[0078] Figure 3 This is a schematic diagram of the structure of the enabling logic module provided in the embodiment of the present application. Figure 3 As shown, the enabling logic module includes a phase-locked loop module, multiple counting modules and a multiplexer module.

[0079] A phase-locked loop (PLL) is an electronic circuit that uses a feedback mechanism to lock the phase of its output signal to the phase of its input signal (reference signal). PLLs are widely used in clock generation, frequency synthesis, signal recovery, frequency modulation and demodulation, and frequency multiplexing.

[0080] In an embodiment of the present application, a phase-locked loop (PLL) module is used to generate clock signals of various frequencies to provide clock signals of various frequencies to the enabling logic module, thereby meeting timing requirements with different precision requirements. An external clock is input into the PLL module, which then generates clock signals of various frequencies based on the external clock. The various frequency clock signals may include ns (nanosecond) clock signals, ms (millisecond) clock signals, and s (second) clock signals.

[0081] Multiple counting modules are used to count the clock signals of the target frequency according to the enable signal output logic, control the delay relationship and delay time between the enable signals by counting the clock signals, and send the counting information to the multiplexer module.

[0082] It can be understood that the target frequency can be determined according to the delay time, and the target frequency may include multiple frequencies.

[0083] The multiplexer (MUX) module receives counting information from multiple counting modules and controls the output of the enable signal based on the enable signal output logic and the counting information, that is, outputs the corresponding enable signal.

[0084] It can be understood that the multiplexer module is used to count the counting information sent by multiple counting modules, and output the target enable signal after the counted count value reaches the target delay time.

[0085] The target delay time is the delay time between the target enable signal and the enable signal output most recently before the target enable signal in the enable signal output logic.

[0086] The baseboard management controller provided in the embodiment of the present application realizes the timely output of the enable signal through a phase-locked loop module, multiple counting modules and a multiplexer module, thereby ensuring the accuracy of the power-on timing of each device on the server motherboard.

[0087] In some optional embodiments, the register module 2021 includes:

[0088] The register configuration module is used to receive configuration information and configure the enable signal output logic in the enable logic module based on the configuration information.

[0089] On-chip storage module, used to save configuration information.

[0090] Figure 4 A schematic diagram of the structure of the register module provided in the embodiment of the present application is shown in FIG. Figure 4 As shown, the register module includes a register configuration module and an on-chip storage module.

[0091] The register configuration module is as described above and will not be described in detail here.

[0092] The on-chip memory module stores the enable signal configuration information. If the processor module has not yet started working properly or an abnormality occurs during the processor module's operation, the configuration information in the on-chip memory module can be used to reconfigure the enable signal output logic in the enable logic module. This allows for rapid power-on and power-off control of various components on the server motherboard.

[0093] It should be noted that the on-chip storage module only needs to record configuration information and does not require a large storage capacity. A storage capacity of 16KB or 32KB is sufficient. It can be implemented using on-chip random access memory (RAM) or embedded flash (eFlash) technology.

[0094] In some optional embodiments, the power-on control module 202 is further configured to:

[0095] When configuration information is stored in the on-chip storage module, the configuration information in the on-chip storage module is obtained, an enable signal is generated based on the configuration information, and a power-on sequence of different components on the server mainboard is controlled based on the enable signal.

[0096] It is understandable that when the baseboard management register is run for the first time, since the configuration information is not saved in the on-chip storage module, the power-on control module needs to wait for the processor module to start, obtain the configuration information, generate an enable signal based on the configuration information, and control the power-on timing of different devices on the server motherboard based on the enable signal.

[0097] When the baseboard management register is run for the other times after the first time, since the configuration information is saved in the on-chip storage module, the power-on control module obtains the configuration information from the on-chip storage module without waiting for the processor module to start. Based on the configuration information obtained from the on-chip storage module, an enable signal is generated, and the power-on timing of different devices on the server motherboard is controlled based on the enable signal.

[0098] The baseboard management controller provided in an embodiment of the present application obtains configuration information from an on-chip storage module when the configuration information is stored in the on-chip storage module, generates an enable signal based on the configuration information, and controls the power-on sequence of different components on the server motherboard based on the enable signal. This enables rapid output of the enable signal, significantly reducing system startup time and improving the server's response speed and efficiency. Storing configuration information in the on-chip storage module avoids the problem of inability to obtain configuration information in a timely manner due to external factors such as processor module failure, thereby enhancing the stability and reliability of the system.

[0099] In some optional embodiments, the baseboard management controller further includes:

[0100] The update module is used to determine the configuration information of the enable signal obtained by the processor module after the processor module is started, when the power-on control module generates an enable signal based on the configuration information obtained from the on-chip storage module and controls the power-on timing of different devices on the server motherboard based on the enable signal.

[0101] It is determined whether the configuration information of the enable signal obtained by the processor module is the same as the configuration information obtained by the power-on control module from the on-chip storage module.

[0102] If the configuration information of the enable signal obtained by the processor module is different from the configuration information obtained by the power-on control module from the on-chip storage module, the configuration information stored in the on-chip storage module is updated using the configuration information of the enable signal obtained by the processor module, and the updated configuration information is sent to the power-on control module.

[0103] It is understandable that the user may modify the configuration information and write the modified configuration information into the external storage space. The configuration information of the enable signal obtained by the processor module from the external storage space is accurate configuration information.

[0104] The power-on control module is further configured to receive updated configuration information, generate an enable signal based on the updated configuration information, and control the power-on sequence of different components on the server mainboard based on the enable signal.

[0105] The baseboard management controller provided in the embodiment of the present application updates the configuration information in the on-chip storage module using the latest configuration information obtained by the processor module when the configuration information obtained by the processor module is different from the configuration information in the on-chip storage module, and sends the updated configuration information to the power-on control module, so that the power-on control module generates an enable signal based on the updated configuration information, thereby ensuring the accuracy and reliability of power-on control.

[0106] It's important to note that integrating CPLD functions into the BMC isn't limited to just integrating CPLD functions into the BMC. Other components on the server motherboard can also be integrated into the BMC to reduce system power consumption and costs. The enable signal isn't limited to power-on sequencing; it can also be used to implement the functions of other components.

[0107] The embodiment of the present application provides a baseboard management controller control method, Figure 5 A flow chart of a baseboard management controller control method provided in an embodiment of the present application is shown as follows: Figure 5 As shown, the baseboard management controller control method includes:

[0108] Step S501: Based on the processor module, obtain the firmware program and configuration information of the enable signal of the baseboard management controller, run the baseboard management controller based on the firmware program, and send the configuration information to the power-on control module, wherein the enable signal is used to control the power output of the power module.

[0109] Step S502: Based on the power-on control module, configuration information is received, an enable signal is generated based on the configuration information, and a power-on sequence of different components on the server mainboard is controlled based on the enable signal.

[0110] For descriptions of features in the embodiments corresponding to the baseboard management controller control method, reference can be made to the relevant descriptions of the embodiments corresponding to the baseboard management controller, which will not be described in detail here.

[0111] The baseboard management controller control method provided in the embodiment of the present application obtains the configuration information of the baseboard management controller firmware program and enable signal based on the processor module, runs the baseboard management controller based on the firmware program, and sends the configuration information to the power-on control module, wherein the enable signal is used to control the power output of the power module; the power-on control module receives the configuration information, generates an enable signal based on the configuration information, and controls the power-on timing of different components on the server motherboard based on the enable signal. Utilizing the BMC to simultaneously implement the functions of the CPLD and the BMC itself solves the technical problem in related technologies where the BMC and CPLD each implement their functions through their corresponding independent chips, resulting in increased system power consumption and increased costs, thereby achieving the technical effect of reducing system power consumption and reducing costs.

[0112] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.

[0113] The embodiment of the present application also provides a baseboard management controller control device, such as Figure 6 As shown, the baseboard management controller control device includes:

[0114] The acquisition module 601 is used to obtain the configuration information of the firmware program and enable signal of the baseboard management controller based on the processor module, run the baseboard management controller based on the firmware program, and send the configuration information to the power-on control module, wherein the enable signal is used to control the power output of the power module.

[0115] The control module 602 is configured to receive configuration information based on the power-on control module, generate an enable signal based on the configuration information, and control the power-on sequence of different components on the server mainboard based on the enable signal.

[0116] For the description of the features in the embodiment corresponding to the baseboard management controller control device, reference can be made to the relevant description of the embodiment corresponding to the baseboard management controller control method, which will not be repeated here.

[0117] The embodiment of the present application also provides an electronic device, such as Figure 7 As shown, it includes a processor 701 and a memory 702, wherein the memory 702 stores a computer program, and the processor 701 is configured to run the computer program to execute the steps in any of the above-mentioned baseboard management controller control method embodiments.

[0118] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored. The computer program is configured to execute the steps of any of the above-mentioned baseboard management controller control method embodiments when running.

[0119] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0120] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps of any of the above-mentioned baseboard management controller control method embodiments are implemented.

[0121] An embodiment of the present application also provides another computer program product, including a non-volatile computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, it implements the steps in any of the above-mentioned baseboard management controller control method embodiments.

[0122] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0123] The above is a detailed introduction to a baseboard management controller, baseboard management controller control method, and device provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core ideas of the present application. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A baseboard management controller, characterized in that: include: a processor module configured to obtain configuration information of a firmware program and an enable signal of a baseboard management controller, run the baseboard management controller based on the firmware program, and send the configuration information to a power-on control module, wherein the enable signal is used to control the power output of the power module; The power-on control module is configured to receive the configuration information, generate an enable signal based on the configuration information, and control the power-on sequence of different components on the server mainboard based on the enable signal.

2. The baseboard management controller according to claim 1, wherein: The power-on control module includes: A register module, configured to receive the configuration information and configure the enable signal output logic in the enable logic module based on the configuration information; The enable logic module is used to output the corresponding enable signal based on the enable signal output logic configured by the register module.

3. The baseboard management controller according to claim 2, wherein: The register module is specifically used for: Determining a target external control output pin of the enabling logic module based on the configuration information; Configuring the effective working level of each target external control output pin and the effective time corresponding to the effective working level; Configuring a timing relationship between the enable signals output by each of the target external control output pins, wherein the timing relationship includes a delay relationship between the enable signals output by each of the target external control output pins and a delay time between the enable signals output by each of the target external control output pins; Configuring the timing relationship between the enable signal output by each of the target external control output pins and the target input signal; The target external control output pin is used to output a corresponding enable signal based on the timing relationship between the enable signals output by each of the target external control output pins and the timing relationship between the enable signal output by each of the target external control output pins and the target input signal.

4. The baseboard management controller according to claim 2, wherein: The enabling logic module includes: Phase-locked loop module, used to generate clock signals of various frequencies; a plurality of counting modules, configured to count clock signals of a target frequency based on the enable signal output logic, and send the counting information to the multiplexer module, wherein one counting module is configured to count clock signals of one frequency; The multiplexer module is configured to receive the counting information and output a corresponding enable signal based on the enable signal output logic and the counting information.

5. The baseboard management controller according to claim 2, wherein: The register module includes: a register configuration module, configured to receive the configuration information and configure the enable signal output logic in the enable logic module based on the configuration information; The on-chip storage module is used to store the configuration information.

6. The baseboard management controller according to claim 5, characterized in that: The power-on control module is further configured to: In the case where the configuration information is stored in the on-chip storage module, the configuration information in the on-chip storage module is obtained, an enable signal is generated based on the configuration information, and a power-on sequence of different components on the server mainboard is controlled based on the enable signal.

7. A baseboard management controller control method, characterized in that: The method comprises: Based on the processor module, obtain the firmware program and configuration information of the enable signal of the baseboard management controller, run the baseboard management controller based on the firmware program, and send the configuration information to the power-on control module, wherein the enable signal is used to control the power output of the power module; Based on the power-on control module, the configuration information is received, an enable signal is generated based on the configuration information, and a power-on sequence of different components on the server mainboard is controlled based on the enable signal.

8. A baseboard management controller control device, characterized in that: include: an acquisition module, configured to acquire, based on the processor module, a firmware program and configuration information of an enable signal of a baseboard management controller, run the baseboard management controller based on the firmware program, and send the configuration information to a power-on control module, wherein the enable signal is used to control the power output of the power module; The control module is configured to receive the configuration information based on the power-on control module, generate an enable signal based on the configuration information, and control the power-on sequence of different components on the server mainboard based on the enable signal.

9. An electronic device, characterized in that: include: memory for storing computer programs; A processor is configured to implement the steps of the baseboard management controller control method as claimed in claim 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the baseboard management controller control method according to claim 7 .

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