Extensible on-chip optical neural network chip based on partially coherent light source

Abstract

The invention discloses an extensible on-chip optical neural network chip based on a partially coherent light source, and belongs to the field of optical calculation. The optical neural network chip comprises a partially coherent light source, an input coding unit, a linear calculation unit, a nonlinear activation unit, an output detection unit and a calculation and control unit. According to the invention, a narrow linewidth laser is replaced by a partially coherent light source, so that the dependence of the system on coherent detection is reduced, and the large-scale capability of optical matrix calculation is improved. An optical-electrical-optical (O-E-O) nonlinear activation unit is adopted to realize the expandability of the network level, and the calculation efficiency and the energy utilization rate are effectively improved in combination with an optimized convolution calculation architecture. The chip provided by the invention adopts an on-chip integrated manufacturing process, can realize end-to-end optical reasoning, supports a complex mode recognition task, has the characteristics of high bandwidth, low energy consumption, expandability and the like, and is suitable for large-scale artificial intelligence calculation.

Description

Technical Field

[0001] The present invention belongs to the field of integrated optical computing, and more specifically, relates to a scalable on-chip optical neural network chip based on partially coherent light sources. Background Art

[0002] The current mainstream architecture for artificial intelligence computing still relies on electronic computing platforms, particularly deep learning computing frameworks based on graphics processing units (GPUs) and application-specific integrated circuits (ASICs). Although these architectures have achieved significant computing power improvements in recent years, they still face problems such as limited computing efficiency, high power consumption, and data transmission bottlenecks.

[0003] Electronic computing architectures are constrained by the von Neumann bottleneck, where the frequent interaction between data access and computation limits computing speed. Furthermore, as the parameter size of AI models continues to grow, the demand for computing and storage bandwidth has increased significantly, leading to a significant increase in overall system power consumption. Furthermore, high-performance computing platforms often rely on massively parallel processing, but due to interconnect bandwidth limitations, actual performance cannot scale linearly.

[0004] Optical computing, due to its parallel processing capabilities and low energy consumption, is considered a key approach to breaking through the bottlenecks of electronic computing architecture. Optical neural networks (ONNs), which utilize optical signals to perform matrix operations, can complete large-scale computations in nanoseconds and achieve computational throughput far exceeding that of electronic chips.

[0005] However, traditional on-chip optical neural networks face severe challenges in scalability. The first is the expansion of network depth: the nonlinear activation functions of existing ONNs (such as optical-electrical-optical conversion) have insufficient net gain or rely on external electrical amplifiers, making it impossible to build deep networks. The second is limited input size: the limited chip area makes it difficult to expand the scale of the optical matrix, and the input scale is limited (for example, the input scale of traditional ONNs is less than 30). Finally, at the light source level, traditional solutions require high-cost narrow-linewidth lasers, which bring about multi-wavelength or complex coherent detection circuits, increase system complexity and cost, and thus limit the expansion of the optical matrix. Summary of the Invention

[0006] In response to the defects or improvement needs of the existing technology, the purpose of the present invention is to provide a scalable on-chip optical neural network chip based on partially coherent light sources, aiming to reduce the dependence on narrow linewidth light sources while improving the computing power and scalability of the system.

[0007] To achieve the above objectives, the present invention provides a scalable on-chip optical neural network chip based on a partially coherent light source, comprising a partially coherent light source, an input encoding unit, a linear calculation unit, a nonlinear activation unit, an output detection unit, and a calculation and control unit;

[0008] The partially coherent light source is used to provide a first portion of coherent light in a first wavelength range, the input encoding unit is used to load input information onto the first portion of coherent light, the linear calculation unit is used to perform linear weighted summation on the first portion of coherent light, and the partially coherent light source is also used to provide a second portion of coherent light in a second wavelength range. The nonlinear activation unit includes a photoelectric conversion unit and an electro-optical modulator. The photoelectric conversion unit converts the first portion of coherent light after the linear weighted summation into an electrical signal. The electrical signal and the second portion of coherent light are input into the electro-optical modulator. The second portion of coherent light is modulated by the electrical signal to achieve nonlinear calculation. The output detection unit is used to detect the light intensity of the second portion of coherent light after the nonlinear calculation. The calculation and control unit is used to optimize the weight of the linear calculation unit according to the detected light intensity.

[0009] It is further preferred that the partially coherent light source adopts a light emitting diode (LED) or an amplified spontaneous emission (ASE). The partially coherent light source has a large wavelength linewidth, which makes its coherence length very short. When two beams of partially coherent light are superimposed, only the sum of their intensities can be detected. Compared with a narrow linewidth laser light source, the partially coherent light source does not need to expand its band accordingly when the scale of the linear calculation unit is expanded, nor does it need to perform coherent detection, which is conducive to achieving a larger input data scale. The first wavelength range needs to meet a bandwidth that is much larger than the bandwidth of the output detection unit. In addition to meeting the requirements of the first wavelength range, the second wavelength range also needs to be smaller than the tunable optical linewidth of the electro-optical modulator in the nonlinear activation unit.

[0010] Further preferably, the convolution layer in the linear computation unit is implemented using an optical point product module based on an optical Mach-Zehnder interferometer, wherein each Mach-Zehnder interferometer implements one element in the convolution kernel. The fully connected layer in the linear computation unit is implemented using a matrix computation network based on an optical Mach-Zehnder interferometer.

[0011] Further preferably, the output detection unit may adopt a germanium silicon photodetector or a III-V group detector.

[0012] More preferably, the input encoding unit may adopt a carrier injection or depletion-type silicon optical intensity modulator, and the input information is encoded on the intensity of the input partial coherent light.

[0013] Furthermore, the nonlinear activation unit converts the output light intensity of the linear calculation unit into a photocurrent via a photoelectric conversion unit. This photocurrent is directly applied to an electro-optical modulator whose driving voltage has a nonlinear relationship with the output optical power. A second portion of coherent light is input to the electro-optical modulator and modulated by the electrical signal, enabling nonlinear calculations based on the electro-optical modulator's inherent nonlinear transmission characteristics. The intensity of the second portion of coherent light ensures a positive net gain during cascaded calculations, enabling the optical neural network to be scalable in terms of network depth.

[0014] Furthermore, the calculation and control unit uses a field programmable gate array (FPGA) and a digital-to-analog / analog-to-digital conversion circuit to read the output results, optimize the weights of the linear calculation unit, execute the training algorithm, and control the adjustable elements within the chip.

[0015] Furthermore, the partially coherent light source is divided into multiple wavelength bands by a coarse wavelength division multiplexer. These wavelength bands serve as the input light (first partially coherent light) of the input encoding unit and the supplementary light (second partially coherent light) of the nonlinear activation unit. The output of the nonlinear activation unit enters the next linear computation layer. The optical path difference between the partially coherent light sources at different input ports of the same linear computation layer is much greater than the coherence length, thus achieving incoherent computation.

[0016] Furthermore, the linear calculation unit adopts differential output, and the differential optical signal is converted into a differential photocurrent by the differential photodetector to drive the electro-optic modulator in the nonlinear activation unit to realize real domain calculation.

[0017] Furthermore, the input encoding unit, linear calculation unit, and nonlinear activation unit are all integrated on the same silicon chip, with the linear calculation unit and nonlinear activation unit alternately connected, without an additional electrical amplification module. The network's deep cascading enhances its expressive power, helping to achieve more complex artificial intelligence tasks.

[0018] Compared with the prior art, the above technical solutions proposed by the present invention can achieve the following:

[0019] Beneficial effects:

[0020] 1. The optoelectronic hybrid neural network chip based on partially coherent light sources provided by the present invention greatly reduces the number of wavelength channels compared to the multi-wavelength precision management required by traditional coherent light sources, thereby improving the expansion capability of the optical matrix;

[0021] 2. The optoelectronic hybrid neural network chip based on partially coherent light sources provided by the present invention only requires direct detection of light intensity, compared to the coherent detection required by traditional coherent light sources, which reduces detection complexity and improves the expansion capability of the optical matrix;

[0022] 3. The nonlinear activation unit based on on-chip optoelectronic conversion adopted by the present invention achieves a single-layer net gain of >0dB when the input optical power is >0.2mW, breaking through the bottleneck of deep neural network cascade;

[0023] 4. The real-time training algorithm integrated in this invention uses black-box gradient estimation and Adam optimizer to greatly improve the configuration speed of optical neural networks. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 This is a system framework diagram of a scalable on-chip optical neural network chip based on a partially coherent light source provided by an example of the present invention.

[0025] Figure 2 This is a specific structural diagram of a scalable on-chip optical neural network chip based on a partially coherent light source provided by an example of the present invention. (a) is a network model diagram corresponding to the optical neural network in the example, (b) is a structural schematic diagram of the input coding unit, (c) is the convolutional layer in the linear computing unit and its corresponding optical nonlinear function, and (d) is the fully connected layer in the linear computing unit and its corresponding optical nonlinear function.

[0026] Figure 3 These are test result diagrams of a scalable on-chip optical neural network chip based on a partially coherent light source provided by an example of the present invention. (a) shows the performance of a real-domain optical neural network using a narrow-linewidth laser on the four-category classification of handwritten digits. (b) shows the performance of a positive-domain optical neural network using a narrow-linewidth laser on the four-category classification of handwritten digits. (c) shows the performance of a real-domain optical neural network using a partially coherent light source on the four-category classification of handwritten digits. DETAILED DESCRIPTION

[0027] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely for explaining the present invention and are not intended to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.

[0028] like Figure 1 As shown, the present invention provides a scalable on-chip optical neural network chip based on a partially coherent light source, comprising a partially coherent light source 1, an input encoding unit 2, a linear calculation unit 3, a nonlinear activation unit 4, an output detection unit 5, and a calculation and control unit 6;

[0029] The partially coherent light source 1 is used to provide a first portion of coherent light in a first wavelength range, the input encoding unit 2 is used to load input information onto the first portion of coherent light, the linear calculation unit 3 is used to perform linear weighted summation on the first portion of coherent light, and the partially coherent light source 1 is also used to provide a second portion of coherent light in a second wavelength range. The nonlinear activation unit 4 includes a photoelectric conversion unit and an electro-optical modulator. The photoelectric conversion unit converts the first portion of coherent light after linear weighted summation into an electrical signal. The electrical signal and the second portion of coherent light are input into the electro-optical modulator. The second portion of coherent light is modulated by the electrical signal to achieve nonlinear calculation. The output detection unit 5 is used to detect the light intensity of the second portion of coherent light after nonlinear calculation. The calculation and control unit 6 is used to optimize the weight of the linear calculation unit according to the detected light intensity.

[0030] The specific implementation of the present invention revolves around a monolithic integrated optical neural network chip, which realizes end-to-end optical reasoning capabilities through innovative partially coherent light source drive, cascaded nonlinear activation units and optimized linear calculation modules.

[0031] Figure 2 This is a specific structural diagram of a scalable on-chip optical neural network chip based on a partially coherent light source provided by an example of the present invention, where (a) is the network model diagram corresponding to the optical neural network. The chip uses ASE as the basic optical input, and its wavelength covers the C band of optical communication. The broadband spectrum is divided into four independent bands (λ1~λ4) by a wavelength selective switch (WSS), and the line width Δλ is set to 0.4nm, which are injected into different optical layers of the chip (such as the input layer of the input coding unit, the convolutional layer in the linear calculation unit, and the fully connected layer). The optical path design ensures that the optical path difference of different input ports in each layer exceeds the coherence length of the light source. (b) is a schematic structural diagram of the input coding unit. The input layer is composed of 64 carrier injection intensity modulators (IMs), each of which corresponds to a single pixel of the input image (8×8 resolution). The modulator adopts a PIN doping structure with a length of 500μm. The light attenuation is adjusted by injecting current, and the normalized pixel grayscale value is encoded as a light intensity signal. (c) is the convolution layer in the linear calculation unit and its corresponding optical nonlinear function. The linear calculation is divided into two parts: the convolution layer and the fully connected layer. The convolution layer uses a 2×2 optical dot product kernel, such as Figure 2 As shown in (c) in the figure, the optical power ratio of the positive and negative channels is dynamically allocated by thermally tuning the MZI (weight κ = 2α-1, α∈[0,1]). After the input optical signal is split, the positive and negative channels are respectively input into the germanium (Ge) photodetector to generate differential current to drive the subsequent nonlinear unit. Through the convolution operation with a step size of 2, the input size is compressed from 8×8 to 4×4 in the first layer. In the second layer, two convolution kernels are used to compress the input size to 2×2×2. The fully connected layer is based on a simplified real-valued MZI matrix, as shown in Figure 2 As shown in (d) in Figure 1, the 4×8 matrix is decomposed into two 4×4 MZI modules. This design is optimized for partially coherent optical input, and the output optical power difference directly represents the real-valued calculation result, avoiding the complex coherent detection process.

[0032] The nonlinear function is realized by a photocurrent-driven microring modulator (MRM) array ( Figure 2 (c, d)). Each MRM has a radius of 10μm, a free spectral range (FSR) of 12nm, and an extinction ratio ≥6dB. When the MRM is driven by a differential current, forward bias (I>0) causes a significant blue shift due to carrier injection, while reverse bias (I<0) produces a slight red shift due to carrier depletion. The output light intensity shows a nearly linear Sigmoid function relationship with the drive current, with a saturation power of 0.2mW. By adjusting the supply light intensity, the nonlinearly activated unit cell can achieve positive net gain (output optical power ≥ input), supporting a four-layer cascade without signal attenuation.

[0033] Specifically, the output layer's optical signal is detected by a photodetector array, converted to a voltage via a transimpedance amplifier, and processed using a softmax function to generate classification probabilities. The computation and control unit, based on an FPGA, drives the DAC to adjust the thermal phase shifter voltage, supporting in-situ training. Training utilizes a black-box gradient descent algorithm combined with the Adam optimizer, significantly improving model robustness.

[0034] Specifically, the chip workflow is divided into three stages: optical signal loading, linear-nonlinear alternating calculation, and result judgment:

[0035] Optical signal loading: After ASE is split by the WSS, the λ1 band is input into the 64-channel IM array and loaded with 8×8 image data.

[0036] Convolution calculation: The optical signal enters the first convolution layer, and the 2×2 convolution kernel generates a 4×4 feature map. After MRM nonlinear activation, it is passed to the second convolution layer and further compressed into two 2×2 feature vectors.

[0037] Fully connected calculation: The two 2×2 feature vectors are flattened into an 8×1 vector, input into a 4×8 MZI matrix for weighted summation, and then nonlinearly mapped through the nonlinear activation unit unit, and finally the classification result is output through the second fully connected layer.

[0038] Training and tuning: The in-situ training system calculates gradients based on the output, dynamically adjusts the MZI phase and MRM bias voltage, compensates for process deviations, and optimizes the weight distribution.

[0039] Figure 3The chip's performance is demonstrated for coherent and partially coherent light inputs, as well as when operating in the positive and real domains. In the coherent light input test, a multi-wavelength light source was used as the input for the optical linear layer. In the positive domain test, the bias voltage of the negative port detector in the convolutional layer was disconnected to implement a positive-only convolution kernel. On a handwritten digit dataset, it can be seen that using partially coherent and coherent light sources as inputs achieves similar classification accuracy, and both outperform optical neural networks in the positive domain. This demonstrates that the use of partially coherent light maintains inference performance while enabling on-chip optical neural network expansion. The real domain optical computation employed in this architecture also outperforms traditional positive domain computation. Table 1 compares the existing on-chip optical neural network with this example in terms of input size, number of optical layers, light source coherence, and operating domain. It can be seen that this example has a significant advantage in network scale, demonstrating the significance of this invention in improving the scalability of optical neural networks.

[0040] Table 1

[0041]

[0042] It will be easily understood by those skilled in the art that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A scalable on-chip optical neural network chip with partially coherent light source, characterized in that: It includes a partially coherent light source (1), an input coding unit (2), a linear calculation unit (3), a nonlinear activation unit (4), an output detection unit (5), and a calculation and control unit (6); The partially coherent light source (1) is used to provide a first portion of coherent light in a first wavelength range, the input encoding unit (2) is used to load input information onto the first portion of coherent light, the linear calculation unit (3) is used to perform linear weighted summation on the first portion of coherent light, the partially coherent light source (1) is also used to provide a second portion of coherent light in a second wavelength range, the nonlinear activation unit (4) includes a photoelectric conversion unit and an electro-optical modulator, the photoelectric conversion unit converts the first portion of coherent light after linear weighted summation into an electrical signal, the electrical signal and the second portion of coherent light are input into the electro-optical modulator, the second portion of coherent light is modulated by the electrical signal to achieve nonlinear calculation, the output detection unit (5) is used to detect the light intensity of the second portion of coherent light after nonlinear calculation, and the calculation and control unit (6) is used to optimize the weight of the linear calculation unit according to the detected light intensity.

2. The scalable on-chip optical neural network chip based on partially coherent light source according to claim 1, characterized in that: The partially coherent light source (1) is a light emitting diode or a spontaneous emission amplification light source.

3. The scalable on-chip optical neural network chip based on partially coherent light source according to claim 1, characterized in that: The first wavelength range is much larger than the bandwidth of the output detection unit (5), and the second wavelength range is much larger than the bandwidth of the output detection unit (5), while being smaller than the tunable optical linewidth of the electro-optical modulator in the nonlinear activation unit (4).

4. The scalable on-chip optical neural network chip based on partially coherent light source according to claim 1, characterized in that: The linear calculation unit (3) includes a convolution layer and a fully connected layer. The convolution layer includes a plurality of optical Mach-Zehnder interferometers, wherein each Mach-Zehnder interferometer realizes an element in the convolution kernel. The fully connected layer in the linear calculation unit adopts a matrix calculation network based on the optical Mach-Zehnder interferometer.

5. The scalable on-chip optical neural network chip based on partially coherent light source according to claim 1, characterized in that: The output detection unit (5) is a germanium silicon photodetector or a III-V group detector.

6. The scalable on-chip optical neural network chip based on partially coherent light source according to claim 1, characterized in that: The input coding unit (2) is a silicon light intensity modulator based on carrier injection or depletion type.

7. The scalable on-chip optical neural network chip based on partially coherent light source according to claim 1, characterized in that: The electro-optic modulator is a micro-ring modulator.

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