Wafer defect detection method, system and equipment and storage medium

Abstract

The invention discloses a wafer defect detection method, system and equipment and a storage medium, belongs to the technical field of deep learning and defect detection, and solves the problem that the detection precision is reduced due to multi-scale, small-target and boundary defects in the existing wafer defect detection under the condition that computing power resources and hardware resources are limited. At a Backbone end of the YOLOv10 model, a C2fIMP module is adopted to replace a C2f layer, and a DSASF module is adopted to replace a Neck end of the YOLOv10 model; training the improved YOLOv10 model by adopting the training set, and verifying the effectiveness of the improved YOLOv10 model by adopting the verification set in the training process to obtain a final improved YOLOv10 model; and inputting the test set into the final improved YOLOv10 model to complete wafer defect detection.

Description

Technical Field

[0001] The present invention relates to the field of deep learning and defect detection technology, and in particular to a wafer defect detection method, system, equipment, and storage medium. Background Art

[0002] With the rapid development of the semiconductor industry, wafers are key materials for chip manufacturing, and their surface defect detection is crucial in ensuring chip quality and reliability. However, wafer defects are of various types, with obvious multi-scale characteristics. In particular, tiny defects and boundary defects, due to their small size, complex morphology and scattered distribution, pose great challenges to accurate detection. At the same time, in small and medium-sized enterprises, embedded devices or edge computing scenarios, due to limited computing resources and hardware conditions, the deployment of high-precision models often faces high costs and computing overheads. Traditional methods usually rely on high-computing power GPUs (graphics processing units) for training and inference, but for enterprises or terminal devices with limited computing power, the deployment of high-performance models is difficult and difficult to meet actual application needs.

[0003] In recent years, deep learning has become the mainstream technology for industrial defect detection, which can automatically extract deep features from data and greatly improve detection accuracy and efficiency. Among them, the YOLO (You Only Look Once) series of models have outstanding performance in wafer defect detection due to their end-to-end detection, high real-time performance and good applicability. As a new generation of target detection model proposed in 2024, the YOLOv10 model has a streamlined architecture and high computational efficiency. It is suitable for equipment with limited resources and has efficient inference speed. However, in the face of the multi-scale characteristics of wafer defects, complex morphologies and the difficulty of detecting tiny targets, higher requirements are still placed on the model accuracy. Even for an efficient model like the YOLOv10 model, there is still room for further optimization in practical applications.

[0004] In summary, in the existing technology, wafer defect detection faces the problem of reduced detection accuracy due to multi-scale, small target and boundary defects when computing power resources and hardware resources are limited. Summary of the Invention

[0005] The present invention solves the problem of reduced detection accuracy caused by multi-scale, small target and boundary defects faced by existing wafer defect detection when computing power resources and hardware resources are limited.

[0006] The wafer defect detection method of the present invention comprises the following steps:

[0007] Step S1, obtaining a wafer defect image dataset, preprocessing the wafer defect image dataset, and dividing the preprocessed wafer defect image dataset into a training set, a validation set, and a test set;

[0008] Step S2: Build an improved YOLOv10 model, specifically:

[0009] On the Backbone side of the YOLOv10 model, the C2f_IMP module is used to replace the C2f layer, and the DSASF module is used to replace the Neck side of the YOLOv10 model;

[0010] Step S3, using the training set to train the improved YOLOv10 model, and using the validation set to verify the effectiveness of the improved YOLOv10 model during the training process to obtain the final improved YOLOv10 model;

[0011] In step S4, the test set is input into the final improved YOLOv10 model to complete the detection of wafer defects.

[0012] Furthermore, in one embodiment of the present invention, in step S2, the C2f_IMP module is specifically:

[0013] The wafer defect image after passing through the CBS layer is divided into two paths. One path of wafer defect image passes through the Split and multi-stage IMP Block modules in sequence, and outputs a wafer defect feature image.

[0014] The other wafer defect image is directly concat- ed with the output of Split, the output of the multi-stage IMP Block module, and one wafer defect feature image, and then input into the CBS layer again.

[0015] Furthermore, in one embodiment of the present invention, the IMP Block module is specifically:

[0016] After the wafer defect image undergoes Norm and Pooling processing in sequence, the Pooling-processed wafer defect image and the wafer defect image are added together to generate a comprehensive wafer defect feature image. The comprehensive wafer defect feature image is then subjected to Norm processing to generate a fused wafer defect feature image.

[0017] The fused wafer defect feature images are divided into three paths. The first path of fused wafer defect feature images is processed by Linear. The second path of fused wafer defect feature images is processed by Linear, DW Conv and Activation in sequence, and then dot product operation is performed with the first path of fused wafer defect feature images processed by Linear to output the weight-adjusted wafer defect feature image. The weight-adjusted wafer defect feature image is added to the third path of fused wafer defect feature image, and then added to the comprehensive wafer defect feature image to output the final wafer defect feature image.

[0018] Furthermore, in one embodiment of the present invention, in step S2, the DSASF module is composed of TFE, DSS and CPAM.

[0019] The wafer defect detection system of the present invention includes the following modules:

[0020] A preprocessing module obtains a wafer defect image dataset, preprocesses the wafer defect image dataset, and divides the preprocessed wafer defect image dataset into a training set, a validation set, and a test set;

[0021] Build the module and build the improved YOLOv10 model, specifically:

[0022] On the Backbone side of the YOLOv10 model, the C2f_IMP module is used to replace the C2f module, and the DSASF module is used to replace the Neck side of the YOLOv10 model;

[0023] The training module uses the training set to train the improved YOLOv10 model, and uses the validation set to verify the effectiveness of the improved YOLOv10 model during the training process to obtain the final improved YOLOv10 model;

[0024] The detection module inputs the test set into the final improved YOLOv10 model to complete the detection of wafer defects.

[0025] An electronic device according to the present invention comprises a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other via the communication bus;

[0026] Memory for storing computer programs;

[0027] The processor is configured to implement any of the above-mentioned wafer defect detection methods when executing a program stored in the memory.

[0028] The present invention provides a computer-readable storage medium, wherein a computer program is stored in the computer-readable storage medium. When the computer program is executed by a processor, any of the above-mentioned wafer defect detection methods is implemented.

[0029] This invention solves the problem of reduced detection accuracy caused by multi-scale, small target, and boundary defects in existing wafer defect detection when computing power and hardware resources are limited. Specific beneficial effects include:

[0030] The wafer defect detection method described in the present invention is based on the existing technology. In the case of limited computing power resources and hardware resources, wafer defect detection faces the problem of reduced detection accuracy caused by multi-scale, small targets and boundary defects. In order to solve the above technical problems, the present invention constructs an improved YOLOv10 model, replaces the C2f layer with the C2f_IMP module at the Backbone end of the YOLOv10 model, and replaces the Neck end of the YOLOv10 model with the DSASF module. The improved YOLOv10 model is used to detect wafer defects. Experiments have shown that the improved YOLOv10 model has higher detection accuracy due to multi-scale, small targets and boundary defects when computing power resources and hardware resources are limited.

[0031] The wafer defect detection method described in the present invention enhances the ability to identify small and complex defects by introducing the C2f_IMP module and the DSASF module. It improves accuracy without increasing calculation and parameter overhead, and is suitable for the actual application needs of embedded devices, edge computing, and small and medium-sized enterprises. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0033] Figure 1 1 is a diagram of the improved YOLOv10 model structure described in Implementation Method 1;

[0034] Figure 2 This is a diagram of the YOLOv10 model training results before the improvement described in Implementation 1;

[0035] Figure 3 It is the improved YOLOv10 model training result described in Implementation Method 1;

[0036] Figure 4 This is a structural diagram of the C2f_IMP module described in Embodiment 2;

[0037] Figure 5 This is a performance comparison chart of the improved YOLOv10 model described in Implementation Method 3 and other models. DETAILED DESCRIPTION

[0038] The following will clearly and completely describe various embodiments of the present invention in conjunction with the accompanying drawings. The embodiments described with reference to the accompanying drawings are exemplary and intended to be used to explain the present invention, but should not be understood as limiting the present invention.

[0039] Implementation method 1: The wafer defect detection method described in this implementation method includes the following steps:

[0040] Step S1, obtaining a wafer defect image dataset, preprocessing the wafer defect image dataset, and dividing the preprocessed wafer defect image dataset into a training set, a validation set, and a test set;

[0041] Step S2: Build an improved YOLOv10 model, specifically:

[0042] On the Backbone side of the YOLOv10 model, the C2f_IMP module is used to replace the C2f layer, and the DSASF module is used to replace the Neck side of the YOLOv10 model;

[0043] Step S3, using the training set to train the improved YOLOv10 model, and using the validation set to verify the effectiveness of the improved YOLOv10 model during the training process to obtain the final improved YOLOv10 model;

[0044] In step S4, the test set is input into the final improved YOLOv10 model to complete the detection of wafer defects.

[0045] In the existing technology, wafer defect detection faces the problem of reduced detection accuracy due to multi-scale, small target and boundary defects when computing power and hardware resources are limited.

[0046] To solve the above technical problems, this embodiment proposes a wafer defect detection method based on the improvement of the YOLOv10 model, including the following steps:

[0047] Step S1: Obtain a wafer defect image dataset and preprocess the wafer image dataset. Use multiple data enhancement techniques to enrich the number of small sample defects and balance the distribution of various samples in the wafer defect image dataset. Split the preprocessed wafer defect image dataset into a training set, a validation set, and a test set in a ratio of 7:1.5:1.5.

[0048] Step S2, such as Figure 1 As shown, an improved YOLOv10 model is constructed, specifically:

[0049] In the Backbone of the YOLOv10 model, the C2f_IMP module (adaptive adjustment module) is used to replace the C2f layer (feature decomposition layer), and the DSASF (dynamically sampled attention scale sequence fusion mechanism) module is used to replace the Neck of the YOLOv10 model.

[0050] The YOLOv10 model inherits the high efficiency of the YOLO series. Its network consists of a backbone, a neck, and a head (detection layer). In the backbone, SCDown (downsampling) is introduced, which adjusts the channel dimension through point-wise convolution and combines it with depth-wise convolution to achieve spatial downsampling, thereby improving feature extraction efficiency. Furthermore, the introduction of Pyramid Squeezed Attention (PSA) reduces computational complexity while enhancing feature representation. Regarding the head, the YOLOv10 model utilizes two lightweight detection heads: one-to-one head and one-to-many head, which not only improve detection accuracy but also optimize training efficiency. Furthermore, the YOLOv10 model removes non-maximum suppression (NMS) and adopts dual label assignment and sorting guide blocks to further enhance performance and computational efficiency. Overall, the YOLOv10 model effectively reduces model size and improves computational efficiency, setting a new performance benchmark in the field of lightweight object detection.

[0051] Step S3, using the training set to train the improved YOLOv10 model, and using the validation set to verify the effectiveness of the improved YOLOv10 model during the training process, to obtain the final improved YOLOv10 model;

[0052] Step S4, input the test set into the final improved YOLOv10 model to complete the detection of wafer defects. The test results are as follows: Figure 2 As shown in the figure, the training results of the YOLOv10 model before the improvement are as follows: Figure 3 As shown in the figure, it is the training result diagram of the improved YOLOv10 model. It can be seen from the figure that the improved model shows higher confidence, effectively reduces the missed detection rate, and has higher detection accuracy.

[0053] Therefore, this embodiment comprehensively reconstructs and improves the Backbone and Neck ends based on the YOLOv10 model, thereby enhancing the adaptive detection capability of the improved YOLOv10 model for small targets and complex defect features, while effectively reducing the computational complexity and parameter quantity.

[0054] Implementation Method 2: This implementation method further limits the wafer defect detection method described in Implementation Method 1. The C2f_IMP module is specifically:

[0055] The wafer defect image after passing through the CBS layer is divided into two paths. One path of wafer defect image passes through the Split and multi-stage IMP Block modules in sequence, and outputs a wafer defect feature image.

[0056] The other wafer defect image is directly concat- ed with the output of Split, the output of the multi-stage IMP Block module, and one wafer defect feature image, and then input into the CBS layer again.

[0057] In this embodiment, the IMP Block module is specifically:

[0058] After the wafer defect image undergoes Norm and Pooling processing in sequence, the Pooling-processed wafer defect image and the wafer defect image are added together to generate a comprehensive wafer defect feature image. The comprehensive wafer defect feature image is then subjected to Norm processing to generate a fused wafer defect feature image.

[0059] The fused wafer defect feature images are divided into three paths. The first path of fused wafer defect feature images is processed by Linear. The second path of fused wafer defect feature images is processed by Linear, DW Conv and Activation in sequence, and then dot product operation is performed with the first path of fused wafer defect feature images processed by Linear to output the weight-adjusted wafer defect feature image. The weight-adjusted wafer defect feature image is added to the third path of fused wafer defect feature image, and then added to the comprehensive wafer defect feature image to output the final wafer defect feature image.

[0060] The backbone of the YOLOv10 model plays a crucial role in feature extraction. However, wafer defects are typically complex in scale and location. The backbone of the YOLOv10 model has limited global information perception and relatively simple inter-channel interactions, making it prone to overlooking key details. This can prevent the model from effectively capturing important features when dealing with subtle and localized defects, thus affecting detection accuracy.

[0061] PoolFormer (an attention mechanism model) is a concise and efficient feature extraction method that abandons traditional self-attention mechanisms and MLPs (multi-layer perceptrons) and uses non-overlapping pooling operations to achieve token mixing. This pooling approach optimizes cross-region dependency modeling through global feature aggregation. Its parameter-free and computationally inexpensive nature improves the efficiency of large-scale data processing. However, it ignores the relationships between channels, which limits its ability to express features.

[0062] In order to solve the above technical problems, Figure 4As shown, this embodiment designs an IMPBlock module (adaptive adjustment module) based on this architecture, and constitutes the C2f_IMP module (adaptive adjustment module). The IMP Block cleverly introduces a channel gating mechanism, which dynamically adjusts the activation value of each channel to precisely control the flow of information, selectively enhance important features, and suppress unnecessary features. This improvement not only improves the selectivity and expressiveness of feature extraction, but also significantly improves the ability to capture local spatial information. In particular, in wafer defect detection, it can effectively deal with complex and detailed defect types while improving detection efficiency.

[0063] The C2f_IMP module is specifically:

[0064] The CBS layer (convolutional layer), Split (segmentation), n-layer IMP Block module and CBS layer are connected in sequence; the output ends of the CBS layer, Split, and n-layer IMP Block module are concat-connected and then connected to the CBS module.

[0065] The IMP Block module is specifically:

[0066] First, the input wafer defect image is normalized to improve the stability of model training and avoid the activation value range being too large or too small to affect the subsequent calculation process. Next, the spatial information of the input wafer defect image is downsampled through the Pooling operation to reduce redundant information. The Pooling operation is parameter-free, has low computational cost, and can retain important spatial information. Then, the input wafer defect image is connected to the Pooling result through a residual connection to generate a comprehensive wafer defect feature image, which helps to retain richer global and boundary information. The comprehensive wafer defect feature image is then Normed again to further improve the stability of the features, thereby helping the model to better select and fuse features and generate a fused wafer defect feature image.

[0067] Next, a Linear (fully connected layer) is used to map the fused wafer defect feature image to a new space, and DW Conv (depth-wise convolution) is used to model the relationship between channels. DW Conv can not only capture more detailed information, but also has low computational complexity and high efficiency. The feature map processed by DW Conv will be nonlinearly mapped through the Activation (activation layer) to further enhance its expressiveness and promote the model to learn features from different angles. Subsequently, the fused wafer defect feature image processed by Norm is linearly transformed again through Linear, the feature dimension is adjusted, and the dot product operation is performed with the previous Activation result. The weight of the feature map is adjusted to weight the features of different channels, thereby enhancing important features and suppressing unimportant features. The result after the dot product will be processed by Linear to further optimize the features adjusted by the previous module, so that the information flow can be better controlled.

[0068] Finally, the fused wafer defect feature image is added to the Linear output result to obtain an intermediate representation of the feature map. This summed result is then added to the integrated wafer defect feature image to form the final output feature map.

[0069] By adding Linear, DW Conv, and Activation to optimize PoolFormer's information flow control during feature extraction, it adaptively weights features from different channels, significantly enhancing the selectivity of feature extraction. Compared to the original C2f layer, the improved C2f_IMP module can better enhance the perception of global and local information about defect features, while requiring fewer parameters and lowering computational cost.

[0070] Implementation method three: This implementation method further limits the wafer defect detection method described in implementation method one. In step S2, the DSASF module is composed of TFE, DSS and CPAM.

[0071] To enhance the YOLOv10 model's Neck's ability to focus on defects of different scales, suppress redundant information interaction during feature fusion, and effectively improve the detection accuracy of small targets, this implementation proposes DSASF to replace the original Neck of the YOLOv10 model. The traditional ASF (Attention Scale Sequential Feature Fusion) method performs feature fusion based on the attention scale, combining spatial and scale information. It can focus on small targets related to information channels and spatial positions, but it has certain limitations in acquiring feature information of different sizes and densities. To this end, the DSASF structure introduces a Dynamic module to dynamically adjust the sampling strategy based on the feature scale. This not only enhances the high-dimensional information from the deep feature map, but also effectively integrates the detailed information in the shallow feature map. Through this dynamic adjustment and multi-scale information fusion, DSASF can improve the model's adaptability to targets of different sizes, especially in wafer defect detection tasks, significantly improving the model's accuracy and robustness.

[0072] DSASF consists of TFE (Triple Feature Encoder) and DSS (Dynamic Sampling Mechanism). However, simply combining TFE and DSS will reduce the ability to detect wafer defects. To address the above technical issues, this embodiment fuses the feature information from TFE and DSS through CPAM (Composition of Attention Mechanism), specifically:

[0073] In this mechanism, TFE can better retain and utilize detailed feature information at different scales, and low-resolution representation can effectively preserve the richness of local features, avoiding the loss or degradation of key small target data. DSS introduces a dynamic mechanism into the original ASF SSFF (Spatial Structure Feature Fusion) module to form DSS. DSS introduces a dynamic mechanism to automatically adjust the feature sampling strategy to reduce the accumulation of prediction errors, which plays a key role in boundary defect prediction. Finally, the CPAM module fuses the feature information from TFE and DSS, ultimately obtaining more accurate defect positioning, thereby improving the detection capability of wafer defects.

[0074] The TFE is specifically:

[0075] Conventional feature fusion methods typically employ a unidirectional, layer-by-layer transfer strategy, such as P2→P3→P4. This causes each layer's features to lose some detail when fused with the upper layer, particularly when processing small objects, where the richness of local features can be lost. In contrast, TFE introduces cross-scale information interaction and adopts a bidirectional feature fusion strategy, namely P2→P3, P4→P3, and so on. This allows P3 to not only receive fine-grained information from P2 but also obtain more globally perceptual features from P4, thereby preserving the advantages of each layer's features. Referring to the TFE structure disclosed in Chinese patent CN119580007A, "A High-Precision Lightweight Steel Surface Defect Detection Method Based on an Improved YOLOv5," TFE first adjusts the number of channels, using convolution operations to unify the number of channels for large and small features to a medium-sized number. Next, the feature sizes are unified, using a hybrid structure of maximum pooling and average pooling for downsampling. The small-sized feature map is then upsampled using nearest neighbor interpolation to align its size with the medium-sized feature map. Finally, three feature maps of the same size and dimension from different scales are concatenated to form a feature set containing rich information, providing a basis for subsequent processing.

[0076] The DSS is specifically:

[0077] DSS enhances the fusion of low-level and high-level features by convolving feature maps from different scales and utilizing a dynamic sampling adjustment strategy. Dynamic sampling optimizes the model's feature fusion efficiency and avoids information distortion caused by fixed sampling methods. This is particularly important for small object detection. Referring to the DSS architecture disclosed in Chinese patent CN119323775A, "A Real-time Traffic Sign Detection Method Based on Deep Learning," DSS receives as input feature maps P3, P4, and P5 from the backbone network. These feature maps represent feature information at three different resolutions. First, the three feature maps are convolved to unify the number of channels to obtain P3_1, P4_1, and P5_1. Then, the Dysample (dynamic sampling) operation is applied to P4_1 and P5_1 to obtain P4_2 and P5_2. Dysample divides the feature maps into two branches for processing. In the first branch, a carefully designed point sampling generator dynamically generates a set of sampling points based on the content of the input feature map and information such as the size and distribution of the object. The second branch maintains the original feature map unchanged and feeds it, along with the sample point set generated by the first branch, into the network sample processor. This processor resamples the original feature map using the sample point set. Because the sample point set is dynamically generated, the upsampling process is also dynamic, adaptively adjusting to the size and distribution of objects in the input image, significantly improving adaptability to small objects. P3_1, P4_2, and P5_2 are expanded in the third-to-last dimension. Each feature layer is converted from a 3D tensor (height, width, channels) to a 4D tensor (depth, height, width, channels) using the unsqueeze method. These 4D feature maps are then concatenated along the depth dimension to form a larger 3D feature map. This feature map now contains information at all scales. Finally, this concatenated feature map is processed using 3D convolution, 3D batch normalization, and SiLU (activation function) to extract the final scale-sequence features.

[0078] The CPAM is specifically:

[0079] CPAM is a component of the DSASF used to enhance sensitivity to key features and defect locations. It combines a channel attention network and a position attention network. By adaptively weighting different channels and focusing on spatial positional relationships, it improves the feature map's responsiveness to important information and locations. Drawing on the DSS architecture described in Chinese patent CN119580007A, "A High-Precision Lightweight Steel Surface Defect Detection Method Based on an Improved YOLOv5," CPAM comprises a channel attention network that receives input from the TFE (Transient Feedback Detection) and a position attention network that superimposes the outputs of the channel attention network and the DSS. Input 1 contains detailed features from the TFE, with features of key information channels enhanced through adaptive weighting. Input 2 consists of the superposition of the outputs of the channel attention network and the DSS. The input feature map is encoded horizontally and vertically, then merged to generate an output containing positional information. This better captures important positional relationships within the feature map and enhances sensitivity to defect locations.

[0080] Therefore, the TFE of this embodiment ensures that the features of each layer can receive information from different scales through bidirectional feature interaction, thus avoiding information loss. DSS optimizes the fusion of feature maps of different scales by dynamically adjusting the sampling strategy, making the model more adaptive and flexible in the fusion process of multi-scale features, further improving the sensitivity to small targets and reducing the impact of irrelevant features. CPAM strengthens the focus on key features through channel and position attention, that is, through DSASF, the Neck end of the YOLOv10 model is enhanced to pay attention to defects of different scales in feature fusion, suppresses redundant information interaction when features are transmitted layer by layer, and improves the detection sensitivity of small defects.

[0081] In order to better illustrate the wafer defect detection method described in Embodiments 1 to 3, the following examples are described in detail:

[0082] The improved YOLOv10 model is trained using the training set, and during the training process, the validation set is used to verify the effectiveness of the improved YOLOv10 model.

[0083] During the training process, the various parameters of the improved YOLOv10 model are initialized, and the wafer defect images in the preprocessed wafer defect image dataset are input into the improved YOLOv10 model for recognition, and the category information and detection frame are obtained. The training rounds are set to 300 epochs (rounds) and the batches are set to 128 to obtain the trained improved YOLOv10 model. The accuracy of the improved detection network is evaluated by P (Precision), R (Recall), F1 Score (F1 score) and mAP (average precision), while Para (parameter quantity) and GFLOPs (computational amount) are used to measure the complexity and size of the model. The training results of the improved YOLOv10 detection network are compared with a variety of mainstream target detection algorithms (including YOLOv3-tiny model, YOLOv6n model, YOLOv9 model, YOLOv10n model, YOLOv8n model and RTDETR model) to evaluate the performance of this embodiment. The results are as follows: Figure 5 shown.

[0084] The improved YOLOv10 model described in this embodiment has higher accuracy than other YOLO lightweight base models, while also showing lower complexity in Para and GFLOPs. The RTDETR model Para, GFLOPs, and model size are 28.45M, 100.6, and 56.35MB, respectively, and P is low. Compared to the basic YOLOv10 model, the improved YOLOv10 model described in this embodiment has an R improvement of 5.8 percentage points, an F1 Score and mAP improvement of 2.3 percentage points and 3.1 percentage points, respectively, and lower Para and GFLOPs. In summary, the results show that the improved YOLOv10 model described in this embodiment can achieve higher accuracy in wafer defect detection with limited resources.

[0085] Embodiment 4: The wafer defect detection system described in this embodiment includes the following modules:

[0086] A preprocessing module obtains a wafer defect image dataset, preprocesses the wafer defect image dataset, and divides the preprocessed wafer defect image dataset into a training set, a validation set, and a test set;

[0087] Build the module and build the improved YOLOv10 model, specifically:

[0088] On the Backbone side of the YOLOv10 model, the C2f_IMP module is used to replace the C2f module, and the DSASF module is used to replace the Neck side of the YOLOv10 model;

[0089] The training module uses the training set to train the improved YOLOv10 model, and uses the validation set to verify the effectiveness of the improved YOLOv10 model during the training process to obtain the final improved YOLOv10 model;

[0090] The detection module inputs the test set into the final improved YOLOv10 model to complete the detection of wafer defects.

[0091] Embodiment 5: An electronic device described in this embodiment includes a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other via the communication bus;

[0092] Memory for storing computer programs;

[0093] The processor is configured to implement the wafer defect detection method described in any one of embodiments one to three when executing the program stored in the memory.

[0094] Embodiment 6. A computer-readable storage medium described in this embodiment stores a computer program, and when the computer program is executed by a processor, the wafer defect detection method described in any one of embodiments 1 to 3 is implemented.

[0095] The above is a detailed introduction to the wafer defect detection method, system, equipment and storage medium proposed in the present invention. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea; at the same time, for general technical personnel in this field, based on the ideas of the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A wafer defect detection method, characterized in that: The following steps are involved: Step S1, obtaining a wafer defect image dataset, preprocessing the wafer defect image dataset, and dividing the preprocessed wafer defect image dataset into a training set, a validation set, and a test set; Step S2: Build an improved YOLOv10 model, specifically: On the Backbone side of the YOLOv10 model, the C2f_IMP module is used to replace the C2f layer, and the DSASF module is used to replace the Neck side of the YOLOv10 model; Step S3, using the training set to train the improved YOLOv10 model, and using the validation set to verify the effectiveness of the improved YOLOv10 model during the training process to obtain the final improved YOLOv10 model; In step S4, the test set is input into the final improved YOLOv10 model to complete the detection of wafer defects.

2. The wafer defect detection method according to claim 1, wherein: In step S2, the C2f_IMP module is specifically: The wafer defect image after passing through the CBS layer is divided into two paths. One path of wafer defect image passes through the Split and multi-stage IMP Block modules in sequence, and outputs a wafer defect feature image. The other wafer defect image is directly concat- ed with the output of Split, the output of the multi-stage IMP Block module, and one wafer defect feature image, and then input into the CBS layer again.

3. The wafer defect detection method according to claim 2, wherein: The IMP Block module is specifically: After the wafer defect image undergoes Norm and Pooling processing in sequence, the Pooling-processed wafer defect image and the wafer defect image are added together to generate a comprehensive wafer defect feature image. The comprehensive wafer defect feature image is then subjected to Norm processing to generate a fused wafer defect feature image. The fused wafer defect feature images are divided into three paths. The first path of fused wafer defect feature images is processed by Linear. The second path of fused wafer defect feature images is processed by Linear, DW Conv and Activation in sequence, and then dot product operation is performed with the first path of fused wafer defect feature images processed by Linear to output the weight-adjusted wafer defect feature image. The weight-adjusted wafer defect feature image is added to the third path of fused wafer defect feature image, and then added to the comprehensive wafer defect feature image to output the final wafer defect feature image.

4. The wafer defect detection method according to claim 1, wherein: In the step S2, the DSASF module is composed of TFE, DSS and CPAM.

5. Wafer defect detection system, characterized in that, Includes the following modules: A preprocessing module obtains a wafer defect image dataset, preprocesses the wafer defect image dataset, and divides the preprocessed wafer defect image dataset into a training set, a validation set, and a test set; Build the module and build the improved YOLOv10 model, specifically: On the Backbone side of the YOLOv10 model, the C2f_IMP module is used to replace the C2f module, and the DSASF module is used to replace the Neck side of the YOLOv10 model; The training module uses the training set to train the improved YOLOv10 model, and uses the validation set to verify the effectiveness of the improved YOLOv10 model during the training process to obtain the final improved YOLOv10 model; The detection module inputs the test set into the final improved YOLOv10 model to complete the detection of wafer defects.

6. An electronic device, characterized in that: It includes a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other via the communication bus; Memory for storing computer programs; The processor is configured to implement the wafer defect detection method according to any one of claims 1 to 4 when executing a program stored in the memory.

7. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the wafer defect detection method according to any one of claims 1 to 4 is implemented.

Images