Multilayer ceramic capacitor and circuit board

Abstract

The invention relates to a multilayer ceramic capacitor and a circuit board. A multilayer ceramic capacitor according to one aspect of the present invention comprises: a rectangular parallelepiped-shaped main body having: a laminate in which ceramic layers and internal electrodes having a metal as a main component are alternately laminated; a protective part that covers the surface of the laminate; and a plurality of via-hole conductors electrically connected to the internal electrodes, the via-hole conductors being disposed so as to penetrate the ceramic layer in the lamination direction of the laminate, and at least one end of each via-hole conductor reaching the surface of the protection part. And a plurality of terminal electrodes disposed on a mounting surface among the surfaces forming the surface of the main body, the mounting surface being a surface facing a circuit board when the circuit board is mounted, the plurality of terminal electrodes being electrically connected to the through-hole conductor, and the plurality of terminal electrodes being disposed at a distance of 10 [mu] m or more from the outer edge of the mounting surface.

Description

Technical Field

[0001] The present invention relates to a laminated ceramic capacitor and a circuit board. Background Art

[0002] In recent years, as electronic devices such as smartphones have become more sophisticated, the semiconductors they use have also become more powerful. Higher-performance semiconductors are more susceptible to noise, so to eliminate this noise, multilayer ceramic capacitors (MLCCs) are used as decoupling capacitors.

[0003] It is known that in multilayer ceramic capacitors used as decoupling capacitors, in order to reduce the equivalent series inductance (ESL), multiple conductors are provided for each polarity, electrically connecting the external electrodes arranged on the main surface to the plurality of internal electrodes, and arranged so that the magnetic fields generated by the current flowing through them cancel each other out (Patent Documents 1 and 2).

[0004] Furthermore, it is known that in a multilayer ceramic capacitor, external electrodes are arranged only on the mounting surface that contacts the circuit board when the capacitor is mounted on the circuit board. This reduces the area of solder that connects the multilayer ceramic capacitor to the circuit board and reduces acoustic noise (Patent Document 3).

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Laid-Open No. 7-201651

[0008] Patent Document 2: Japanese Patent Application Laid-Open No. 2006-135333

[0009] Patent Document 3: U.S. Patent No. 10617008 Summary of the Invention

[0010] Technical problem to be solved by the invention

[0011] The noise reduction effect of multilayer ceramic capacitors increases the closer they are to semiconductors. Consequently, there has been a recent demand for low-profile multilayer ceramic capacitors (low-profile MLCCs) with reduced component height to be mounted on the backside of a circuit board with a semiconductor. These low-profile MLCCs must be smaller than the distance between the circuit board with the semiconductor and the motherboard on which it is mounted, and can accommodate distances of 100μm or less.

[0012] Multiple multilayer ceramic capacitors are often used to enhance noise removal effectiveness. When multiple low-profile MLCCs are mounted on the backside of a circuit board with a semiconductor, they need to be interspersed within the gaps between the ball grid array (BGA) connecting the circuit board to the motherboard. Consequently, the spacing between the low-profile MLCCs can be very small.

[0013] In the conventional multilayer ceramic capacitor 100 ′, as Figure 4 As shown, the terminal electrodes 40 (40a, 40b) are arranged so as to contact the outer edge of the mounting surface 11. The pads on the circuit board on which the multilayer ceramic capacitor 100' is mounted are larger than the terminal electrodes 40 (40a, 40b). Therefore, as shown in FIG11 of Patent Document 3, they are arranged so as to protrude from the component when viewed from above. Therefore, when mounting multiple components close together, there is a limit to reducing the mounting spacing. Furthermore, when using solder paste for mounting on a circuit board, the solder will wet onto the surfaces perpendicular to the mounting surface of the multilayer ceramic capacitor, forming fillets, which also hinders reducing the mounting spacing between components.

[0014] The present invention has been made to solve the above-mentioned technical problems, and an object of the present invention is to provide a multilayer ceramic capacitor capable of reducing the distance between components when mounted on a circuit board and a circuit board with a small mounting distance between mounted components.

[0015] Technical solutions to technical problems

[0016] The inventors of the present invention conducted various studies to solve the aforementioned problems and discovered that the aforementioned purpose can be achieved by arranging the plurality of external electrodes of a multilayer ceramic capacitor on the mounting surface having the largest area among the surfaces forming the surface at predetermined intervals relative to the outer edge of the mounting surface, thereby completing the present invention.

[0017] That is, the first aspect of the present invention for solving the above-mentioned technical problems is a stacked ceramic capacitor, comprising: a main body, which has: a stacked body in which ceramic layers and internal electrodes mainly composed of metal are alternately stacked; a protective portion covering the surface of the above-mentioned stacked body; and a plurality of through-hole conductors electrically connected to the above-mentioned internal electrodes, which are arranged to penetrate the above-mentioned ceramic layers in the stacking direction of the above-mentioned stacked body, and at least one end reaches the surface of the above-mentioned protective portion; and a plurality of terminal electrodes, which are arranged on the mounting surface of each surface forming the surface of the above-mentioned main body, the above-mentioned mounting surface being the surface opposite to the circuit board when the circuit board is installed, and the above-mentioned plurality of terminal electrodes are all electrically connected to the above-mentioned through-hole conductors and are arranged at a distance of more than 10μm from the outer edge of the above-mentioned mounting surface.

[0018] A second aspect of the present invention for solving the above-mentioned technical problems is a circuit board having the multilayer ceramic capacitor according to the first aspect mounted thereon, wherein the pads electrically connected to the plurality of terminal electrodes are entirely covered by the multilayer ceramic capacitor in a plan view.

[0019] A third aspect of the present invention for solving the above-mentioned problems is a circuit board having a plurality of the multilayer ceramic capacitors according to the first aspect mounted thereon, wherein the interval between adjacently arranged multilayer ceramic capacitors is 50 μm or less.

[0020] Effects of the Invention

[0021] According to the present invention, it is possible to provide a multilayer ceramic capacitor capable of reducing the distance between components when mounted on a circuit board, and a circuit board with a small mounting distance between mounted components. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a schematic diagram (perspective view) showing the structure of a multilayer ceramic capacitor according to the first embodiment of the present invention.

[0023] Figure 2 yes Figure 1 AA cross-section (LT cross-section).

[0024] Figure 3 yes Figure 1 BB cross-sectional view (WT cross-sectional view).

[0025] Figure 4 This is a cross-sectional view (LT cross-sectional view) showing the arrangement of terminal electrodes of a conventional multilayer ceramic capacitor.

[0026] Figure 5 It is a schematic diagram (perspective view) showing the structure of a multilayer ceramic capacitor according to a second embodiment of the present invention.

[0027] Figure 6 It is a schematic diagram (LT cross-sectional view) showing the structure of a multilayer ceramic capacitor according to a third embodiment of the present invention.

[0028] Figure 7 It is a schematic diagram (WT cross-sectional view) showing the structure of a multilayer ceramic capacitor according to a fourth embodiment of the present invention.

[0029] Figure 8 This is a schematic diagram (LT cross-sectional view) of the structure of a circuit board according to a fifth embodiment of the present invention.

[0030] Figure 9 This is a schematic diagram (LT cross-sectional view) of the structure of a circuit board according to a sixth embodiment of the present invention. DETAILED DESCRIPTION

[0031] Hereinafter, the structure and effect of the present invention will be described in conjunction with the technical concept with reference to the accompanying drawings. However, the working mechanism includes inferences, and the correctness or inaccuracy thereof does not limit the present invention.

[0032] [Multilayer Ceramic Capacitors]

[0033] <First embodiment>

[0034] As a first embodiment, Figures 1 to 3 The present invention shows an embodiment of a multilayer ceramic capacitor according to the first aspect. The multilayer ceramic capacitor 100 of the first embodiment is in the shape of a rectangular parallelepiped, and has a pair of faces orthogonal to each of the three axes, namely, the L axis as the length direction, the W axis as the width direction, and the T axis as the height direction. The rectangular parallelepiped is not limited to a mathematically defined rectangular parallelepiped; any shape that is recognizable as a rectangular parallelepiped when observing the overall shape is sufficient. Therefore, shapes with smooth edges and corners, shapes with curved edges, and shapes with curved surfaces having small curvatures are also equivalent to the rectangular parallelepiped in the present invention. The dimensions of the ceramic capacitor 100 in the length (L) direction, the width (W) direction, and the height (T) direction can each independently take any value.

[0035] Examples of the dimensions of the multilayer ceramic capacitor 100 include an L-direction dimension of 200 μm to 2000 μm, a W-direction dimension of 100 μm to 2000 μm, a T-direction dimension of 30 μm to 220 μm, and a W / L ratio of 0.3 to 1.0. With respect to these dimensions, the L-direction dimension is preferably 400 μm to 1200 μm, the W-direction dimension is 400 μm to 1200 μm, the T-direction dimension is 40 μm to 150 μm, and the W / L ratio of 0.4 to 1.0. Even when mounted on the back side of a circuit board (the side opposite the semiconductor surface), the T-direction dimension is more preferably 100 μm or less to minimize the gap between the circuit board and the motherboard on which it is mounted.

[0036] The multilayer ceramic capacitor 100 according to the first embodiment is as follows Figure 2 (LT section) and Figure 3 As schematically shown in the cross-sectional view (WT cross section), the main body 10 comprises a laminate 20 in which ceramic layers 21 and internal electrodes 22 composed primarily of metal are alternately laminated in the T direction; and a protective portion 30 covering the surface of the laminate 20. The internal electrodes 22 include internal electrodes 22a of one polarity electrically connected to each other; and internal electrodes 22b of a different polarity from the internal electrodes 22a electrically connected to each other.

[0037] Protective portion 30 is disposed on the surface of main body 10 to cover the surface of laminate 20. Protective portion 30 includes a covering portion 31 disposed on a surface perpendicular to the T direction and edge portions 32 disposed on surfaces perpendicular to the W direction and the L direction.

[0038] The main body 10 has a plurality of through-hole conductors 23 electrically connected to the internal electrodes 22. These through-hole conductors 23 are arranged to penetrate the ceramic layers 21 in the stacking direction of the laminate 20, with at least one end reaching the surface of the protective portion 30 (covering portion 31). The through-hole conductors 23 include: a through-hole conductor 23a electrically connected to the internal electrode 22a; and a through-hole conductor 23b electrically connected to the internal electrode 22b. Figures 1 to 3 Although the illustrated multilayer ceramic capacitor 100 includes two through-hole conductors 23 , the number of through-hole conductors in the multilayer ceramic capacitor according to the first aspect of the present invention is not limited thereto.

[0039] The multilayer ceramic capacitor 100 of the first embodiment includes a plurality of terminal electrodes 40 arranged on a mounting surface 11, which is a surface facing a circuit board when the circuit board is mounted, among the surfaces forming the main body 10. The terminal electrodes 40 arranged on the mounting surface 11 include: a terminal electrode 40a electrically connected to the through-hole conductor 23a; and a terminal electrode 40b electrically connected to the through-hole conductor 23b. In addition, Figures 1 to 3 The illustrated multilayer ceramic capacitor 100 includes two terminal electrodes 40 , but the number of terminal electrodes in the multilayer ceramic capacitor according to the first aspect of the present invention is not limited to this. Furthermore, while the terminal electrodes 40 ( 40 a , 40 b ) of the multilayer ceramic capacitor 100 are disposed only on the mounting surface 11 , the multilayer ceramic capacitor according to the first aspect of the present invention may also be configured such that the terminal electrodes 40 ( 40 a , 40 b ) are disposed on a surface opposite the mounting surface 11 .

[0040] The thickness of the main body 10 obtained by subtracting the thickness of the terminal electrodes 40 ( 40 a , 40 b ) from the T-direction dimension of the described multilayer ceramic capacitor 100 is, for example, 20 μm to 200 μm, preferably 30 μm to 180 μm.

[0041] Hereinafter, each component constituting the multilayer ceramic capacitor 100 according to the first embodiment will be described in detail.

[0042] (Ceramic layer)

[0043] The ceramic layer 21 is formed of ceramic. The composition of the ceramic is not particularly limited as long as it can form a dense ceramic layer 21 by simultaneous firing with the internal electrode 22 described later, and can be appropriately selected according to the characteristics required of the multilayer ceramic capacitor. Examples of the composition of the ceramic include those containing barium titanate (BaTiO3) as the main component, those containing strontium titanate (SrTiO3) as the main component, and those containing BaTiO3 having a perovskite structure as the main component. 1-x-y Ca x Sr y Ti 1-z Zr z Examples include O3 as the main component. Ceramics may contain additive elements in addition to the above main components. Examples of additive elements include at least one selected from Mo, Nb, Ta, W, Mg, Mn, V, Cr, rare earth elements (Y, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, and Yb), and Co, Ni, Li, B, Na, K, and Si. The additive elements may be contained in the form of single elements or in the form of compounds mainly composed of oxides, nitrides, or carbides. In addition, the additive elements may exist in a state of solid solution in the above main components, or may form a different phase with the elements constituting the above main components or other additive elements.

[0044] (Internal electrode)

[0045] The internal electrodes 22 (22a, 22b) are primarily composed of metal. The type of metal is not particularly limited; nickel (Ni), copper (Cu), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), and alloys thereof can be used. Among these metals, nickel (Ni) is preferably used as the primary component due to its high heat resistance, the ability to increase the firing temperature when simultaneously firing with the ceramic layer 21 to form a dense ceramic layer 21, and its relatively low cost. As used herein, "primary component element" refers to the element with the highest atomic percentage (atom %).

[0046] The internal electrodes 22 ( 22 a , 22 b ) may contain, in addition to metal, ceramic particles having the same composition as that of the ceramic constituting the ceramic layer 21 , or a glass component.

[0047] (Department of Conservation)

[0048] Protective portion 30 protects ceramic layer 21 and internal electrodes 22. The material of protective portion 30 is not limited, as long as it has high electrical insulation and low permeability to degrading factors such as moisture. To ensure uniform shrinkage during firing during the manufacture of multilayer ceramic capacitor 100 and to alleviate internal stress within multilayer ceramic capacitor 100, the main component of protective portion 30 is preferably the same as that of the ceramic forming ceramic layer 21.

[0049] (Through-hole conductor)

[0050] Like the internal electrodes 22 (22a, 22b), the through-hole conductors 23 (23a, 23b) are primarily composed of metal. Examples of usable metals include the same metals as those used for the internal electrodes 22 (22a, 22b) described above. The composition of the through-hole conductors may differ from that of the internal electrodes 22 (22a, 22b), but is preferably the same as that of the internal electrodes 22 (22a, 22b). By making the through-hole conductors (23a, 23b) and the internal electrodes 22 (22a, 22b) identical in composition, the magnitude of shrinkage caused by firing can be made uniform during the manufacture of the multilayer ceramic capacitor 100, thereby suppressing deformation. Furthermore, the resistivity of the conductive paths of the multilayer ceramic capacitor 100 becomes uniform, thereby suppressing localized heat generation during use.

[0051] The diameter of the through-hole conductors ( 23 a , 23 b ) is not particularly limited, but is preferably 5 μm to 100 μm, more preferably 10 μm to 50 μm, from the perspective of ensuring the capacitance of the multilayer ceramic capacitor 100 and reducing resistance to suppress heat generation during circuit driving.

[0052] (Terminal electrode)

[0053] The terminal electrodes 40 ( 40 a , 40 b ) arranged on the mounting surface 11 are spaced at least 10 μm from the outer edge of the mounting surface 11 . By arranging the terminal electrodes 40 ( 40 a , 40 b ) sufficiently spaced from the outer edge of the mounting surface, the pads of the circuit board on which the multilayer ceramic capacitor 100 is mounted can be arranged so that they are entirely covered by the multilayer ceramic capacitor 100 when viewed from above. In other words, the pads do not protrude from the multilayer ceramic capacitor 100 when viewed from above. This reduces the mounting distance between components. Furthermore, when the multilayer ceramic capacitor 100 is mounted on a circuit board using solder paste, the formation of solder bumps due to solder wetting onto the circuit board can be suppressed, reducing the mounting distance between components. In particular, when the multilayer ceramic capacitor 100 is a low-profile MLCC with a T-direction dimension w of 100 μm or less, solder wetting exceeding the component height can be significantly suppressed, thereby preventing the occurrence of a situation where the circuit board carrying the multilayer ceramic capacitor cannot be mounted on a motherboard, and preventing the occurrence of short circuits during operation. To achieve the aforementioned effects, the distance between the terminal electrodes 40 ( 40 a , 40 b ) and the outer edge of the mounting surface 11 is preferably 12 μm or greater, more preferably 15 μm or greater, and even more preferably 18 μm or greater. While the upper limit of the distance between the terminal electrodes 40 ( 40 a , 40 b ) and the outer edge of the mounting surface 11 is not particularly limited, it is preferably 50 μm or less, more preferably 45 μm or less, and even more preferably 40 μm or less. By setting the distance below the upper limit, the area of each terminal electrode 40 ( 40 a , 40 b ) can be made small enough to be easily mounted on a circuit board, and the distance between the terminal electrodes 40 a and 40 b having different polarities can be increased, thereby improving electrical insulation.

[0054] The spacing between the terminal electrodes 40 ( 40 a , 40 b ) is preferably 70 μm or greater, more preferably 100 μm or greater, and even more preferably 120 μm or greater. By setting this spacing above the lower limit, the electrical insulation between the terminal electrodes 40 a and 40 b of different polarities can be improved. Meanwhile, the spacing between the terminal electrodes 40 ( 40 a , 40 b ) is preferably 400 μm or less, more preferably 300 μm or less, and even more preferably 200 μm or less. Setting this spacing below the upper limit allows the area of each terminal electrode 40 ( 40 a , 40 b ) to be easily mounted on a circuit board. Furthermore, if the multilayer ceramic capacitor 100 has a height dimension perpendicular to the mounting surface 11 of 100 μm or less, setting the spacing below the upper limit significantly improves mechanical strength. This is presumably because the deformation of the body 10 between the terminal electrodes 40 ( 40 a , 40 b ) when stress in the height direction is applied can be reduced.

[0055] The distance between the terminal electrodes 40 (40a, 40b) and the outer edge of the mounting surface 11 is determined using the following process. First, the mounting surface 11 of the multilayer ceramic capacitor 100 is observed using an optical microscope or a scanning electron microscope (SEM). An image is captured in which the outer edge of the mounting surface 11 and one terminal electrode 40 (40a, 40b) located near the outer edge are within the same field of view. Furthermore, if the steps described below can be performed on the captured image, multiple terminal electrodes 40 (40a, 40b) may not be present in the image. Next, a line segment forming the outer edge of the mounting surface 11 is determined in the captured image. If the outer edge of the mounting surface 11 is curved or meandering and does not form a line segment, a line segment obtained by linearly approximating the curve formed by the outer edge is used as the line segment forming the outer edge. Next, a line segment is created in the image that is parallel to the determined line segment and contacts the outer edge end of the terminal electrode 40 (40a, 40b). The distance between the created line segment and the line segment forming the outer edge is measured. Next, the value obtained by dividing the measured distance between the two line segments by the magnification at the time of observation is defined as the distance between the terminal electrode 40 ( 40 a , 40 b ) and the outer edge of the mounting surface 11 .

[0056] The spacing between the terminal electrodes 40 (40a, 40b) is determined using the following process. First, the mounting surface 11 of the multilayer ceramic capacitor 100 is observed using an optical microscope or a scanning electron microscope (SEM), and an image is captured in which the plurality of terminal electrodes 40 (40a, 40b) are within the same field of view. Next, in the captured image, the distance between a single point on the contour of a randomly selected terminal electrode 40 (40a, 40b) and a single point on the contour of the other terminal electrode 40 (40a, 40b) closest to the selected terminal electrode 40 (40a, 40b) is measured. The combination of points on the contour that minimizes this distance is determined. The value obtained by dividing the distance between the two points in this combination by the magnification used for observation is used as the spacing between the terminal electrodes 40 (40a, 40b).

[0057] The material of the terminal electrodes 40 ( 40 a , 40 b ) is not limited as long as it is conductive. Examples of the material include metals such as nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), silver (Ag), and gold (Au), alloys containing any of these as a main component element, and conductive resins.

[0058] The terminal electrodes 40 ( 40 a , 40 b ) may include a base conductor 41 in contact with the main body 10 and a plated conductor 42 formed on the surface of the base conductor 41 . With this structure, the terminal electrodes 40 ( 40 a , 40 b ) can improve adhesion to the main body 10 using the base conductor 41 and improve solder wettability during circuit board mounting using the plated conductor 42 .

[0059] Ni can be used as an example of a material for the base conductor 41 . The thickness of the base conductor 41 can be between 0.1 μm and 10 μm, preferably between 0.5 μm and 5 μm. The base conductor 41 is preferably positioned at a distance of at least 15 μm from the outer edge of the mounting surface 11 to maintain the distance between the terminal electrodes 40 ( 40 a , 40 b ) and the outer edge of the mounting surface 11 and to form the plated conductor 42 with sufficient thickness.

[0060] Here, the distance between the base conductor 41 and the outer edge of the mounting surface 11 is determined using the following process. First, the terminal electrode 40 (40a, 40b) closest to the outer edge of the mounting surface 11 is cut off from the multilayer ceramic capacitor 100, using a surface perpendicular to the mounting surface 11 and passing near the center of gravity of the surface parallel to the mounting surface 11. This observation sample can also be prepared by polishing the surface perpendicular to the mounting surface 11 to near the aforementioned center of gravity. Next, the observation sample is embedded in resin so that the cut surface is exposed, and the cut surface is mirror-polished. The mirror-polished cut surface is then observed using an optical microscope. The shorter of the two sides of the four sides forming the outer edge of the cut surface is selected as a reference line, and an image is captured with the reference line and the terminal electrode 40 (40a, 40b) closest to the reference line within the same field of view. If the outer edge of the cross-section curves or meanders without forming a side (line segment), a line segment obtained by linearly approximating the curve formed by the outer edge is used as the side forming the outer edge. Next, in the terminal electrode 40 ( 40 a , 40 b ) portion of the obtained image, the base conductor 41 is determined based on the difference in hue. Next, a line segment parallel to the reference line and in contact with the base conductor 41 is drawn in the image, and the distance between the drawn line segment and the reference line is measured. The distance between the two measured line segments is divided by the magnification used for observation, resulting in a value that is used as the distance between the base conductor 41 and the outer edge of the mounting surface 11.

[0061] The plated conductor 42 can be formed of a single layer or multiple layers. When the plated conductor 42 is multi-layered, the number of layers is preferably 2 or more and 4 or less. Examples of the material and structure of the plated conductor 42 include a structure in which Cu, Ni, and Sn are sequentially formed. The thickness of the plated conductor 42 can be 1 μm or more and 20 μm or less, preferably 3 μm or more and 10 μm or less.

[0062] The area of the terminal electrodes 40 ( 40 a , 40 b ), that is, the area of the terminal electrodes 40 ( 40 a , 40 b ) visible when viewing the multilayer ceramic capacitor 100 from a direction perpendicular to the mounting surface, is not particularly limited. It can be large enough to facilitate mounting on a circuit board and small enough to prevent short circuits between electrodes of different polarities. The ratio of the total area of the terminal electrodes 40 to the area of the mounting surface 11 is preferably 0.2 to 0.9, and more preferably 0.3 to 0.8.

[0063] <Second embodiment>

[0064] In another embodiment (second embodiment) of the multilayer ceramic capacitor according to the first aspect of the present invention, the number of terminal electrodes arranged on the mounting surface is four or more, and each terminal electrode has a different polarity from the nearest other terminal electrodes on the mounting surface. Figure 5 An example of a multilayer ceramic capacitor 200 according to the second embodiment is shown. Figure 5 , the number of terminal electrodes 40 arranged on the mounting surface 11 is shown as four, but the number of terminal electrodes arranged on the mounting surface is not limited to this. The multilayer ceramic capacitor 200 is configured such that the direction of current flowing through the through-hole conductors 23 (23a, 23b) electrically connected to each terminal electrode 40 (40a, 40b) is opposite to that of the closest through-hole conductor 23 (23a, 23b). Therefore, the magnetic fields generated by the current cancel each other out, which has the advantage of reducing ESL. This ESL reduction effect is significant when, for example, the distance between one of the two pairs of faces of the multilayer ceramic capacitor 200 that are parallel to the stacking direction and face each other, i.e., the dimension in the L direction, is Lμm, and the distance between the other pair, i.e., the dimension in the W direction, is Wμm (where L ≥ W), and the ratio of W to L, i.e., W / L, is between 0.8 and 1, that is, when the mounting surface 11 has a nearly square shape.

[0065] <Third embodiment>

[0066] In another embodiment (third embodiment) of the multilayer ceramic capacitor according to the first aspect of the present invention, two or more of the through-hole conductors are electrically connected to at least some of the internal electrodes. Figure 6 An example of a multilayer ceramic capacitor 300 according to the third embodiment is shown. Figure 6While an example is shown in which two via-hole conductors 23a are electrically connected to internal electrode 22a, and one via-hole conductor 23b is electrically connected to internal electrode 22b, the number of via-hole conductors (23a, 23b) connected to each internal electrode 22 (22a, 22b) is not limited to this. In multilayer ceramic capacitor 300, the current flowing through via-hole conductors 23a and internal electrode 22a is reduced, and the magnetic field generated by the current flowing through via-hole conductor 23a effectively cancels out the magnetic field generated by the current flowing through via-hole conductor 23b, thereby providing the advantage of reducing ESL.

[0067] <Fourth embodiment>

[0068] According to another embodiment (fourth embodiment) of the multilayer ceramic capacitor according to the first aspect of the present invention, in the third embodiment, at least one of the terminal electrodes is electrically connected to two or more of the through-hole conductors. Figure 7 An example of a multilayer ceramic capacitor 400 according to a fourth embodiment is shown. Figure 7 This figure shows a cross-section of a multilayer ceramic capacitor 400 in which two through-hole conductors (23a, 23b) are electrically connected to terminal electrodes 40 (40a, 40b). The cross-section of the multilayer ceramic capacitor 400 is obtained by cutting the through-hole conductors 40a in the L direction along a plane perpendicular to the L direction, dividing the L-direction dimension of the terminal electrode 40a into equal parts. However, the number and arrangement of through-hole conductors (23a, 23b) connected to the terminal electrodes 40 (40a, 40b) are not limited to this. In addition to the ESL reduction effect of the ceramic capacitor of the third embodiment, the multilayer ceramic capacitor 400 also has the advantages of reduced manufacturing labor due to the reduced number of terminal electrodes, and easier alignment when mounted on a circuit board.

[0069] [Method for Manufacturing Multilayer Ceramic Electronic Components]

[0070] The multilayer ceramic capacitor according to the first aspect of the present invention can be manufactured through the steps described below.

[0071] (A) Preparation of ceramic powder

[0072] First, prepare ceramic powder. Commercially available ceramic powder can be used as appropriate. When preparing the ceramic powder yourself, various raw material powders containing the constituent elements are mixed in a predetermined ratio and then pre-fired (temporarily fired). While mixing the various raw material powders in the predetermined ratio, various additives such as the aforementioned additive elements and sintering aids may be added. These additives may also be added to the pre-fired powder.

[0073] (B) Production of green sheets

[0074] Next, the aforementioned ceramic powder is mixed with a binder and a dispersion medium to prepare a slurry, and the slurry is formed into a sheet to obtain a green sheet.

[0075] The binder used should maintain the shape of the green sheet and volatilize without leaving any carbon residue during the binder removal process performed before firing. Examples of usable binders include polyvinyl alcohol, polyvinyl butyral, cellulose, urethane, and vinyl acetate. The amount of binder used is not particularly limited, but it will be removed in subsequent steps. Therefore, from the perspective of reducing raw material costs, it is preferably as small as possible to achieve the required formability and shape retention.

[0076] As the dispersion medium, a dispersion medium that does not cause aggregation of the pre-fired powder and the binder and can be easily removed by volatilization after forming a green sheet as described below is used. Examples of usable dispersion media include water and ethanol-based solvents.

[0077] Components such as a dispersant, a plasticizer, and a thickener may be added to the slurry to adjust the properties of the slurry.

[0078] The method for mixing the mixed powder, the binder, and the dispersion medium is not particularly limited as long as the mixing of impurities can be prevented and the components can be uniformly mixed.

[0079] As a method of forming the prepared slurry into a sheet to obtain a green sheet, a common method such as a doctor blade method and a die coating method can be adopted.

[0080] ((C) Formation of internal electrode pattern)

[0081] Next, a metal-containing internal electrode pattern is formed on the green sheet. This internal electrode pattern can be formed by printing or applying an internal electrode paste in a predetermined pattern, or by forming a metal film in a predetermined pattern by vapor deposition or sputtering. The internal electrode pattern is formed with sufficient margins to ensure electrical insulation from non-contacting via conductors in the via conductor pattern to be formed later.

[0082] When forming the internal electrode pattern using internal electrode paste, the internal electrode paste is obtained by mixing metal particles and a vehicle using a three-roll mill. The internal electrode paste may contain glass frit and ceramic powder in addition to the aforementioned components.

[0083] The type and amount of the binder and solvent contained in the vehicle used are not limited and may be appropriately selected in consideration of the viscosity of the internal electrode paste, ease of handling, compatibility with the green sheet, and the like.

[0084] The internal electrode paste can be printed on the green sheet using, for example, a screen printing mask having a predetermined internal electrode pattern formed thereon. During printing, the internal electrode paste can be printed while leaving out areas that will become edge portions when forming a multilayer ceramic capacitor.

[0085] ((D) Preparation of raw laminate)

[0086] Next, a predetermined number of green sheets with internal electrode patterns are stacked and pressure-bonded to form a green laminate. Lamination and pressure bonding can be performed using conventional methods, such as a method in which the stacked green sheets are heated and pressed in the stacking direction to achieve thermal compression bonding using an adhesive.

[0087] During lamination and pressure bonding, additional green sheets may be added to the ends of the stacking direction to serve as covers for the multilayer ceramic capacitor. In this case, the composition of the additional green sheets may be the same as or different from that of the green sheets printed with the internal electrode patterns. To ensure consistent shrinkage during firing, the composition of the additional green sheets is preferably the same as or similar to that of the green sheets containing the internal electrode precursors.

[0088] ((E) Formation of Through-Hole Conductor Pattern)

[0089] Next, holes are formed in the raw laminate, and the holes are filled with a conductor paste to form a through-hole conductor pattern. When forming the holes, commonly used methods such as a drill and a laser can be used. Among them, from the viewpoint of being able to form a smooth processed surface, it is preferred to use a laser. When filling the holes with the conductor paste, commonly used methods such as injection using a syringe and printing using a metal mask can be used. Among them, from the viewpoint of excellent filling properties when filling small-diameter holes, printing using a metal mask is preferred. The components of the conductor paste can be the same as those of the internal electrode paste mentioned above, and the amount of each component can be determined in consideration of the filling properties of the holes.

[0090] ((F) Formation of terminal electrode pattern)

[0091] Next, a terminal electrode pattern is formed on at least one of the surfaces (mounting surface) of the raw laminate perpendicular to the stacking direction. At this time, the raw sheet that will become the covering portion when used as a laminated ceramic capacitor may be pressed onto the surface on which the terminal electrode pattern is not formed, in such a manner as to cover the through-hole conductor pattern. The terminal electrode pattern can be formed by printing or applying a terminal electrode paste, or by forming a metal film by vapor deposition or sputtering. At this time, the terminal electrode pattern can be formed using a mask having a predetermined pattern, or by temporarily forming a paste film or a metal film on the entire mounting surface of the raw laminate and then removing the portion other than the terminal electrode pattern. When removing the portion other than the terminal electrode pattern, surface milling, drum polishing, laser processing, etc. can be used. When a terminal electrode paste is used to form the terminal electrode pattern, its components can be the same as those of the internal electrode paste described above, and the amount of each component can be determined so that a uniform pattern with a predetermined thickness can be obtained.

[0092] ((G) Chip preparation before firing)

[0093] Next, the green laminate is separated into individual pieces in the shape of the multilayer ceramic capacitors to produce pre-fired chips. Singulation can be performed using common methods such as dicing machines and laser cutting machines. Alternatively, after the green laminate is singulated to form surfaces where the internal electrode precursors are exposed, these surfaces are covered with a material for forming the edge portion to produce pre-fired chips.

[0094] ((H) Removal of adhesive)

[0095] Next, the resulting pre-fired chip is heated to volatilize and remove the binder. Heating conditions can be appropriately set based on the binder's volatilization temperature and content. For example, the temperature can be maintained at 200°C to 500°C in a nitrogen (N2) atmosphere for 5 to 20 hours.

[0096] ((I) Firing of Chips Before Firing)

[0097] Next, the pre-fired chip, from which the binder has been removed, is heated to a predetermined temperature for firing. When setting the firing conditions, it is preferable to consider the sintering properties of the ceramic powder, as well as the heat resistance and oxidation resistance of the metals contained in the internal electrode pattern, the through-hole conductor pattern, and the terminal electrode pattern. As an example of firing conditions, one can cite a temperature of 1100°C to 1400°C in a reducing atmosphere obtained by mixing nitrogen (N2), hydrogen (H2), and water vapor (H2O) for 10 minutes to 2 hours. After firing, a reoxidation treatment can also be performed in a nitrogen (N2) gas atmosphere or a low-oxygen atmosphere, maintaining the temperature at 600°C to 1000°C.

[0098] The sintered body obtained in this manner may be used as a laminated ceramic capacitor as it is, or may be used as a laminated ceramic capacitor after forming a conductive layer on the surface of the terminal electrode pattern by plating.

[0099] [Circuit Board]

[0100] <Fifth embodiment>

[0101] Referring to the fifth embodiment of the circuit board according to the second aspect of the present invention, Figure 8 The circuit board 500 of the fifth embodiment carries the multilayer ceramic capacitor 100 of the first embodiment and includes a pad 51 electrically connected to a plurality of terminal electrodes 40 (40a, 40b). The pad 51 is entirely covered by the multilayer ceramic capacitor 100 when viewed from above, that is, when viewed from a direction perpendicular to the circuit board 500. Figure 8 In the example, multilayer ceramic capacitor 100 is mounted on pad 51 of circuit board 500 via solder 52. In this case, pad 51 is entirely covered by multilayer ceramic capacitor 100 when viewed from above. In other words, pad 51 is located further inward than the outer edge of mounting surface 11 of multilayer ceramic capacitor 100. This allows pad 51 to be spaced farther from pads (not shown) used to connect adjacent components than from the spacing between components. This ensures electrical insulation between components and reduces spacing between adjacent components. This increases the number of components that can be mounted in a given location, or reduces the size of the circuit board when the same number of components of the same size are mounted.

[0102] <Sixth embodiment>

[0103] Referring to the sixth embodiment of the circuit board according to the third aspect of the present invention, Figure 9 The circuit board 600 of the sixth embodiment is provided with a plurality of the multilayer ceramic capacitors 100 according to the first embodiment, and the interval between adjacent multilayer ceramic capacitors 100 is 50 μm or less. Figure 9 As shown, in the circuit board 600 of the sixth embodiment, when the terminal electrodes 40 ( 40 a , 40 b ) of the multilayer ceramic capacitor 100 are joined to the pads 61 using solder 62, no solder bumps are formed due to wetting of the solder 62. Therefore, multilayer ceramic capacitors can be arranged very close to each other, at a distance of 50 μm or less. This increases the number of components that can be mounted in a given location, or reduces the size of the circuit board when the same number of components of the same size are mounted.

[0104] [Example]

[0105] Hereinafter, the present invention will be described in more detail with reference to Examples, but the present invention is not limited to these Examples.

[0106] [Example 1]

[0107] (Production of green sheets)

[0108] As ceramic powder, pre-fired barium titanate (BaTiO3) powder was prepared. A polyvinyl butyral binder and an ethanol solvent were added to the powder and mixed using a wet ball mill. The resulting mixed slurry was shaped using a spatula to produce a green sheet with a thickness of 1 μm.

[0109] (Manufacturing of Multilayer Ceramic Capacitors)

[0110] After screen printing the internal electrode paste containing nickel powder as metal on the obtained green sheet to form the internal electrode pattern, the green sheet is stacked 50 layers, and 5 green sheets without internal electrode paste printed on them are further overlapped on the upper and lower sides to form the covering portion, and then hot-pressed to obtain a green laminate. After forming holes at the specified positions of the green laminate by laser, a through-hole conductor forming paste containing nickel powder as metal is scraped into the holes through a metal mask. The green sheet that will become the covering portion is pasted on one side of the green laminate filled with the through-hole conductor forming paste, and the terminal electrode forming paste containing nickel powder as metal is screen printed on the other side. The screen at this time is a pattern that becomes the shape of the base electrode and is separated from the outer edge of the mounting surface by a specified interval. The green laminate is singulated to obtain a chip before firing. After heating the pre-fired chip to 300°C in a nitrogen atmosphere to remove the binder, the temperature was raised to 1200°C in a so-called reducing-steam atmosphere, obtained by introducing water vapor into a reducing gas containing hydrogen in nitrogen, and held for 2 hours for firing. The temperature was then lowered to near room temperature to obtain a sintered body. On the nickel layer formed by sintering the terminal electrode forming paste on the surface of the obtained sintered body, layers of copper, nickel, and tin were formed in this order by plating, thereby obtaining the multilayer ceramic capacitor of Example 1. The obtained multilayer ceramic capacitor has two terminal electrodes with a rectangular shape of 250μm × 480μm formed on a mounting surface with a rectangular shape of 1000μm × 500μm, separated by a distance of 10μm from the outer edge of the mounting surface. The T-direction dimension of this multilayer ceramic capacitor is 100μm.

[0111] (Solder wetting test)

[0112] The multilayer ceramic capacitor of Example 1 was mounted on a circuit board with 250μm x 480μm pads spaced 480μm apart, and a solder wetting test was conducted. Fifty components were tested, and those without solder bumps were considered acceptable. The results are shown in Table 1.

[0113] [Examples 2 and 3]

[0114] Regarding the terminal electrodes, multilayer ceramic capacitors of Examples 2 and 3 were fabricated in the same manner as in Example 1, except that two terminal electrodes, each measuring 300 μm × 200 μm, were formed 15 μm apart from the outer edge of the mounting surface (Example 2), and two terminal electrodes, each measuring 200 μm × 150 μm, were formed 20 μm apart from the outer edge of the mounting surface (Example 3). Solder wetting tests were conducted on these capacitors. The results are shown in Table 1.

[0115] [Comparative Examples 1 and 2]

[0116] Regarding the terminal electrodes, multilayer ceramic capacitors of Comparative Examples 1 and 2 were produced in the same manner as in Example 1, except that two terminal electrodes, each having a 260 μm × 500 μm rectangular shape, were formed in contact with the outer edge of the mounting surface (Comparative Example 1), and two terminal electrodes, each having a 255 μm × 490 μm rectangular shape, were formed 5 μm apart from the outer edge of the mounting surface (Comparative Example 2). Solder wetting tests were conducted on these capacitors. Table 1 shows the results.

[0117] Table 1

[0118]

[0119] The above results show that the multilayer ceramic capacitor of the embodiment, in which the multiple terminal electrodes formed on the mounting surface are spaced at least 10 μm from the outer edge of the mounting surface, does not generate solder bumps due to solder wetting when mounted on a circuit board. On the other hand, the multilayer ceramic capacitor of the comparative example, in which the terminal electrodes formed on the mounting surface are spaced less than 10 μm from the outer edge of the mounting surface, does generate solder bumps when mounted on a circuit board.

[0120] This specification also describes the following techniques.

[0121] (Note 1)

[0122] A stacked ceramic capacitor comprising:

[0123] A rectangular parallelepiped body comprising: a laminated body in which ceramic layers and internal electrodes mainly composed of metal are alternately laminated; a protective portion covering the surface of the laminated body; and a plurality of through-hole conductors electrically connected to the internal electrodes, the through-hole conductors being arranged to penetrate the ceramic layers in the stacking direction of the laminated body and having at least one end reaching the surface of the protective portion; and

[0124] A plurality of terminal electrodes are arranged on the mounting surface of each surface forming the surface of the main body, the mounting surface being the surface opposite to the circuit board when the circuit board is mounted,

[0125] The plurality of terminal electrodes are electrically connected to the through-hole conductors and are arranged at intervals of 10 μm or more from the outer edge of the mounting surface.

[0126] (Note 2)

[0127] The multilayer ceramic capacitor according to Supplementary Note 1, wherein:

[0128] The outer edge is determined by approximating an outline appearing in an optical microscope image or a scanning electron microscope (SEM) image obtained from a vertical direction with respect to the mounting surface to a rectangular shape.

[0129] (Note 3)

[0130] The multilayer ceramic capacitor according to Supplementary Note 1 or Supplementary Note 2, wherein:

[0131] The plurality of terminal electrodes include a base conductor in contact with a main body and a plated conductor formed on a surface of the base conductor, and the base conductor is arranged at a distance of 15 μm or more from an outer edge of the mounting surface.

[0132] (Note 4)

[0133] The multilayer ceramic capacitor according to any one of Supplementary Notes 1 to 3, wherein:

[0134] The height as a dimension in a direction perpendicular to the mounting surface is 100 μm or less.

[0135] (Note 5)

[0136] The multilayer ceramic capacitor according to any one of Supplementary Notes 1 to 4, wherein

[0137] The interval between the plurality of terminal electrodes is 400 μm or less.

[0138] (Note 6)

[0139] The multilayer ceramic capacitor according to any one of Supplementary Notes 1 to 5, wherein:

[0140] The number of the plurality of terminal electrodes is four or more, and each of the terminal electrodes has a different polarity from another terminal electrode that is closest to the terminal electrode in the mounting surface.

[0141] (Note 7)

[0142] The multilayer ceramic capacitor according to any one of Supplementary Notes 1 to 6, wherein:

[0143] Two or more of the through-hole conductors are electrically connected to at least a portion of the internal electrodes.

[0144] (Note 8)

[0145] The multilayer ceramic capacitor according to Supplementary Note 7, wherein:

[0146] At least one of the terminal electrodes is electrically connected to two or more of the through-hole conductors.

[0147] (Note 9)

[0148] A circuit board having the multilayer ceramic capacitor according to any one of Supplementary Notes 1 to 8 mounted thereon, wherein the entire pads electrically connected to the plurality of terminal electrodes are covered by the multilayer ceramic capacitor in a plan view.

[0149] (Note 10)

[0150] A circuit board having a plurality of the multilayer ceramic capacitors according to any one of Supplementary Notes 1 to 8 mounted thereon, wherein the interval between adjacently arranged multilayer ceramic capacitors is 50 μm or less.

[0151] Industrial applicability

[0152] The present invention provides a multilayer ceramic capacitor capable of reducing component spacing when mounted on a circuit board, and a circuit board with small mounting spacing between mounted components. Such a multilayer ceramic capacitor and circuit component are useful in contributing to the miniaturization of electronic devices equipped with high-performance semiconductors.

[0153] Description of Reference Signs

[0154] 100, 100', 200, 300, 400 multilayer ceramic capacitors

[0155] 10 main body

[0156] 11 Mounting surface

[0157] 20-layer stack

[0158] 21 ceramic layers

[0159] 22 (22a, 22b) internal electrodes

[0160] 23 (23a, 23b) through-hole conductor

[0161] 30 Protection Department

[0162] 31 Covering

[0163] 32 Edge

[0164] 40 (40a, 40b) terminal electrodes

[0165] 41 base conductor

[0166] 42 plated conductor

[0167] 500, 600 circuit boards

[0168] 51, 61 pads

[0169] 52, 62 solder.

Claims

1. A multilayer ceramic capacitor, characterized in that: include: A rectangular parallelepiped body comprising: a laminated body in which ceramic layers and internal electrodes mainly composed of metal are alternately laminated; a protective portion covering the surface of the laminated body; and a plurality of through-hole conductors electrically connected to the internal electrodes, the through-hole conductors being arranged to penetrate the ceramic layers in the stacking direction of the laminated body and having at least one end reaching the surface of the protective portion; and A plurality of terminal electrodes are arranged on the mounting surface of each surface forming the surface of the main body, the mounting surface being the surface facing the circuit board when the circuit board is mounted, The plurality of terminal electrodes are all electrically connected to the through-hole conductors and are arranged at intervals of 10 μm or more from the outer edge of the mounting surface.

2. The multilayer ceramic capacitor according to claim 1, wherein: The outer edge is determined by approximating an outline appearing in an optical microscope image or a scanning electron microscope (SEM) image obtained from a vertical direction with respect to the mounting surface to a rectangle.

3. The multilayer ceramic capacitor according to claim 1 or 2, wherein: The plurality of terminal electrodes include a base conductor in contact with a main body and a plated conductor formed on a surface of the base conductor, wherein the base conductor is arranged at a distance of 15 μm or more from an outer edge of the mounting surface.

4. The multilayer ceramic capacitor according to any one of claims 1 to 3, wherein: The height as a dimension in a direction perpendicular to the mounting surface is 100 μm or less.

5. The multilayer ceramic capacitor according to any one of claims 1 to 4, wherein: The plurality of terminal electrodes are spaced apart from each other by 400 μm or less.

6. The multilayer ceramic capacitor according to any one of claims 1 to 5, wherein: The number of the plurality of terminal electrodes is four or more, and each of the terminal electrodes has a different polarity from another terminal electrode that is closest to the mounting surface.

7. The multilayer ceramic capacitor according to any one of claims 1 to 6, wherein: Two or more of the through-hole conductors are electrically connected to at least some of the internal electrodes.

8. The multilayer ceramic capacitor according to claim 7, wherein: At least one of the terminal electrodes is electrically connected to two or more of the through-hole conductors.

9. A circuit board, characterized in that: The multilayer ceramic capacitor according to any one of claims 1 to 8 is mounted, and the entire pad electrically connected to the plurality of terminal electrodes is covered by the multilayer ceramic capacitor in a plan view.

10. A circuit board, characterized in that: A plurality of the multilayer ceramic capacitors according to any one of claims 1 to 8 are mounted, wherein the interval between adjacently arranged multilayer ceramic capacitors is 50 μm or less.

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