Communication circuit, battery management system, battery pack and electric equipment

Abstract

The invention discloses a communication circuit, which comprises a first signal acquisition circuit and a second signal acquisition circuit, and is characterized in that the first signal acquisition circuit is electrically connected with a first grounding end, and the second signal acquisition circuit is electrically connected with a second grounding end; a control unit, a first switch unit, a second switch unit, a first isolation communication circuit, a first power supply and a second power supply; the communication circuit is configured to be at least one of the following modes: i) in response to a first control signal and a communication signal sent to the first switch unit by the control unit, the first control signal is sent to the second switch unit, the first switch unit is switched on or switched off, the second switch unit is switched off, and the control unit communicates with the first signal acquisition circuit; and ii) in response to a second control signal sent to the first switch unit and the second switch unit by the control unit, the first switch unit is switched off, the second switch unit is switched on, and the control unit communicates with the second signal acquisition circuit through the first isolation communication circuit.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of communication technology, and in particular to a communication circuit, a battery management system, a battery pack, and an electrical device. Background Art

[0002] Typically, a battery pack includes multiple cells and signal acquisition circuits electrically connected to the cells. The cells power the signal acquisition circuits, which then collect and detect cell parameters, including voltage and temperature. When the number of cells in a battery pack exceeds a certain limit, a single chip's pins are insufficient, necessitating the use of two or more signal acquisition circuits. Summary of the Invention

[0003] Embodiments of the present application provide a communication circuit, a battery management system, a battery pack, and an electrical device.

[0004] In a first aspect, an embodiment of the present application provides a communication circuit, comprising: a first signal acquisition circuit and a second signal acquisition circuit connected in series with the first signal acquisition circuit, the first signal acquisition circuit being electrically connected to a first ground terminal, the second signal acquisition circuit being electrically connected to a second ground terminal, and the voltage value of the second ground terminal relative to the first ground terminal being a positive value; a control unit, a first switch unit, a second switch unit, a first isolated communication circuit, a first power supply and a second power supply, the control unit being electrically connected to the first power supply, the first switch unit, the second switch unit and the first communication port of the first isolated communication circuit, the first communication port being electrically connected to the first signal acquisition circuit through the first switch unit, and the second communication port of the first isolated communication circuit The communication port is electrically connected to the second signal acquisition circuit, and the power port of the first isolated communication circuit is electrically connected to the first power supply and the second power supply through the second switch unit; the communication circuit is configured in at least one of the following ways: i) in response to the control unit sending a first control signal and a communication signal to the first switch unit, sending a first control signal to the second switch unit, the first switch unit is turned on or off, the second switch unit is turned off, and the control unit communicates with the first signal acquisition circuit; ii) in response to the control unit sending a second control signal to the first switch unit and the second switch unit, the first switch unit is turned off, the second switch unit is turned on, and the control unit communicates with the second signal acquisition circuit through the first isolated communication circuit.

[0005] The first signal acquisition circuit 10 and the second signal acquisition circuit 20 share a pair of communication ports (ie, two I / O ports) when communicating with the control unit 30 , thereby reducing the occupancy of the I / O ports of the control unit 30 .

[0006] In one or more embodiments, the control unit includes a first I / O port, a second I / O port, and a third I / O port, and the first switch unit includes a first switch and a second switch; the first switch is electrically connected to the first I / O port, the second I / O port, the first communication port, and the first signal acquisition circuit, and the second switch is electrically connected to the first I / O port, the third I / O port, the first communication port, and the first signal acquisition circuit; the communication circuit is also configured as follows: in response to the control unit sending a first control signal to the first switch unit and the second switch unit, and sending a first communication signal to the first switch unit, the first switch unit is turned on, the second switch unit is turned off, and the control unit communicates with the first signal acquisition circuit; in response to the control unit sending a first control signal to the first switch unit and the second switch unit, and sending a second communication signal to the first switch unit, the first switch unit is turned off, the second switch unit is turned off, and the control unit communicates with the first signal acquisition circuit.

[0007] In one or more embodiments, the first switch unit further includes a first resistor, a second resistor, a third resistor, and a fourth resistor; the first communication port includes a first clock signal port and a first data signal port; the first resistor is arranged between the first I / O port and the first end of the first switch, the second resistor is arranged between the first end of the first switch and the second end of the first switch, the second end of the first switch is electrically connected to the first data signal port and the second I / O port, and the third end of the first switch is electrically connected to the first signal acquisition circuit; the fourth resistor is arranged between the first I / O port and the first end of the second switch, the third resistor is arranged between the first end of the second switch and the second end of the second switch, the second end of the second switch is electrically connected to the first clock signal port and the third I / O port, and the third end of the second switch is electrically connected to the first signal acquisition circuit; wherein, the first switch is an N-type FET or an NPN-type transistor, and the second switch is an N-type FET or an NPN-type transistor.

[0008] In one or more embodiments, the second switch unit includes a first isolation element and a third switch, and the power port of the first isolated communication circuit includes a first power port and a second power port; the third switch is electrically connected to the first I / O port, the first power supply and the first power port of the control unit, and the first isolation element is electrically connected to the first I / O port, the first power supply, the second power supply and the second power port; the communication circuit is also configured as follows: in response to the control unit sending a second control signal to the first switch unit and the second switch unit, the first switch unit is turned off, the second switch unit is turned on, the first power supply and the second power supply supply the first isolated communication circuit, and the control unit communicates with the second signal acquisition circuit through the first isolated communication circuit.

[0009] In one or more embodiments, the second switch unit further includes a fifth resistor, a sixth resistor, and a seventh resistor; the fifth resistor is arranged between the first I / O port and the first port of the first isolation element, the second port of the first isolation element is electrically connected to the first power supply, the third port of the first isolation element is electrically connected to the second power supply, and the fourth port of the first isolation element is electrically connected to the second power supply port; the sixth resistor is arranged between the first end of the third switch and the first I / O port, the seventh resistor is arranged between the first end of the third switch and the second end of the third switch, the second end of the third switch is electrically connected to the first power supply, and the third end of the third switch is electrically connected to the first power supply port; wherein, the third switch is a P-type FET or a PNP-type transistor, and the first isolation element includes a photocoupler or a photo MOS.

[0010] In summary, the process of communication between the first signal acquisition circuit 10, one of the second signal acquisition circuits 20 and the control unit 30 is realized, and in the above process, only three I / O ports of the control unit 30 need to be occupied. Compared with the solution of the related technology that requires occupying four I / O ports of the control unit, the present application can reduce the number of occupied I / O ports, and is conducive to saving hardware resources and improving the scalability of the system.

[0011] In one or more embodiments, the communication circuit further includes an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor and a thirteenth resistor; the first communication port includes a first clock signal port and a first data signal port, and the second communication port includes a second clock signal port and a second data signal port; the first clock signal port and the third I / O port are both electrically connected to the first power supply through the eighth resistor, the first data signal port and the second I / O port are both electrically connected to the first power supply through the ninth resistor, the second clock signal port and the clock signal port of the second signal acquisition circuit are electrically connected to the second power supply through the eleventh resistor, the second data signal port and the data signal port of the second signal acquisition circuit are electrically connected to the second power supply through the tenth resistor, the data signal port of the first signal acquisition circuit is electrically connected to the first power supply through the twelfth resistor, and the clock signal port of the first signal acquisition circuit is electrically connected to the first power supply through the thirteenth resistor.

[0012] In one or more embodiments, the communication circuit further includes: a third power supply; a third signal acquisition circuit connected in series with the second signal acquisition circuit, the third signal acquisition circuit being electrically connected to the third ground terminal, the voltage value of the third ground terminal relative to the second ground terminal being a positive value; a third switch unit and a second isolated communication circuit, the control unit being electrically connected to the third switch unit and the third communication port of the second isolated communication circuit, the fourth communication port of the second isolated communication circuit being electrically connected to the third signal acquisition circuit; the power supply port of the second isolated communication circuit being electrically connected to the first power supply and the third power supply through the third switch unit; the communication circuit being configured in at least one of the following ways: i) in response to the control unit sending the first control signal and the communication signal to the first switch unit, sending the first control signal to the second switch unit, and sending the third switch unit The control unit sends a first control signal, the first switch unit is turned on or off, the second switch unit and the third switch unit are turned off, and the control unit communicates with the first signal acquisition circuit; ii) in response to the control unit sending a second control signal to the first switch unit and the second switch unit, sending the first control signal to the third switch unit, the first switch unit and the third switch unit are turned off, the second switch unit is turned on, and the control unit communicates with the second signal acquisition circuit through the first isolated communication circuit; iii) in response to the control unit sending a second control signal to the first switch unit, sending the first control signal to the second switch unit, sending the second control signal to the third switch unit, the first switch unit and the second switch unit are turned off, the third switch unit is turned on, and the control unit communicates with the third signal acquisition circuit through the second isolated communication circuit.

[0013] In one or more embodiments, the control unit includes a first I / O port, a second I / O port, a third I / O port, a fourth I / O port and a fifth I / O port; the first I / O port is electrically connected to the first switch unit, the fourth I / O port is electrically connected to the second switch unit, the fifth I / O port is electrically connected to the third switch unit, and the third communication port is electrically connected to the second I / O port and the third I / O port.

[0014] The first signal acquisition circuit 10, the second signal acquisition circuit 20 and the third signal acquisition circuit 70 share a pair of communication ports when communicating with the control unit 30, and occupy a total of five I / O ports. Compared with the solution of the related art that requires occupying six I / O ports, the I / O occupancy of the control unit 30 is reduced.

[0015] In one or more embodiments, the third switch unit includes a second isolation element and a fourth switch, and the power port of the second isolated communication circuit includes a third power port and a fourth power port; the fourth switch is electrically connected to the fifth I / O port, the first power supply and the third power port, and the second isolation element is electrically connected to the fifth I / O port, the first power supply, the third power supply and the fourth power port; the communication circuit is also configured as follows: in response to the control unit sending a second control signal to the first switch unit, sending a first control signal to the second switch unit, and sending a second control signal to the third switch unit, the first switch unit and the second switch unit are turned off, the third switch unit is turned on, the first power supply and the third power supply supply power to the second isolated communication circuit, and the control unit communicates with the third signal acquisition circuit through the second isolated communication circuit.

[0016] In one or more embodiments, the third switch unit also includes a fourteenth resistor, a fifteenth resistor and a sixteenth resistor; the fourteenth resistor is arranged between the fifth I / O port and the first port of the second isolation element, the second port of the second isolation element is electrically connected to the first power supply, the third port of the second isolation element is electrically connected to the third power supply, and the fourth port of the second isolation element is electrically connected to the fourth power supply port; the fifteenth resistor is arranged between the first end of the fourth switch and the fifth I / O port, the sixteenth resistor is arranged between the first end of the fourth switch and the second end of the fourth switch, the second end of the fourth switch is electrically connected to the first power supply, and the third end of the fourth switch is electrically connected to the third power supply port; wherein the fourth switch is a P-type FET or a PNP-type transistor, and the second isolation element includes a photocoupler or a photo MOS.

[0017] In one or more embodiments, the communication circuit further includes an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a seventeenth resistor, and an eighteenth resistor; the first communication port includes a first clock signal port and a first data signal port, the second communication port includes a second clock signal port and a second data signal port, the third communication port includes a third clock signal port and a third data signal port, and the fourth communication port includes a fourth clock signal port and a fourth data signal port; the first clock signal port, the third clock signal port, and the third I / O port are all electrically connected to the first power supply through the eighth resistor, and the first data signal port, the third data signal port, and the second I / O port are all electrically connected to the first power supply through the ninth resistor. The resistor is electrically connected to the first power supply, the second clock signal port and the clock signal port of the second signal acquisition circuit are both electrically connected to the second power supply through the eleventh resistor, the second data signal port and the data signal port of the second signal acquisition circuit are both electrically connected to the second power supply through the tenth resistor, the data signal port of the first signal acquisition circuit is both electrically connected to the first power supply through the twelfth resistor, the clock signal port of the first signal acquisition circuit is both electrically connected to the first power supply through the thirteenth resistor, the fourth clock signal port and the clock signal port of the third signal acquisition circuit are both electrically connected to the third power supply through the eighteenth resistor, and the fourth data signal port and the data signal port of the third signal acquisition circuit are both electrically connected to the third power supply through the seventeenth resistor.

[0018] In a second aspect, an embodiment of the present application provides a battery management system, comprising a communication circuit as in the first aspect.

[0019] In a third aspect, an embodiment of the present application provides a battery pack, comprising: a battery cell module and a battery management system, the battery management system including the communication circuit as in the second aspect; the battery cell module including a plurality of battery cells, the plurality of battery cells being connected in series, a first portion of the battery cells forming a first battery cell unit, and a second portion of the battery cells forming a second battery cell unit; a first signal acquisition circuit being electrically connected to the first battery cell unit, and a second signal acquisition circuit being electrically connected to the second battery cell unit.

[0020] In fourth aspect, an embodiment of the present application provides a battery pack, comprising: a battery cell module and a battery management system, the battery management system including the communication circuit as in the second aspect; the battery cell module includes a plurality of battery cells, the plurality of battery cells are connected in series, and among the plurality of battery cells, a first portion of the battery cells forms a first battery cell unit, a second portion of the battery cells forms a second battery cell unit, and a third portion of the battery cells forms a third battery cell unit; the first signal acquisition circuit is electrically connected to the first battery cell unit, the second signal acquisition circuit is electrically connected to the second battery cell unit, and the third signal acquisition circuit is electrically connected to the third battery cell unit.

[0021] In a fifth aspect, an embodiment of the present application provides an electrical device, including a battery pack and a load as described in the third aspect or the fourth aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] One or more embodiments are exemplarily described by the figures in the accompanying drawings, which are not intended to limit the embodiments. Elements with the same reference numerals in the drawings represent similar elements.

[0023] Figure 1 This is a schematic diagram of the battery pack provided in the embodiment of the present application. Figure 1 ;

[0024] Figure 2 This is a schematic diagram of the battery pack provided in the embodiment of the present application. Figure 2 ;

[0025] Figure 3 This is a schematic diagram of the battery pack provided in the embodiment of the present application. Figure 3 ;

[0026] Figure 4 This is a schematic diagram of the battery pack provided in the embodiment of the present application. Figure 4 ;

[0027] Figure 5 This is a schematic diagram of the battery pack provided in the embodiment of the present application. Figure 5 ;

[0028] Figure 6 This is a schematic diagram of the battery pack provided in the embodiment of the present application. Figure 6 ;

[0029] Figure 7 This is a schematic diagram of the battery pack provided in the embodiment of the present application. Figure 7 ;

[0030] Figure 8 This is a schematic diagram of the battery pack provided in the embodiment of the present application. Figure 8 ;

[0031] Figure 9 This is a schematic diagram of the battery pack provided in the embodiment of the present application. Figure 9 ;

[0032] Figure 10 This is a schematic diagram of the battery pack provided in the embodiment of the present application. Figure 10 ;

[0033] Figure 11 This is a schematic diagram of the battery pack provided in the embodiment of the present application. Figure 10 one. DETAILED DESCRIPTION

[0034] To make the objectives, technical solutions, and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, not all of them. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application.

[0035] It should be noted that, when an element is referred to as being “connected to” another element, it may be directly connected to the other element, or one or more intervening elements may exist therebetween.

[0036] In addition, the technical features involved in the various embodiments of the present application described below can be combined with each other as long as there is no structural conflict between them.

[0037] Please refer to Figure 1 , Figure 1 This is a schematic diagram of the structure of the battery pack provided in the embodiment of the present application. Figure 1 As shown, the battery pack 1 includes a battery management system 1000 and a battery cell module 2000. The battery cell module 2000 and the battery management system 1000 are connected via a bus or a power harness. The bus or the power harness transmits the electric energy of the battery cell module 2000 to the load, thereby enabling the battery pack 1 to discharge the load. The bus or the power harness transmits the electric energy of the charging device to the battery cell module 2000, thereby enabling the charging device to charge the battery pack 1.

[0038] In some embodiments, the battery cell module 2000 includes a plurality of battery cells. Figure 1 As shown, the battery module 2000 includes battery cells BAT11, ..., battery cells BAT1 M 、Battery cell BAT21、…、Battery cell BAT2 N M and N are both integers greater than or equal to 1, and M and N can be the same or different. Battery cell BAT11, ..., battery cell BAT1 M 、Battery cell BAT21、…、Battery cell BAT2 N Connect in series, cells BAT11, ..., wire BAT1 M Forming the first battery cell unit A1, battery cells BAT21, ..., battery cells BAT2 N A second battery cell unit A2 is formed.

[0039] The battery management system 1000 includes a communication circuit 100, which includes a first signal acquisition circuit 10 and a second signal acquisition circuit 20. The first signal acquisition circuit 10 and the second signal acquisition circuit 20 are connected in series. M The positive electrode is connected to the first signal acquisition circuit 10, the negative electrode of the battery cell BAT21 and the battery cell BAT2N The positive electrode is connected to the second signal acquisition circuit 20, the first battery cell unit A1 supplies power to the first signal acquisition circuit 10, and the second battery cell unit A2 supplies power to the second signal acquisition circuit 20. The first battery cell unit A1 and the first signal acquisition circuit 10 share a common ground, that is, the first battery cell unit A1 and the first signal acquisition circuit 10 are connected to the same first ground terminal GND1, the first ground terminal GND1 is connected to the negative electrode of the battery cell BAT11, and is also connected to the negative electrode B- of the battery cell module 2000, the second battery cell unit A2 and the second signal acquisition circuit 20 share a common ground, that is, the second battery cell unit A2 and the second signal acquisition circuit 20 are connected to the same second ground terminal GND2, the second ground terminal GND2 is connected to the negative electrode of the battery cell BAT21, and is also connected to the battery cell BAT1 M It can be understood that the first ground terminal GND1 is at the same potential as the negative electrode of the battery cell BAT11, the second ground terminal GND2 is at the same potential as the negative electrode of the battery cell BAT21, and the second ground terminal GND2 is also at the same potential as the negative electrode of the battery cell BAT1. M The positive electrode of the second ground terminal GND2 is equal to the potential, and the voltage value of the second ground terminal GND2 relative to the voltage value of the first ground terminal GND1 is positive. Specifically, the voltage value of the second ground terminal GND2 relative to the first ground terminal GND1 is the voltage value of the battery cell BAT1. M The voltage value of the first battery cell unit A1 relative to the first ground terminal GND1 is the voltage of the battery cell BAT11, ..., the battery cell BAT1 M The voltage value of the second battery cell unit A2 relative to the first ground terminal GND1 is BAT11, ..., battery cell BAT1 M 、Battery cell BAT21、…、Battery cell BAT2 N sum.

[0040] In some embodiments, the first signal acquisition circuit 10 and the second signal acquisition circuit 20 collect and detect parameters of the battery cell module 2000, including voltage and temperature. In one specific embodiment, the first signal acquisition circuit 10 and the second signal acquisition circuit 20 both include an analog front-end (AFE). The first signal acquisition circuit 10 measures the voltage and temperature of the first battery cell A1, while the second signal acquisition circuit 20 measures the voltage and temperature of the second battery cell A2.

[0041] The communication circuit 100 further includes a control unit 30. The first signal acquisition circuit 10 and the second signal acquisition circuit 20 are both electrically connected to the control unit 30 to communicate with the control unit 30 and transmit the collected and detected parameters to the control unit 30. In a specific embodiment, the control unit 30 is a microcontroller unit (MCU).

[0042] In the related art, for the scheme of collecting and detecting the parameters of the battery module 2000 through the first signal acquisition circuit 10 and the second signal acquisition circuit 20, since the ground pins of the first signal acquisition circuit 10 and the second signal acquisition circuit 20 are connected to different ground terminals, the voltage values of the ground pins of the first signal acquisition circuit 10 and the second signal acquisition circuit 20 are different. Therefore, when the first signal acquisition circuit 10 and the second signal acquisition circuit 20 communicate with the control unit 30, each signal acquisition circuit needs to occupy two I / O ports (i.e., input / output ports) of the control unit 30, resulting in a shortage of the I / O ports of the control unit 30, and thus resulting in insufficient I / O ports to connect other peripheral devices.

[0043] In an embodiment of the present application, a first switch unit, a second switch unit, a first isolated communication circuit, a first power supply and a second power supply are provided in the communication circuit 100, and the first signal acquisition circuit 10 and the second signal acquisition circuit 20 share a pair of communication ports (i.e., share two I / O ports) when communicating with the control unit 30, thereby reducing the occupancy of the I / O of the control unit 30.

[0044] Please refer to Figure 2 , Figure 2 Schematic diagram of the communication circuit 100 provided in the embodiment of the present application. Figure 2 As shown, the communication circuit 100 includes a first signal acquisition circuit 10, a second signal acquisition circuit 20, a control unit 30, a first switch unit 40, a second switch unit 50, a first isolated communication circuit 60, a first power supply V1 and a second power supply V2.

[0045] The first signal acquisition circuit 10 is connected in series with the first signal acquisition circuit 20. The first signal acquisition circuit 10 is electrically connected to the first ground terminal GND1, and the second signal acquisition circuit 20 is electrically connected to the second ground terminal GND2. The voltage of the second ground terminal GND2 relative to the first ground terminal GND1 is positive. The control unit 40 is electrically connected to the first power supply V1, the first switch unit 40, the second switch unit 50, and the first communication port of the first isolated communication circuit 60. In one specific embodiment, the control unit 40 includes a first I / O port P1, a second I / O port P2, and a third I / O port P3. The first communication port of the first isolated communication circuit 60 includes a first clock signal port SCL1 and a first data signal port SDA1. The first I / O port P1 is electrically connected to the first switch unit 40 and the second switch unit 50. The second I / O port P2 is electrically connected to the first data signal port SDA1, the first switch unit 40, and the first power supply V1. The third I / O port P3 is electrically connected to the first clock signal port SCL1, the first switch unit 40, and the first power supply V1. The first communication port is electrically connected to the first signal acquisition circuit 10 via the first switch unit 40. Specifically, the first clock signal port SCL1 and the first data signal port SDA1 are both electrically connected to the first signal acquisition circuit 10 via the first switch unit 40. The second communication port of the first isolated communication circuit 60 is electrically connected to the second signal acquisition circuit 20. In one embodiment, the second communication port of the first isolated communication circuit 60 includes a second clock signal port SCL2 and a second data signal port SDA2, both of which are electrically connected to the second signal acquisition circuit 20. The power port of the first isolated communication circuit 60 is electrically connected to the first power supply V1 and the second power supply V2 via the second switch unit 50. In one embodiment, the power port of the first isolated communication circuit 60 includes a first power port VCC1 and a second power port VCC2. The first power port VCC1 is electrically connected to the first power supply V1 via the second switch unit 50, and the second power port VCC2 is electrically connected to the first power supply V1 and the second power supply V2 via the second switch unit 50.

[0046] In a specific embodiment, the first communication port and the second communication port are used to implement I 2 C communication, the first clock signal port SCL1 and the second clock signal port SCL2 are used to transmit clock signals, and the first data signal port SDA1 and the second data signal port SDA2 are used to transmit data signals.

[0047] Specifically, the communication circuit 100 is configured in at least one of the following ways: i) in response to the control unit 30 sending a first control signal and a communication signal to the first switch unit 40, and sending a first control signal to the second switch unit 50, the first switch unit 40 is turned on or off, the second switch unit 50 is turned off, and the control unit 30 communicates with the first signal acquisition circuit 10; ii) in response to the control unit 30 sending a second control signal to the first switch unit 40 and the second switch unit 50, the first switch unit 40 is turned off, the second switch unit 50 is turned on, and the control unit 30 communicates with the second signal acquisition circuit 20 through the first isolated communication circuit 60.

[0048] In actual applications, if communication between the control unit 30 and the first signal acquisition circuit 10 is to be achieved, the first I / O port P1 of the control unit 30 outputs a first control signal, while the second I / O port P2 and the third I / O port P3 output communication signals. On the one hand, the first control signal and the communication signal are input to the first switch unit 40, turning the first switch unit 40 on or off, thereby achieving communication between the control unit 30 and the first signal acquisition circuit 10. On the other hand, the first control signal is input to the second switch unit 50, turning the second switch unit 50 off, disconnecting the electrical connection between the first isolated communication circuit 60 and the first power supply V1 and the second power supply V2. The first isolated communication circuit 60 ceases operation due to the loss of power, and the control unit 30 and the second signal acquisition circuit 20 no longer communicate.

[0049] If communication between the control unit 30 and the second signal acquisition circuit 20 is to be achieved, the first I / O port P1 of the control unit 30 outputs a second control signal, and the second I / O port P2 and the third I / O port P3 output communication signals. On the one hand, the second control signal is input to the first switch unit 40, which turns off, disconnecting the communication between the control unit 30 and the first signal acquisition circuit 10, and the control unit 30 and the first signal acquisition circuit 10 do not communicate. On the other hand, the second control signal is input to the second switch unit 50, which turns on, electrically connecting the first isolated communication circuit 60 to the first power supply V1 and the second power supply V2. The first isolated communication circuit 60 is powered on, and the communication signal is input to the first communication port. The second communication port outputs a signal corresponding to the communication signal to the second signal acquisition circuit 20, thereby achieving communication between the control unit 30 and the second signal acquisition circuit 20.

[0050] In summary, the process of communication between the first signal acquisition circuit 10 and one of the second signal acquisition circuits 20 and the control unit 30 is realized, and in the above process, only three I / O ports of the control unit 30 (respectively, the first I / O port P1, the second I / O port P2 and the third I / O port P3) need to be used, while in the related art, the two signal acquisition circuits need to use four I / O ports of the control unit (each signal acquisition circuit needs to use two I / O ports of the control unit). It can be seen that compared with the solutions of the related art, the present application can reduce the number of occupied I / O ports, save hardware resources, and improve the scalability of the system.

[0051] In some embodiments, as Figure 3 As shown, the first switch unit 40 includes a first switch S1 and a second switch S2.

[0052] The first switch S1 electrically connects the first I / O port P1, the second I / O port P2, the first communication port, and the first signal acquisition circuit 10. Specifically, the control end of the first switch S1 is electrically connected to the first I / O port P1, the first end of the first switch S1 is electrically connected to the second I / O port P2 and the first data signal port SDA1, and the second end of the first switch S1 is electrically connected to the first signal acquisition circuit 10. The second switch S2 electrically connects the first I / O port P1, the third I / O port P3, the first communication port, and the first signal acquisition circuit 10. Specifically, the control end of the second switch S2 is electrically connected to the first I / O port P1, the first end of the second switch S2 is electrically connected to the third I / O port P3 and the first clock signal port SCL1, and the second end of the second switch S2 is electrically connected to the first signal acquisition circuit 10.

[0053] In some embodiments, the communication circuit 100 is further configured to: in response to the control unit 30 sending a first control signal to the first switch unit 40 and the second switch unit 50, and sending a first communication signal to the first switch unit 40, the first switch unit 40 is turned on, the second switch unit 50 is turned off, and the control unit 30 communicates with the first signal acquisition circuit 60; in response to the control unit 30 sending the first control signal to the first switch unit 40 and the second switch unit 50, and sending a second communication signal to the first switch unit 40, the first switch unit 40 is turned off, the second switch unit 50 is turned off, and the control unit 30 communicates with the first signal acquisition circuit 10.

[0054] When at least one of the first switch S1 and the second switch S2 is turned on, the corresponding first switch unit 40 is turned on; when both the first switch S1 and the second switch S2 are turned off, the corresponding first switch unit 40 is turned off.

[0055] Specifically, when the first I / O port P1 of the control unit 30 outputs a first control signal, the second I / O port P2 and the third I / O port P3 output a first communication signal, the first control signal and the first communication signal are input to the first switch S1 and the second switch S2, and the first switch S1 and the second switch S2 are turned on; when the first I / O port of the control unit 30 outputs a first control signal, the second I / O port P2 and the third I / O port P3 output a second communication signal, the first control signal and the second communication signal are input to the first switch S1 and the second switch S2, and the first switch S1 and the second switch S2 are turned off, thereby realizing communication between the control unit 30 and the first signal acquisition circuit 10.

[0056] The first control signal is input to the second switch unit 50, the second switch unit 50 is turned off, the electrical connection between the first isolated communication circuit 60 and the first power supply V1 and the second power supply V2 is disconnected, the first isolated communication circuit 60 stops working due to power loss, and the control unit 30 does not communicate with the second signal acquisition circuit 20.

[0057] In some embodiments, as Figure 4 As shown, the second switch unit 50 includes a first isolation element UB1 and a third switch S3. The third switch S3 electrically connects the first I / O port P1, the first power supply V1, and the first power supply port VCC1 of the control unit 30. The first isolation element UB1 electrically connects the first I / O port P1, the first power supply V1, the second power supply V2, and the second power supply port VCC2. The first isolation element UB1 is a component for achieving electrical isolation and switching characteristics. In one specific embodiment, the first isolation element UB1 is an optocoupler (optocoupler) or a photo-MOSFET (photo-controlled MOSFET).

[0058] In some embodiments, the communication circuit 100 is further configured as follows: in response to the control unit 30 sending a second control signal to the first switch unit 40 and the second switch unit 50, the first switch unit 40 is turned off, the second switch unit 50 is turned on, the first power supply V1 and the second power supply V2 power the first isolated communication circuit 60, and the control unit 30 communicates with the second signal acquisition circuit 20 through the first isolated communication circuit 60.

[0059] Specifically, the first I / O port of the control unit 30 outputs a second control signal, while the second I / O port P2 and the third I / O port P3 output communication signals. On the one hand, the second control signal is input to the first switch unit 40, which turns off, disconnecting communication between the control unit 30 and the first signal acquisition circuit 10, and the control unit 30 and the first signal acquisition circuit 10 do not communicate. On the other hand, the second control signal is input to the first isolation element UB1 and the third switch S3, causing the first isolation element UB1 to establish an electrical connection between the second power supply V2 and the second power supply port VCC2. The third switch S3 turns on, electrically connecting the first power supply V1 to the first power supply port VCC1 via the third switch S3. The first isolated communication circuit 60 is powered on, and the communication signal is input to the first communication port. A signal corresponding to the communication signal is output to the second signal acquisition circuit 20 via the second communication port, thereby enabling communication between the control unit 30 and the second signal acquisition circuit 20.

[0060] Figure 5 The circuit structure of the communication circuit 100 is shown as an example when the first switch S1 and the second switch S2 are N-type FETs, the third switch S3 is a P-type FET, and the first isolation element UB1 is an optocoupler. Figure 5 As shown, the first switch unit 40 further includes a first resistor R1 , a second resistor R2 , a third resistor R3 and a fourth resistor R4 .

[0061] The first resistor R1 is disposed between the first I / O port P1 and the first end of the first switch S1, the second resistor R2 is disposed between the first end of the first switch S1 and the second end of the first switch S1, the second end of the first switch S1 is electrically connected to the first data signal port SDA1 and the second I / O port P2, and the third end of the first switch S1 is electrically connected to the first signal acquisition circuit 10. A fourth resistor R4 is disposed between the first I / O port P1 and the first end of the second switch S2, the third resistor R3 is disposed between the first end of the second switch S2 and the second end of the second switch S2, the second end of the second switch S2 is electrically connected to the first clock signal port SCL1 and the third I / O port P3, and the third end of the second switch S2 is electrically connected to the first signal acquisition circuit 10. The first ends of the first switch S1 and the second switch S2 serve as gates of N-type FETs, the second ends of the first switch S1 and the second switch S2 serve as sources of the N-type FETs, and the third ends of the first switch S1 and the second switch S2 serve as drains of the N-type FETs.

[0062] The first resistor R1 and the second resistor R2 divide the voltage between the first I / O port P1 and the second I / O port P2. The voltage between the first I / O port P1 and the second I / O port P2 is divided by the second resistor R2 to drive the first switch S1. The second resistor R2 also acts as a discharge discharge when the first switch S1 is turned off, ensuring that the first switch S1 is reliably turned off.

[0063] In some embodiments, the second switch unit 50 further includes a fifth resistor R5 , a sixth resistor R6 , and a seventh resistor R7 .

[0064] The fifth resistor R5 is provided between the first I / O port P1 and the first port of the first isolation element UB1 (the cathode of the optocoupler's light emitter in this embodiment). The second port of the first isolation element UB1 (the anode of the optocoupler's light emitter in this embodiment) is electrically connected to the first power supply V1. The third port of the first isolation element UB1 (the collector of the optocoupler's light receiver in this embodiment) is electrically connected to the second power supply V2. The fourth port of the first isolation element UB1 (the emitter of the optocoupler's light receiver in this embodiment) is electrically connected to the second power supply port VCC2. The sixth resistor R6 is provided between the first end of the third switch S3 and the first I / O port P1. The seventh resistor R7 is provided between the first end of the third switch S3 and the second end of the third switch S3. The second end of the third switch S3 is electrically connected to the first power supply V1, and the third end of the third switch S3 is electrically connected to the first power supply port VCC1. The first end of the third switch S3 serves as the gate of a P-type FET, the second end of the third switch S3 serves as the source of the P-type FET, and the third end of the third switch S3 serves as the drain of the P-type FET.

[0065] The fifth resistor R5 is a current-limiting resistor. The sixth resistor R6 and the seventh resistor R7 divide the voltage between the second end of the third switch S3 and the first end of the third switch S3. The voltage between the second end of the third switch S3 and the first end of the third switch S3 is divided by the seventh resistor R7 to drive the third switch S3. The seventh resistor R7 also serves to discharge the discharge when the third switch S3 is turned off, ensuring that the third switch S3 is reliably turned off.

[0066] In some embodiments, the communication circuit 100 further includes an eighth resistor R8, a ninth resistor R9, a tenth resistor R 10 , the eleventh resistor R 11 , the twelfth resistor R 12 and the thirteenth resistor R 13 .

[0067] The first clock signal port SCL1 and the third I / O port P3 are both electrically connected to the first power supply V1 through the eighth resistor R8, the first data signal port SDA1 and the second I / O port are both electrically connected to the first power supply V1 through the ninth resistor R9, the second clock signal port SCL2 and the clock signal port of the second signal acquisition circuit 20 are electrically connected to the first power supply V1 through the eleventh resistor R 11 The second data signal port SDA2 is electrically connected to the second power supply V2, and the data signal port of the second signal acquisition circuit 20 is connected to the second power supply V2 through the tenth resistor R 10 The data signal port of the first signal acquisition circuit 10 is electrically connected to the second power supply V2 through the twelfth resistor R12 The clock signal port of the first signal acquisition circuit 10 is electrically connected to the first power supply V1 through the thirteenth resistor R 13 Electrically connected to the first power source V1.

[0068] The eighth resistor R8, the ninth resistor R9, and the tenth resistor R 10 , the eleventh resistor R 11 , the twelfth resistor R 12 and the thirteenth resistor R 13 Both are pull-up resistors.

[0069] Specifically, when the first I / O port P1 of the control unit 30 outputs a first control signal (a high-level signal in this embodiment) and the second I / O port P2 and the third I / O port P3 output a first communication signal (a low-level signal in this embodiment), the first control signal and the first communication signal are input to the first switch S1 and the second switch S2, the first switch S1 and the second switch S2 are turned on, and the levels of the data signal port and the clock signal port of the first signal acquisition circuit 10 are pulled low, corresponding to the first signal acquisition circuit 10 receiving a low-level signal; when the first I / O port outputs the first control signal and the second I / O port P2 and the third I / O port P3 output the second communication signal (a high-level signal in this embodiment), the first switch S1 and the second switch S2 are turned off, and the data signal port and the clock signal port of the first signal acquisition circuit 10 receive a high-level signal due to the pull-up effect of the first power supply V1, and the control unit 30 communicates with the first signal acquisition circuit 10. Secondly, since the first control signal is input to the first isolation element UB1 and the third switch S3, the first isolation element UB1 disconnects the electrical connection between the second power supply V2 and the second power port VCC2, the third switch S3 is turned off, and the electrical connection between the first power supply V1 and the first power port VCC1 is disconnected. The first isolated communication circuit 60 stops working due to power loss, and the control unit 30 does not communicate with the second signal acquisition circuit 20.

[0070] When the first I / O port P1 of the control unit 30 outputs a second control signal, the second I / O port P2 and the third I / O port P3 output communication signals. On the one hand, the second control signal is input to the first switch S1 and the second switch S2, which are turned off, disconnecting communication between the control unit 30 and the first signal acquisition circuit 10. On the other hand, the second control signal is input to the first isolation element UB1 and the third switch S3, causing the first isolation element UB1 to establish an electrical connection between the second power supply V2 and the second power supply port VCC2. The third switch S3 is turned on, establishing an electrical connection between the first power supply V1 and the first isolated communication circuit 60. The first isolated communication circuit 60 is powered and operates. The communication signal is input to the first communication port of the first isolated communication circuit 60, and a signal corresponding to the communication signal is output to the second signal acquisition circuit 20 through the second communication port, thereby enabling communication between the control unit 30 and the second signal acquisition circuit 20.

[0071] It is understandable that if Figure 2-Figure 5 The hardware structure of the communication circuit 100 shown is only an example, and the communication circuit 100 may have more or fewer components than shown in the figure, may combine two or more components, or may have a different component configuration. The various components shown in the figure may be implemented in hardware, software, or a combination of hardware and software, including one or more signal processing and / or application-specific integrated circuits.

[0072] For example, in some embodiments, Figure 6 As shown, the first switch S1 and the second switch S2 are NPN transistors, and the third switch S3 is a PNP transistor. The first ends of the first switch S1 and the second switch S2 serve as the bases of the NPN transistors, the second ends of the first switch S1 and the second switch S2 serve as the emitters of the NPN transistors, and the third ends of the first switch S1 and the second switch S2 serve as the collectors of the NPN transistors. The first end of the third switch S3 serves as the base of the PNP transistor, the second end of the third switch S3 serves as the emitter of the PNP transistor, and the third end of the third switch S3 serves as the collector of the PNP transistor.

[0073] Please refer to Figure 7 , Figure 7 A schematic structural diagram of a battery pack provided in another embodiment of the present application. Figure 7 For Figure 1 The structure shown in the figure is increased by a third cell unit A3 and a third signal acquisition circuit 70. Specifically, the cell module 2000 includes cells BAT11, ..., cells BAT1 M 、Battery cell BAT21、…、Battery cell BAT2 N 、Battery cell BAT31、…、Battery cell BAT3 JM, N, J are all integers greater than or equal to 1, and M, N, J can be the same or different. Battery cell BAT11, ..., battery cell BAT1 M 、Battery cell BAT21、…、Battery cell BAT2 N Connect in series, cells BAT11, ..., wire BAT1 M Forming the first battery cell unit A1, battery cells BAT21, ..., battery cells BAT2 N Forming the second battery cell unit A2, battery cells BAT31, ..., battery cells BAT3 J A third battery cell unit A3 is formed.

[0074] The communication circuit 100 includes a first signal acquisition circuit 10, a second signal acquisition circuit 20 and a third signal acquisition circuit 70, which are connected in series. M The positive electrode is connected to the first signal acquisition circuit 10, the negative electrode of the battery cell BAT21 and the battery cell BAT2 N The positive electrode of the second signal acquisition circuit 20 is connected to the negative electrode of the battery cell BAT31 and the battery cell BAT3 J The positive electrode is connected to the third signal acquisition circuit 70. The first battery cell unit A1 supplies power to the first signal acquisition circuit 10, the second battery cell unit A2 supplies power to the second signal acquisition circuit 20, and the third battery cell unit A3 supplies power to the third signal acquisition circuit 70. The first battery cell unit A1 shares a common ground with the first signal acquisition circuit 10, that is, the first battery cell unit A1 and the first signal acquisition circuit 10 are connected to the same first ground terminal GND1, and the first ground terminal GND1 is connected to the negative electrode of the battery cell BAT11 and also to the negative electrode B- of the battery cell module 2000. The second battery cell unit A2 shares a common ground with the second signal acquisition circuit 20, that is, the second battery cell unit A2 and the second signal acquisition circuit 20 are connected to the same second ground terminal GND2, and the second ground terminal GND2 is connected to the negative electrode of the battery cell BAT21 and also to the battery cell BAT1 M The third battery cell unit A3 and the third signal acquisition circuit 70 share a common ground, that is, the third battery cell unit A3 and the third signal acquisition circuit 70 are connected to the same third ground terminal GND3, and the third ground terminal GND3 is connected to the negative electrode of the battery cell BAT31 and also connected to the battery cell BAT2 N It can be understood that the first ground terminal GND1 is at the same potential as the negative electrode of the battery cell BAT11, the second ground terminal GND2 is at the same potential as the negative electrode of the battery cell BAT21, the third ground terminal GND3 is at the same potential as the negative electrode of the battery cell BAT31, and the second ground terminal GND2 is also at the same potential as the negative electrode of the battery cell BAT1. M The positive electrode of the battery is at the same potential, and the third ground terminal GND3 is also connected to the battery cell BAT2. NThe positive electrode of the second ground terminal GND2 is equipotential, the voltage value of the second ground terminal GND2 is positive relative to the voltage value of the first ground terminal GND1, and the voltage value of the third ground terminal GND3 is positive relative to the voltage value of the second ground terminal GND2. Specifically, the voltage value of the second ground terminal GND2 relative to the first ground terminal GND1 is the voltage value of the battery cell BAT1. M The voltage of the third ground terminal GND3 relative to the first ground terminal GND1 is the voltage of the battery cell BAT2. N The voltage value of the first battery cell unit A1 relative to the first ground terminal GND1 is the voltage of the battery cell BAT11, ..., the battery cell BAT1 M The voltage value of the second battery cell unit A2 relative to the first ground terminal GND1 is BAT11, ..., battery cell BAT1 M 、Battery cell BAT21、…、Battery cell BAT2 N The voltage value of the third battery cell unit A3 relative to the first ground terminal GND1 is BAT11, ..., battery cell BAT1 M 、Battery cell BAT21、…、Battery cell BAT2 N 、Battery cell BAT31、…、Battery cell BAT3 J sum.

[0075] In some embodiments, the third signal acquisition circuit 70 collects and detects parameters of the battery module 2000, including voltage and temperature. In one specific embodiment, the third signal acquisition circuit 70 includes an analog front-end (AFE) chip. The third signal acquisition circuit 70 measures the voltage and temperature of the battery module 2000, that is, the third signal acquisition circuit 70 measures the voltage and temperature of the third battery cell A3. The third signal acquisition circuit 70 is electrically connected to the control unit 30 to communicate with the control unit 30 and transmits the collected and detected parameters to the control unit 30.

[0076] In the related art, for the solution of collecting and detecting the parameters of the battery module 2000 through the first signal acquisition circuit 10, the second signal acquisition circuit 20 and the third signal acquisition circuit 70, when the first signal acquisition circuit 10, the second signal acquisition circuit 20 and the third signal acquisition circuit 70 communicate with the control unit 30, each signal acquisition circuit needs to occupy two I / O ports of the control unit 30, and a total of six I / O ports need to be occupied, which will lead to a shortage of I / O port resources of the control unit 30.

[0077] In an embodiment of the present application, the first signal acquisition circuit 10, the second signal acquisition circuit 20 and the third signal acquisition circuit 70 share a pair of communication ports when communicating with the control unit 30, and occupy a total of five I / O ports, which reduces the I / O occupancy of the control unit 30 compared to related technologies.

[0078] Please refer to Figure 8 , Figure 8 Schematic diagram of the communication circuit 100 provided in the embodiment of the present application. Figure 8 As shown, the communication circuit 100 further includes a third power supply V3 , a third signal acquisition circuit 70 , a third switch unit 80 and a second isolated communication circuit 90 .

[0079] The third signal acquisition circuit 70 is connected in series with the second signal acquisition circuit 20. The third signal acquisition circuit 70 is electrically connected to the third ground terminal GND3. The voltage of the third ground terminal GND3 relative to the second ground terminal GND2 is positive. The control unit 30 is electrically connected to the third switch unit 80 and the third communication port of the second isolated communication circuit 90. The fourth communication port of the second isolated communication circuit 90 is electrically connected to the third signal acquisition circuit 70. In one specific embodiment, the third communication port includes a third clock signal port SCL3 and a third data signal port SDA3. The third clock signal port SCL3 is electrically connected to the third I / O port P3, and the third data signal port SDA3 is electrically connected to the second I / O port P2. The fourth communication port includes a fourth clock signal port SCL4 and a fourth data signal port SDA4. The fourth clock signal port SCL4 is electrically connected to the clock signal port of the third signal acquisition circuit 70, and the fourth data signal port SDA4 is electrically connected to the data signal port of the third signal acquisition circuit 70. The power port of the second isolated communication circuit 90 is electrically connected to the first power supply V1 and the third power supply V3 through the third switch unit 80. In a specific embodiment, the power port of the second isolated communication circuit 90 includes a third power port VCC3 and a fourth power port VCC4. The third power port VCC3 is electrically connected to the first power supply V1 through the third switch unit 80, and the fourth power port VCC4 is electrically connected to the first power supply V1 and the third power supply V3 through the third switch unit 80.

[0080] In some embodiments, the communication circuit 100 is configured in at least one of the following ways: i) in response to the control unit 30 sending a first control signal and a communication signal to the first switch unit 40, sending a first control signal to the second switch unit 50, and sending a first control signal to the third switch unit 80, the first switch unit 40 is turned on or off, the second switch unit 50 and the third switch unit 80 are turned off, and the control unit 30 communicates with the first signal acquisition circuit 10; ii) in response to the control unit 30 sending a second control signal to the first switch unit 40 and the second switch unit 50, the control unit 30 sends a second control signal to the third switch unit 80 Sending a first control signal, the first switch unit 40 and the third switch unit 80 are turned off, the second switch unit 50 is turned on, and the control unit 30 communicates with the second signal acquisition circuit 20 through the first isolated communication circuit 60; iii) in response to the control unit 30 sending a second control signal to the first switch unit 40, sending a first control signal to the second switch unit 50, and sending a second control signal to the third switch unit 80, the first switch unit 40 and the second switch unit 50 are turned off, the third switch unit 80 is turned on, and the control unit 30 communicates with the third signal acquisition circuit 70 through the second isolated communication circuit 90.

[0081] In actual applications, if it is necessary to realize communication between the control unit 30 and the first signal acquisition circuit 10, the first I / O port P1, the fourth I / O port P4 and the fifth I / O port P5 of the control unit 30 all output the first control signal, and the second I / O port P2 and the third I / O port P3 output the communication signal. On the first aspect, the first control signal and the communication signal are input to the first switch unit 40, and the first switch unit 40 is turned on or off, thereby realizing communication between the control unit 30 and the first signal acquisition circuit 10; on the second aspect, the first control signal is input to the second switch unit 50, and the second switch unit 50 is turned off, and the electrical connection between the first isolated communication circuit 60 and the first power supply V1 and the second power supply V2 is disconnected, the first isolated communication circuit 60 stops working due to power failure, and the control unit 30 does not communicate with the second signal acquisition circuit 20; on the third aspect, the first control signal is input to the third switch unit 80, and the third switch unit 80 is turned off, and the electrical connection between the second isolated communication circuit 90 and the first power supply V1 and the third power supply V3 is disconnected, the second isolated communication circuit 90 stops working due to power failure, and the control unit 30 does not communicate with the third signal acquisition circuit 70.

[0082] If communication between the control unit 30 and the second signal acquisition circuit 20 is required, the first I / O port P1 and the fourth I / O port P4 of the control unit 30 output the second control signal, the fifth I / O port P5 outputs the first control signal, and the second I / O port P2 and the third I / O port P3 output the communication signal. On the one hand, the second control signal is input to the first switch unit 40, the first switch unit 40 is turned off, and the communication between the control unit 30 and the first signal acquisition circuit 10 is disconnected, that is, the control unit 30 and the first signal acquisition circuit 10 do not communicate; on the second hand, the second control signal is input to the second switch unit 50, the second switch unit 50 is turned on, the first isolated communication circuit 60 is electrically connected to the first power supply V1 and the second power supply V2, the first isolated communication circuit 60 works due to power, the communication signal is input to the first communication port, and the signal corresponding to the communication signal is output to the second signal acquisition circuit 20 through the second communication port, thereby realizing the communication between the control unit 30 and the second signal acquisition circuit 20; on the third hand, the first control signal is input to the third switch unit 80, the third switch unit 80 is turned off, the electrical connection between the second isolated communication circuit 90 and the first power supply V1 and the third power supply V3 is disconnected, the second isolated communication circuit 90 stops working due to power loss, and the control unit 30 and the third signal acquisition circuit 70 do not communicate.

[0083] If communication between the control unit 30 and the third signal acquisition circuit 70 is required, the first I / O port P1 and the fifth I / O port P5 of the control unit 30 output the second control signal, the fourth I / O port P4 outputs the first control signal, and the second I / O port P2 and the third I / O port P3 output the communication signal. On the one hand, the second control signal is input to the first switch unit 40, the first switch unit 40 is turned off, and the communication between the control unit 30 and the first signal acquisition circuit 10 is disconnected, that is, the control unit 30 and the first signal acquisition circuit 10 do not communicate; on the second hand, the first control signal is input to the second switch unit 50, the second switch unit 50 is turned off, the electrical connection between the first isolated communication circuit 60 and the first power supply V1 and the second power supply V2 is disconnected, the first isolated communication circuit 60 stops working due to power loss, and the control unit 30 and the second signal acquisition circuit 20 do not communicate; on the third hand, the second control signal is input to the third switch unit 80, the third switch unit 80 is turned on, the second isolated communication circuit 90 is electrically connected to the first power supply V1 and the third power supply V3, the second isolated communication circuit 90 works due to power, the communication signal is input to the third communication port, and the signal corresponding to the communication signal is output to the third signal acquisition circuit 70 through the fourth communication port, thereby realizing communication between the control unit 30 and the third signal acquisition circuit 70.

[0084] In summary, the process of one of the first signal acquisition circuit 10, the second signal acquisition circuit 20 and the third signal acquisition circuit 70 communicating with the control unit 30 is realized, and in the above process, five I / O ports of the control unit 30 are occupied (respectively, the first I / O port P1, the second I / O port P2, the third I / O port P3, the fourth I / O port P4 and the fifth I / O port P5). In the related art, the two signal acquisition circuits need to occupy six I / O ports of the control unit. It can be seen that compared with the solutions of the related art, the present application can reduce the number of occupied I / O ports, save hardware resources, and improve the scalability of the system.

[0085] In some embodiments, as Figure 9 As shown, the third switch unit 80 includes a second isolation element UB2 and a fourth switch S4. The fourth switch S4 electrically connects the fifth I / O port P5, the first power supply V1, and the third power supply port VCC3. The second isolation element UB2 electrically connects the fifth I / O port P5, the first power supply V1, the third power supply V3, and the fourth power supply port VCC4.

[0086] In some embodiments, the communication circuit 100 is further configured such that: in response to the control unit 30 sending a second control signal to the first switch unit 40, sending a first control signal to the second switch unit 50, and sending a second control signal to the third switch unit 80, the first switch unit 40 and the second switch unit 50 are turned off, the third switch unit 80 is turned on, the first power supply V1 and the third power supply V3 supply power to the second isolated communication circuit 90, and the control unit 30 communicates with the third signal acquisition circuit 70 via the second isolated communication circuit 90. In a specific embodiment, the second isolation element UB2 is an optocoupler or an optical MOS.

[0087] Specifically, the first I / O port P1 and the fifth I / O port P5 of the control unit 30 output the second control signal, the fourth I / O port P4 outputs the first control signal, and the second I / O port P2 and the third I / O port P3 output the communication signal. As can be seen from the above description, when the first switch unit 40 is turned off, the control unit 30 does not communicate with the first signal acquisition circuit 10; when the second switch unit 50 is turned off, the control unit 30 does not communicate with the second signal acquisition circuit 20. The second control signal is input to the second isolation element UB2 and the fourth switch S4. The second isolation element UB2 establishes an electrical connection between the third power supply V3 and the fourth power supply port VCC4. The fourth switch S4 is turned on, and the first power supply V1 is electrically connected to the third power supply port VCC3 via the fourth switch S4. The second isolated communication circuit 90 is powered on, and the communication signal is input to the third communication port. The fourth communication port then outputs a signal corresponding to the communication signal to the third signal acquisition circuit 70, thereby enabling communication between the control unit 30 and the third signal acquisition circuit 70.

[0088] Figure 10 The circuit structure of the communication circuit 100 is exemplarily shown when the first switch S1 and the second switch S2 are N-type FETs, the third switch S3 and the fourth switch S4 are P-type FETs, and the first isolation element UB1 and the second isolation element UB2 are optocouplers. Figure 10 As shown, the third switch unit 80 further includes a fourteenth resistor R 14 , the fifteenth resistor R 15 and the sixteenth resistor R 16 .

[0089] Among them, the fourteenth resistor R 14 The first terminal of the second isolation element UB2 (the cathode of the light emitter of the optocoupler in this embodiment) is provided between the fifth I / O port P5 and the first terminal of the second isolation element UB2 (the anode of the light emitter of the optocoupler in this embodiment) and is electrically connected to the first power supply V1. The third terminal of the second isolation element UB2 (the collector of the light receiver of the optocoupler in this embodiment) is electrically connected to the third power supply V3. The fourth terminal of the second isolation element UB2 (the emitter of the light receiver of the optocoupler in this embodiment) is electrically connected to the fourth power supply port VCC4. 15 The sixteenth resistor R is provided between the first end of the fourth switch S4 and the fifth I / O port P5. 16 The fourth switch S4 is provided between a first end and a second end of the fourth switch S4. The second end of the fourth switch S4 is electrically connected to the first power source V1, and the third end of the fourth switch S4 is electrically connected to the third power supply port VCC3. The first end of the fourth switch S4 serves as the gate of a P-type FET, the second end of the fourth switch S4 serves as the source of the P-type FET, and the third end of the fourth switch S4 serves as the drain of the P-type FET.

[0090] The sixteenth resistor R 16 Is the current limiting resistor. The fourteenth resistor R 14 and the fifteenth resistor R 15 The voltage between the second end of the fourth switch S4 and the first end of the fourth switch S4 is divided, and the voltage between the second end of the fourth switch S4 and the first end of the fourth switch S4 is divided by the fifteenth resistor R 15 The divided voltage on drives the fourth switch S4. The fifteenth resistor R 15 It can also play a role in discharging the discharge when the fourth switch S4 is turned off, ensuring that the fourth switch S4 is reliably turned off.

[0091] In some embodiments, the communication circuit 100 further includes an eighth resistor R8, a ninth resistor R9, a tenth resistor R 10 , the eleventh resistor R 11 , the twelfth resistor R 12 , the thirteenth resistor R 13 , Seventeenth resistor R 17 and the eighteenth resistor R18 .

[0092] The first clock signal port SCL1, the third clock signal port SCL3 and the third I / O port P3 are all electrically connected to the first power supply V1 through the eighth resistor R8, the first data signal port SDA1, the third data signal port SDA3 and the second I / O port P2 are all electrically connected to the first power supply V1 through the ninth resistor R9, the second clock signal port SCL2 and the clock signal port of the second signal acquisition circuit 20 are all electrically connected to the first power supply V1 through the eleventh resistor R 11 The second data signal port SDA2 and the data signal port of the second signal acquisition circuit 20 are both electrically connected to the second power supply V2 through the tenth resistor R 10 The data signal ports of the first signal acquisition circuit 10 are electrically connected to the second power supply V2 through the twelfth resistor R 12 The first signal acquisition circuit 10 is electrically connected to the first power supply V1, and the clock signal ports are connected to the first power supply V1 through the thirteenth resistor R 13 The fourth clock signal port SCL4 and the clock signal port of the third signal acquisition circuit 70 are both electrically connected to the first power supply V1 through the eighteenth resistor R 18 The fourth data signal port SDA4 and the data signal port of the third signal acquisition circuit 70 are both electrically connected to the third power supply V3 through the seventeenth resistor R 17 Electrically connected to the third power source V3.

[0093] The eighth resistor R8, the ninth resistor R9, and the tenth resistor R 10 , the eleventh resistor R 11 , the twelfth resistor R 12 , the thirteenth resistor R 13 , Seventeenth resistor R 17 and the eighteenth resistor R 18 Both are pull-up resistors.

[0094] Specifically, when the first I / O port P1, the fourth I / O port P4, and the fifth I / O port P5 of the control unit 30 all output the first control signal (a high-level signal in this embodiment), on the first aspect, if the second I / O port P2 and the third I / O port P3 output the first communication signal (a low-level signal in this embodiment), the first control signal and the first communication signal are input to the first switch S1 and the second switch S2, the first switch S1 and the second switch S2 are turned on, and the levels of the data signal port and the clock signal port of the first signal acquisition circuit 10 are pulled low, corresponding to the first The data signal port and clock signal port of the signal acquisition circuit 10 receive a low-level signal. If the second I / O port P2 and the third I / O port P3 output a second communication signal (a high-level signal in this embodiment), the first control signal and the second communication signal are input to the first switch S1 and the second switch S2. The first switch S1 and the second switch S2 are turned off. Due to the pull-up effect of the first power supply V1, the data signal port and the clock signal port of the first signal acquisition circuit 10 receive a high-level signal, thereby enabling communication between the control unit 30 and the first signal acquisition circuit 10. Secondly, the first control signal is input to the first isolation element UB1 and the third switch S3. The first isolation element UB1 disconnects the electrical connection between the second power supply V2 and the second power supply port VCC2. The third switch S3 is turned off, and the electrical connection between the first power supply V1 and the first power supply port VCC1 is disconnected. The first isolated communication circuit 60 stops operating due to power loss, and the control unit 30 and the second signal acquisition circuit 20 do not communicate. On the third aspect, the first control signal is input into the second isolation element UB2 and the fourth switch S4, the second isolation element UB2 disconnects the electrical connection between the third power supply V3 and the fourth power supply port VCC4, the fourth switch S4 is turned off, the electrical connection between the first power supply V1 and the third power supply port VCC3 is disconnected, the second isolated communication circuit 90 stops working due to power loss, and the control unit 30 does not communicate with the third signal acquisition circuit 70.

[0095] When the first I / O port P1 and the fourth I / O port P4 of the control unit 30 output the second control signal (a low-level signal in this embodiment), the fifth I / O port P5 outputs the first control signal (a high-level signal in this embodiment), and the second I / O port P2 and the third I / O port P3 output communication signals (including high-level signals and low-level signals), on the first aspect, the second control signal is input to the first switch S1 and the second switch S2, the first switch S1 and the second switch S2 are turned off, and the control unit 30 does not communicate with the first signal acquisition circuit 10; on the second aspect, the second control signal is input to the first isolation element UB1 and the third switch S3, the first isolation element UB1 establishes an electrical connection between the second power supply V2 and the second power supply port VCC2, and the third switch S3 conducts The first power supply V1 is electrically connected to the first power port VCC1 through the third switch S3, the first isolated communication circuit 60 works due to power supply, the communication signal is input to the first communication port, and the signal corresponding to the communication signal is output to the second signal acquisition circuit 20 through the second communication port, thereby realizing the communication between the control unit 30 and the second signal acquisition circuit 20; thirdly, the first control signal is input to the second isolation element UB2 and the fourth switch S4, the second isolation element UB2 disconnects the electrical connection between the third power supply V3 and the fourth power port VCC4, the fourth switch S4 is turned off, the electrical connection between the first power supply V1 and the third power port VCC3 is disconnected, the second isolated communication circuit 90 stops working due to power loss, and the control unit 30 does not communicate with the third signal acquisition circuit 70.

[0096] When the first I / O port P1 and the fifth I / O port P5 of the control unit 30 output the second control signal, the fourth I / O port P4 outputs the first control signal, and the second I / O port P2 and the third I / O port P3 output the communication signal, on the first aspect, the second control signal is input to the first switch S1 and the second switch S2, the first switch S1 and the second switch S2 are turned off, and the control unit 30 does not communicate with the first signal acquisition circuit 10; on the second aspect, the first control signal is input to the first isolation element UB1 and the third switch S3, the first isolation element UB1 disconnects the electrical connection between the second power supply V2 and the second power supply port VCC2, the third switch S3 is turned off, and the electrical connection between the first power supply V1 and the first power supply port VCC1 is disconnected. is disconnected, the first isolated communication circuit 60 stops working due to power failure, and the control unit 30 does not communicate with the second signal acquisition circuit 20; thirdly, the second control signal is input to the second isolation element UB2 and the fourth switch S4, the second isolation element UB2 establishes an electrical connection between the third power supply V3 and the fourth power supply port VCC4, the fourth switch S4 is turned on, the first power supply V1 is electrically connected to the third power supply port VCC3 through the fourth switch S4, the second isolated communication circuit 90 works due to power, the communication signal is input to the third communication port, and the signal corresponding to the communication signal is output to the third signal acquisition circuit 70 through the fourth communication port, thereby realizing communication between the control unit 30 and the third signal acquisition circuit 70.

[0097] In summary, the process of one of the first signal acquisition circuit 10, the second signal acquisition circuit 20 and the third signal acquisition circuit 70 communicating with the control unit 30 is realized, and in this process, only five I / Os of the control unit 30 need to be occupied, reducing the occupation of the I / O of the control unit 30.

[0098] In some embodiments, reference Figure 6 Each switching element is configured as a transistor, such as Figure 11 As shown, the first switch S1 and the second switch S2 are NPN transistors, and the third switch S3 and the fourth switch S4 are PNP transistors. The first end of the first switch S1 and the second switch S2 serves as the base of the NPN transistor, the second end of the first switch S1 and the second switch S2 serves as the emitter of the NPN transistor, and the third end of the first switch S1 and the second switch S2 serves as the collector of the NPN transistor. The first end of the third switch S3 and the fourth switch S4 serves as the base of the PNP transistor, the second end of the third switch S3 and the fourth switch S4 serves as the emitter of the PNP transistor, and the third end of the third switch S3 and the fourth switch S4 serves as the collector of the PNP transistor.

[0099] Understandably, Figures 7 to 11The embodiment shown only exemplifies the implementation method in which the communication circuit 100 includes three signal acquisition circuits (respectively, the first signal acquisition circuit 10, the second signal acquisition circuit 20, and the third signal acquisition circuit 70). When the communication circuit 100 includes more than three signal acquisition circuits, an additional signal acquisition circuit is added, and a corresponding switch unit and isolated communication circuit are added, and an I / O port of the control unit 30 is added to control the added switch unit. For the specific implementation process, please refer to the description of the third signal acquisition circuit 70, the third switch unit 80, and the second isolated communication circuit 90, which will not be repeated here. It can be seen that in the embodiment of the present application, for each additional signal acquisition circuit, only one I / O port needs to be added accordingly, while in the related art, for each additional signal acquisition circuit, two I / O ports need to be added. Therefore, for each additional signal acquisition circuit, the embodiment of the present application reduces the occupation of one I / O port compared to the related art.

[0100] The present application also provides a battery management system, which includes Figures 1 to 6 The communication circuit 100 shown, or Figures 7 to 11 The communication circuit 100 is shown.

[0101] An embodiment of the present application further provides an electrical device, which includes a battery pack and a load, wherein the battery pack includes a battery cell module and the battery management system in the above embodiment.

[0102] The load is the electrical device in an electrical device. Electrical devices are devices that require battery power. Examples of these devices include drones, energy storage products, power tools, and electric vehicles (electric two-wheelers and electric three-wheelers).

[0103] The above description is merely an embodiment of the present application and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

[0104] The above embodiments are only used to illustrate the technical solutions of the present application, and are not intended to limit them. Based on the concept of the present application, the technical features in the above embodiments or different embodiments may be combined, and the steps may be implemented in any order. A person skilled in the art should understand that the technical solutions described in the above embodiments may be modified, or some of the technical features may be replaced by equivalents. However, such modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A communication circuit, characterized in that: include: a first signal acquisition circuit and a second signal acquisition circuit connected in series with the first signal acquisition circuit, the first signal acquisition circuit being electrically connected to a first ground terminal, the second signal acquisition circuit being electrically connected to a second ground terminal, and a voltage value of the second ground terminal relative to the first ground terminal being a positive value; a control unit, a first switch unit, a second switch unit, a first isolated communication circuit, a first power supply, and a second power supply, The control unit is electrically connected to the first power supply, the first switch unit, the second switch unit and the first communication port of the first isolated communication circuit. The first communication port is electrically connected to the first signal acquisition circuit through the first switch unit, and the second communication port of the first isolated communication circuit is electrically connected to the second signal acquisition circuit. The power port of the first isolated communication circuit is electrically connected to the first power supply and the second power supply through the second switch unit; The communication circuit is configured as at least one of the following: i) in response to the control unit sending a first control signal and a communication signal to the first switch unit and sending a first control signal to the second switch unit, the first switch unit is turned on or off, the second switch unit is turned off, and the control unit communicates with the first signal acquisition circuit; ii) In response to the control unit sending a second control signal to the first switch unit and the second switch unit, the first switch unit is turned off and the second switch unit is turned on, and the control unit communicates with the second signal acquisition circuit through the first isolated communication circuit.

2. The communication circuit according to claim 1, wherein: The control unit includes a first I / O port, a second I / O port, and a third I / O port, and the first switch unit includes a first switch and a second switch; The first switch is electrically connected to the first I / O port, the second I / O port, the first communication port, and the first signal acquisition circuit, and the second switch is electrically connected to the first I / O port, the third I / O port, the first communication port, and the first signal acquisition circuit; The communication circuit is further configured to: In response to the control unit sending a first control signal to the first switch unit and the second switch unit, and sending a first communication signal to the first switch unit, the first switch unit is turned on and the second switch unit is turned off, and the control unit communicates with the first signal acquisition circuit; In response to the control unit sending a first control signal to the first switch unit and the second switch unit, and sending a second communication signal to the first switch unit, the first switch unit is turned off, the second switch unit is turned off, and the control unit communicates with the first signal acquisition circuit.

3. The communication circuit according to claim 2, wherein: The first switch unit further includes a first resistor, a second resistor, a third resistor and a fourth resistor; The first communication port includes a first clock signal port and a first data signal port; The first resistor is provided between the first I / O port and the first end of the first switch, the second resistor is provided between the first end of the first switch and the second end of the first switch, the second end of the first switch is electrically connected to the first data signal port and the second I / O port, and the third end of the first switch is electrically connected to the first signal acquisition circuit; The fourth resistor is provided between the first I / O port and the first end of the second switch, the third resistor is provided between the first end of the second switch and the second end of the second switch, the second end of the second switch is electrically connected to the first clock signal port and the third I / O port, and the third end of the second switch is electrically connected to the first signal acquisition circuit; The first switch is an N-type FET or an NPN-type transistor, and the second switch is an N-type FET or an NPN-type transistor.

4. The communication circuit according to any one of claims 1 to 3, characterized in that: The second switch unit includes a first isolation element and a third switch, and the power port of the first isolated communication circuit includes a first power port and a second power port; The third switch is electrically connected to the first I / O port of the control unit, the first power supply, and the first power port, and the first isolation element is electrically connected to the first I / O port, the first power supply, the second power supply, and the second power port; The communication circuit is further configured to: In response to the control unit sending a second control signal to the first switch unit and the second switch unit, the first switch unit is turned off, the second switch unit is turned on, the first power supply and the second power supply power the first isolated communication circuit, and the control unit communicates with the second signal acquisition circuit through the first isolated communication circuit.

5. The communication circuit according to claim 4, characterized in that The second switch unit further includes a fifth resistor, a sixth resistor and a seventh resistor; The fifth resistor is provided between the first I / O port and the first port of the first isolation element, the second port of the first isolation element is electrically connected to the first power supply, the third port of the first isolation element is electrically connected to the second power supply, and the fourth port of the first isolation element is electrically connected to the second power supply port; The sixth resistor is provided between the first end of the third switch and the first I / O port, the seventh resistor is provided between the first end of the third switch and the second end of the third switch, the second end of the third switch is electrically connected to the first power source, and the third end of the third switch is electrically connected to the first power port; The third switch is a P-type FET or a PNP-type transistor, and the first isolation element includes a photocoupler or a photo MOS.

6. The communication circuit according to any one of claims 2 to 5, characterized in that: The communication circuit further includes an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, and a thirteenth resistor; The first communication port includes a first clock signal port and a first data signal port, and the second communication port includes a second clock signal port and a second data signal port; The first clock signal port and the third I / O port are both electrically connected to the first power supply through an eighth resistor, and the first data signal port and the second I / O port are both electrically connected to the first power supply through a ninth resistor. The second clock signal port and the clock signal port of the second signal acquisition circuit are electrically connected to the second power supply through the eleventh resistor, and the second data signal port and the data signal port of the second signal acquisition circuit are electrically connected to the second power supply through the tenth resistor. The data signal port of the first signal acquisition circuit is electrically connected to the first power supply through the twelfth resistor, and the clock signal port of the first signal acquisition circuit is electrically connected to the first power supply through the thirteenth resistor.

7. The communication circuit according to any one of claims 1 to 6, characterized in that: The communication circuit further includes: Third power source; a third signal acquisition circuit connected in series with the second signal acquisition circuit, the third signal acquisition circuit being electrically connected to a third ground terminal, the voltage value of the third ground terminal relative to the second ground terminal being a positive value; a third switch unit and a second isolated communication circuit, wherein the control unit is electrically connected to the third switch unit and the third communication port of the second isolated communication circuit, and the fourth communication port of the second isolated communication circuit is electrically connected to the third signal acquisition circuit; The power port of the second isolated communication circuit is electrically connected to the first power supply and the third power supply through the third switch unit; The communication circuit is configured as at least one of the following: i) in response to the control unit sending the first control signal and the communication signal to the first switch unit, sending the first control signal to the second switch unit, and sending the first control signal to the third switch unit, the first switch unit is turned on or off, the second switch unit and the third switch unit are turned off, and the control unit communicates with the first signal acquisition circuit; ii) in response to the control unit sending the second control signal to the first switch unit and the second switch unit, and sending the first control signal to the third switch unit, the first switch unit and the third switch unit are turned off, the second switch unit is turned on, and the control unit communicates with the second signal acquisition circuit through the first isolated communication circuit; iii) In response to the control unit sending the second control signal to the first switch unit, sending the first control signal to the second switch unit, and sending the second control signal to the third switch unit, the first switch unit and the second switch unit are turned off, the third switch unit is turned on, and the control unit communicates with the third signal acquisition circuit through the second isolated communication circuit.

8. The communication circuit according to claim 7, wherein: The control unit includes a first I / O port, a second I / O port, a third I / O port, a fourth I / O port and a fifth I / O port; The first I / O port is electrically connected to the first switch unit, the fourth I / O port is electrically connected to the second switch unit, the fifth I / O port is electrically connected to the third switch unit, and the third communication port is electrically connected to the second I / O port and the third I / O port.

9. The communication circuit according to claim 8, characterized in that The third switch unit includes a second isolation element and a fourth switch, and the power port of the second isolated communication circuit includes a third power port and a fourth power port; The fourth switch is electrically connected to the fifth I / O port, the first power supply, and the third power port, and the second isolation element is electrically connected to the fifth I / O port, the first power supply, the third power supply, and the fourth power port; The communication circuit is further configured to: In response to the control unit sending the second control signal to the first switch unit, sending the first control signal to the second switch unit, and sending the second control signal to the third switch unit, the first switch unit and the second switch unit are turned off, the third switch unit is turned on, the first power supply and the third power supply power the second isolated communication circuit, and the control unit communicates with the third signal acquisition circuit through the second isolated communication circuit.

10. The communication circuit according to claim 9, wherein: The third switch unit further includes a fourteenth resistor, a fifteenth resistor and a sixteenth resistor; The fourteenth resistor is provided between the fifth I / O port and the first port of the second isolation element, the second port of the second isolation element is electrically connected to the first power supply, the third port of the second isolation element is electrically connected to the third power supply, and the fourth port of the second isolation element is electrically connected to the fourth power supply port; The fifteenth resistor is provided between the first end of the fourth switch and the fifth I / O port, the sixteenth resistor is provided between the first end of the fourth switch and the second end of the fourth switch, the second end of the fourth switch is electrically connected to the first power source, and the third end of the fourth switch is electrically connected to the third power source port; The fourth switch is a P-type FET or a PNP-type transistor, and the second isolation element includes a photocoupler or a photo MOS.

11. The communication circuit according to any one of claims 7 to 10, characterized in that: The communication circuit further includes an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a seventeenth resistor, and an eighteenth resistor; The first communication port includes a first clock signal port and a first data signal port, the second communication port includes a second clock signal port and a second data signal port, the third communication port includes a third clock signal port and a third data signal port, and the fourth communication port includes a fourth clock signal port and a fourth data signal port; The first clock signal port, the third clock signal port, and the third I / O port are all electrically connected to the first power supply through an eighth resistor, and the first data signal port, the third data signal port, and the second I / O port are all electrically connected to the first power supply through a ninth resistor. The second clock signal port and the clock signal port of the second signal acquisition circuit are both electrically connected to the second power supply through the eleventh resistor, and the second data signal port and the data signal port of the second signal acquisition circuit are both electrically connected to the second power supply through the tenth resistor. The data signal ports of the first signal acquisition circuit are all electrically connected to the first power supply through the twelfth resistor, and the clock signal ports of the first signal acquisition circuit are all electrically connected to the first power supply through the thirteenth resistor. The fourth clock signal port and the clock signal port of the third signal acquisition circuit are both electrically connected to the third power supply through the eighteenth resistor, and the fourth data signal port and the data signal port of the third signal acquisition circuit are both electrically connected to the third power supply through the seventeenth resistor.

12. A battery management system, characterized in that: The communication circuit comprises the communication circuit according to any one of claims 1 to 6, or the communication circuit according to any one of claims 7 to 11.

13. A battery pack, characterized in that: include: A battery cell module and a battery management system, wherein the battery management system comprises a communication circuit according to any one of claims 1 to 6; The battery cell module includes a plurality of battery cells, the plurality of battery cells are connected in series, a first portion of the battery cells form a first battery cell unit, and a second portion of the battery cells form a second battery cell unit; The first signal acquisition circuit is electrically connected to the first battery cell unit, and the second signal acquisition circuit is electrically connected to the second battery cell unit.

14. A battery pack, characterized in that: include: A battery cell module and a battery management system, wherein the battery management system comprises a communication circuit according to any one of claims 7 to 11; The battery module includes a plurality of battery cells, the plurality of battery cells are connected in series, a first portion of the battery cells forms a first battery cell unit, a second portion of the battery cells forms a second battery cell unit, and a third portion of the battery cells forms a third battery cell unit; The first signal acquisition circuit is electrically connected to the first battery cell unit, the second signal acquisition circuit is electrically connected to the second battery cell unit, and the third signal acquisition circuit is electrically connected to the third battery cell unit.

15. An electrical device, characterized in that: Comprising the battery pack and the load as claimed in claim 13 or 14.

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