Slope compensation circuit and switching power supply

Abstract

The invention discloses a slope compensation circuit and a switching power supply, and the slope compensation circuit comprises a first slope voltage generation circuit which is used for connecting a first pin and a second pin of an MCU, and generating a first slope voltage through employing a first pulse width control signal under the control of a second pulse width control signal; the amplifying circuit is used for amplifying the amplitude of the first ramp voltage signal to obtain a second ramp voltage; the compensating circuit is used for subtracting the peak current given signal from the second ramp voltage, generating a compensated peak current given signal and inputting the compensated peak current given signal to the in-phase input end of the peak current comparator; when the switching power supply works, the MCU compares the compensated peak current given signal with the input inductor instantaneous current value feedback signal, and controls the magnitude of the first pulse width control signal according to the comparison result. According to the invention, the resource demand of the peak current mode digital control MCU is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of converters, and in particular to a slope compensation circuit and a switching power supply. Background Art

[0002] For switching power supply topologies with both DCM and CCM operating modes, the significant differences in their characteristics make the design of feedback control compensation circuits difficult. DCM mode has low loop gain, requiring a large compensation gain to achieve the required dynamic performance. CCM mode, on the other hand, has a higher loop gain, and excessive gain can cause loop oscillation and unstable operation of the switching power supply. Therefore, it's difficult to strike a balance between DCM dynamic performance and CCM stability.

[0003] When using peak current mode, the same topology circuit does not need to consider the difference between DCM and CCM modes. It only needs to design a compensation loop to meet the control requirements of the full load range of the switching power supply.

[0004] Therefore, peak current mode control is often used in switching power converters. Using peak current mode control can not only limit the maximum current value to protect MOS from damage, but also reduce the order of the switching power supply, making the switching power supply topology easier to control and the range of stable working conditions wider.

[0005] However, peak current mode control also has an inherent defect, namely the subharmonic oscillation problem. When the PWM duty cycle exceeds 50%, the peak current control mode will experience subharmonic oscillation problems, which will cause the output voltage ripple to increase and even cause the output control to continue to oscillate, making the switching power supply unstable.

[0006] To address this issue, the switching power supply industry has developed slope compensation technology. This technology effectively increases the slope of the rising current to achieve stability by superimposing a periodically reset descending ramp on the peak current setpoint using synchronized PWM. Currently, common analog peak current mode control chips all have this compensation function. However, digital peak current mode control chips, limited by the MCU's DAC resources and performance, cannot implement slope compensation, or the implemented slope compensation is not smooth enough.

[0007] In order to realize the slope compensation function in the digital control peak current mode of the MCU, this circuit was invented to realize the slope compensation of the peak current control without using the DAC of the MCU and a small amount of the MCU's PWM resources. Summary of the Invention

[0008] In view of this, the technical problem to be solved by the present invention is to propose a slope compensation circuit and a switching power supply, which realizes slope compensation of peak current control by using only a small amount of PWM resources of the MCU, so that the MCU without DAC in the switching power supply can also adopt peak current control.

[0009] As a first aspect of the present invention, the embodiment and technical solution of the slope compensation circuit provided are as follows:

[0010] A slope compensation circuit is applied to a switching power supply, wherein the switching power supply uses an MCU for peak current mode control. The MCU includes: a peak current comparator; a first pin for outputting a first pulse width control signal; a second pin for outputting a second pulse width control signal, wherein the first pulse width control signal and the second pulse width control signal are complementary; a third pin for inputting an inductor instantaneous current feedback signal to an inverting input terminal of the peak current comparator; and a fourth pin for outputting a peak current setting signal. The slope compensation circuit includes:

[0011] A first ramp voltage generating circuit, configured to connect the first pin and the second pin of the MCU and generate a first ramp voltage using the first pulse width control signal under the control of the second pulse width control signal;

[0012] an amplifier circuit, configured to amplify the amplitude of the first ramp voltage signal to obtain a second ramp voltage;

[0013] a compensation circuit, configured to subtract the peak current given signal from the second ramp voltage to generate a compensated peak current given signal which is input to the non-inverting input terminal of the peak current comparator;

[0014] When the switching power supply is working, the MCU compares the compensated peak current given signal with the input inductor instantaneous current value feedback signal, and controls the level of the first pulse width control signal according to the comparison result.

[0015] Preferably, the first ramp voltage generating circuit includes a switch tube Q1, a resistor R1 and a capacitor C1, one end of the resistor R1 is used to connect to the first pin of the MCU, one end of the resistor R1, one end of the switch tube Q1 and one end of the capacitor C1 are connected together to output the first ramp voltage, the gate of the switch tube Q1 is used to connect to the second pin of the MCU, and the other end of the switch tube Q1 and the other end of the capacitor C1 are connected together for grounding.

[0016] Furthermore, the first ramp voltage generating circuit also includes a resistor R3 and a resistor R5, the gate of the switch tube Q1 is connected to one end of the resistor R3 and one end of the resistor R5 at the same time, the other end of the resistor R3 is used to connect to the second pin of the MCU, and the other end of the resistor R5 is connected to the connection point of the other end of the switch tube Q1 and the other end of the capacitor C1.

[0017] Preferably, the amplifying circuit includes an operational amplifier U1B, the first ramp voltage is input to the non-inverting input terminal of the operational amplifier U1B, the inverting input terminal of the operational amplifier U1B is grounded, and the output terminal of the operational amplifier U1B outputs the second ramp voltage.

[0018] Furthermore, the amplifying circuit also includes a resistor R2 and a resistor R4, one end of the resistor R2 and one end of the resistor R4 are simultaneously connected to the inverting input terminal of the operational amplifier U1B, the other end of the resistor R2 is connected to the output terminal of the operational amplifier U1B, and the other end of the resistor R4 is used for grounding.

[0019] Preferably, the compensation circuit includes a comparator U1A, the second ramp voltage is input to the inverting input terminal of the comparator U1A, the peak current setting signal is input to the non-inverting input terminal of the comparator U1A, and the comparator output terminal outputs the compensated peak current setting signal.

[0020] Furthermore, the compensation circuit also includes a resistor R6, a resistor R7, a resistor R9 and a resistor R10, one end of the resistor R6 is input with the second ramp voltage, the other end of the resistor R6 is simultaneously connected to the inverting input end of the comparator U1A and one end of the resistor R7, the other end of the resistor R7 is connected to the output end of the comparator U1A, one end of the resistor R10 is input with the peak current given signal, the other end of the resistor R10 is simultaneously connected to the non-inverting input end of the comparator U1A and one end of the resistor R9, and the other end of the resistor R9 is used for grounding.

[0021] Furthermore, the resistance values of the resistor R6 , the resistor R7 , the resistor R9 and the resistor R10 are equal.

[0022] Furthermore, the compensation circuit also includes a resistor R8 and a capacitor C2, one end of the resistor R8 is connected to the output end of the comparator U1A, the other end of the resistor R8 and one end of the capacitor C2 are connected together to output the compensated peak current given signal, and the other end of the capacitor C2 is used for grounding.

[0023] As a second aspect of the present invention, the technical solution of the embodiment of the switching power supply provided is as follows:

[0024] A switching power supply employing an MCU for peak current mode control, the MCU comprising: a peak current comparator; a first pin for outputting a first pulse width control signal; a second pin for outputting a second pulse width control signal, the first pulse width control signal and the second pulse width control signal being complementary; a third pin for inputting an inductor instantaneous current value feedback signal to an inverting input terminal of the peak current comparator; and a fourth pin for outputting a peak current setting signal. The switching power supply further comprises the slope compensation circuit described in any one of the first aspects above.

[0025] The beneficial effects of the present invention are as follows: the switching power supply of the prior art peak current mode control uses a DAC as a ramp signal generator, which is limited by the maximum operating frequency of the DAC being 15 MHz. For high-frequency applications such as 200 kHz, the ramp signal will have a large step shape, which may cause nonlinearity in slope compensation and produce some adverse effects; or the switching power supply MCU of the prior art does not have a high-speed DAC or the DAC cannot automatically generate a sawtooth wave, and cannot adopt the peak current control mode for control; the embodiment of the present invention adds a first ramp voltage generating circuit, uses the first pulse width control signal under the control of a second pulse width control signal to generate a first ramp voltage, and amplifies the first ramp voltage to supplement the peak current given signal, that is, only one complementary PWM signal output and a small number of components need to be added to solve the problem that the digital power control MCU does not have a DAC converter, the DAC converter cannot generate a sawtooth wave, or the DAC converter is too slow to perform slope compensation, thereby reducing the resource requirements of the peak current mode digital control MCU. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 A specific circuit diagram of a peak current mode slope compensation circuit of a switching power supply using Buck topology;

[0027] Figure 2 A specific circuit diagram of a peak current mode slope compensation circuit of a switching power supply using a Boost topology;

[0028] Figure 3 Schematic diagram of the original slope compensation signal waveform;

[0029] Figure 4 Schematic diagram of the slope compensation signal waveform after amplification;

[0030] Figure 5 Waveform diagram after subtracting the slope compensation signal from the peak current given signal;

[0031] Figure 6 Schematic diagram of the peak current given signal waveform after compensation. DETAILED DESCRIPTION

[0032] It should be noted that, unless there is any conflict, the embodiments and features in the embodiments of this application can be combined with each other.

[0033] In order to enable those skilled in the art to better understand the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of this application.

[0034] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate to describe the embodiments of the present application here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0035] It should be understood that in the specification, claims and drawings, when a step is described as being connected to another step, the step may be directly connected to the other step, or be connected to the other step through a third step; when an element / unit is described as being "connected" to another element / unit, the element / unit may be "directly connected" to the other element / unit, or be "connected" to the other element / unit through a third element / unit.

[0036] In addition, the figures of this disclosure are merely schematic diagrams of the present disclosure and are not necessarily drawn to scale. Identical reference numbers in the figures denote identical or similar parts, and therefore repeated descriptions thereof will be omitted. Some of the blocks shown in the figures are functional entities that do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented using software, in one or more hardware modules or integrated circuits, or in different networks and / or processor devices and / or microcontrollers.

[0037] The slope compensation circuit of an embodiment of the present invention is applied to a switching power supply, which uses an MCU for peak current mode control. The MCU includes: a peak current comparator; a first pin for outputting a first pulse width control signal; a second pin for outputting a second pulse width control signal, wherein the first pulse width control signal and the second pulse width control signal are complementary; a third pin for inputting an inductor instantaneous current feedback signal to an inverting input terminal of the peak current comparator; and a fourth pin for outputting a peak current setting signal. The slope compensation circuit includes:

[0038] A first ramp voltage generating circuit is configured to connect the first pin and the second pin of the MCU and generate a first ramp voltage using the first pulse width control signal under the control of the second pulse width control signal;

[0039] an amplifier circuit, configured to amplify the amplitude of the first ramp voltage signal to obtain a second ramp voltage;

[0040] A compensation circuit is used to subtract the peak current given signal from the second ramp voltage to generate a compensated peak current given signal which is input to the non-inverting input terminal of the peak current comparator;

[0041] When the switching power supply is working, the MCU compares the compensated peak current given signal with the input inductor instantaneous current value feedback signal, and controls the level of the first pulse width control signal according to the comparison result.

[0042] The slope compensation circuit of the present invention can be applied to peak current mode control of switching power supplies using various topologies, including Buck, Boost, and Buck-Boost. The present invention is not limited to the topologies mentioned here. The slope compensation circuit of the present invention can avoid subharmonic oscillation problems in peak current mode topologies. The following details the present invention using switching power supplies using Buck and Boost converter topologies as examples.

[0043] Figure 1 A specific circuit diagram of a peak current mode slope compensation circuit for a switching power supply using Buck topology is shown in the following figure. Figure 1 : The switching power supply circuit topology is a Buck type step-down DCDC circuit, C4 is the power circuit input filter capacitor, C3 is the power circuit output filter capacitor, Q2 is the power circuit main switch tube, L1 is the power circuit main inductor, and D1 is the power circuit freewheeling diode.

[0044] PWM is the first pulse width control signal output by the MCU, PWM_Q is the second pulse width control signal output by the MCU that is complementary to the first pulse width control signal, Current_Feed is the feedback signal of the instantaneous current value of the inductor, PeakRef_DAC_Out is the peak current given signal output by the MCU through the DAC, and the PWM signal is amplified by the driving circuit to drive the field effect transistor Q2 of the Buck power circuit to achieve PWM control of the power circuit; the PWM signal is also buffered by resistor R1 and capacitor C1 and sent to the non-inverting input terminal of the operational amplifier U1B. The resistance value of each resistor is represented by its reference numeral, and the PWM signal is amplified by the operational amplifier U1B (R2+R4 ) / R4 times and then output from the 7-pin output port of the operational amplifier U1B. The resistance values of resistors R6, R7, R9, and R10 are equal. Therefore, the output voltage of the comparator U1A is equal to the peak current given signal PeakRef_DAC_Out minus the output voltage U1B_Out of the operational amplifier U1B, thereby realizing the superposition of a negative slope ramp signal on the peak current given signal. The output signal of the operational amplifier U1A is sent to the non-inverting input terminal of the peak current comparator of the MCU through the resistor R8, and is compared with the inductor instantaneous current value feedback signal Current_Feed inputted at the inverting input terminal of the peak current comparator, thereby realizing the peak current control of the first pulse width control signal.

[0045] The first pulse width control signal passes through the MOS drive circuit to control the high-speed switching of the main switch Q2. The working principle of the power circuit is analyzed in detail as follows:

[0046] When the main switch Q2 turns on, the current flowing through the power circuit's main inductor L1 begins to rise. When the current in the power circuit's main inductor L1 exceeds the peak current reference signal PeakRef_DAC_Out, the MCU's internal comparator COMP1 flips, the first pulse-width control signal goes low, and the main switch Q2 turns off. The power circuit's main inductor current continues to flow through diode D1, continuously supplying power to the output. When the switching power supply is in steady state, the average current flowing through the power circuit's main inductor L1 equals the load current, and the voltage on the output filter capacitor C3 remains stable, neither rising nor falling.

[0047] The feedback control circuit consists of the MCU, op amp U1B, comparator U1A, switch Q1, resistor R1, capacitor C1 and other components. It achieves the purpose of adjusting the PWM duty cycle to stabilize the output voltage according to the negative feedback of the output voltage Out. Its working principle is as follows:

[0048] The MCU program samples the output voltage Vout, compares it with the set target voltage, and performs a PI calculation on the voltage error to obtain a peak current reference value, PeakRef_Dac_Out, which is output to the MCU. This peak current reference value, PeakRef_Dac_Out, is then superimposed with the slope compensation signal U1B_Out and sent back to the positive terminal of the MCU's internal comparator COMP1 for comparison with the current inductor instantaneous current feedback signal Current_Feed. When the current inductor instantaneous current feedback signal Current_Feed exceeds the voltage at the positive terminal of COMP1, the high-level pulse of the first pulse-width control signal PWM cycle of this cycle ends, and the first pulse-width control signal outputs a low level. At the end of the first pulse-width control signal PWM cycle, the first pulse-width control signal returns to a high level, and this cycle repeats.

[0049] The slope compensation circuit includes a first slope voltage generating circuit, an amplifier circuit, and a compensation circuit; wherein the first slope voltage generating circuit includes a switch tube Q1, a resistor R1, and a capacitor C1. One end of the resistor R1 is used to connect to the first pin of the MCU. One end of the resistor R1, one end of the switch tube Q1, and one end of the capacitor C1 are connected together to output the first slope voltage. The gate of the switch tube Q1 is used to connect to the second pin of the MCU. The other end of the switch tube Q1 and the other end of the capacitor C1 are connected together for grounding. The amplifier circuit includes an op amp U1B. The first slope voltage is input to the non-inverting input terminal of the op amp U1B, the inverting input terminal of the op amp U1B is used for grounding, and the output terminal of the op amp U1B outputs the second slope voltage. The compensation circuit includes a comparator U1A. The second slope voltage is input to the inverting input terminal of the comparator U1A, the peak current given signal is input to the non-inverting input terminal of the comparator U1A, and the compensated peak current given signal is output to the comparator output terminal. The working principle is as follows:

[0050] The operation process starts when the first pulse width control signal PWM switches to a low level, and the second pulse width control signal PWM_Q switches to a high level, the switch tube Q1 is turned on, and the voltage on the capacitor C1 is reduced to 0V in a very short time, preparing for the next PWM switching cycle;

[0051] When the first pulse-width control signal PWM switches to a high-level output, the second pulse-width control signal PWM_Q immediately outputs a low-level output, turning off the switch Q1. The first pulse-width control signal charges the capacitor C1 via the resistor R1. The resistance values of the resistors and the capacitance values of the capacitors are represented by their respective reference numerals. Because the time constant of R1*C1 is much greater than the period of the first pulse-width control signal, the voltage on the capacitor C1 rises extremely slowly relative to the period of the first pulse-width control signal. The current charging the capacitor C1 is (Vcc-Uc1) / R1, where Vcc is the power supply voltage of the MCU (3.3V in a specific implementation) and Uc1 is the voltage across the capacitor C1. Because the capacitance of the capacitor C1 changes very little, the charging current of the capacitor C1 can be approximated as Vcc / R1, which is a constant value. Therefore, a linearly rising voltage waveform with a small amplitude is obtained on the capacitor C1.

[0052] When the first pulse width control signal PWM is switched to a low level again, the switch tube Q1 is turned on again to discharge the capacitor C1 , thereby forming a first ramp voltage that is synchronized with the first pulse width control signal PWM and repeats repeatedly.

[0053] Because the amplitude of the directly generated first ramp voltage is too small to be used directly, it is necessary to use the operational amplifier U1B to amplify the amplitude of the first ramp voltage, and use the resistors R2 and R4 to set the appropriate amplification factor to adjust the amplitude of the first ramp voltage to the required level. Then, the comparator U1A is used to subtract the peak current given signal output by the MCU to obtain the compensated current peak given signal.

[0054] The first ramp voltage generating circuit also includes resistors R3 and R5. The gate of switch Q1 is connected to both resistors R3 and R5. The other end of resistor R3 is connected to the second pin of the MCU, and the other end of resistor R5 is connected to the junction between the other ends of switch Q1 and capacitor C1. Resistor R3 is added to prevent excessive current output from the MCU_Q pin of the MCU when Q1 malfunctions. Resistor R5 is added to maintain a low gate voltage during power-up of the switching power supply.

[0055] The amplifier circuit also includes resistors R2 and R4. One end of resistor R2 and one end of resistor R4 are both connected to the inverting input of op amp U1B. The other end of resistor R2 is connected to the output of op amp U1B, and the other end of resistor R4 is grounded. As explained above, the addition of resistors R2 and R4 is intended to set the appropriate amplification factor for op amp U1B and adjust the amplitude of the first ramp voltage to the desired level.

[0056] The compensation circuit also includes resistors R6, R7, R9, and R10. One end of resistor R6 receives the second ramp voltage, while the other end is connected to both the inverting input of comparator U1A and one end of resistor R7. The other end of resistor R7 is connected to the output of comparator U1A. One end of resistor R10 receives the peak current setting signal, while the other end is connected to both the non-inverting input of comparator U1A and one end of resistor R9. The other end of resistor R9 is grounded. Resistors R6, R7, R9, and R10, along with op amp U1A, form a subtraction circuit, ensuring that the output voltage of U1A equals the MCU output voltage signal PeakRef_DAC_Out minus the output voltage signal of U1B.

[0057] Furthermore, the compensation circuit also includes resistor R8 and capacitor C2. One end of resistor R8 is connected to the output of comparator U1A, and the other end of resistor R8 and one end of capacitor C2 are connected together to output the compensated peak current set signal. The other end of capacitor C2 is grounded. The addition of resistors R8 and C2 forms a first-order low-pass filter to reduce noise in the signal sent to the non-inverting input of COMP1 of the MCU.

[0058] Figure 2 A specific circuit diagram of a peak current mode slope compensation circuit of a switching power supply using Boost topology, Figure 1 The difference lies in the working principle of the power circuit part: when the main switch tube Q2 is turned off, the main inductor current of the power circuit supplies power to the output capacitor through the rated diode D1; when the switching power supply is in steady state, the average current supplemented to the output filter capacitor C3 through the diode D1 is equal to the load current value, and the voltage on the output filter capacitor C3 remains stable, neither rising nor falling.

[0059] Figure 2 The control circuit and slope compensation circuit of the circuit are Figure 1 Exactly the same, briefly summarized here:

[0060] Figure 1 、 Figure 2The key point of the circuit is to use resistors R1, C1, and switch Q1 to realize an approximate sawtooth wave synchronized with the first pulse width control signal. The principle is as follows: since the time constant of resistor R1 and capacitor C1 is much longer than the period of the first pulse width control signal, the voltage rising on capacitor C1 in each period is extremely small, the voltage loaded on resistor R1 can be approximately considered constant, and the current flowing through resistor R1 can be approximately considered constant. Therefore, the voltage rising slope on capacitor C1 can be approximately considered linear. When the first pulse width control signal changes from high to low, the second pulse width control signal changes from low to high, controlling the switch Q1 to turn on, discharging capacitor C1, and preparing for the next first pulse width control signal period to generate a ramp voltage. Therefore, an approximate sawtooth wave signal with a small peak amplitude and synchronized with the first pulse width control signal can be obtained. The waveform is shown in the attached figure. Figure 3 As shown, the horizontal axis represents time, the unit is 0.1uS; the vertical axis represents voltage, the unit is 10mV.

[0061] Since the sawtooth wave signal has a small amplitude and cannot be used directly, it is necessary to use the op amp U1B composed of a common-mode amplifier circuit to amplify it to a suitable amplitude and then add it to the peak current given signal. The waveform of the amplified slope compensation signal is as follows: Figure 4 As shown, the peak current given signal is negatively superimposed on the slope compensation signal. Figure 5 As shown, the compensated peak current given signal fed back to the MCU is as follows Figure 6 As shown, Figures 4 to 6 The meaning of the horizontal and vertical coordinates is the same as Figure 3 same.

[0062] The above are merely preferred embodiments of the present invention. It should be noted that the above preferred embodiments should not be construed as limiting the present invention. Persons skilled in the art will appreciate that equivalent substitutions, improvements, and modifications may be made without departing from the spirit and scope of the present invention. These equivalent substitutions, improvements, and modifications should also be considered within the scope of protection of the present invention. Examples will not be used here for further elaboration; the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A slope compensation circuit is applied to a switching power supply, wherein the switching power supply adopts an MCU for peak current mode control, and the MCU comprises: Peak current comparator; A first pin, outputting a first pulse width control signal; The second pin outputs a second pulse width control signal, wherein the first pulse width control signal and the second pulse width control signal are complementary to each other; the third pin inputs an inductor instantaneous current value feedback signal to the inverting input terminal of the peak current comparator; and the fourth pin outputs a peak current setting signal. The slope compensation circuit includes: A first ramp voltage generating circuit, configured to connect the first pin and the second pin of the MCU and generate a first ramp voltage using the first pulse width control signal under the control of the second pulse width control signal; an amplifier circuit, configured to amplify the amplitude of the first ramp voltage signal to obtain a second ramp voltage; a compensation circuit, configured to subtract the peak current given signal from the second ramp voltage to generate a compensated peak current given signal which is input to the non-inverting input terminal of the peak current comparator; When the switching power supply is working, the MCU compares the compensated peak current given signal with the input inductor instantaneous current value feedback signal, and controls the level of the first pulse width control signal according to the comparison result.

2. The slope compensation circuit according to claim 1, wherein: The first ramp voltage generating circuit includes a switch tube Q1, a resistor R1 and a capacitor C1, one end of the resistor R1 is used to connect to the first pin of the MCU, one end of the resistor R1, one end of the switch tube Q1 and one end of the capacitor C1 are connected together to output the first ramp voltage, the gate of the switch tube Q1 is used to connect to the second pin of the MCU, and the other end of the switch tube Q1 and the other end of the capacitor C1 are connected together for grounding.

3. The slope compensation circuit according to claim 2, wherein: The first ramp voltage generating circuit also includes a resistor R3 and a resistor R5. The gate of the switch tube Q1 is connected to one end of the resistor R3 and one end of the resistor R5 at the same time. The other end of the resistor R3 is used to connect to the second pin of the MCU. The other end of the resistor R5 is connected to the connection point between the other end of the switch tube Q1 and the other end of the capacitor C1.

4. The slope compensation circuit according to claim 1, wherein: The amplifying circuit includes an operational amplifier U1B, a non-inverting input terminal of the operational amplifier U1B inputs the first ramp voltage, an inverting input terminal of the operational amplifier U1B is grounded, and an output terminal of the operational amplifier U1B outputs the second ramp voltage.

5. The slope compensation circuit according to claim 4, wherein: The amplifier circuit further includes a resistor R2 and a resistor R4, one end of the resistor R2 and one end of the resistor R4 are simultaneously connected to the inverting input terminal of the operational amplifier U1B, the other end of the resistor R2 is connected to the output terminal of the operational amplifier U1B, and the other end of the resistor R4 is grounded.

6. The slope compensation circuit according to claim 1, wherein: The compensation circuit includes a comparator U1A, the inverting input terminal of the comparator U1A inputs the second ramp voltage, the non-inverting input terminal of the comparator U1A inputs the peak current setting signal, and the output terminal of the comparator outputs the compensated peak current setting signal.

7. The slope compensation circuit according to claim 6, wherein: The compensation circuit also includes resistors R6, R7, R9 and R10. One end of the resistor R6 is input with the second ramp voltage, and the other end of the resistor R6 is simultaneously connected to the inverting input of the comparator U1A and one end of the resistor R7. The other end of the resistor R7 is connected to the output of the comparator U1A. One end of the resistor R10 is input with the peak current given signal, and the other end of the resistor R10 is simultaneously connected to the non-inverting input of the comparator U1A and one end of the resistor R9. The other end of the resistor R9 is grounded.

8. The slope compensation circuit according to claim 7, wherein: The resistance values of the resistor R6 , the resistor R7 , the resistor R9 and the resistor R10 are equal.

9. The slope compensation circuit according to any one of claims 6 to 8, characterized in that: The compensation circuit also includes a resistor R8 and a capacitor C2, one end of the resistor R8 is connected to the output end of the comparator U1A, the other end of the resistor R8 and one end of the capacitor C2 are connected together to output the compensated peak current given signal, and the other end of the capacitor C2 is used for grounding.

10. A switching power supply, wherein the switching power supply adopts an MCU for peak current mode control, the MCU comprising: Peak current comparator; A first pin, outputting a first pulse width control signal; The second pin outputs a second pulse width control signal, and the first pulse width control signal is complementary to the second pulse width control signal; the third pin inputs an inductor instantaneous current value feedback signal to the inverting input terminal of the peak current comparator; the fourth pin outputs a peak current setting signal; it is characterized in that: the switching power supply also includes the slope compensation circuit according to any one of claims 1 to 9.

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