Data monitoring module, data monitoring method and smart card testing device

Abstract

This application provides a data monitoring module, a data monitoring method, and a smart card testing device, comprising: establishing a signal path for monitoring communication data between the smart card under test and the read / write module under test when the smart card under test is installed in the data monitoring module; a signal acquisition unit acquiring the original clock signal, original reset signal, and original communication data signal generated during communication between the smart card under test and the read / write module under test based on the signal path; a signal processing unit generating a down-frequency clock signal, a standard reset signal, and a standard communication data signal; and an output connection component for outputting the down-frequency clock signal, standard reset signal, and standard communication data signal to the smart card testing device for the smart card testing device to reconstruct the communication data. In this method, by establishing a monitoring path from the smart card under test to the read / write module under test, the compatibility of the data monitoring module can be improved, thereby enhancing the accuracy of the smart card testing device.

Description

Technical Field

[0001] This application relates to the field of smart card testing technology, and in particular to a smart data monitoring module, a data monitoring method, and a smart card testing device. Background Technology

[0002] With the widespread application of smart card technology, accurate capture and timing analysis of communication data between smart cards and reading / writing devices are crucial during research and development and testing. Especially when smart cards need to support multiple voltage levels (such as Class A 5.0V, Class B 3.0V, and Class C 1.8V), the monitoring device must have good level compatibility and data recovery capabilities to meet the needs of complex testing environments.

[0003] Currently, most commercially available monitoring devices exist as independent structures, typically unable to form a unified structure with the main control test platform. Furthermore, the connection methods between these devices and the devices under test (DUT) and smart cards are non-standardized, requiring multiple adapter cables and intermediate modules. This type of structure not only involves complex wiring and cumbersome operation but also suffers from signal interference and poor contact, affecting the accuracy of the monitored data. In addition, some devices lack a unified level adaptation and frequency reduction mechanism when dealing with smart cards of different voltage levels or high-frequency jitter signals, leading to data recovery failures or test blind spots. Summary of the Invention

[0004] In view of this, the purpose of this application is to provide a data monitoring module, a data monitoring method, and a smart card testing device. By establishing a monitoring path from the smart card under test to the read / write module under test, standardized capture of communication data between smart cards of multiple voltage levels and multiple standards and the read / write device can be achieved, thereby improving the compatibility of the data monitoring module and enhancing the accuracy of the smart card testing device.

[0005] In a first aspect, the present invention provides a data monitoring module, comprising: an analog smart card, a signal acquisition unit, a signal processing unit, and an output connection component connected in sequence; the analog smart card is connected to a read / write module under test; the output connection component is connected to a smart card testing device of an external device; the analog smart card is used to establish a signal path for monitoring communication data between the smart card under test and the read / write module under test when the smart card under test is set in the data monitoring module; the signal acquisition unit is used to acquire the original clock signal, the original reset signal, and the original communication data signal generated when the smart card under test communicates with the read / write module under test based on the signal path; the signal processing unit is used to down-clock the original clock signal to generate a down-clock signal; and to convert the original reset signal and the original communication data signal to generate a standard reset signal and a standard communication data signal; the output connection component is used to output the down-clock signal, the standard reset signal, and the standard communication data signal to the smart card testing device so that the smart card testing device can restore the communication data between the smart card under test and the read / write module under test.

[0006] In an optional implementation, the smart card testing device includes a first smart card slot; the data monitoring module further includes a second smart card slot; the second smart card slot is connected to both an analog smart card and a signal acquisition unit; the second smart card slot is used to install the smart card under test; the data monitoring module can be plugged into the first smart card slot via an output connection component; the analog smart card can be plugged into the third smart card slot of the read / write module under test.

[0007] In an optional implementation, the output connection component is provided with standard contact points conforming to a preset smart card standard; the data monitoring module is connected to the first smart card slot through the standard contact points.

[0008] In an optional implementation, the signal processing unit includes a clock processing circuit; the clock processing circuit includes a connected tri-state buffer and a frequency divider; the frequency divider is composed of multiple cascaded D-type flip-flops; the tri-state buffer is connected to the signal acquisition unit; the output terminal of the frequency divider is connected to the output connection component; the tri-state buffer is used to buffer the received original clock signal to generate a buffered original clock signal; the frequency divider is used to divide the buffered original clock signal by a preset multiple to generate a down-frequency clock signal, and outputs the down-frequency clock signal to the smart card testing device through the output connection component.

[0009] In an optional implementation, the signal processing unit further includes a level conversion circuit; the level conversion circuit includes at least one buffer, the input of which is connected to the signal acquisition unit, and the output of which is connected to the output connection component; the buffer is used to perform level conversion on the received original reset signal to generate a standard reset signal, and / or to perform level conversion on the original communication data signal to generate a standard communication data signal; the standard reset signal and the standard communication data signal are output to the smart card testing device through the output connection component; the smart card testing device is used to calculate the bit duration based on the down-frequency clock signal, determine the communication start time based on the standard reset signal, and decode the standard communication data signal based on the bit duration to restore the communication data between the smart card under test and the read / write module under test.

[0010] In an optional implementation, the preset input high-level recognition range of the buffer is 1.5V to 5.0V.

[0011] Secondly, the present invention provides a data monitoring method, applied to a data monitoring module of any of the foregoing embodiments; the method includes: establishing a signal path for monitoring communication data between the smart card under test and the read / write module under test by simulating a smart card with the smart card under test installed in the data monitoring module; acquiring, through a signal acquisition unit, the original clock signal, the original reset signal, and the original communication data signal generated when the smart card under test communicates with the read / write module under test; down-clocking the original clock signal to generate a down-clock signal by a signal processing unit; converting the original reset signal and the original communication data signal to generate a standard reset signal and a standard communication data signal; and outputting the down-clock signal, the standard reset signal, and the standard communication data signal to a smart card testing device through an output connection component, so that the smart card testing device can reconstruct the communication data between the smart card under test and the read / write module under test.

[0012] Thirdly, the present invention provides a smart card testing device, including a main control module; and a data monitoring module according to any of the foregoing embodiments; the main control module includes a first smart card slot; the data monitoring module includes a second smart card slot and an output connection component; the data monitoring module can be plugged into the first smart card slot through the output connection component; the second smart card slot is used to install the smart card to be tested.

[0013] In an optional implementation, the data monitoring module includes an analog smart card adapted to be inserted into the third smart card slot of the read / write module under test; the main control module also includes a contactless circuit; the first smart card slot is used to install a contact smart card; the contactless circuit is used for communication connection with the contactless smart card; when the output connection component is not connected to the first smart card slot and the smart card under test is a contact smart card, the main control module is connected to the smart card under test through the first smart card slot; when the output connection component is not connected to the first smart card slot and the smart card under test is a contactless smart card, the main control module is connected to the contactless smart card through the contactless circuit; when the output connection component is connected to the first smart card slot, the main control module receives the raw communication signal output from the data monitoring module through the first smart card slot to monitor the communication data between the read / write module under test and the smart card under test.

[0014] In an optional implementation, the main control module further includes a connected main control chip and a functional test module; the main control chip is configured to perform a preset functional test on the smart card under test through the functional test module when the smart card under test is placed in the first smart card slot; the preset functional test includes at least one of an anti-removal test and a power consumption sampling test.

[0015] This application provides a data monitoring module, a data monitoring method, and a smart card testing device, comprising: a simulated smart card, a signal acquisition unit, a signal processing unit, and an output connection component connected in sequence; the simulated smart card is connected to a read / write module under test; the output connection component is connected to a smart card testing device of an external device; the simulated smart card is used to establish a signal path for monitoring communication data between the smart card under test and the read / write module under test when the smart card under test is set in the data monitoring module; the signal acquisition unit is used to acquire the original clock signal, the original reset signal, and the original communication data signal generated when the smart card under test communicates with the read / write module under test based on the signal path; the signal processing unit is used to down-clock the original clock signal to generate a down-clock signal; and to convert the original reset signal and the original communication data signal to generate a standard reset signal and a standard communication data signal; the output connection component is used to output the down-clock signal, the standard reset signal, and the standard communication data signal to the smart card testing device so that the smart card testing device can restore the communication data between the smart card under test and the read / write module under test. In this approach, by integrating a simulated smart card, a signal acquisition unit, a signal processing unit, and an output connection component into the data monitoring module, a monitoring signal path is formed from the read / write device under test to the smart card under test. This enables high-precision capture and standardized processing of the raw signals during the communication process between the smart card under test and the read / write device, thereby effectively improving the integrity and decodeability of the communication data. Consequently, it significantly enhances the data monitoring capability and testing reliability of the smart card testing equipment in multi-type and multi-interface environments, meeting the comprehensive testing needs in complex R&D and testing applications.

[0016] Other features and advantages of this application will be set forth in the following description and will be apparent in part from the description or may be learned by practicing the application. The objectives and other advantages of this application are realized and obtained through the structures particularly pointed out in the description, claims and drawings.

[0017] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of a data monitoring module provided in an embodiment of this application;

[0020] Figure 2 A schematic diagram of the analog smart card, output connection component, and second smart card slot of the data monitoring module provided in this application embodiment;

[0021] Figure 3 This is a schematic diagram of the first smart card slot of the smart card testing device provided in the embodiments of this application;

[0022] Figure 4 A schematic diagram of the clock processing circuit provided in an embodiment of this application;

[0023] Figure 5 This is a schematic diagram of a level conversion circuit provided in an embodiment of this application;

[0024] Figure 6 A flowchart of the data monitoring method provided in the embodiments of this application;

[0025] Figure 7 This is a schematic diagram of the main control chip of the main control module provided in the embodiments of this application;

[0026] Figure 8 This is a schematic diagram of the non-contact circuit of the main control module provided in the embodiments of this application;

[0027] Figure 9 A schematic diagram of the power switch circuit of the main control module provided in the embodiments of this application;

[0028] Figure 10 A schematic diagram of the signal amplification circuit of the main control module provided in the embodiments of this application.

[0029] Icons: 1-Signal acquisition unit; 2-Signal processing unit; 3-Read / write module under test; 4-Smart card under test; 5-Smart card testing equipment. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0031] To facilitate understanding of this embodiment, the embodiments of this application will be described in detail below.

[0032] Example 1:

[0033] Figure 1 This is a schematic diagram of a data monitoring module provided in an embodiment of this application.

[0034] Reference Figure 1 and Figure 2 The data monitoring module includes: an analog smart card SIM3, a signal acquisition unit 1, a signal processing unit 2, and an output connection component J1 connected in sequence; the analog smart card SIM3 is connected to the read / write module 3 under test; and the output connection component J1 is connected to the smart card testing device 5 of the peripheral device.

[0035] The simulated smart card SIM3 is used to establish a signal path for monitoring the communication data between the smart card under test 4 and the read / write module under test 3 when the smart card under test 4 is set in the data monitoring module.

[0036] Here, the smart card under test 4 refers to the smart card inserted into the data monitoring module, participating in communication and being monitored. This includes, but is not limited to: financial IC cards (such as bank cards), social security cards, mobile communication SIM cards, and transportation cards.

[0037] The read / write module under test 3 refers to the smart card read / write device being tested during the testing process. This includes, but is not limited to, the following: bank IC card readers / writers, social security card readers / writers, SIM card readers / writers, transportation card ticket gates or recharge terminals, and commercial IC card payment terminals such as POS machines.

[0038] The analog smart card SIM3 is the interface component that establishes the physical and electrical connection between the data monitoring module and the read / write module under test 3. One end of the analog smart card SIM3 is constructed with the physical shape of a standard smart card (e.g., conforming to the size and shape of an ID-1 IC card) and has contact points conforming to standards such as ISO 7816, allowing it to be plugged into the smart card slot of the read / write module under test 3. Structurally, the analog smart card SIM3 can be a small PCB probe board, connected to the main circuit board of the data monitoring module via a flexible ribbon cable, leading out the power, ground, clock, reset, and data I / O contact signals of the read / write module under test 3.

[0039] The simulated smart card SIM3 is used to establish a complete signal path for monitoring bidirectional communication data between the smart card under test (SDK) 4 and the read / write module under test (DUT) 3 when the SDK 4 is installed in the second smart card slot SIM2 or CARD2 of the data monitoring module. This means that the signal emitted by the DUT 3 will enter the data monitoring module through the simulated smart card SIM3 and be transmitted to the SDK 4; similarly, the response signal of the SDK 4 will also be transmitted back to the DUT 3 through this signal path via the simulated smart card SIM3.

[0040] Among them, reference Figure 2 The second smart card slot is compatible with IC cards of different sizes available on the market. SIM2 is for small-sized cards, and CARD2 is for large-sized cards.

[0041] By simulating the relay and branching structure of the SIM3 smart card, a bypass monitoring path is established between the reading and writing device and the smart card. The signal acquisition unit 1 is used to achieve non-intrusive, synchronous, and complete communication data capture, ensuring that the test process does not affect the original communication process, while ensuring the real-time performance and accuracy of data monitoring.

[0042] The signal acquisition unit 1 is used to acquire the original clock signal, original reset signal and original communication data signal generated when the smart card under test 4 communicates with the read / write module under test 3 based on the signal path.

[0043] Here, the signal acquisition unit 1 is located at a key node in the aforementioned signal path, and its input terminal is connected to the signal line from the analog smart card SIM3 and the corresponding signal line of the second smart card slot SIM2 or CARD2. Based on the established signal path, the signal acquisition unit 1 acquires in real time the various raw electrical signals generated when the smart card under test 4 communicates with the read / write module 3 under test. The raw signals specifically include: the raw clock signal C_CLK provided by the read / write module 3 under test, the raw reset signal C_RST emitted by the read / write module 3 under test, and the raw communication data signal IO_Port transmitted bidirectionally between the read / write module 3 under test and the smart card under test 4. To ensure signal integrity and anti-interference, the input terminal of the signal acquisition unit 1 may integrate a preliminary signal buffer or protection circuit.

[0044] Signal processing unit 2 is used to down-clock the original clock signal to generate a down-clock signal; and to convert the original reset signal and the original communication data signal to generate a standard reset signal and a standard communication data signal.

[0045] Here, signal processing unit 2 is connected to the output of signal acquisition unit 1, receiving the acquired raw clock signal, raw reset signal, and raw communication data signal, and performing specialized processing on these signals to optimize their characteristics for accurate decoding by the external smart card testing equipment 5. Signal processing unit 2 mainly performs the following two types of processing:

[0046] 1. Down-clock the original clock signal to generate a down-clock signal.

[0047] To address the issue that direct measurement of the original clock signal may result in significant errors due to its potentially high frequency or jitter, signal processing unit 2 incorporates a clock processing circuit. This circuit includes a tri-state buffer U5, which buffers the original clock signal. Then, a frequency divider performs a fixed-rate frequency division on the buffered original clock signal. This results in a significantly longer period for the generated down-frequency clock signal DT_CLK, allowing the external smart card testing equipment 5 to measure its period with higher relative accuracy, thereby precisely calculating the bit duration ETU of the original communication.

[0048] 2. Perform signal conversion on the original reset signal and the original communication data signal to generate standard reset signal and standard communication data signal.

[0049] Considering that the smart card under test 4 and the read / write module under test 3 may operate under different voltage logic standards (e.g., Class A 5.0V, Class B 3.0V, Class C 1.8V), the signal processing unit 2 is equipped with a level conversion circuit. This circuit uses a buffer with a wide input high-level recognition range to perform level-compatible processing and drive on the original reset signal and the original communication data signal. The processed standard reset signal and standard communication data signal have a unified, standard logic level that is easily recognized by the external smart card testing equipment 5, thus solving the compatibility problem for signals from different types of smart cards.

[0050] The output connection component J1 is used to output the down-frequency clock signal, standard reset signal and standard communication data signal to the smart card test equipment 5 so that the smart card test equipment 5 can restore the communication data between the smart card under test 4 and the read / write module under test 3.

[0051] Here, the output connection component J1 is the physical interface for connecting the data monitoring module to the smart card testing device 5. Structurally, the output connection component J1 can be designed as a standard IC card edge connector (e.g., a standard IC1 type IC card with a width of 54mm and a thickness of 0.8mm, and the physical interface is also designed as an IC card contact according to the ISO1816-1 standard). The output connection component J1 is connected to the output terminal of the signal processing unit 2, and is responsible for outputting the processed down-frequency clock signal, standard reset signal, and standard communication data signal to the smart card testing device 5. These optimized signals ensure that the smart card testing device 5 achieves higher accuracy and reliability when performing subsequent communication data decoding and protocol analysis, thereby accurately restoring the original communication data between the smart card under test 4 and the read / write module under test 3.

[0052] Through the above structural and functional design, the data monitoring module of this embodiment can effectively intervene in the communication between the smart card under test 4 and the read / write module under test 3. By performing high-precision frequency reduction processing and wide-range level compatibility conversion on key signals, it provides high-quality monitoring signals for external testing equipment, significantly improving the accuracy of smart card communication data monitoring and the applicability to different types of smart cards.

[0053] In one embodiment, reference is made to Figure 2 and Figure 3 The smart card testing device 5 includes a first smart card slot CARD1; the data monitoring module also includes a second smart card slot SIM2 or CARD2; the second smart card slot SIM2 or CARD2 is connected to the analog smart card SIM3 and the signal acquisition unit 1 respectively.

[0054] Here, the first smart card slot CARD1 is located on the external smart card testing equipment 5, and its structure conforms to the size and contact arrangement requirements of the ISO7816 or ID-1 standard contact IC card slot. The first smart card slot CARD1 is used for electrical connection with the output connection component J1 in the data monitoring module.

[0055] With its standard slot design, testers can easily plug in and unplug data monitoring modules and replace them quickly, improving the modularity and maintainability of the test equipment.

[0056] The second smart card slot, SIM2 or CARD2, is located within the data monitoring module. Its design conforms to the ISO7816 standard and is used to install the smart card under test (SDK) 4 so that the SDK 4 can communicate with the read / write device under test through the data monitoring module.

[0057] The second smart card slot, SIM2 or CARD2, is used to install the smart card under test, 4.

[0058] Here, the signal pins of the second smart card slot SIM2 or CARD2 are located inside the data monitoring module and are electrically connected to the corresponding signal pins of the analog smart card SIM3 and the input terminal of the signal acquisition unit 1. This connection ensures that when the analog smart card SIM3 captures a signal from the read / write module 3 under test, or when the smart card 4 under test generates a response signal, these signals can be sensed by the signal acquisition unit 1. Specifically, the clock, reset, and data signals emitted by the read / write module 3 under test enter the data monitoring module through the analog smart card SIM3. Part of the signal is supplied to the smart card 4 under test in the second smart card slot SIM2 or CARD2, and the other part is captured by the signal acquisition unit 1. The response data signal generated by the smart card 4 under test is also captured by the signal acquisition unit 1 through the pins of the second smart card slot SIM2 or CARD2, and simultaneously transmitted back to the read / write module 3 under test through the analog smart card SIM3.

[0059] The data monitoring module can be plugged into the first smart card slot CARD1 via the output connection component J1.

[0060] Here, the data monitoring module is pluggably connected to the first smart card slot CARD1 of the smart card testing device 5 via its output connection component J1. The output connection component J1 is equipped with standard contacts conforming to a preset smart card standard; the data monitoring module connects to the first smart card slot CARD1 via these standard contacts. The data monitoring module can be easily inserted into the first smart card slot CARD1 of the smart card testing device 5 like a regular IC card, thereby establishing a stable electrical connection.

[0061] The analog smart card SIM3 can be plugged into the third smart card slot of the read / write module 3 under test.

[0062] Here, the analog smart card SIM3 can be plugged into the third smart card slot of the read / write module under test 3. The third smart card slot is the slot on the read / write module under test 3 that is originally used to insert a regular IC card. By inserting the analog smart card SIM3 into the slot of the read / write module under test 3, the data monitoring module successfully intervenes in the communication link between the read / write module under test 3 and the smart card under test 4.

[0063] The data monitoring module in this embodiment can be easily integrated into the test environment. Its second smart card slot SIM2 or CARD2 is used to fix the smart card under test 4, the simulated smart card SIM3 is used to connect the read / write module under test 3, and the output connection component J1 is used to communicate with the smart card test device 5, together forming a complete signal monitoring path and data transmission link.

[0064] In one embodiment, reference is made to Figure 4 The signal processing unit 2 includes a clock processing circuit; the clock processing circuit includes a connected tri-state buffer U5 and a frequency divider; the frequency divider (U1-U4) is composed of multiple cascaded D-type flip-flops; the tri-state buffer U5 is connected to the signal acquisition unit 1; the output terminal of the frequency divider is connected to the output connection component J1.

[0065] Here, the clock processing circuit is used to precisely process the original clock signal to generate a stable, down-frequency clock signal that is easy to analyze by the external smart card test equipment 5.

[0066] The tri-state buffer U5 is used to buffer the received original clock signal to generate a buffered original clock signal.

[0067] Here, the input terminal of the tri-state buffer U5 is connected to the signal acquisition unit 1 to receive the raw clock signal C_CLK obtained from the signal path. The main function of the tri-state buffer U5 is to buffer the received raw clock signal. Through buffering, the driving capability of the clock signal can be enhanced, the signal waveform can be improved, or signal isolation can be achieved, thereby generating a buffered raw clock signal, providing a stable and high-quality signal source for subsequent frequency division processing. The enable terminal of the tri-state buffer U5 can be controlled as needed to selectively connect or disconnect the clock signal path.

[0068] The frequency divider is used to divide the buffered original clock signal by a preset multiplier to generate a down-frequency clock signal, and outputs the down-frequency clock signal to the smart card test device 5 through the output connection component J1.

[0069] Here, the input of the frequency divider is connected to the output of the tri-state buffer U5 to receive the buffered original clock signal. The frequency divider is composed of multiple cascaded D-type flip-flops.

[0070] Specifically, refer to Figure 4 Four dual D-type flip-flop chips (U1, U2, U3, and U4) of model 74HC74 are used. These eight D-type flip-flops are configured in a serially cascaded divide-by-two structure to form a hardware frequency divider with a total division factor of 256 (2 to the power of 8). Each D-type flip-flop connects its Q output to the clock input of the next D-type flip-flop, thereby halving the frequency step by step.

[0071] A frequency divider divides the buffered original clock signal by a preset factor (e.g., 256 times) to generate a down-frequency clock signal DT_CLK. This down-frequency clock signal has a significantly lower frequency than the original clock signal, and its period is correspondingly lengthened. This reduces the relative error of the external smart card testing equipment 5 when measuring its period to calculate the bit duration, thus improving measurement accuracy.

[0072] The output terminal of the frequency divider, i.e., the port that outputs the down-frequency clock signal, is connected to the output connection component J1 of the data monitoring module. Through the output connection component J1, the down-frequency clock signal is finally output to the smart card testing device 5.

[0073] The clock processing circuit, consisting of a tri-state buffer U5 and a multi-stage D-type flip-flop divider, enables the data monitoring module of this application to effectively preprocess the captured raw clock signal.

[0074] In one embodiment, reference is made to Figure 5The signal processing unit 2 also includes a level conversion circuit; the level conversion circuit includes at least one buffer (U6 and U7), the input terminal of the buffer is connected to the signal acquisition unit 1, and the output terminal of the buffer is connected to the output connection component J1.

[0075] Here, the level conversion circuit is used to process the original reset signal and original communication data signal received from the signal acquisition unit 1 to ensure that the logic level of these signals can be correctly identified and processed by the subsequent smart card testing equipment 5, thereby achieving broad compatibility with smart card communication of different voltage levels.

[0076] The buffer is used to perform level conversion on the received raw reset signal to generate a standard reset signal, and / or to perform level conversion on the raw communication data signal to generate a standard communication data signal; the standard reset signal and the standard communication data signal are output to the smart card test device 5 through the output connection component J1.

[0077] Here, the level conversion circuit includes at least one buffer. In a specific implementation, separate buffers can be set for the original reset signal and the original communication data signal. Specifically, a tri-state buffer U7 of model SN74LV1T34 is used to process the original reset signal C_RST, and another tri-state buffer U6 of the same model is used to process the original communication data signal IO_Port.

[0078] The input of each buffer is connected to the signal acquisition unit 1 to receive the original reset signal and the original communication data signal obtained from the signal path. The output of each buffer is connected to the output connection component J1 of the data monitoring module.

[0079] The buffer is used to perform level conversion on the received raw reset signal to generate a standard reset signal, and / or to perform level conversion on the raw communication data signal to generate a standard communication data signal. Level conversion mainly refers to level adaptation and buffering drive, ensuring that the output signal has uniform, standard logic level characteristics and sufficient driving capability. The buffer's preset input high-level recognition range is 1.5V to 5.0V, enabling the data monitoring module to be compatible with processing signals from smart cards with different operating voltage levels, such as Class A (5.0V), Class B (3.0V), and Class C (1.8V).

[0080] The generated standard reset signal DT_RST and standard communication data signal DT_IO will be output to the smart card test device 5 through the output connection component J1.

[0081] The smart card testing device 5 is used to calculate the bit duration based on the down-frequency clock signal, determine the communication start time based on the standard reset signal, and decode the standard communication data signal based on the bit duration in order to restore the communication data between the smart card under test 4 and the read / write module under test 3.

[0082] Here, the smart card testing device 5 is used to calculate the bit duration of communication based on the down-frequency clock signal obtained from the clock processing circuit, determine the start time of communication based on the received standard reset signal, and decode the standard communication data signal based on the accurately calculated bit duration in order to accurately restore the original communication data between the smart card under test 4 and the read / write module under test 3.

[0083] Through the level conversion circuit, the data monitoring module of this application can not only accurately process clock signals, but also effectively process reset and data signals, ensuring broad compatibility with communication monitoring of various types of smart cards.

[0084] This application provides a data monitoring module, including: a simulated smart card, a signal acquisition unit, a signal processing unit, and an output connection component connected in sequence; the simulated smart card is connected to a read / write module under test; the output connection component is connected to a smart card testing device; the simulated smart card is used to establish a signal path for monitoring communication data between the smart card under test and the read / write module under test when the smart card under test is installed in the data monitoring module; the signal acquisition unit is used to acquire the original clock signal, original reset signal, and original communication data signal generated when the smart card under test communicates with the read / write module under test based on the signal path; the signal processing unit is used to down-clock the original clock signal to generate a down-clock signal; and to convert the original reset signal and original communication data signal to generate a standard reset signal and a standard communication data signal; the output connection component is used to output the down-clock signal, standard reset signal, and standard communication data signal to the smart card testing device so that the smart card testing device can reconstruct the communication data between the smart card under test and the read / write module under test. This approach integrates an analog smart card, a signal acquisition unit, a signal processing unit, and an output connection component into the data monitoring module, forming a monitoring signal path from the device under test (DUT) to the smart card. This enables high-precision capture and standardized processing of the raw signals during communication between the smart card and the DUT, effectively improving the integrity and decodeability of communication data. Consequently, it significantly enhances the data monitoring capabilities and testing reliability of smart card testing equipment in multi-type, multi-interface environments, meeting the comprehensive testing needs of complex R&D and testing applications. This approach allows for convenient and reliable integration into the communication link between the smart card and the DUT, accurately capturing and processing raw communication signals. This provides high-quality monitoring signals suitable for various voltage types of smart cards to external smart card testing equipment, significantly improving the accuracy of communication data reconstruction and the broad applicability of monitoring.

[0085] Example 2:

[0086] Figure 6 A flowchart of the data monitoring method provided in the embodiments of this application.

[0087] Reference Figure 6 The data monitoring method is applied to the aforementioned data monitoring module; the method includes:

[0088] Step S101: By simulating a smart card and setting the smart card under test in the data monitoring module, a signal path is established for monitoring the communication data between the smart card under test and the read / write module under test.

[0089] Here, by simulating a smart card, a signal path is established to monitor the communication data between the smart card under test and the read / write module under test when the smart card under test is set in the data monitoring module.

[0090] Specifically, the smart card under test is first installed into the second smart card slot of the data monitoring module. Then, the analog smart card of the data monitoring module is pluggably connected to the third smart card slot of the read / write module under test. Simultaneously, the data monitoring module is connected to the first smart card slot of an external smart card testing device via its output connection component.

[0091] Through this physical connection, the analog smart card serves as the interface for the data monitoring module to connect to the read / write module under test, while the second smart card slot connects to the smart card under test. The internal circuitry of the data monitoring module connects the contact signals of the analog smart card with the corresponding contact signals of the second smart card slot, thus forming a complete and monitorable signal path between the read / write module under test and the smart card under test. This signal path carries all the electrical signals exchanged between the two.

[0092] Step S102: The signal acquisition unit acquires the original clock signal, original reset signal and original communication data signal generated when the smart card under test communicates with the read / write module under test based on the signal path.

[0093] Here, after the signal path is established, the method enters the signal acquisition stage. Through the signal acquisition unit, the original clock signal, original reset signal, and original communication data signal generated when the smart card under test communicates with the read / write module under test are acquired based on the signal path.

[0094] When the read / write module under test (DUT) begins communication with the smart card under test (SDT) located in the second smart card slot of the data monitoring module, a series of electrical signals are generated between them. The signal acquisition unit captures these raw signals flowing through the signal path in real time. These signals include: Raw clock signal: typically provided by the DUT, used to synchronize communication between the two; Raw reset signal: typically issued by the DUT, used to initialize the SDT; Raw communication data signal: the actual data stream transmitted bidirectionally between the DUT and the SDT, manifested as voltage pulses.

[0095] Step S103: The original clock signal is down-clocked by the signal processing unit to generate a down-clocked clock signal; the original reset signal and the original communication data signal are converted to generate a standard reset signal and a standard communication data signal.

[0096] Here, after acquiring the original communication signal, the original clock signal is down-clocked by the signal processing unit to generate a down-clocked clock signal; and the original reset signal and the original communication data signal are converted to generate a standard reset signal and a standard communication data signal.

[0097] The down-frequency clock signal, standard reset signal, and standard communication data signal are output to the smart card testing equipment through the output connection component, so that the smart card testing equipment can restore the communication data between the smart card under test and the read / write module under test.

[0098] In step S104, the down-frequency clock signal, standard reset signal, and standard communication data signal are output to the smart card testing equipment through the output connection component, so that the smart card testing equipment can restore the communication data between the smart card under test and the read / write module under test.

[0099] Here, the output connection component of the data monitoring module transmits the down-frequency clock signal, standard reset signal, and standard communication data signal generated by the signal processing unit to the externally connected smart card testing equipment. Upon receiving the signals, the smart card testing equipment can calculate the bit duration of the original communication using the precise down-frequency clock signal, determine the start and synchronization points of the communication based on the standard reset signal, and accurately decode the standard communication data signal in conjunction with the bit duration, thereby completely reconstructing the actual communication content between the smart card under test and the read / write module under test.

[0100] This application provides a data monitoring method in which the data monitoring module can effectively establish a monitoring link, accurately capture and optimize the processing of key signals in the communication process, and provide a reliable data foundation for external testing equipment, thereby achieving high-fidelity monitoring of smart card communication.

[0101] Example 3:

[0102] The smart card testing equipment includes a main control module; it also includes the aforementioned data monitoring module; refer to Figure 3 The main control module includes the first smart card slot CARD1; see reference. Figure 2 The data monitoring module includes a second smart card slot SIM2 or CARD2 and an output connection component J1.

[0103] The data monitoring module can be plugged into the first smart card slot CARD1 via the output connection component J1; the second smart card slot SIM2 or CARD2 is used to install the smart card under test.

[0104] Here, the main control module is used to execute various test commands, process data, and communicate with external devices (such as a host computer). In its physical structure, the main control module includes a first smart card slot, CARD1. The first smart card slot, CARD1, is designed as an IC card socket conforming to international standards, such as the ID-1 type half-insertion contact IC card socket. The first smart card slot is not only used for directly reading, writing, powering, and resetting the smart card to perform functional tests, but also serves as an interface for connecting to the data monitoring module.

[0105] The data monitoring module is a key component for monitoring communication data. It includes a second smart card slot (SIM2 or CARD2) for mounting the smart card under test, an analog smart card interface for connecting to the read / write module under test, and an output connection component J1.

[0106] The data monitoring module can be plugged into the first smart card slot CARD1 of the main control module via its output connection component J1. When data monitoring is required, the data monitoring module can be inserted into the first smart card slot of the main control module like a standard IC card. Through this pluggable connection, a robust electrical connection is established between the data monitoring module and the main control module, enabling the communication signals captured and processed by the data monitoring module to be effectively transmitted to the main control module for further analysis and reconstruction.

[0107] Meanwhile, the second smart card slot SIM2 or CARD2 on the data monitoring module is used to install the smart card under test. When performing data monitoring operations, the user inserts the smart card whose communication with the read / write module under test needs to be monitored into this second smart card slot SIM2 or CARD2.

[0108] Through this combination of main control module and data monitoring module, and the convenient connection between them via the first smart card slot CARD1 and output connection component J1, the smart card testing equipment can not only independently perform various functional tests on the smart card (when the data monitoring module is not connected and the smart card under test is directly inserted into the first smart card slot CARD1), but also effectively monitor and analyze the communication data between the smart card under test and the external read / write module after connecting the data monitoring module, thus providing an integrated and multifunctional smart card testing solution.

[0109] In one embodiment, the data monitoring module includes a simulated smart card SIM3, which is adapted to be inserted into the third smart card slot of the read / write module under test.

[0110] The main control module also includes contactless circuitry; the first smart card slot CARD1 is used to install contact smart cards; and the contactless circuitry is used for communication with contactless smart cards.

[0111] When the output connection component is not connected to the first smart card slot CARD1 and the smart card under test is a contact smart card, the main control module connects to the smart card under test through the first smart card slot CARD1. When the output connection component J1 is not connected to the first smart card slot CARD1 and the smart card under test is a contactless smart card, the main control module communicates with the contactless smart card through a contactless circuit. When the output connection component J1 is connected to the first smart card slot CARD1, the main control module receives the raw communication signal output from the data monitoring module through the first smart card slot CARD1 to monitor the communication data between the read / write module under test and the smart card under test.

[0112] Here, to support testing of different types of smart cards, the main control module also includes contactless circuitry, as shown in the reference... Figure 8 The contactless circuitry enables the main control module to communicate with contactless smart cards. Specifically, the contactless circuitry includes the main control chip U11 (… Figure 7 The system consists of an SPI interface, a contactless baseband chip U13, and antennas (TX1 and TX2) connected to the baseband chip. The main control chip U11 interacts with the baseband chip U13 via the SPI bus (RC523_NSS, RC523_SCK, RC523_MISO, RC523_MOSI signal lines). The baseband chip U13 then drives the antennas to emit electromagnetic waves for near-field coupling communication with the contactless smart card, following contactless communication standards such as ISO14443.

[0113] By combining the first smart card slot CARD1 of the main control module with the contactless circuit, the smart card testing equipment has the capability for direct dual-mode testing.

[0114] When the output connection component J1 of the data monitoring module is not connected to the first smart card slot CARD1, and the smart card under test is a contact smart card, the main control module connects to the smart card under test through the first smart card slot CARD1. In this mode, the main control module can directly perform read, write, power supply, reset, and other operations on the contact smart card inserted into the first smart card slot CARD1, and execute various functional tests.

[0115] When the output connection component J1 of the data monitoring module is not connected to the first smart card slot CARD1, and the smart card under test is a contactless smart card, the main control module communicates with the contactless smart card through a contactless circuit. In this mode, the main control module communicates with the contactless smart card placed in the sensing area through its contactless circuit to perform contactless related tests.

[0116] When the output connection component J1 of the data monitoring module is connected to the first smart card slot CARD1, the main control module receives signals from the data monitoring module through the first smart card slot CARD1 to monitor the communication data between the read / write module under test and the smart card under test. In this mode, the first smart card slot CARD1 of the main control module serves as the signal input interface of the data monitoring module. The data monitoring module intervenes between the read / write module under test and the smart card under test, captures and processes the raw communication signals between them, and then outputs the processed signals to the main control module. After receiving these signals, the main control module can decode and analyze them to reconstruct the complete communication content between the two, thus realizing the data monitoring function.

[0117] With the above-described structure and working mode configuration, the smart card testing equipment provided in this application embodiment can not only be used as an independent testing tool to directly test contact and contactless smart cards, but also be transformed into a precise communication data monitoring device by connecting to a data monitoring module, thereby improving the efficiency of smart card research and development, debugging and fault analysis.

[0118] In one embodiment, the main control module further includes a connected main control chip U11 and a functional test module.

[0119] The main control chip U11 is configured to perform preset function tests on the smart card under test through the function test module when the smart card under test is placed in the first smart card slot CARD1; the preset function tests include at least one of anti-removal test and power consumption sampling test.

[0120] Here, the functional test module integrates the hardware circuitry required to perform specific physical or electrical characteristic tests.

[0121] The main control chip U11 is configured to perform preset function tests on the smart card under test through the function test module when the smart card under test is directly set in the first smart card slot CARD1 of the main control module (i.e., when it is not connected through the data monitoring module).

[0122] The preset function test may specifically include at least one of the following: anti-unplug test and power consumption sampling test.

[0123] Unplug protection test: The functional test module includes a power control circuit for implementing the unplug protection test. This power control circuit is controlled by the main control chip.

[0124] For contact smart cards, refer to Figure 9The main control chip U11 can control the power switching circuit (including the 2.0V linear regulator U15 and the PNP transistor Q1) to turn on and off via control signals, thereby precisely controlling the power supply applied to the smart card under test in the first smart card slot. By suddenly cutting off the power at a specific moment during a simulated transaction or data read / write process, the user's accidental card removal behavior can be simulated to test the data integrity of the smart card and its application, as well as the system's fault tolerance.

[0125] For contactless smart cards, refer to Figure 8 The main control chip U11 can control the on / off state of a P-type MOSFET Q5 via control signals, thereby controlling whether or not the baseband chip antenna in the contactless circuit emits electromagnetic waves. By suddenly stopping the emission of electromagnetic waves, the scenario of the contactless smart card being removed from the sensing field can be simulated, realizing contactless anti-tampering testing.

[0126] Power consumption sampling test (mainly for contact smart cards): The functional test module includes a signal amplification circuit for power consumption testing of contact smart cards. The signal amplification circuit is connected to the analog-to-digital converter (AD) interface of the main control chip U11.

[0127] Reference Figure 9 A sampling resistor R3 (10 ohms, 1% accuracy) is connected in series in the grounding path of the first smart card slot CARD1. When the smart card under test is working, the current it consumes will generate a small voltage drop across the sampling resistor.

[0128] Reference Figure 10 The signal amplification circuit (composed of resistors R36 and R37 and operational amplifier U18) is connected across the sampling resistor to amplify the weak voltage drop signal PD_Point by a specific factor (e.g., about 19 times).

[0129] The amplified voltage signal AD_IN is output to the AD conversion module integrated in the main control chip U11. The main control chip U11 samples this voltage signal through the AD conversion module and calculates the instantaneous current of the smart card under test 4 during operation based on the sampled value, the known sampling resistor value, and the amplification factor. Then, it calculates the instantaneous power consumption by combining the sampled value with the operating voltage. Through continuous sampling, the power consumption curve of the smart card under different operations can be plotted.

[0130] By integrating the aforementioned functional testing modules and using the main control chip for precise control and data acquisition, the smart card testing equipment provided in this application embodiment can perform various key functional tests on the directly connected smart card under test, including anti-tampering tests and power consumption sampling tests, thereby comprehensively evaluating the electrical characteristics and stability of the smart card.

[0131] The computer program product provided in this application includes a computer-readable storage medium storing program code. The instructions included in the program code can be used to execute the methods described in the preceding method embodiments. For specific implementation details, please refer to the method embodiments, which will not be repeated here.

[0132] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the system and apparatus described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0133] Furthermore, in the description of the embodiments of this application, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0134] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0135] Finally, it should be noted that the above-described embodiments are merely specific implementations of this application, used to illustrate the technical solutions of this application, and not to limit them. The scope of protection of this application is not limited thereto. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the scope of the technology disclosed in this application. Such modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of protection of the claims.

Claims

1. A data monitoring module, characterized in that, include: The system comprises an analog smart card, a signal acquisition unit, a signal processing unit, and an output connection component connected in sequence; the analog smart card is connected to the read / write module under test; and the output connection component is connected to a smart card testing device for peripherals. The simulated smart card is used to establish a signal path for monitoring communication data between the smart card under test and the read / write module under test when the smart card under test is set in the data monitoring module. The signal acquisition unit is used to acquire the original clock signal, original reset signal and original communication data signal generated when the smart card under test communicates with the read / write module under test based on the signal path; The signal processing unit is used to down-frequency the original clock signal to generate a down-frequency clock signal; and to perform signal conversion on the original reset signal and the original communication data signal to generate a standard reset signal and a standard communication data signal. The output connection component is used to output the down-frequency clock signal, the standard reset signal and the standard communication data signal to the smart card testing equipment, so that the smart card testing equipment can restore the communication data between the smart card under test and the read / write module under test; The signal processing unit includes a clock processing circuit; the clock processing circuit includes a connected tri-state buffer and a frequency divider; the frequency divider is composed of multiple cascaded D-type flip-flops; the tri-state buffer is connected to the signal acquisition unit; the output terminal of the frequency divider is connected to the output connection component. The tri-state buffer is used to buffer the received original clock signal to generate a buffered original clock signal. The frequency divider is used to divide the buffered original clock signal by a preset multiple to generate the down-frequency clock signal, and output the down-frequency clock signal to the smart card testing device through the output connection component.

2. The data monitoring module according to claim 1, characterized in that, The smart card testing equipment includes a first smart card slot; the data monitoring module further includes a second smart card slot; the second smart card slot is connected to the analog smart card and the signal acquisition unit respectively. The second smart card slot is used to install the smart card under test; The data monitoring module can be plugged into the first smart card slot via the output connection component; The simulated smart card can be plugged into the third smart card slot of the read / write module under test.

3. The data monitoring module according to claim 2, characterized in that, The output connection component is provided with standard contact points that conform to the preset smart card standard; the data monitoring module is connected to the first smart card slot through the standard contact points.

4. The data monitoring module according to claim 1, characterized in that, The signal processing unit further includes a level conversion circuit; the level conversion circuit includes at least one buffer, the input terminal of the buffer is connected to the signal acquisition unit, and the output terminal of the buffer is connected to the output connection component. The buffer is used to perform level conversion on the received original reset signal to generate the standard reset signal, and / or to perform level conversion on the original communication data signal to generate the standard communication data signal; the standard reset signal and the standard communication data signal are output to the smart card testing device through the output connection component; The smart card testing equipment is used to calculate the bit duration based on the down-frequency clock signal, determine the communication start time based on the standard reset signal, and decode the standard communication data signal based on the bit duration to restore the communication data between the smart card under test and the read / write module under test.

5. The data monitoring module according to claim 4, characterized in that, The preset input high-level recognition range of the buffer is 1.5V to 5.0V.

6. A data monitoring method, characterized in that, The method is applied to the data monitoring module according to any one of claims 1-5; the method includes: By simulating a smart card, a signal path is established for monitoring the communication data between the smart card under test and the read / write module under test when the smart card under test is set in the data monitoring module. The signal acquisition unit acquires the original clock signal, original reset signal, and original communication data signal generated when the smart card under test communicates with the read / write module under test based on the signal path; The original clock signal is down-frequency processed by the signal processing unit to generate a down-frequency clock signal; the original reset signal and the original communication data signal are converted to generate a standard reset signal and a standard communication data signal. The down-frequency clock signal, the standard reset signal, and the standard communication data signal are output to the smart card testing equipment via the output connection component, so that the smart card testing equipment can restore the communication data between the smart card under test and the read / write module under test.

7. A smart card testing device, characterized in that, It includes a main control module; it also includes a data monitoring module as described in any one of claims 1-5; the main control module includes a first smart card slot; the data monitoring module includes a second smart card slot and an output connection component; The data monitoring module can be plugged into the first smart card slot via the output connection component; the second smart card slot is used to install the smart card to be tested.

8. The smart card testing device according to claim 7, characterized in that, The data monitoring module includes a simulated smart card, which is adapted to be inserted into the third smart card slot of the read / write module under test. The main control module also includes a contactless circuit; the first smart card slot is used to install a contact smart card; the contactless circuit is used for communication connection with the contactless smart card; When the output connection component is not connected to the first smart card slot and the smart card under test is a contact smart card, the main control module is connected to the smart card under test through the first smart card slot; when the output connection component is not connected to the first smart card slot and the smart card under test is a contactless smart card, the main control module is connected to the contactless smart card through the contactless circuit; when the output connection component is connected to the first smart card slot, the main control module receives the raw communication signal output from the data monitoring module through the first smart card slot to monitor the communication data between the read / write module under test and the smart card under test.

9. The smart card testing device according to claim 7, characterized in that, The main control module also includes a connected main control chip and a functional testing module; The main control chip is configured to perform a preset function test on the smart card under test through the function test module when the smart card under test is placed in the first smart card slot; the preset function test includes at least one of anti-removal test and power consumption sampling test.

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