A three-segment integrated high-power superluminescent diode and its preparation method

Abstract

A three-segment integrated high-power superluminescent diode and its fabrication method belong to the technical field of optoelectronic device structures and processing technologies. They address the technical problem of directional amplification of the optical power output by a superluminescent diode based on a three-segment integrated structure. The diode comprises a three-segment integrated structure, which is a cascade structure consisting of a DBR grating region, a J-ridge waveguide superluminescent diode region, and a semiconductor optical amplifier region connected in sequence. The three-segment integrated structure comprises a multi-layer structure from bottom to top, comprising: a lower electrode, a lower substrate, a lower confinement layer, an MQW multi-quantum well active layer, an upper confinement layer, an upper substrate, and an upper electrode. The DBR grating region comprises a transversely tapered waveguide structure with a waveguide layer and a cladding. The J-ridge waveguide superluminescent diode region consists of a curved waveguide portion and a straight waveguide portion. The semiconductor optical amplifier region is a tapered traveling wave structure. The present invention is suitable for optical coherence tomography and fiber optic gyroscopes to achieve optical power amplification.

Description

Technical Field

[0001] The present invention belongs to the technical field of optoelectronic device structure and processing thereof, and in particular relates to the technical field of superluminescent diode structure and processing thereof. Background Art

[0002] Superluminescent diodes (SLDs) achieve the synergistic optimization of high-power output and weak coherence through the physical mechanism of stimulated emission amplification of spontaneous emission, combined with structural designs that suppress optical feedback, such as tilted waveguides or anti-reflection coatings. Their wide spectrum, short coherence length, and small far-field divergence angle surpass the performance boundaries of traditional light sources. High-power research is crucial for the development of SLD technology. In optical coherence tomography (OCT), high-power output significantly improves photon detection efficiency, enhancing imaging resolution and penetration depth. It also enables real-time, non-destructive observation of subcellular structures in biological tissues through high-speed dynamic scanning, driving innovation in in vivo medical diagnostics. In fiber-optic gyroscopes, high-power light sources significantly improve the system's signal-to-noise ratio by suppressing Rayleigh scattering noise and enhancing backscattered signals, thereby optimizing the positioning accuracy and dynamic response capabilities of inertial navigation. Therefore, high-power research in SLDs is not only a major breakthrough in optoelectronic device physics but also a core driver in the transition from static to dynamic medical imaging and the advancement of navigation systems towards high precision.

[0003] Despite the urgent need for high-power superluminescent diodes (SLDs), increasing the power of a single device faces bottlenecks. Power increases for single SLDs are constrained by dual device physics constraints: The triple quantum well structure, based on dry etching, limits stimulated emission efficiency due to a spatial mismatch between carrier recombination efficiency and the optical field distribution. While non-uniform quantum well width designs can enhance localized carrier injection through band gradient optimization, thermal accumulation-induced carrier transport degradation and photon density saturation at high injection currents still create a power bottleneck. These inherent physical mechanisms limit the power expansion capabilities of single device architectures. Existing single high-power SLDs struggle to break the watt mark, requiring a cascaded solution. Combining a fiber amplifier (SOA) with a SLD is one possible cascade approach, but it suffers from high reflection losses at the coupling interface, complex systems, and bulky design, hindering practical application. Summary of the Invention

[0004] In view of this, the present invention aims to propose a three-segment integrated high-power superluminescent diode and a preparation method to solve the technical problem of directional amplification of the optical power output by a superluminescent diode based on a three-segment integrated structure.

[0005] To achieve the above object, the present invention adopts the following technical solutions:

[0006] The present invention proposes a three-segment integrated high-power superluminescent diode, wherein the diode is a three-segment integrated structure, and the three-segment integrated structure is a cascade structure composed of a DBR grating region 8, a J-ridge waveguide superluminescent diode region 9 and a semiconductor optical amplifier region 10 connected in sequence;

[0007] The three-stage integrated structure is provided with a multi-layer structure from bottom to top, and the multi-layer structure is sequentially: lower electrode 1, lower substrate 2, lower confinement layer 3, MQW multi-quantum well active layer 4, upper confinement layer 5, upper substrate 6 and upper electrode 7.

[0008] Furthermore, the DBR grating region 8 is a transverse tapered waveguide structure including a waveguide layer and a cladding layer, the waveguide layer is etched with a tenth-order surface grating of a Bragg reflection structure, and the left side of the transverse tapered structure is the incident surface of light.

[0009] Furthermore, the length of the DBR grating region 8 along the light propagation direction is 500 μm.

[0010] Furthermore, the J-ridge waveguide superluminescent diode region 9 consists of a curved waveguide portion and a straight waveguide portion, wherein the bending angle of the curved waveguide portion is 8°.

[0011] Furthermore, the length of the J-ridge waveguide superluminescent diode region 9 in the incident direction of the incident light is 1 mm, the thickness of the insulating layer is 300 nm, and the etching depth is 1.7 μm.

[0012] Furthermore, the semiconductor optical amplifier region 10 is a tapered traveling wave structure, and its length along the incident direction of the incident light is 2.5 mm.

[0013] Furthermore, a glue strip is provided between the J-ridge waveguide superluminescent diode region 9 and the semiconductor optical amplifier region 10 , and the thickness of the glue strip is 20 μm.

[0014] Furthermore, in the multi-layer structure:

[0015] The material of the lower electrode 1 is Au-Ge-Ni;

[0016] The material of the lower substrate 2 is InP, with a thickness of 0.4 μm;

[0017] The material of the lower confinement layer 3 is InGaAsP, and the thickness ranges from 115nm to 120nm;

[0018] The material of the MQW multi-quantum well active layer 4 is InGaAlAs, and the thickness ranges from 10 to 20 nm;

[0019] The upper confinement layer 5 is made of InGaAsP with a thickness ranging from 10 to 20 nm;

[0020] The upper substrate 6 is made of InP with a thickness of 0.3 μm;

[0021] The material of the upper electrode 7 is Ti-Pt-Au.

[0022] The present invention also provides a method for preparing a three-segment integrated high-power superluminescent diode, wherein the method is to prepare the three-segment integrated structure, and the method comprises:

[0023] The step of preparing the DBR grating region 8 by electron beam lithography;

[0024] The step of preparing a J-ridge waveguide superluminescent diode region 9 by preparing a layer-by-layer epitaxial wafer;

[0025] The step of preparing the semiconductor optical amplifier region 10 by using epitaxial growth and device fabrication process methods.

[0026] Furthermore, the steps of preparing the J-ridge waveguide superluminescent diode region 9 are as follows:

[0027] Preparation of layer-by-layer epitaxial wafers: Using a metal organic chemical vapor deposition-based epitaxial growth process, the epitaxial wafers are grown layer by layer. The epitaxial wafers include a layer-by-layer structure from bottom to top: a substrate, a buffer layer, a lower confinement layer, a multi-quantum well active layer, an upper confinement layer, and a cap layer. The multi-quantum well active layer includes an etching stop layer made of InGaAsP.

[0028] Preparation of J-ridge waveguide superluminescent diode region 9: Use a photolithography machine overlay process to achieve pattern alignment of the waveguide, electrode window and cleavage channel; use a wet etching process to anisotropically etch InP with a 3:1 H3PO4:HCl solution to obtain a waveguide sidewall steepness angle of 85°; use plasma-enhanced chemical vapor deposition to grow a 300nm insulating layer of SiO2; use secondary photolithography to open a window to expose the top of the waveguide, form a 20μm wide photoresist mask by photolithography, evaporate a Ti-Pt-Au top electrode and peel off the strip; after the epitaxial wafer is thinned and polished, evaporate the Au-Ge-Ni bottom electrode, and anneal in nitrogen at 420℃ for 2-3 minutes to optimize the ohmic contact.

[0029] Compared with the prior art, the present invention has the following beneficial effects:

[0030] (1) In the diode described in the present invention, the three-segment integrated structure is a three-level heterogeneous integrated structure, which can achieve step-by-step directional amplification of optical power; wherein, the DBR grating region is used to achieve dynamic control of broadband optical feedback, suppressing lasing while enhancing the gain of the previous stage; the DBR grating region can improve the beam quality and enhance the power of the device. The J-ridge waveguide superluminescent diode region is used to effectively avoid the generation of optical resonance by bending the waveguide, and provide a gain medium for spontaneous emission light amplification through a straight waveguide. By optimizing the carrier injection distribution and asymmetric light field confinement, the mid-segment stimulated radiation efficiency is significantly improved. The semiconductor optical amplifier region is used to amplify the efficiency of light. By utilizing the lateral extension waveguide and the longitudinal gain gradual increase design, the traditional light saturation bottleneck is broken through, and finally the step-by-step directional amplification of optical power is achieved, laying a physical foundation for high-power output.

[0031] (2) The present invention is based on the integration scheme of the semiconductor optical amplifier region: the J-ridge waveguide superluminescent diode region and the semiconductor optical amplifier region are monolithically integrated, and the coupling efficiency and the working efficiency of the semiconductor optical amplifier region are improved by utilizing the characteristics of the consistent polarization characteristics of the two, thereby ultimately achieving the output power improvement of the three-segment integrated high-power superluminescent diode described in the present invention. This design can overcome the loss problem of the traditional cascade, and can make the coupling loss and thermal management imbalance caused by the waveguide mode mismatch seriously restrict its power to the watt level. It can also promote the miniaturization of the device, and open up a new path for the practical application of the three-segment integrated high-power superluminescent diode described in the present invention. This requires further three-segment cascade ideas to design higher-power superluminescent diodes.

[0032] (3) In the diode described in the present invention, the three-segment integrated structure has a cascaded cooperative amplification and spectrum-power joint control mechanism, which solves the technical problem that high power and wide spectrum are difficult to be compatible. The front section of the three-segment integrated structure is the DBR grating area, the middle section is the J-ridge waveguide superluminescent diode area, and the back section is the semiconductor optical amplifier area. The three sections are cascaded and coordinated, and the photon density limit of the single-stage device is broken through by linear superposition of power step by step. At the same time, combined with the spectrum-power joint control technology: the front section realizes the competition of the wide spectrum feedback suppression mode of the DBR grating area, the middle section realizes the high gain maintenance of the wide spectrum characteristics based on the three-segment integrated high-power superluminescent diode described in the present invention, and the back section realizes the tapered semiconductor optical amplifier area to expand the spectrum bandwidth and suppress the nonlinear effect, and finally realizes the synchronous optimization of milliwatt to watt-level high power output and ultra-50nm wide spectrum, so that the technical contradiction of high power and wide spectrum being difficult to be compatible is solved, and the stable output of watt-level high power is achieved under the premise of ensuring weak coherence, breaking through the performance balance limitation of power-coherence of traditional light sources.

[0033] (4) In the diode described in the present invention, the three-segment integrated structure is a collaborative design of anti-feedback lasing suppression and dynamic thermal management. The composite anti-feedback lasing suppression scheme of this design is as follows: the tapered DBR grating area reduces the Q value of the resonant cavity through a non-periodic structure, and the J-ridge waveguide superluminescent diode area uses an asymmetric light field to destroy the resonance condition, avoiding the risk of lasing from a physical mechanism and ensuring weak coherence; at the same time, the dynamic thermal management technology of this design enhances the heat dissipation capability through the lateral expansion structure of the tapered semiconductor optical amplifier area, combined with the optimization of the J-type waveguide carrier distribution, reducing the impact of thermal effects on spectral broadening and power stability, and ensuring the reliability of high-power output. Overall, this design breaks through the traditional performance trade-off between high power and weak coherence, providing a high-performance light source solution for precision optical systems.

[0034] (5) The present invention describes a method for preparing a three-segment integrated high-power superluminescent diode. At the single-tube device level, the three-quantum well superluminescent diode (SLD) based on the dry etching process is limited by the carrier recombination efficiency and the non-uniformity of the light field distribution. Under a driving current of 325mA, it can only achieve a milliwatt-level power output of 25.6mW. Although the non-uniform well width quantum well structure improves the carrier injection efficiency through the gradient band design, the power growth stagnates due to the heat accumulation effect under a high current drive of 500mA, and the maximum output reaches only 118.1mW. In the hybrid integration scheme, the discrete cascade of the J-ridge waveguide superluminescent diode region and the erbium-doped fiber amplifier region has the inherent defects of multiple interface reflection losses and the excessive volume of the spatial optical system, which makes it difficult for its actual output power to exceed 2mW and limits the practicality of the system. Although the monolithic integration technology has increased the output power to 210mW through the combined design of tilted ridge waveguide and tapered semiconductor optical amplifier area, and the driving current of the semiconductor optical amplifier area is 3A, the coupling loss and thermal management imbalance caused by waveguide mode mismatch seriously restrict its power from reaching the watt level.

[0035] The three-segment integrated high-power superluminescent diode described in the present invention can be applied to the fields of optical coherence tomography and fiber optic gyroscopes to achieve optical power amplification. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The accompanying drawings, which constitute part of the present invention, are provided to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are provided to explain the present invention and do not constitute an undue limitation of the present invention. In the accompanying drawings:

[0037] Figure 1 This is a structural diagram of a high-power superluminescent diode based on three-segment integration as described in the first embodiment; the reference numerals in the figure are: lower electrode 1, upper electrode 7, DBR grating region 8, J-ridge waveguide superluminescent diode region 9, and semiconductor optical amplifier region 10.

[0038] Figure 2 Schematic diagram of the structure of a high-power superluminescent diode based on three-segment integration as described in the first specific embodiment; the reference numerals in the figure are: lower electrode 1, lower substrate 2, lower confinement layer 3, MQW multi-quantum well active layer 4, upper confinement layer 5, upper substrate 6, upper electrode 7, DBR grating region 8, J-ridge waveguide superluminescent diode region 9 and semiconductor optical amplifier region 10.

[0039] Figure 3 This is a top view of the three-segment integrated high-power superluminescent diode structure described in the fourth specific embodiment; the figure labels in the figure are: DBR grating area 8, J-ridge waveguide superluminescent diode area 9, and semiconductor optical amplifier area 10. DETAILED DESCRIPTION

[0040] The following will be combined with the accompanying drawings in the embodiments of the present invention to clearly and completely explain the technical solutions in the embodiments of the present invention. It should be noted that the embodiments of the present invention and the features therein can be combined with each other in the absence of conflict, and the embodiments described are only part of the embodiments of the present invention, not all of the embodiments.

[0041] Specific implementation method 1, see Figure 1 and Figure 2 This embodiment describes a three-segment integrated high-power superluminescent diode as described in this embodiment. The three-segment integrated structure is a cascade structure consisting of a DBR grating region, a J-ridge waveguide superluminescent diode region, and a semiconductor optical amplifier region connected in sequence.

[0042] The three-stage integrated structure is provided with a multi-layer structure from bottom to top, and the multi-layer structure is sequentially: a lower electrode, a lower substrate, a lower confinement layer, an MQW multi-quantum well active layer, an upper confinement layer, an upper substrate and an upper electrode.

[0043] In this embodiment, the DBR grating region, J-ridge waveguide superluminescent diode region, and semiconductor optical amplifier region, based on the cascaded structure, achieve step-by-step directional amplification of optical power. The DBR grating region is used to achieve dynamic control of broadband optical feedback, suppressing lasing while enhancing the gain of the preceding stage. The J-ridge waveguide superluminescent diode region is used to enhance the stimulated emission efficiency of the feedback light field in the DBR grating region in the mid-section. The semiconductor optical amplifier region is used to expand the spectral bandwidth and suppress nonlinear effects. The cascaded structure of the DBR grating region, J-ridge waveguide superluminescent diode region, and semiconductor optical amplifier region also includes a gap between the three regions, which is not tightly connected and provides thermal isolation and heat dissipation.

[0044] The three-stage heterogeneous integrated architecture—a cascade consisting of a tapered DBR grating region, a J-ridge waveguide superluminescent diode region, and a tapered SOA—achieves directional optical power amplification. Combined with spectrum-power joint control technology, the front-stage tapered DBR grating region suppresses mode competition, the middle-stage J-ridge waveguide superluminescent diode region maintains a wide spectrum, and the back-end semiconductor optical amplifier region expands bandwidth, simultaneously solving the compatibility issues of high power and wide spectrum. This achieves watt-level high-power stable output while ensuring weak coherence, breaking through the performance trade-off between power and coherence of traditional light sources.

[0045] Specific embodiment 2. This embodiment is a further optimization of the three-segment integrated high-power superluminescent diode described in specific embodiment 1. In this embodiment, the DBR grating area is a transverse tapered waveguide structure including a waveguide layer and a cladding. The waveguide layer is etched with a tenth-order surface grating with a Bragg reflection structure, and the left side of the transverse cone is the incident surface of light.

[0046] This embodiment further defines the DBR grating region described in Specific Embodiment 1. In this embodiment, the tapered DBR grating region utilizes a non-periodic gradient refractive index design to achieve dynamic control of broadband optical feedback, suppressing lasing while enhancing the gain of the preceding stage. The grating is designed with a tapered geometry, with a rear end width of 10μm and a front end narrowing to 2.2μm. This optimizes the grating shape to improve reflectivity and suppress stray modes. The material used is an AlGaAs waveguide layer, combined with a deep etching process to achieve high refractive index contrast.

[0047] Specific embodiment three, this embodiment is a further optimization of the three-segment integrated high-power superluminescent diode described in specific embodiment one. In this embodiment, the length of the DBR grating area along the propagation direction of light is further limited, and the length of the DBR grating area along the propagation direction of light is 500μm.

[0048] This embodiment further limits the length of the DBR grating region along the propagation direction of light. In this embodiment, the DBR grating region is based on a 10th-order surface Bragg reflection structure with a total length of 500 μm. The grating period achieved is 1215 nm, which matches the 783 nm emission wavelength to achieve efficient Bragg reflection. The dynamic regulation of wide-spectrum optical feedback suppresses lasing while enhancing the front-stage gain. Its non-periodic structure effectively reduces the Q value of the resonant cavity, avoids the risk of lasing, ensures weak coherence, and provides optimized beam quality and stable optical power foundation for the cascaded synergistic amplification of the middle J-ridge waveguide superluminescent diode region and the rear semiconductor optical amplifier region.

[0049] Specific implementation method four, as Figure 3As shown, this embodiment is a further optimization of the three-segment integrated high-power superluminescent diode described in Specific Embodiment 1. In this embodiment, the J-ridge waveguide superluminescent diode region is further defined, and the bending angle of the curved waveguide portion is 8°. This embodiment further defines the J-ridge waveguide superluminescent diode region. In this embodiment, the structure is a J-ridge waveguide structure with a ridge height of 1.70μm, ensuring optical field confinement and low loss. The J-ridge waveguide structure uses an asymmetric optical field to destroy the resonance condition, avoiding the risk of lasing from a physical mechanism and ensuring weak coherence. The J-ridge waveguide superluminescent diode region adopts an 8° curved waveguide design, which effectively avoids the generation of optical resonance by bending the waveguide. Its J-ridge waveguide structure with a ridge height of 1.70μm improves the stimulated emission efficiency by optimizing the carrier injection distribution and asymmetric optical field confinement. At the same time, it uses the asymmetric optical field to destroy the resonance condition and provide a gain medium for spontaneous emission light amplification.

[0050] Specific embodiment five, this embodiment is a further optimization of the three-segment integrated high-power superluminescent diode described in specific embodiment one. In this embodiment, the length of the incident direction of the incident light in the J-ridge waveguide superluminescent diode region is further limited. The length of the incident direction of the incident light in the J-ridge waveguide superluminescent diode region is 1 mm, the thickness of the insulating layer is 300 nm, and the etching depth is 1.7 μm.

[0051] This embodiment further limits the length of the incident direction of the incident light in the J-ridge waveguide superluminescent diode region described in the first specific embodiment. In this embodiment, the J-ridge waveguide superluminescent diode region adopts a J-ridge waveguide structure with an etching depth of 1.7μm and a 300nm SiO2 insulating layer. The generation of optical resonance is effectively avoided by bending the waveguide, and a gain medium is provided for spontaneous emission light amplification by a straight waveguide. The stimulated emission efficiency is increased by optimizing the carrier injection distribution and asymmetric light field confinement.

[0052] Specific embodiment six, this embodiment is a further optimization of the three-segment integrated high-power superluminescent diode described in specific embodiment one. In this embodiment, the semiconductor optical amplifier area is further limited, and the semiconductor optical amplifier area is a conical traveling wave structure, and its length along the incident direction of the incident light is 2.5 mm.

[0053] This embodiment further defines the semiconductor optical amplifier region described in Specific Embodiment 1. In this embodiment, the semiconductor optical amplifier region employs a tapered traveling-wave structure with a length of 2.5 mm and a full cone angle of 6°, effectively amplifying light. This tapered traveling-wave structure effectively avoids the conventional optical saturation problem through a transversely extended waveguide and a longitudinal gain-increasing design, achieving step-by-step directional amplification of optical power and high-power output.

[0054] Specific embodiment seven, this embodiment is a further optimization of the three-segment integrated high-power superluminescent diode described in specific embodiment one. In this embodiment, the setting between the J-ridge waveguide superluminescent diode area and the semiconductor optical amplifier area is further limited. A rubber strip is provided between the J-ridge waveguide superluminescent diode area and the semiconductor optical amplifier area, and the thickness of the rubber strip is 20μm.

[0055] This embodiment further limits the arrangement between the J-ridge waveguide superluminescent diode region and the semiconductor optical amplifier region described in the first embodiment. In this embodiment, a 20 μm wide rubber strip is provided between the J-ridge waveguide superluminescent diode region and the semiconductor optical amplifier region, which can separate the electrodes of the two regions and achieve electrode isolation, thereby overcoming the interference problem caused by electrode sharing in traditional cascades and effectively preventing current crosstalk.

[0056] Specific embodiment eight, this embodiment is a further optimization of the three-segment integrated high-power superluminescent diode described in specific embodiment one. In this embodiment, the multilayer structure is further limited, and in the multilayer structure:

[0057] The material of the bottom electrode is Au-Ge-Ni;

[0058] The material of the lower substrate is InP with a thickness of 0.4 μm;

[0059] The material of the lower confinement layer is InGaAsP, and the thickness ranges from 115nm to 120nm;

[0060] The material of the MQW multi-quantum well active layer is InGaAlAs, and the thickness ranges from 10 to 20 nm;

[0061] The upper confinement layer material is InGaAsP, with a thickness ranging from 10 to 20 nm;

[0062] The upper substrate material is InP with a thickness of 0.3 μm;

[0063] The upper electrode material is Ti-Pt-Au.

[0064] This embodiment further defines the multi-layer structure described in the first embodiment. In this embodiment,

[0065] The lower electrode is made of Au-Ge-Ni; the lower substrate is 0.4μm thick and made of InP; the lower confinement layer is ~120nm thick and made of InGaAsP; the MQW active layer is 10-20nm thick and made of InGaAlAs; the upper confinement layer is 10-20nm thick and made of InGaAsP; the upper substrate is 0.3μm thick and made of InP; and the upper electrode is made of Ti-Pt-Au. This structure optimizes the layered materials and thicknesses in the vertical direction of the device. In addition to the Au-Ge-Ni metal system for the lower electrode and the Ti-Pt-Au metal system for the upper electrode, a 0.4μm thick InP lower substrate and a 0.3μm thick InP upper substrate are introduced, effectively improving the device's conductivity and structural stability. The upper and lower confinement layers are each made of InGaAsP, with a thickness within 1020nm. This improves the stimulated emission efficiency while maintaining broad spectral characteristics, achieving high power output from the diode described in this invention through material and structural design.

[0066] Specific embodiment 9: This embodiment describes a method for preparing a three-segment integrated high-power superluminescent diode, wherein the method is to manufacture the three-segment integrated structure, and the method includes:

[0067] The step of preparing the DBR grating region by electron beam lithography;

[0068] The step of preparing a J-ridge waveguide superluminescent diode region by preparing a layer-by-layer grown epitaxial wafer;

[0069] The invention relates to the steps of preparing the semiconductor optical amplifier region by using the process method of epitaxial growth and device fabrication.

[0070] In this embodiment,

[0071] The preparation of the DBR grating area includes grating design and material selection, high-precision lithography and etching processes, as well as integration and post-processing optimization, as follows:

[0072] Grating design and material selection:

[0073] The grating utilizes a 10th-order surface Bragg reflector structure with a total length of 500 μm and a grating period of 1215 nm, matching the 783 nm emission wavelength to achieve efficient Bragg reflection. The DBR grating region is designed with a tapered geometry, with a width of 10 μm at the rear end and narrowing to 2.2 μm at the front end. This optimized grating shape improves reflectivity and suppresses spurious modes. The AlGaAs waveguide layer is constructed using a deep etch process to achieve high refractive index contrast.

[0074] High-precision lithography and etching process:

[0075] The grating pattern is defined using electron-beam lithography (EBL), ensuring nanometer-level precision for a groove width of approximately 150 nm and period control. Dry etching is then used to etch to a depth of 1470 nm, penetrating the waveguide layer into the cladding and forming steep trench sidewalls. Real-time monitoring during the etching process ensures grating structural uniformity and prevents spectral shifts caused by process fluctuations.

[0076] Integration and post-processing optimization:

[0077] After grating fabrication, deep ion implantation is performed at the junction of the J-ridge waveguide superluminescent diode region and the DBR grating region to suppress stray transverse modes and ensure single transverse-mode transmission. After the wafer is cleaved into 4 mm long chips, the front mirror is coated with an ultra-low reflection coating to reduce lasing feedback, while the back mirror is coated with an anti-reflection coating to enhance the grating's wavelength selectivity. Finally, the grating segment maintains a current-free design to minimize absorption losses and improve thermal stability.

[0078] The preparation of the J-ridge waveguide superluminescent diode region includes preparation technology and waveguide structure design and preparation.

[0079] The preparation of the tapered semiconductor optical amplifier region includes material and structural design and fabrication process, which are as follows:

[0080] Materials and structural design:

[0081] Material and structural design are crucial in SOA fabrication. The active region is constructed from bulk InGaAs material with a 0.3% tensile strain, a thickness of 50nm, and a central wavelength of 1.57μm. The upper and lower confinement layers are constructed from unstrained InGaAsP material with a central wavelength of 1.2μm. Together with the active region, they form a double-heterojunction buried strip structure with a 6° tilt angle to effectively minimize end-face reflections.

[0082] Production process:

[0083] The fabrication process involves epitaxial growth and device fabrication. Using MOCVD technology, epitaxial growth sequentially grows a 500nm thick n-InP buffer layer, a 100nm thick undoped InGaAsP lower confinement layer, a 50nm thick tensile strained InGaAs active layer, a 100nm thick undoped InGaAsP upper confinement layer, and a 120nm thick p-InP cap layer on an n-InP substrate. The device fabrication process is as follows: A 200nm thick SiO2 electrical isolation layer is first deposited by PECVD, followed by photolithography and etching to form a specific narrow stripe pattern. Secondary and tertiary epitaxial growth of the relevant barrier and cap layers is then performed. After depositing a 350nm thick SiO2 electrical isolation layer, a Ti-Pt-Au top electrode and an Au-Ge-Ni bottom electrode are formed, followed by alloying at 420°C in a nitrogen atmosphere. The chip is then cleaved and an anti-reflection coating is evaporated on the cleaved surfaces. Finally, the die is soldered p-side down onto a heat sink for packaging.

[0084] The method for making a three-segment integrated structure described in this embodiment is to use electron beam lithography and dry etching technology to prepare the DBR grating area with high precision, adopt a 10-order surface Bragg reflection structure and a tapered lateral design, achieve high reflectivity and stray mode suppression, and improve the optical feedback control accuracy and beam quality; combine AlGaAs waveguide materials with deep etching technology to ensure high refractive index contrast and nanoscale structural uniformity, effectively avoiding spectral shift; the J-ridge waveguide superluminescent diode area realizes carrier distribution control and asymmetric light field confinement through epitaxial growth and waveguide structure optimization, which significantly improves the optical feedback control accuracy and beam quality. Improve the stimulated radiation efficiency of the mid-segment; the SOA region adopts a double heterojunction buried strip structure composed of 0.3% tensile strained InGaAs active material and InGaAsP confinement layer, sets a 6° tilt angle to reduce end face reflection, and uses MOCVD epitaxial technology and multi-layer PECVD electrical isolation and alloy treatment technology to achieve coordinated integration of tapered structure and high-power injection, effectively breaking through the saturation bottleneck and thermal mismatch problems of traditional optical amplifiers; overall, the three-segment integrated structure manufactured in this embodiment provides a feasible preparation process basis for the integration of high-power, wide-spectrum three-segment integrated diodes.

[0085] Specific embodiment 10. This embodiment further defines the steps of preparing a J-ridge waveguide superluminescent diode region in the method for preparing a three-segment integrated high-power superluminescent diode described in specific embodiment 9. The steps of preparing a J-ridge waveguide superluminescent diode region are as follows:

[0086] Preparation of layer-by-layer epitaxial wafers: Using a metal organic chemical vapor deposition-based epitaxial growth process, the epitaxial wafers are grown layer by layer. The epitaxial wafers include a layer-by-layer structure from bottom to top: a substrate, a buffer layer, a lower confinement layer, a multi-quantum well active layer, an upper confinement layer, and a cap layer. The multi-quantum well active layer includes an etching stop layer made of InGaAsP.

[0087] Preparation of J-ridge waveguide superluminescent diode region: Use photolithography overlay process to achieve pattern alignment of waveguide, electrode window and cleavage channel; Use wet etching process to anisotropically etch InP with 3:1 H3PO4:HCl solution to obtain a waveguide sidewall steepness angle of 85°; Use plasma-enhanced chemical vapor deposition to grow a 300nm insulating layer of SiO2; Expose the top of the waveguide through secondary photolithography window opening, form a 20μm wide photoresist mask by photolithography, evaporate Ti-Pt-Au upper electrode and peel off the glue strip; After the epitaxial wafer is thinned and polished, evaporate Au-Ge-Ni lower electrode, and anneal in nitrogen at 420℃ for 2-3 minutes to optimize ohmic contact.

[0088] This embodiment further defines the steps for fabricating a J-ridge waveguide superluminescent diode region as described in Specific Embodiment 9. In this embodiment, the epitaxial growth process uses metal-organic chemical vapor deposition (MOCVD) technology to grow the epitaxial wafer layer by layer. The structure includes a substrate, a buffer layer, a lower confinement layer, a multi-quantum well active layer containing an InGaAsP etch-stop layer, an upper confinement layer, and a cap layer. The etch-stop layer is located in the upper confinement layer and is used to precisely control the depth of the ridge waveguide.

[0089] The waveguide structure was designed and fabricated into a J-ridge waveguide with an 8° bend angle and a 1.70μm ridge height, ensuring optical field confinement and low loss. Using a photolithography machine, a three-step overlay process (one for waveguide lithography, two for electrode window lithography, and three for channel lithography) ensured pattern alignment accuracy. Dry etching with inductively coupled plasma (ICP) removed heavily doped layers, including InGaAs / InGaAsP, to form the initial ridge waveguide. Wet etching with an H₃PO₄:HCl (3:1) solution anisotropically etched the InP to optimize the waveguide sidewall steepness (85°) and smoothness. Plasma-enhanced chemical vapor deposition (PECVD) was used to grow a 300nm SiO₂ insulating layer, balancing heat dissipation and insulation performance. The second photolithography window is used to expose the top of the waveguide, and the third photolithography is used to form a 20μm wide photoresist mask. After the Ti-Pt-Au upper electrode is evaporated, the glue strip is peeled off to achieve electrode isolation; after the epitaxial wafer is thinned and polished, the Au-Ge-Ni lower electrode is evaporated, and nitrogen annealing at 420℃ for 2-3 minutes is performed to optimize the ohmic contact.

[0090] In this implementation, MOCVD technology is used for layer-by-layer epitaxial growth, precisely controlling the multi-quantum well structure containing an InGaAsP etch-stop layer to achieve precise control of the ridge waveguide depth. A J-ridge waveguide structure with an 8° bend angle and a 1.70μm ridge height is designed to ensure optical field confinement and low-loss transmission. A three-step photolithography overlay process, combined with ICP dry etching and wet etching, optimizes the steepness and smoothness of the ridge waveguide sidewalls, reducing propagation losses. PECVD deposits a 300nm SiO2 insulating layer for excellent heat dissipation and electrical insulation. Electrode isolation design and Au-Ge-Ni and Ti-Pt-Au electrode fabrication prevent current crosstalk and optimize ohmic contact. Overall, deep ion implantation achieves transverse mode suppression at the junction of the J-ridge waveguide superluminescent diode region and the DBR grating region. Combined with ultra-low reflection coatings and anti-reflection coatings on the front and rear mirrors, optical power output and wide spectral characteristics are enhanced while ensuring weakly coherent output.

Claims

1. A method for preparing a three-segment integrated high-power superluminescent diode, wherein the method is to prepare the three-segment integrated structure, characterized in that: The method comprises: The step of preparing the DBR grating region (8) by electron beam lithography; The step of preparing a J-ridge waveguide superluminescent diode region (9) by preparing a layer-by-layer epitaxial growth wafer; The step of preparing a semiconductor optical amplifier region (10) by using a process method of epitaxial growth and device fabrication; The steps of preparing the J-ridge waveguide superluminescent diode region (9) are as follows: Preparation of layer-by-layer epitaxial wafers: Using a metal organic chemical vapor deposition-based epitaxial growth process, the epitaxial wafers are grown layer by layer. The epitaxial wafers include a layer-by-layer structure from bottom to top: a substrate, a buffer layer, a lower confinement layer, a multi-quantum well active layer, an upper confinement layer, and a cap layer. The multi-quantum well active layer includes an etching stop layer made of InGaAsP. Preparation of J-ridge waveguide superluminescent diode region (9): using a photolithography machine overlay process to achieve pattern alignment of waveguide, electrode window and cleavage channel; using a wet etching process to anisotropically etch InP with a 3:1 H3PO4:HCl solution to obtain a waveguide sidewall steepness angle of 85°; using plasma enhanced chemical vapor deposition to grow a 300nm SiO2 insulating layer; exposing the top of the waveguide by secondary photolithography windowing, forming a 20μm wide photoresist mask by photolithography, vapor-depositing Ti-Pt-Au upper electrode and then peeling off the glue strip; after the epitaxial wafer is thinned and polished, vapor-depositing Au-Ge-Ni lower electrode, and annealing at 420℃ in nitrogen for 2-3 minutes to optimize ohmic contact.

2. A three-segment integrated high-power superluminescent diode, characterized in that: The diode is a three-segment integrated structure, which is prepared by the method described in claim 1. The three-segment integrated structure is a cascade structure composed of a DBR grating region (8), a J-ridge waveguide superluminescent diode region (9) and a semiconductor optical amplifier region (10) connected in sequence; The three-stage integrated structure is provided with a multi-layer structure from bottom to top, and the multi-layer structure is sequentially: a lower electrode (1), a lower substrate (2), a lower confinement layer (3), an MQW multi-quantum well active layer (4), an upper confinement layer (5), an upper substrate (6), and an upper electrode (7).

3. The three-segment integrated high-power superluminescent diode according to claim 2, characterized in that: The DBR grating region (8) is a transverse cone waveguide structure comprising a waveguide layer and a cladding layer, the waveguide layer is etched with a tenth-order surface grating of a Bragg reflection structure, and the left side of the transverse cone is the incident surface of light.

4. The three-segment integrated high-power superluminescent diode according to claim 3, characterized in that: The length of the DBR grating region (8) along the propagation direction of light is 500 μm.

5. The three-segment integrated high-power superluminescent diode according to claim 3, characterized in that: The J-ridge waveguide superluminescent diode region (9) consists of a curved waveguide portion and a straight waveguide portion, wherein the curved waveguide portion has a bending angle of 8°.

6. The three-segment integrated high-power superluminescent diode according to claim 5, characterized in that: The length of the J-ridge waveguide superluminescent diode region (9) in the incident direction of incident light is 1 mm, the thickness of the insulating layer is 300 nm, and the etching depth is 1.7 μm.

7. The three-segment integrated high-power superluminescent diode according to claim 2, characterized in that: The semiconductor optical amplifier region (10) is a tapered traveling wave structure, and its length along the incident direction of the incident light is 2.5 mm.

8. The three-segment integrated high-power superluminescent diode according to claim 2, characterized in that: A glue strip is provided between the J-ridge waveguide superluminescent diode region (9) and the semiconductor optical amplifier region (10), and the thickness of the glue strip is 20 μm.

9. The three-segment integrated high-power superluminescent diode according to claim 2, characterized in that: In the multi-layer structure: The material of the lower electrode (1) is Au-Ge-Ni; The material of the lower substrate (2) is InP, with a thickness of 0.4 μm; The material of the lower confinement layer (3) is InGaAsP, and the thickness ranges from 115nm to 120nm; The material of the MQW multi-quantum well active layer (4) is InGaAlAs, and the thickness ranges from 10 to 20 nm; The upper confinement layer (5) is made of InGaAsP and has a thickness ranging from 10 to 20 nm; The upper substrate (6) is made of InP and has a thickness of 0.3 μm; The material of the upper electrode (7) is Ti-Pt-Au.

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