A method for starting a crystal-less high-speed transceiver system

Abstract

The present invention discloses a method for starting a crystal-less high-speed transceiver system. A remote transmitter sends a clock signal to a local system, allowing the local system's receiver to obtain a stable reference clock to establish a local clock, replacing the local reference clock provided by a crystal oscillator system. After the local frequency is established close to the target frequency, a phase capture process begins. This process uses CDR technology to adjust the phase and frequency, ultimately obtaining a stable local clock. After the local clock is locked, the data processing and control unit's enable transmitter sends a signal. The remote receiver detects and identifies the signal sent by the local system's transmitter, notifying the remote receiver that the local clock has been established. The remote receiver then switches the transmitted clock signal to a data signal of the same rate. The local clock is recovered from the data sent by the remote receiver, and the data sent by the remote receiver continues uninterrupted and unstopped, providing the local clock for continuous use. This invention simplifies hardware and reduces system size and cost.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a method for starting a crystal-less high-speed transceiver system. Background Art

[0002] High-speed data transmission systems can be categorized into unidirectional and bidirectional transmission based on the direction of data transmission. Common unidirectional transmission protocols include DisplayPort and HDMI, while common bidirectional transmission protocols include USB, DDR, APHY, GMSL, and HSMT. Bidirectional transmission protocols can be further categorized into clocked and non-clocked transmission based on whether or not a clock is transmitted. For example, the DDR protocol transmits both high-speed data and a high-speed clock, while USB, APHY, GMSL, and HSMT only transmit data, with the clock recovered using CDR (Clock and Data Recovery) technology.

[0003] In bidirectional, clockless data transmission systems, both the transmitter and receiver typically transmit data at a fixed rate, as specified in the protocol. The receiver, using CDR technology, must first establish a stable high-speed clock. This is because CDR can only track small frequency deviations; larger deviations can lead to loss of lock. In practice, a stable clock close to the target frequency is typically established, and then the CDR loop adjusts the frequency and phase.

[0004] In the prior art, the stable clock pre-generated by the receiver is obtained by multiplying the frequency of the crystal oscillator by a phase-locked loop, such as Figure 1 As shown, this system requires a local external crystal oscillator or clock source for stable and reliable operation, which is currently the mainstream clock architecture. However, in some applications, such as those limited by hardware size or cost-sensitive systems, or when multiple transceivers are used in a large data transmission system, eliminating the need for a crystal oscillator outside the chip is highly valuable. Summary of the Invention

[0005] The object of the present invention is to provide a method for starting a crystal-less high-speed transceiver system to solve the problems in the background technology.

[0006] To solve the above technical problems, the present invention provides a method for starting a crystal-less high-speed transceiver system, which is based on a signal detector, a receiver, a transmitter, and a data processing and control unit;

[0007] The method includes:

[0008] The remote transmitter sends a clock signal to the local system, allowing the local system's receiver to obtain a stable reference clock to establish a local clock, replacing the local reference clock provided by the crystal oscillator system;

[0009] After the local frequency is close to the target frequency, it enters the phase capture process, which uses CDR technology to adjust the phase and frequency to ultimately obtain a stable local clock.

[0010] After the local clock is locked, the data processing and control unit's enable transmitter sends a signal, and the remote receiver detects and identifies the signal sent by the local system's transmitter, notifying the remote receiver that the local clock has been established;

[0011] The other party switches the clock signal it sends to a data signal of the same rate;

[0012] The local clock has been recovered from the data sent by the peer. The data sent by the peer is uninterrupted and the clock is always provided for local use.

[0013] In one embodiment, the signal sent by the enable transmitter of the data processing and control unit is a low-speed signal or a high-speed signal.

[0014] In one embodiment, the signal detector is used to detect whether the clock signal sent by the remote transmitter is valid, and only when the clock signal is valid does the subsequent process begin.

[0015] In one embodiment, the receiver is a core module for generating a local clock, and recovers the clock from the clock signal sent by the opposite transmitter based on CDR technology. The recovered clock is not only used to receive high-speed data, but also sent to the transmitter to send high-speed data.

[0016] In one embodiment, the transmitter is responsible for sending high-speed data to the counterpart during normal data transmission, and sends a signal during the initialization process. The signal is a clock signal or a data signal, which is used to inform the counterpart of the current status and subsequent behavior.

[0017] The present invention provides a method for starting a crystal-less high-speed transceiver system, which improves on the original system architecture and supports the use of no crystal oscillator in the system. This method can be implemented by simply changing the initialization process after the system is powered on, without adding additional hardware costs. This method can save user costs and reduce the system hardware volume. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a schematic diagram of the structure of a transceiver system in the prior art.

[0019] Figure 2 The figure is a schematic diagram of the structure of the crystal-less high-speed transceiver system provided by the present invention.

[0020] Figure 3 It is a schematic diagram of the system startup flow provided by the present invention. DETAILED DESCRIPTION

[0021] The following describes in further detail a crystal-less high-speed transceiver system startup method proposed by the present invention, with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are highly simplified and not to exact scale, and are intended solely to facilitate and clarify the purpose of illustrating the embodiments of the present invention.

[0022] The present invention provides a method for starting a high-speed transceiver system without a crystal oscillator, the structure of which is as follows: Figure 2 As shown, it includes the following modules: signal detector, receiver, transmitter, data processing and control unit.

[0023] The signal detector is used to detect whether the high-speed data entering the receiver is valid. Only when the high-speed data is valid can it enter the subsequent process. The receiver is the core module for generating the clock. Based on CDR technology, it is responsible for recovering the clock from the data. The recovered clock is not only used to receive high-speed data, but also sent to the transmitter to knock out high-speed data.

[0024] The transmitter is responsible for sending high-speed data to the other party during normal data transmission. In the present invention, it is also used to send signals during the initialization process. The sent signal can be a clock signal or a data signal to inform the other party of the current status and subsequent behavior.

[0025] The data processing and control unit is responsible for processing the system's received and sent data and controlling the initialization after power-on. The specific process is as follows: Figure 3 As shown:

[0026] The following describes the process:

[0027] 1. After the system is powered on, the peer transmitter must send a clock signal to the local receiver. This clock signal is crucial, allowing the local receiver to obtain a stable reference clock to establish its own clock. Once the local clock is established and stabilized, a specific signal is sent through the local transmitter to notify the peer transmitter to switch its clock signal to a data signal at the same rate. Because the CDR is already phase-locked, this switch does not change the receiver's operating state; the data only changes from a regular clock to a random one, without causing any changes in the recovered clock.

[0028] 2. The local device needs to detect the clock signal sent by the other party to determine whether to proceed to the next step.

[0029] 3. When the signal detector detects the clock signal sent by the other party, it starts to establish a local clock. Because it has a stable reference frequency, this local clock can be regarded as a replacement for the local reference clock provided by the crystal oscillator system.

[0030] 4. Once the local frequency is close to the target frequency, it enters the phase capture process, which uses CDR technology to adjust the phase and frequency to ultimately obtain a stable local clock.

[0031] 5. After the local clock is locked, the enable transmitter of the data processing and control unit sends a specific signal. The receiver of the other party needs to detect and identify the specific signal sent by the local transmitter. This signal can be a low-speed signal or a high-speed signal. It is used to notify the other party that the local clock has been established. The purpose is to switch the clock signal sent by the other party to a data signal of the same rate, so that normal communication can begin.

[0032] 6. When the other party detects a specific signal, it switches the clock signal to a data signal at the same rate. The switching process needs to be smooth and without glitches.

[0033] 7. At this point, the local clock can be recovered from the data sent by the other party. As long as the data sent by the other party is uninterrupted and does not stop, the clock can be provided to the local for use. It is no different from the clock generated by the traditional crystal oscillator system through the phase-locked loop.

[0034] The present invention removes the crystal oscillator and the crystal oscillator driving circuit from the system hardware, which can simplify the system volume and save costs; the system clock is entirely derived from the clock recovered by the receiver based on the CDR technology; the system is Figure 3 The initialization process shown in Figure 1 finally obtains a stable clock.

[0035] The above description is only a description of the preferred embodiments of the present invention and does not limit the scope of the present invention. Any changes and modifications made by ordinary technicians in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A method for starting a crystal-less high-speed transceiver system, characterized in that: The crystal-less high-speed transceiver system includes a signal detector, a receiver, a transmitter, and a data processing and control unit; The method includes: The remote transmitter sends a clock signal to the local system, allowing the local system's receiver to obtain a stable reference clock to establish a local clock, replacing the local reference clock provided by the crystal oscillator system; After the local frequency is close to the target frequency, it enters the phase capture process, which uses CDR technology to adjust the phase and frequency to ultimately obtain a stable local clock. After the local clock is locked, the data processing and control unit's enable transmitter sends a signal, and the remote receiver detects and identifies the signal sent by the local system's transmitter, notifying the remote receiver that the local clock has been established; The other party switches the clock signal it sends to a data signal of the same rate; The local clock has been recovered from the data sent by the peer. The data sent by the peer is uninterrupted and the clock is always provided for local use.

2. The method for starting a crystal-less high-speed transceiver system according to claim 1, wherein: The signal sent by the enable transmitter of the data processing and control unit is a low-speed signal or a high-speed signal.

3. The method for starting a crystal-less high-speed transceiver system according to claim 1, wherein: The signal detector is used to detect whether the clock signal sent by the opposite transmitter is valid, and only when the clock signal is valid will the subsequent process be entered.

4. The method for starting a crystal-less high-speed transceiver system according to claim 1, wherein: The receiver is the core module for generating a local clock. It recovers the clock from the clock signal sent by the opposite transmitter based on CDR technology. The recovered clock is not only used to receive high-speed data, but also sent to the transmitter to send high-speed data.

5. The method for starting a crystal-less high-speed transceiver system according to claim 1, wherein: The transmitter is responsible for sending high-speed data to the other party during normal data transmission, and sends a signal during the initialization process. The signal is a clock signal or a data signal, which is used to inform the other party of the current status and subsequent behavior.

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