Matrix acceleration and conversion method and system supporting variable blocks
Through unified encoding processing and dynamic variable blocking strategy, the problems of resource waste and unbalanced computing efficiency in multi-source heterogeneous data processing are solved, and efficient matrix computing and fast result output are achieved.
Patent Information
- Application Number
- CN202510620226.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-14
- Publication Date
- 2025-08-19
AI Technical Summary
When processing multi-source heterogeneous data, the prior art has problems such as inefficient data processing, waste of computing resources, limitation of memory bandwidth and uneven computing efficiency, especially when dealing with large-scale sparse or dense matrices, GPU resources cannot be fully utilized.
Through unified encoding processing, a numerical matrix of unified row and column dimensions is generated, variable block size thresholds are dynamically calculated, full blocking and compressed storage strategies are adopted, parallel calculations are performed in combination with thread beam dynamic scheduling mechanism, and computing resource utilization is optimized using the GPU multi-level cache system.
It improves the accuracy and efficiency of data processing, optimizes the utilization rate of storage and computing resources, and improves the speed of matrix computing and the speed of result output.
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Figure CN120508737A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of GPU data processing technology, and in particular relates to a matrix acceleration and conversion method supporting variable blocking. Background Art
[0002] In today's digital age, data volumes are exploding, and data comes from a wide range of sources, including structured tables, unstructured logs, and API streaming data. When processing this data, businesses and research institutions often need to perform complex matrix operations for tasks like data analysis and machine learning model training. However, traditional matrix processing methods have many limitations.
[0003] On the one hand, due to the diversity of data formats and semantics, the unified processing of multi-source, heterogeneous raw report data requires extensive manual intervention and complex data cleaning. For example, the precision of numeric fields in structured data tables may vary, it is difficult to directly extract effective numerical features from unstructured log data, and the field types of key-value data are also relatively confusing. This leads to inefficient data processing and is prone to errors.
[0004] On the other hand, during matrix operations, fixed blocking strategies cannot fully utilize hardware resources such as GPUs when faced with matrices of varying sizes and sparsity. When matrices are large and sparse, traditional uniform blocking strategies result in a significant waste of computing resources processing zero-valued elements. However, when matrices are dense, inappropriate blocking sizes can hinder the efficiency of parallel computing and prevent the full utilization of the GPU's multi-core parallel computing advantages. Furthermore, the limited GPU memory bandwidth significantly impacts the speed of matrix operations. Failure to dynamically adjust the blocking size based on memory bandwidth can easily lead to data transmission bottlenecks, reducing overall computing performance. Summary of the Invention
[0005] The present invention provides a matrix acceleration and conversion method supporting variable blocking.
[0006] A first aspect of the present invention provides a matrix acceleration and conversion method supporting variable blocking, comprising the following steps:
[0007] S1. Acquire multi-source heterogeneous original report data, where the original report data includes at least structured data tables, unstructured logs, and API streaming data;
[0008] S2. performing unified coding processing on the original report data, wherein the unified coding processing includes data type identification, field semantic analysis, and cross-format standardization conversion to generate a numerical matrix with unified row and column dimensions;
[0009] S3. Dynamically calculate the optimal size threshold of the variable block based on the sparsity, row and column sizes of the numerical matrix and the GPU memory bandwidth parameter, where the number of rows m and the number of columns n of the variable block satisfy m×n≤the maximum load of a single-core thread of the GPU and m / n approaches the overall row and column ratio of the matrix;
[0010] S4, performing non-uniform block cutting on the numerical matrix based on the optimal size threshold, adopting a full block strategy for dense areas, and implementing a compressed storage block strategy for sparse areas, to generate a heterogeneous block set;
[0011] S5. Allocate the heterogeneous block set to the multi-level cache system of the GPU, automatically select the CUDA kernel function according to the block density, perform parallel computing through the thread warp dynamic scheduling mechanism, and output the target matrix operation result.
[0012] As a preferred embodiment, the specific steps of executing the unified coding process in step S2 include:
[0013] For format structured data:
[0014] Scan the data header row by row to identify the precision identifier of the numeric field;
[0015] Parse ASCII strings by cell and convert scientific notation expressions into 32-bit floating point numbers;
[0016] Perform type-adaptive filling for missing values in structured data. Depending on the type of the null value, numeric null values are replaced with the mean of the same column, and character null values are replaced with a unified placeholder.
[0017] For key-value pair data in the format:
[0018] Extract leaf node data from nested structures and generate flattened field names through path parsing;
[0019] Perform forced alignment of field types, convert Boolean true / false to 1 / 0, and convert timestamp strings to Unix millisecond timestamp values;
[0020] Dynamically complete records with missing dimensions: insert default columns for missing fields in the data matrix, fill numeric values with 0 by default, and fill categorical values with a uniform placeholder.
[0021] For time series log unstructured data:
[0022] The sliding window is divided into preset time granularity, and the window length is dynamically adjusted according to the log generation frequency;
[0023] Perform feature extraction on text logs within the window: match numerical features using regular expressions;
[0024] Interpolate missing time points within the window: Use the forward filling method to copy the most recent valid value to the empty window.
[0025] As a preferred embodiment, the specific steps of dynamically calculating the optimal size threshold in step S3 are:
[0026] Normalize the numerical matrix elements to the interval [0,1] and divide them into 100 statistical intervals with a precision of 0.01;
[0027] Calculate the proportion of elements in each interval and substitute it into the Shannon entropy formula. When all elements are 0 or 1, the entropy value returns to 0.
[0028] When the entropy value is greater than the preset threshold, it is determined to be a high-complexity matrix and block size reduction is performed:
[0029] The theoretical optimal block size (m,n) is scaled by the proportional coefficient α = H / Hmax, where Hmax is the theoretical maximum entropy value of a uniformly distributed matrix of the same size;
[0030] Add redundant check bits to the reduced blocks: insert a 2-byte CRC check code at the block header and append a parity check bit at the end;
[0031] When the entropy value H ≤ the threshold, the golden section method based on the row-column ratio is directly used to calculate the block size so that m / n ≈ the total number of rows / total number of columns in the matrix.
[0032] As a preferred embodiment, the steps for implementing the sparse area compression storage block strategy in step S4 include:
[0033] Scan the non-zero elements in the block and record the triples <row number, column number, value> in row priority order. The row number and column number are stored as 16-bit unsigned integers.
[0034] Perform precision compression on floating-point values, truncating 32-bit float type values to 16-bit half-precision format;
[0035] Check the spatial continuity of the zero-value area. When the number of consecutive zero values in the same row is ≥8, record the starting column number and the ending column number.
[0036] Block marking is used for the zero-value area across rows. When k consecutive rows have zero values in the same column interval, the starting row number, ending row number and column interval are recorded.
[0037] A compression flag is written to the block header, and a boundary check code is appended to the block tail.
[0038] As a preferred embodiment, the execution steps of the warp dynamic scheduling mechanism in step S5 are as follows:
[0039] Assign each thread block to process 16×16 blocks, and each thread is responsible for calculating 4 adjacent elements;
[0040] Load block data into shared memory and achieve zero wait state access through bank conflict optimization;
[0041] An atomic operation counter is used to manage non-zero elements, and an atomic variable is maintained in the global memory to record the index of the currently processed triple;
[0042] Reorganize the non-contiguously stored triplet elements into a continuous memory access pattern through the intra-warp shuffle instruction;
[0043] Monitor the task queue depth of each stream processor. When the number of unfinished tasks on a SM exceeds the threshold:
[0044] Distribute newly allocated blocks to idle SMs first;
[0045] Preemptive interruption is implemented for tasks whose execution time exceeds expectations by 50%, and they are migrated to the backup computing unit for continued execution.
[0046] Automatically adjust the warp scheduling strategy based on the block computation time: enable greedy scheduling mode for short-time tasks and time slice round-robin mode for long-time tasks.
[0047] A second aspect of the present invention provides a matrix acceleration and conversion system supporting variable blocking, comprising:
[0048] Data acquisition module: configured to collect structured data tables, unstructured log files and streaming data from databases, log servers and API interfaces in real time;
[0049] Unified encoding module: Built-in type parser, semantic mapping unit and format converter, converting multi-source data into a numerical matrix with aligned row and column dimensions;
[0050] Dynamic block optimization module: Integrates matrix entropy analysis unit, GPU parameter perception unit and block size calculation engine to generate variable block cutting instructions;
[0051] Heterogeneous storage cutting module: It includes a dense block cutting unit and a sparse compression unit, and generates a heterogeneous block set with metadata identifiers according to the block instructions;
[0052] GPU accelerated execution module: deploys a multi-level cache allocator, kernel function selector, and thread scheduling controller to drive the GPU to perform heterogeneous block parallel computing.
[0053] As a preferred embodiment, the unified encoding module includes:
[0054] Data preprocessing unit: performs ASCII parsing on CSV files, expands nested structures on JSON data, and extracts regular features from log files;
[0055] Type-enforced alignment unit: converts Boolean values to 0 / 1, timestamps to Unix millisecond values, and string category labels to unique integer codes;
[0056] Matrix filling engine: fills missing data in numeric fields by column mean, and fills categorical fields by high-frequency words.
[0057] As a preferred embodiment, the dynamic block optimization module includes:
[0058] Entropy calculation unit: generates the Shannon entropy index based on the distribution of numerical matrix elements, triggering dynamic adjustment of block size;
[0059] Hardware Adaptation Unit: monitors GPU memory bandwidth utilization in real time and automatically increases block size when bandwidth utilization is less than 80%;
[0060] Redundancy checker: adds CRC checksum to high entropy blocks and generates parity bits for transferring blocks across devices.
[0061] As a preferred embodiment, the heterogeneous storage cutting module further includes:
[0062] Density detection unit: Scans and identifies dense areas with density > 70% in the matrix through a sliding window;
[0063] Compression encoder: implements half-precision floating-point compression for non-zero elements of sparse blocks;
[0064] Metadata encapsulator: writes the block type identifier, row and column size, and checksum identifier into the block header.
[0065] As a preferred embodiment, the GPU accelerated execution module includes:
[0066] Kernel function warehouse: stores dense matrix multiplication and addition kernel functions, sparse matrix vector kernel functions, and hybrid computing kernel functions;
[0067] Cache allocator: stores dense blocks in shared memory and compressed blocks in texture memory;
[0068] Dynamic scheduler: Dynamically adjusts the task weight of the SM unit according to the block calculation time, and triggers task migration when the task execution time deviation is greater than 20%.
[0069] Compared with the prior art, the present invention has the following advantages:
[0070] Through unified coding, this invention automatically identifies data types, parses field semantics, and performs standardized cross-format conversions, rapidly transforming heterogeneous, multi-source raw report data into a numerical matrix with unified row and column dimensions. Whether it's structured data tables, key-value pairs, or unstructured time-series log data, it can be efficiently processed according to specific rules, significantly reducing manual intervention and improving the accuracy and efficiency of data processing.
[0071] The optimal size threshold for variable block sizes is dynamically calculated, fully considering the sparsity of the numerical matrix, row and column dimensions, and GPU memory bandwidth parameters. For high-complexity matrices, the block size is dynamically adjusted based on the entropy value, and redundant check bits are added to ensure accurate data transmission. For ordinary matrices, the block size is calculated using the golden section method based on the row and column ratios, making the block size more reasonable. Furthermore, full block strategies and compressed storage block strategies are adopted for dense and sparse regions of the matrix, respectively, effectively improving storage efficiency and computing resource utilization.
[0072] Heterogeneous block collections are assigned to the GPU's multi-level cache system, and CUDA kernel functions are automatically selected based on block density, allowing parallel computations to be performed through a dynamic thread warp scheduling mechanism. Each thread block and thread has a clear division of labor. Computational efficiency is significantly improved through optimized memory access patterns and the use of atomic operation counters to manage non-zero elements. Furthermore, the dynamic scheduling mechanism intelligently adjusts task allocation and scheduling strategies based on the stream processor's task queue depth and task execution time, further enhancing overall computational performance and enabling rapid output of target matrix calculation results.
[0073] The matrix acceleration and conversion system of the present invention adopts a modular design, with each module having clear functions and interoperability. The data acquisition module can collect multi-source data in real time, the unified encoding module efficiently completes data conversion, the dynamic block optimization module accurately generates variable block segmentation instructions, the heterogeneous storage segmentation module generates heterogeneous block sets based on instructions, and the GPU acceleration execution module fully utilizes GPU resources to achieve parallel computing. This modular architecture makes the system highly scalable and maintainable, facilitating functional upgrades and optimizations based on actual needs. BRIEF DESCRIPTION OF THE DRAWINGS
[0074] Figure 1 It is a structural diagram of the system provided in Example 1 of the present invention. DETAILED DESCRIPTION
[0075] In order to be able to understand the features and technical content of the embodiments of the present disclosure in more detail, the implementation of the embodiments of the present disclosure is described in detail below in conjunction with the accompanying drawings. The accompanying drawings are for reference only and are not used to limit the embodiments of the present disclosure. In the following technical description, for the sake of convenience of explanation, a full understanding of the disclosed embodiments is provided through multiple details. However, one or more embodiments can still be implemented without these details. In other cases, to simplify the drawings, well-known structures and devices can be simplified for display.
[0076] According to a first aspect of the present disclosure, a matrix acceleration and conversion method supporting variable partitioning is provided, comprising the following steps:
[0077] S1. Acquire multi-source heterogeneous original report data, where the original report data includes at least structured data tables, unstructured logs, and API streaming data;
[0078] S2. performing unified coding processing on the original report data, wherein the unified coding processing includes data type identification, field semantic analysis, and cross-format standardization conversion to generate a numerical matrix with unified row and column dimensions;
[0079] S3. Dynamically calculate the optimal size threshold of the variable block based on the sparsity, row and column sizes of the numerical matrix and the GPU memory bandwidth parameter, where the number of rows m and the number of columns n of the variable block satisfy m×n≤the maximum load of a single-core thread of the GPU and m / n approaches the overall row and column ratio of the matrix;
[0080] S4, performing non-uniform block cutting on the numerical matrix based on the optimal size threshold, adopting a full block strategy for dense areas, and implementing a compressed storage block strategy for sparse areas, to generate a heterogeneous block set;
[0081] S5. Allocate the heterogeneous block set to the multi-level cache system of the GPU, automatically select the CUDA kernel function according to the block density, perform parallel computing through the thread warp dynamic scheduling mechanism, and output the target matrix operation result.
[0082] As a preferred embodiment, the specific steps of executing the unified coding process in step S2 include:
[0083] For format structured data:
[0084] Scan the data header row by row to identify the precision identifier of the numeric field;
[0085] Parse ASCII strings by cell and convert scientific notation expressions into 32-bit floating point numbers;
[0086] Perform type-adaptive filling for missing values in structured data. Depending on the type of the null value, numeric null values are replaced with the mean of the same column, and character null values are replaced with a unified placeholder.
[0087] For key-value pair data in the format:
[0088] Extract leaf node data from nested structures and generate flattened field names through path parsing;
[0089] Perform forced alignment of field types, convert Boolean true / false to 1 / 0, and convert timestamp strings to Unix millisecond timestamp values;
[0090] Dynamically complete records with missing dimensions: insert default columns for missing fields in the data matrix, fill numeric values with 0 by default, and fill categorical values with a uniform placeholder.
[0091] For time series log unstructured data:
[0092] The sliding window is divided into preset time granularity, and the window length is dynamically adjusted according to the log generation frequency;
[0093] Perform feature extraction on text logs within the window: match numerical features using regular expressions;
[0094] Interpolate missing time points within the window: Use the forward filling method to copy the most recent valid value to the empty window.
[0095] As a preferred embodiment, the specific steps of dynamically calculating the optimal size threshold in step S3 are:
[0096] Normalize the numerical matrix elements to the interval [0,1] and divide them into 100 statistical intervals with a precision of 0.01;
[0097] Calculate the proportion of elements in each interval and substitute it into the Shannon entropy formula. When all elements are 0 or 1, the entropy value returns to 0.
[0098] When the entropy value is greater than the preset threshold, it is determined to be a high-complexity matrix and block size reduction is performed:
[0099] The theoretical optimal block size (m,n) is scaled by the proportional coefficient α = H / Hmax, where Hmax is the theoretical maximum entropy value of a uniformly distributed matrix of the same size;
[0100] Add redundant check bits to the reduced blocks: insert a 2-byte CRC check code at the block header and append a parity check bit at the end;
[0101] When the entropy value H ≤ the threshold, the golden section method based on the row-column ratio is directly used to calculate the block size so that m / n ≈ the total number of rows / total number of columns in the matrix.
[0102] As a preferred embodiment, the steps for implementing the sparse area compression storage block strategy in step S4 include:
[0103] Scan the non-zero elements in the block and record the triples <row number, column number, value> in row priority order. The row number and column number are stored as 16-bit unsigned integers.
[0104] Perform precision compression on floating-point values, truncating 32-bit float type values to 16-bit half-precision format;
[0105] Check the spatial continuity of the zero-value area. When the number of consecutive zero values in the same row is ≥8, record the starting column number and the ending column number.
[0106] Block marking is used for the zero-value area across rows. When k consecutive rows have zero values in the same column interval, the starting row number, ending row number and column interval are recorded.
[0107] A compression flag is written to the block header, and a boundary check code is appended to the block tail.
[0108] As a preferred embodiment, the execution steps of the warp dynamic scheduling mechanism in step S5 are as follows:
[0109] Assign each thread block to process 16×16 blocks, and each thread is responsible for calculating 4 adjacent elements;
[0110] Load block data into shared memory and achieve zero wait state access through bank conflict optimization;
[0111] An atomic operation counter is used to manage non-zero elements, and an atomic variable is maintained in the global memory to record the index of the currently processed triple;
[0112] Reorganize the non-contiguously stored triplet elements into a continuous memory access pattern through the intra-warp shuffle instruction;
[0113] Monitor the task queue depth of each stream processor. When the number of unfinished tasks on a SM exceeds the threshold:
[0114] Distribute newly allocated blocks to idle SMs first;
[0115] Preemptive interruption is implemented for tasks whose execution time exceeds expectations by 50%, and they are migrated to the backup computing unit for continued execution.
[0116] Automatically adjust the warp scheduling strategy based on the block computation time: enable greedy scheduling mode for short-time tasks and time slice round-robin mode for long-time tasks.
[0117] Specifically, the data acquisition module extracts structured data tables from a relational database through database connection interfaces (such as JDBC, ODBC), for example, reads sales order tables, user information tables, etc. from a MySQL database. It collects unstructured log data from a log server using log collection tools (such as Flume, Logstash), such as system operation logs, user operation logs, etc. At the same time, it calls an API interface through the HTTP / HTTPS protocol to receive API streaming data in real time, such as real-time data returned by weather data APIs, stock market quote APIs. The collected data is temporarily stored in a memory buffer, waiting for unified encoding processing.
[0118] In the embodiments of the present disclosure, the provided unified encoding processing and structured data processing
[0119] Taking the sales order table as an example, scan the table header row by row, and identify the precision identifiers (such as retaining two decimal places after the decimal point) of numeric fields (such as order amount, quantity of goods) through a data dictionary or regular expressions.
[0120] For a numeric value represented in scientific notation in a cell (such as "1.2E+03"), convert it to a 32-bit floating-point number (i.e., 1200.0) according to the scientific notation conversion rules.
[0121] When it is detected that there are missing values in a numeric field, calculate the mean value of this column (such as the mean value of the order amount column is 500.0), and replace the missing value with the mean value; for the missing values of character fields (such as customer name), uniformly fill them with the placeholder "unknown customer".
[0122] For key-value pair data processing, for JSON-format user information data (such as "{"user":{"name":"张三","age":30,"isVIP":true}}"), extract the leaf node data through recursive parsing and generate flattened field names (such as "user.name", "user.age", "user.isVIP").
[0123] Convert the true of the boolean field "isVIP" to 1 and false to 0; convert the timestamp string (such as "2025-05-12T10:00:00Z") to a Unix millisecond timestamp (such as 1747039200000) according to the ISO 8601 standard.
[0124] If a certain user information record is missing the "age" field, insert a default column in the data matrix, and numerically fill it with 0, that is, supplement it as "user.age":0.
[0125] For unstructured time series log data processing, using system operation logs as an example, we divide the sliding window into 5-minute time granularity. If the log generation frequency suddenly increases, the window length is automatically shortened to 2 minutes; conversely, if the frequency decreases, the window length is extended to 10 minutes.
[0126] Within the window, use regular expressions (such as "\d+") to match numerical features (such as error codes and response times) in the logs.
[0127] For log data with missing time points, we use a forward filling method to copy the relevant data of the most recent valid log into the empty window. For example, if there is missing data in the 10:00-10:05 window, we fill the missing area with the last valid log data in the 9:55-10:00 window.
[0128] The disclosed embodiment then calculates the optimal matrix size. Taking a 1000×1000 matrix as an example, the matrix elements are normalized to the interval [0, 1]. For each element x, the operation x′ = xmax - xmin x - xmin is performed, where xmin and xmax are the minimum and maximum values in the matrix, respectively. The matrix is then divided into 100 statistical intervals with a precision of 0.01, and the percentage of elements in each interval is calculated.
[0129] Substitute the Shannon entropy formula H = -∑i = 1100pilog2pi to calculate the entropy value, where pi is the proportion of elements in the i-th interval. Assume that the calculated entropy value H = 0.9 and the preset threshold is 0.8. Since H > 0.8, it is judged as a high complexity matrix.
[0130] Given that the theoretically optimal block size is (32,32), and the theoretical maximum entropy value of a uniformly distributed matrix of the same size is Hmax = 1, and the calculated scaling factor α = H / Hmax = 0.9, the scaled block size is (m′ = 0.9 × 32 ≈ 29, n′ = 0.9 × 32 ≈ 29). A 2-byte CRC checksum is inserted at the block header, and a parity check bit is appended at the end.
[0131] If the calculated entropy value H = 0.7 ≤ 0.8, the block size is directly calculated using the golden section method based on the row-column ratio. Assuming the total number of rows in the matrix is 1000 and the total number of columns is 800, the block size calculated using the golden section method is (38, 30), so that m / n = 38 / 30 ≈ 1000 / 800.
[0132] The matrix is then divided into non-uniform blocks and scanned. When a block is identified with a non-zero percentage of less than 30%, it is considered a sparse region. The non-zero element triples (row number, column number, value) are recorded in row-priority order, with row and column numbers stored as 16-bit unsigned integers. For example, if the non-zero elements in a sparse block are (1, 2, 3.14) and (3, 4, 5.67), they are recorded as <1, 2, 3.14> and <3, 4, 5.67>.
[0133] Perform precision compression on floating-point values, truncating 32-bit float type values (such as 3.1415926) to 16-bit half-precision format (such as 3.14).
[0134] Check the continuity of the zero-value area. If the number of consecutive zero values in a row is ≥8, record the starting column number and the ending column number. If three consecutive rows have zero values in the 5th to 10th column range, record the starting row number, the ending row number, and the column range (for example, the starting row number is 10, the ending row number is 12, and the column range is 5-10).
[0135] A compression flag is written to the block header (e.g., 0 for uncompressed, 1 for compressed), and a boundary checksum is appended to the end of the block to ensure data integrity. For dense areas (where the percentage of non-zero elements is ≥ 70%), a full block strategy is adopted to directly divide the data into fixed-size blocks.
[0136] The divided blocks are written to the GPU for computation, with each thread block assigned to process a 16×16 block, with each thread responsible for computing four adjacent elements. For example, thread block 0 processes the 16×16 region in the upper left corner of the matrix, while thread 1 is responsible for operations (such as addition and multiplication) on the four adjacent elements within that region.
[0137] Load the block data into shared memory and achieve zero-wait-state access by adjusting the data storage layout and optimizing bank conflicts. For example, data is stored in column-major order to avoid concurrent access conflicts within the same bank.
[0138] An atomic operation counter is used to manage non-zero elements, and an atomic variable is maintained in global memory to record the index of the currently processed triple. When multiple threads access and update non-zero elements simultaneously, atomic operations are used to ensure data consistency.
[0139] The non-contiguously stored triplet elements are reorganized into a contiguous memory access pattern through the intra-warp shuffle instruction to improve memory access efficiency. For example, triplet elements scattered at different memory addresses are rearranged so that they are stored contiguously in memory.
[0140] The task queue depth of each stream processor (SM) is monitored. When the number of unfinished tasks on an SM exceeds a threshold (e.g., the task queue length reaches 50), newly allocated chunks are prioritized for dispatch to idle SMs. Tasks that exceed their expected execution time by 50% are preemptively interrupted and migrated to a backup compute unit for continued execution.
[0141] Automatically adjust the warp scheduling strategy based on the block computation time. If a block computation time is short (e.g., less than 10ms), greedy scheduling is enabled to prioritize its completion. If a block computation time is long (e.g., over 100ms), round-robin scheduling is enabled to ensure fair access to computing resources for all tasks.
[0142] A second aspect of the embodiments of the present disclosure provides a matrix acceleration and conversion system supporting variable blocking, including:
[0143] Data acquisition module: configured to collect structured data tables, unstructured log files and streaming data from databases, log servers and API interfaces in real time;
[0144] Unified encoding module: Built-in type parser, semantic mapping unit and format converter, converting multi-source data into a numerical matrix with aligned row and column dimensions;
[0145] Dynamic block optimization module: Integrates matrix entropy analysis unit, GPU parameter perception unit and block size calculation engine to generate variable block cutting instructions;
[0146] Heterogeneous storage cutting module: It includes a dense block cutting unit and a sparse compression unit, and generates a heterogeneous block set with metadata identifiers according to the block instructions;
[0147] GPU accelerated execution module: deploys a multi-level cache allocator, kernel function selector, and thread scheduling controller to drive the GPU to perform heterogeneous block parallel computing.
[0148] As a preferred embodiment, the unified encoding module includes:
[0149] Data preprocessing unit: performs ASCII parsing on CSV files, expands nested structures on JSON data, and extracts regular features from log files;
[0150] Type-enforced alignment unit: converts Boolean values to 0 / 1, timestamps to Unix millisecond values, and string category labels to unique integer codes;
[0151] Matrix filling engine: fills missing data in numeric fields by column mean, and fills categorical fields by high-frequency words.
[0152] As a preferred embodiment, the dynamic block optimization module includes:
[0153] Entropy calculation unit: generates the Shannon entropy index based on the distribution of numerical matrix elements, triggering dynamic adjustment of block size;
[0154] Hardware Adaptation Unit: monitors GPU memory bandwidth utilization in real time and automatically increases block size when bandwidth utilization is less than 80%;
[0155] Redundancy checker: adds CRC checksum to high entropy blocks and generates parity bits for transferring blocks across devices.
[0156] As a preferred embodiment, the heterogeneous storage cutting module further includes:
[0157] Density detection unit: Scans and identifies dense areas with density > 70% in the matrix through a sliding window;
[0158] Compression encoder: implements half-precision floating-point compression for non-zero elements of sparse blocks;
[0159] Metadata encapsulator: writes the block type identifier, row and column sizes, and checksum identifier into the block header.
[0160] As a preferred embodiment, the GPU accelerated execution module includes:
[0161] Kernel function warehouse: stores dense matrix multiplication and addition kernel functions, sparse matrix vector kernel functions, and hybrid computing kernel functions;
[0162] Cache allocator: stores dense blocks in shared memory and compressed blocks in texture memory;
[0163] Dynamic scheduler: Dynamically adjusts the task weight of the SM unit according to the block calculation time, and triggers task migration when the task execution time deviation is greater than 20%.
[0164] Compared with the prior art, the embodiments of the present disclosure have the following advantages:
[0165] Through unified coding, the disclosed embodiments automatically identify data types, parse field semantics, and perform standardized cross-format conversions, rapidly transforming heterogeneous, multi-source raw report data into a numerical matrix with unified row and column dimensions. Whether it's structured data tables, key-value pairs, or unstructured time-series log data, it can be efficiently processed according to specific rules, significantly reducing manual intervention and improving the accuracy and efficiency of data processing.
[0166] The optimal size threshold for variable block sizes is dynamically calculated, fully considering the sparsity of the numerical matrix, row and column dimensions, and GPU memory bandwidth parameters. For high-complexity matrices, the block size is dynamically adjusted based on the entropy value, and redundant check bits are added to ensure accurate data transmission. For ordinary matrices, the block size is calculated using the golden section method based on the row and column ratios, making the block size more reasonable. Furthermore, full block strategies and compressed storage block strategies are adopted for dense and sparse regions of the matrix, respectively, effectively improving storage efficiency and computing resource utilization.
[0167] Heterogeneous block collections are assigned to the GPU's multi-level cache system, and CUDA kernel functions are automatically selected based on block density, allowing parallel computations to be performed through a dynamic thread warp scheduling mechanism. Each thread block and thread has a clear division of labor. Computational efficiency is significantly improved through optimized memory access patterns and the use of atomic operation counters to manage non-zero elements. Furthermore, the dynamic scheduling mechanism intelligently adjusts task allocation and scheduling strategies based on the stream processor's task queue depth and task execution time, further enhancing overall computational performance and enabling rapid output of target matrix calculation results.
[0168] The matrix acceleration and conversion system of the disclosed embodiment utilizes a modular design, with each module clearly defined and interoperable. The data acquisition module enables real-time data acquisition from multiple sources, the unified encoding module efficiently converts data, the dynamic block optimization module accurately generates variable block segmentation instructions, the heterogeneous storage segmentation module generates heterogeneous block sets based on these instructions, and the GPU-accelerated execution module fully utilizes GPU resources for parallel computing. This modular architecture ensures excellent scalability and maintainability of the system, facilitating functional upgrades and optimizations tailored to actual needs.
[0169] The above description and the accompanying drawings fully illustrate the embodiments of the present disclosure so that those skilled in the art can practice them. Other embodiments may include structural, logical, electrical, process and other changes. The embodiments represent only possible variations. Unless explicitly required, individual components and functions are optional, and the order of operations may vary. Parts and features of some embodiments may be included in or replace parts and features of other embodiments. Moreover, the words used in this application are only used to describe the embodiments and are not used to limit the claims. As used in the description of the embodiments and claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to also include plural forms. Similarly, the term "and / or" as used in this application refers to any and all possible combinations of one or more associated listings. In addition, when used in this application, the term "comprise" and its variations "comprises" and / or comprising refer to the presence of stated features, wholes, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups of these. In the absence of further restrictions, an element defined by the sentence "comprising a..." does not exclude the presence of other identical elements in the process, method or device that includes the element. In this article, each embodiment may focus on the differences from other embodiments, and the same and similar parts between the various embodiments can be referenced to each other. For the methods, products, etc. disclosed in the embodiments, if they correspond to the method part disclosed in the embodiments, then the relevant parts can be found in the description of the method part.
Claims
1. Supports variable block matrix conversion and acceleration method, characterized by: The steps include: S1. Acquire multi-source heterogeneous original report data, where the original report data includes at least structured data tables, unstructured logs, and API streaming data; S2. performing unified coding processing on the original report data, wherein the unified coding processing includes data type identification, field semantic analysis, and cross-format standardization conversion to generate a numerical matrix with unified row and column dimensions; S3. Dynamically calculate the optimal size threshold of the variable block based on the sparsity, row and column sizes of the numerical matrix and the GPU memory bandwidth parameter, where the number of rows m and the number of columns n of the variable block satisfy m×n≤the maximum load of a single-core thread of the GPU and m / n approaches the overall row and column ratio of the matrix; S4, performing non-uniform block cutting on the numerical matrix based on the optimal size threshold, adopting a full block strategy for dense areas, and implementing a compressed storage block strategy for sparse areas, to generate a heterogeneous block set; S5. Allocate the heterogeneous block set to the multi-level cache system of the GPU, automatically select the CUDA kernel function according to the block density, perform parallel computing through the thread warp dynamic scheduling mechanism, and output the target matrix operation result.
2. The method according to claim 1, characterized in that The specific steps for executing the unified coding process in step S2 include: For format structured data: Scan the data header row by row to identify the precision identifier of the numeric field; Parse ASCII strings by cell and convert scientific notation expressions into 32-bit floating point numbers; Perform type-adaptive filling for missing values in structured data. Depending on the type of the null value, numeric null values are replaced with the mean of the same column, and character null values are replaced with a unified placeholder. For key-value pair data in the format: Extract leaf node data from nested structures and generate flattened field names through path parsing; Perform forced alignment of field types, convert Boolean true / false to 1 / 0, and convert timestamp strings to Unix millisecond timestamp values; Dynamically complete records with missing dimensions: insert default columns for missing fields in the data matrix, fill numeric values with 0 by default, and fill categorical values with a uniform placeholder. For time series log unstructured data: The sliding window is divided into preset time granularity, and the window length is dynamically adjusted according to the log generation frequency; Perform feature extraction on text logs within the window: match numerical features using regular expressions; Interpolate missing time points within the window: Use the forward filling method to copy the most recent valid value to the empty window.
3. The method according to claim 1, characterized in that The specific steps of dynamically calculating the optimal size threshold in step S3 are: Normalize the numerical matrix elements to the interval [0,1] and divide them into 100 statistical intervals with a precision of 0.01; Calculate the proportion of elements in each interval and substitute it into the Shannon entropy formula. When all elements are 0 or 1, the entropy value returns to 0. When the entropy value is greater than the preset threshold, it is determined to be a high-complexity matrix and block size reduction is performed: The theoretical optimal block size (m,n) is scaled by the proportional coefficient α = H / Hmax, where Hmax is the theoretical maximum entropy value of a uniformly distributed matrix of the same size; Add redundant check bits to the reduced blocks: insert a 2-byte CRC check code at the block header and append a parity check bit at the end; When the entropy value H ≤ the threshold, the golden section method based on the row-column ratio is directly used to calculate the block size so that m / n ≈ the total number of rows / total number of columns in the matrix.
4. The method according to claim 3, characterized in that The implementation steps of the sparse area compression storage block strategy in step S4 include: Scan the non-zero elements in the block and record the triples <row number, column number, value> in row priority order. The row number and column number are stored as 16-bit unsigned integers. Perform precision compression on floating-point values, truncating 32-bit float type values to 16-bit half-precision format; Check the spatial continuity of the zero-value area. When the number of consecutive zero values in the same row is ≥8, record the starting column number and the ending column number. Block marking is used for the zero-value area across rows. When k consecutive rows have zero values in the same column interval, the starting row number, ending row number and column interval are recorded. A compression flag is written to the block header, and a boundary check code is appended to the block tail.
5. The matrix acceleration and conversion method according to claim 4, characterized in that: The execution steps of the warp dynamic scheduling mechanism in step S5 are as follows: Assign each thread block to process 16×16 blocks, and each thread is responsible for calculating 4 adjacent elements; Load block data into shared memory and achieve zero wait state access through bank conflict optimization; An atomic operation counter is used to manage non-zero elements, and an atomic variable is maintained in the global memory to record the index of the currently processed triple; Reorganize the non-contiguously stored triplet elements into a continuous memory access pattern through the intra-warp shuffle instruction; Monitor the task queue depth of each stream processor. When the number of unfinished tasks on a SM exceeds the threshold: Distribute newly allocated blocks to idle SMs first; Preemptive interruption is implemented for tasks whose execution time exceeds expectations by 50%, and they are migrated to the backup computing unit for continued execution. Automatically adjust the warp scheduling strategy based on the block computation time: enable greedy scheduling mode for short-time tasks and time slice round-robin mode for long-time tasks.
6. A matrix acceleration and conversion system supporting variable blocking, characterized in that: include: Data acquisition module: configured to collect structured data tables, unstructured log files and streaming data from databases, log servers and API interfaces in real time; Unified encoding module: Built-in type parser, semantic mapping unit and format converter, converting multi-source data into a numerical matrix with aligned row and column dimensions; Dynamic block optimization module: Integrates matrix entropy analysis unit, GPU parameter perception unit and block size calculation engine to generate variable block cutting instructions; Heterogeneous storage cutting module: It includes a dense block cutting unit and a sparse compression unit, and generates a heterogeneous block set with metadata identifiers according to the block instructions; GPU accelerated execution module: deploys a multi-level cache allocator, kernel function selector, and thread scheduling controller to drive the GPU to perform heterogeneous block parallel computing.
7. The system according to claim 6, characterized in that The unified coding module includes: Data preprocessing unit: performs ASCII parsing on CSV files, expands nested structures on JSON data, and extracts regular features from log files; Type-enforced alignment unit: converts Boolean values to 0 / 1, timestamps to Unix millisecond values, and string category labels to unique integer codes; Matrix filling engine: fills missing data in numeric fields by column mean, and fills categorical fields by high-frequency words.
8. The system according to claim 7, characterized in that ,,The dynamic block optimization module includes: Entropy calculation unit: generates the Shannon entropy index based on the distribution of numerical matrix elements, triggering dynamic adjustment of block size; Hardware Adaptation Unit: monitors GPU memory bandwidth utilization in real time and automatically increases block size when bandwidth utilization is less than 80%; Redundancy checker: adds CRC checksum to high entropy blocks and generates parity bits for transferring blocks across devices.
9. The system according to claim 1, wherein: The heterogeneous storage cutting module further includes: Density detection unit: Scans and identifies dense areas with density > 70% in the matrix through a sliding window; Compression encoder: implements half-precision floating-point compression for non-zero elements of sparse blocks; Metadata encapsulator: writes the block type identifier, row and column sizes, and checksum identifier into the block header.
10. The system according to claim 1, wherein: The GPU accelerated execution module includes: Kernel function warehouse: stores dense matrix multiplication and addition kernel functions, sparse matrix vector kernel functions, and hybrid computing kernel functions; Cache allocator: stores dense blocks in shared memory and compressed blocks in texture memory; Dynamic scheduler: Dynamically adjusts the task weight of the SM unit according to the block calculation time, and triggers task migration when the task execution time deviation is greater than 20%.
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