Multi-level D-type power amplifier, PA chip and broadband carrier communication system
Through multi-level Class D amplifier technology, the combination of phase-shift triangle wave and loop filter is used to solve the problems of high power consumption and low efficiency in broadband carrier communication, and high-efficiency and low-power signal amplification and transmission are achieved.
Patent Information
- Application Number
- CN202510947514.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-10
- Publication Date
- 2025-08-19
- Estimated Expiration
- 2045-07-10
AI Technical Summary
In the prior art, Class AB amplifiers are used in broadband carrier communication modes with high power consumption and low efficiency.
Multi-level Class D amplifiers are used to compare and amplify the input signal using N phase shift triangle waves with different phase shift angles, and filter them with loop filters to generate PWM amplified signals of N+1 levels to reduce switching losses and improve efficiency.
Amplification of high-frequency and low-frequency signals is achieved at low switching frequency, reducing switching losses, improving signal transmission efficiency and reducing quantization errors, ensuring signal accuracy and dynamic range.
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Figure CN120512147A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of power transmission, and in particular to a multi-level class D power amplifier, a PA chip, and a broadband carrier communication system. Background Art
[0002] With the rapid development of smart grids, efficient and reliable communication technologies are playing a vital role in areas such as grid automation, remote monitoring, and smart metering. As one of the most widely used communication technologies in smart grids, the performance of broadband carrier communication directly impacts the grid's intelligence level and operational efficiency. Currently, broadband carrier communication modules generally suffer from excessive power consumption, which not only significantly increases the grid's energy costs but also severely limits the module's stable operation in complex grid environments. Since the power consumption of communication modules in smart grids primarily occurs during signal transmission, optimizing transmission power is key to reducing overall power consumption. The performance of the PA chip in the communication module directly determines the efficiency and stability of the transmission power.
[0003] Prior art PA chips used in OFDM-based broadband carrier communication systems often employ Class AB amplifiers, which achieve signal amplification through a dual-transistor complementary symmetric structure (e.g., an NPN transistor and a PNP transistor). During the positive half-cycle of the input signal, the PNP transistor enters a partially conductive state, while the NPN transistor fully conducts to amplify the signal. During the negative half-cycle of the input signal, the NPN transistor enters a partially conductive state, while the PNP transistor fully conducts to amplify the signal. This alternating operation of the two transistors achieves complete signal waveform amplification. This alternating conduction of the two transistors results in low power consumption for the Class AB amplifier, achieving a theoretical energy conversion efficiency of 40% when transmitting a single-carrier signal. However, in practice, to avoid crossover distortion, both transistors remain partially conductive even when no signal is input, resulting in high static current consumption. At the same time, in power line carrier communication, the existing technology mostly adopts OFDM-based methods to realize broadband carrier signal transmission to greatly improve the signal transmission rate. When transmitting multi-carrier signals, since the multi-carrier signal is composed of a large number of sub-carrier signals superimposed, its instantaneous peak power may reach more than 10 times the average power. Therefore, the transistor capacity needs to be designed according to the instantaneous peak power. However, the average power of the signal is much lower than the peak power most of the time, which causes the transistor to work in a low average power state most of the time. This power fallback linearity causes its static power consumption to surge, thereby significantly reducing the energy conversion efficiency to 3%~5%, which cannot meet the low power consumption and high efficiency requirements of the smart grid.
[0004] In summary, the application of class AB power amplifiers in broadband carrier communication mode in the prior art has the problems of high power consumption and low efficiency. Summary of the Invention
[0005] Therefore, the technical problem to be solved by the present invention is to overcome the problems of high power consumption and low efficiency in the prior art when applying a class AB power amplifier to a broadband carrier communication mode.
[0006] To solve the above technical problems, the present invention provides a multi-level Class D power amplifier for use in an OFDM-based broadband carrier communication system, comprising: A triangle wave signal module is used to generate N phase-shifted triangle waves with different phase shift angles; wherein N is an even number and N ≥ 4; A comparison module is connected to the triangle wave signal module and is used to compare the input signal with N phase-shifted triangle waves with different phase shift angles, and output N PWM signals; The driving circuit is connected to the comparison module and is used to amplify the N-channel PWM signals and output PWM amplified signals containing N+1 levels; The loop filter is connected to the driving circuit and is used to filter the PWM amplified signal to obtain a filtered PWM amplified signal.
[0007] Preferably, the bandwidth of the loop filter is the same frequency as the bandwidth of the phase-shifted triangle wave; N*f1>f, where f1 represents the frequency of a single phase-shifted triangle wave, and f represents the maximum frequency of the input signal.
[0008] Preferably, the phase shift angle difference between the nth phase-shifted triangular wave and the (n+1)th phase-shifted triangular wave is 360° / N, where n∈[1,N-1].
[0009] Preferably, N=4.
[0010] Preferably, the driving circuit is an H-bridge structure consisting of two half-bridges, each half-bridge comprising: The first bridge arm specifically includes: a first transistor, having a gate connected to the output terminal of the comparison module and a drain connected to a power supply; a second transistor, a gate of which is connected to the output terminal of the comparison module, and a drain of which is connected to the source of the first transistor; The second bridge arm specifically includes: a third transistor, whose gate is connected to the output terminal of the comparison module and whose drain is connected to the source of the second transistor as the output terminal of the half bridge; The fourth transistor has a gate connected to the output end of the comparison module, a drain connected to the source of the third transistor, and a source grounded.
[0011] Preferably, each half-bridge further comprises a flying capacitor, one end of which is connected to the source of the first transistor, and the other end of which is connected to the source of the third transistor.
[0012] Preferably, each half-bridge further includes an EMI filter, which specifically includes: an inductor, a first end of which is connected to the output end of the half-bridge; The capacitor has one end connected to the second end of the inductor as the output end of the driving circuit, and the other end is grounded.
[0013] Preferably, the comparison module includes: N comparators are used to compare the input signal with N phase-shifted triangular waves with different phase shift angles, and output N PWM signals.
[0014] The present application also provides a PA chip, which includes the above-mentioned multi-level Class D power amplifier.
[0015] The present application also provides a broadband carrier communication system, which includes the above-mentioned PA chip.
[0016] The multi-level Class D power amplifier provided by this application has the following beneficial effects: The triangle wave signal module is used to generate N phase-shifted triangle waves with different phase shift angles. The comparison module uses N phase-shifted triangle waves with different phase shift angles to sample the input signal, which is equivalent to high-frequency sampling of the input signal using multiple phase-shifted triangle waves, so that high-frequency quantization can be achieved using low-frequency triangle waves. Even if the input signal is a high-bandwidth multi-carrier signal, this high-frequency sampling method can more densely sample the rapid changes of the high-frequency signal, reduce the quantization error, and thus output N-channel PWM signals containing input signal change information and phase interleaved. When the drive circuit amplifies the PWM signal, its internal transistors can appear in different switching combination states under the control of the N-channel PWM signals, thereby outputting an amplified signal containing N+1 levels and containing input signal change information. This step-by-step voltage synthesis output The multi-level amplified signal increases the dynamic range of the output signal, so that small changes in high-frequency and low-frequency signals can be accurately represented, thereby being able to more accurately approximate the waveform of the input signal and further reduce the quantization error; finally, the amplified signal is filtered using a loop filter to filter out the high-frequency carrier component in the signal while retaining the input signal; since the power devices of the Class D amplifier are only switched in the fully on or fully off state, the high power consumption problem caused by the transistor operating in the low average power state is avoided, and it has the natural advantages of high efficiency and low power consumption. This application further improves the Class D amplifier, and can cover the bandwidth of the multi-carrier signal with a low-frequency phase-shifted triangle wave, thereby solving the distortion problem that exists when directly using a traditional Class D amplifier to transmit multi-carrier signals, while effectively amplifying and transmitting the multi-carrier signal, reducing switching losses and improving efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] In order to make the content of the present invention more clearly understood, the present invention is further described in detail below based on specific embodiments of the present invention in conjunction with the accompanying drawings, wherein: Figure 1 The schematic diagram of the multi-level Class D power amplifier circuit provided by this application; Figure 2 Schematic diagram of the drive circuit, PWM signal and amplified signal output by the drive circuit provided in this application; wherein, Figure 2 (a) is the schematic diagram of the driving circuit principle. Figure 2 (b) in the Figure 2 Schematic diagram of the amplified signal output by the driving circuit shown in (a) under the PWM signal driving; Figure 3 Another schematic diagram of the driving circuit principle provided by this application; Figure 4 A schematic diagram of a comparison module provided in an embodiment of the present application using multiple phase-shifted triangular waves to perform triangular wave quantization on an input signal and then output a multi-level amplified signal; wherein, Figure 4 (a) is a schematic diagram of four phase-shifted triangle waves and input signals. Figure 4 (b) is a schematic diagram of multi-level amplified signals; Description of the accompanying drawings in the specification: 1. triangular wave signal module; 2. comparison module; 3. drive circuit; 31. half bridge; 4. loop filter. DETAILED DESCRIPTION
[0018] The present invention will be further described below with reference to the accompanying drawings and specific embodiments so that those skilled in the art can better understand the present invention and implement it. However, the embodiments are not intended to limit the present invention.
[0019] Unlike Class AB amplifiers, Class D amplifiers are often used in audio amplification systems. Their core is to compare the input signal with a triangular wave. When the input signal voltage is higher than the triangular wave, a high level is output, otherwise a low level is output. Based on the output high and low level signals, a PWM signal with a duty cycle proportional to the instantaneous amplitude of the input signal is obtained. The PWM signal is then power amplified by a driving circuit, and finally the amplified PWM signal is filtered by a loop filter to remove the high-frequency carrier and retain only the input signal component, ultimately obtaining an amplified analog input signal. Since its power switch only works in the on or off state during the entire signal amplification process, there is theoretically no static power consumption and the efficiency is much higher than that of Class AB amplifiers. Therefore, this application considers applying Class D amplifiers to power carrier communication systems to solve the problems of high power consumption and low efficiency in broadband carrier communication.
[0020] Furthermore, since the frequency range of the input signal in audio applications is generally 20Hz to 20kHz, and the frequency of the triangle wave is usually between 200kHz and 1MHz, the frequency of the triangle wave in existing Class D amplifiers is usually much higher than the frequency of the input signal, which can effectively modulate the input signal. However, in power carrier communication, the frequency range of the input signal is usually 0.7kHz to 12MHz, which is much higher than the frequency of the audio signal. Therefore, the triangle wave in existing Class D amplifiers cannot cover the bandwidth of the multi-carrier signal. In other words, the high-order subcarrier signals in the multi-carrier signal cannot be effectively tracked, resulting in distortion in the multi-carrier signal transmission, affecting the communication quality of the broadband carrier communication module.
[0021] Therefore, although the application of Class D amplifiers in power carrier communication systems can reduce signal transmission power consumption and improve transmission efficiency, it is still necessary to increase the frequency of the triangle wave to ensure that the input signal can be accurately modulated to ensure signal transmission quality.
[0022] Generally speaking, the frequency of the triangle wave should be at least greater than the highest frequency of the input signal to avoid modulation distortion. Therefore, for input signals between 0.7MHz and 12MHz, the triangle wave frequency needs to be above 12MHz. Generating high-frequency triangle waves with frequencies above 12MHz requires high-speed, high-precision circuit design, placing extremely high demands on component performance. High-frequency circuits are also more susceptible to noise interference, requiring additional shielding and filtering measures. Furthermore, high-frequency PWM signal modulation requires higher time resolution to ensure the accuracy of the PWM signal duty cycle, while high-frequency switching leads to higher switching losses. Furthermore, the loop filter frequency must also be higher to filter out high-frequency carrier components, which places higher performance demands on the inductors and capacitors in the loop filter. Furthermore, high-frequency signals are more susceptible to attenuation and distortion during transmission, requiring optimized signal transmission paths and impedance matching. Therefore, designing a higher-frequency triangle wave signal to modulate the input signal significantly increases the cost and design complexity of the entire system.
[0023] In order to solve the above problems, the present application designs a multi-level Class D power amplifier, which can amplify high-frequency and low-frequency input signals at a low switching frequency, effectively amplifying and transmitting multi-carrier signals while reducing switching losses and improving efficiency.
[0024] See also Figure 1 , Figure 1 This is a schematic diagram of a multi-level Class D power amplifier provided in this application. The multi-level Class D power amplifier is applied to a broadband carrier communication system based on OFDM, and includes a triangle wave signal module 1, a comparison module 2, a drive circuit 3 and a loop filter 4.
[0025] The triangle wave signal module 1 is used to generate N phase-shifted triangle waves with different phase shift angles; wherein N is an even number and N≥4.
[0026] The comparison module 2 is connected to the triangle wave signal module 1 and is used to compare the input signal with N phase-shifted triangle waves with different phase shift angles, and output N PWM signals.
[0027] The driving circuit 3 is connected to the comparison module 2 and is used to amplify N-channel PWM signals and output PWM amplified signals containing N+1 levels.
[0028] The loop filter 4 is connected to the driving circuit 3 and is used to filter the PWM amplified signal to obtain a filtered PWM amplified signal.
[0029] Furthermore, the bandwidth of the loop filter is the same as the bandwidth of the phase-shifted triangle wave.
[0030] In audio applications, when the triangle wave frequency is 250kHz and the input signal is 20kHz, the loop filter needs to filter out the high-frequency carrier signal (such as the triangle wave signal) in the PWM amplified signal, retaining only the input signal component. Therefore, a low-pass filter is usually used, and its cutoff frequency needs to be between the highest frequency of the input signal and the triangle wave frequency, for example, 30kHz. This allows input signals below the cutoff frequency to pass through, while filtering out high-frequency components above the cutoff signal.
[0031] In the multi-level Class D power amplifier provided in the present application, although the equivalent sampling frequency of multiple phase-shifted triangular waves is high, the frequency of a single phase-shifted triangular wave is still low. Therefore, as long as the loop filter uses a bandwidth with the same frequency as the single phase-shifted triangular wave (that is, a low-frequency high-pass loop filter), the low-frequency phase-shifted triangular wave signal in the PWM amplified signal can be filtered out, allowing the high-frequency input signal to pass through, thereby achieving a high equivalent bandwidth at a low switching frequency, further reducing power consumption.
[0032] For example, if the input signal in the power carrier communication system is 0.7MHz~1MHz, if a high-frequency triangular wave with a frequency of 1.2MHz is directly used to sample the input signal, it is necessary to design a high-frequency low-pass loop filter with a cutoff frequency between 1MHz~1.2MHz to filter out the high-frequency triangular wave signal in the PWM amplified signal and retain the input signal component; while in the multi-level Class D power amplifier designed in this application, since the frequency of a single phase-shifted triangular wave is still 250kHz, it is only necessary to design a low-frequency high-pass loop filter with a cutoff frequency of 250kHz to filter out the low-frequency triangular wave signal in the PWM amplified signal and retain the high-frequency input signal component.
[0033] Furthermore, N*f1>f, where f1 represents the frequency of a single phase-shifted triangle wave and f represents the maximum frequency of the input signal. Using N phase-shifted triangle waves allows the sampling frequency to be equivalent to N*f1, effectively achieving high-frequency sampling using a low-frequency triangle wave. When the equivalent sampling frequency N*f1 is greater than the maximum frequency of the input signal, changes in the input signal can be accurately captured, avoiding signal distortion.
[0034] The multi-level Class D amplifier designed in this application achieves high-frequency sampling of the input signal based on the superposition effect of multiple phase-shifted triangular waves, thereby covering the bandwidth of the multi-carrier signal with a low-frequency phase-shifted triangular wave. Specifically, the equivalent sampling frequency of the superposition of N triangular waves with different phase-shift angles is N times the sampling frequency of a single phase-shifted triangular wave. In this case, even if the input signal is a high-frequency signal, it can be accurately captured by the high-frequency quantization process to avoid distortion. For example, by superimposing four rulers with different scale intervals to measure the length of an object, a more precise measurement result can be obtained. At the same time, the output of the N+1 levels of PWM amplified signals increases the dynamic range of the output signal compared to the two-level PWM signal output by existing Class D amplifiers, allowing small changes in both high-frequency and low-frequency signals to be accurately represented, thereby improving signal fidelity. In addition, the high-frequency equivalent quantization achieved by the multi-phase-shifted triangular wave is decoupled from the switching frequency of the driving circuit. Therefore, the multi-level Class D power amplifier designed in this application can still process high-frequency signals at low switching frequencies, solving the distortion problem that exists when directly using traditional Class D power amplifiers to transmit multi-carrier signals. While effectively amplifying and transmitting multi-carrier signals, it reduces switching losses and improves efficiency.
[0035] Optionally, the number N of phase-shifted triangular waves can be 4, 6, 8, 10, 12, 16, etc. As the number of phase-shifted triangular waves increases, the sampling frequency and signal processing accuracy of the input signal will be higher, and the output PWM signals will also increase. Therefore, the structure of the multi-level Class D power amplifier and the control process of the transistors in the driving circuit will also become more complicated. At the same time, the cost of the device will also increase accordingly.
[0036] In actual use, the number of phase-shifted triangular waves is determined based on the frequency of the input signal. To ensure sampling accuracy, N*f1>f. For example, when the frequency of the input signal is 10 MHz and the frequency of the single phase-shifted triangular wave is 1 MHz, the number N is at least 12.
[0037] Specifically, the comparison module 2 may adopt a multi-channel analog comparator or a dedicated PWM modulation chip. This chip integrates a multi-channel comparator and can compare the input signal with N phase-shifted triangle wave signals respectively.
[0038] Optionally, in some embodiments of the present application, the comparison module 2 may also use multiple comparators, that is, the comparison module 2 includes: N comparators are used to compare the input signal with N phase-shifted triangular waves with different phase shift angles, and output N PWM signals.
[0039] Furthermore, the phase shift angle difference between the nth phase-shifted triangular wave and the (n+1)th phase-shifted triangular wave is 360° / N, where n∈[1,N-1].
[0040] Specifically, the phase difference between adjacent phase-shifted triangular waves is set to 360° / N, which can make N phase-shifted triangular waves evenly distributed within one cycle, forming a uniform sampling network and minimizing quantization error. When transmitting multi-carrier signals, this uniform sampling network can also effectively suppress intermodulation distortion between subcarrier signals.
[0041] For example, when N is 4, the phase shift angle difference between two adjacent phase-shifted triangular waves is 90°; and when N is 6, the phase shift angle difference between two adjacent phase-shifted triangular waves is 60°.
[0042] Preferably, in some embodiments of the present application, N=4.
[0043] Furthermore, the N phase-shifted triangular waves with different phase shift angles include a first phase-shifted triangular wave with a phase shift angle of 90°, a second phase-shifted triangular wave with a phase shift angle of 180°, a third phase-shifted triangular wave with a phase shift angle of 270°, and a fourth phase-shifted triangular wave with a phase shift angle of 360°.
[0044] Specifically, when the number of phase-shifted triangular waves is too large, although the equivalent sampling frequency and signal processing accuracy can be further improved, the hardware design complexity, the difficulty and cost of the control algorithm will increase; when the number of phase-shifted triangular waves is 4, if the frequency of a single phase-shifted triangular wave is f tri , the equivalent sampling frequency can be increased to 4*f tri , which can better sample and process the input signal to avoid signal distortion. At the same time, the generated 4-channel PWM signals are symmetrical, and the switch control logic of the drive circuit can also be modularly designed, reducing the complexity of the control algorithm.
[0045] Furthermore, the driving circuit 3 in the present application is composed of multiple transistors, and the switch combination of the multiple transistors under the control of N PWM signals can enable the driving circuit 3 to output N+1 levels of amplified signals.
[0046] Optionally, the driving circuit 3 may adopt an H-bridge structure, a cascaded H-bridge structure, a multi-phase parallel H-bridge structure and a T-type structure. Considering the complexity of the control algorithm, in one embodiment of the present application, the driving circuit 3 adopts an H-bridge structure.
[0047] like Figure 2FIG. 1 is a schematic diagram of a driving circuit, a PWM signal, and an amplified signal output by the driving circuit provided in an embodiment of the present application; wherein, Figure 2 (a) is the schematic diagram of the driving circuit principle. Figure 2 (b) in the Figure 2 Schematic diagram of the amplified signal output by the driving circuit shown in (a) under the drive of the PWM signal.
[0048] Specifically, when N=4, the driving circuit 3 is an H-bridge structure composed of two half-bridges 31 , and each half-bridge 31 includes a first bridge arm and a second bridge arm.
[0049] The first bridge arm specifically includes a first transistor Q1 and a second transistor Q2.
[0050] Specifically, if Figure 2 As shown in (a), the gate of the first transistor Q1 is connected to the output end of the comparison module 2, and the drain is connected to the power supply VDD; the gate of the second transistor Q2 is connected to the output end of the comparison module 2, and the drain is connected to the source of the first transistor Q1; The second bridge arm specifically includes a third transistor Q3 and a fourth transistor Q4.
[0051] Specifically, if Figure 2 As shown in (a), the gate of the third transistor Q3 is connected to the output end of the comparison module 2, and the drain is connected to the source of the second transistor Q2 as the output end of the half bridge 31; the gate of the fourth transistor Q4 is connected to the output end of the comparison module 2, the drain is connected to the source of the third transistor Q3, and the source is grounded.
[0052] Specifically, the transistors in the two half-bridges 31 are alternately turned on and off under the control of four PWM signals to achieve switching output of the power supply VDD. The specific modulation principle includes: When the first initial PWM signal / target PWM signal is at a high level, the first transistor Q1 and the second transistor Q2 in the first half-bridge 31 are turned on, and the third transistor Q3 and the fourth transistor Q4 are turned off; When the second initial PWM signal / target PWM signal is at a high level, the first transistor Q1 and the second transistor Q2 in the first half-bridge 31 are turned off, and the third transistor Q3 and the fourth transistor Q4 are turned on; When the third initial PWM signal / target PWM signal is at a high level, the first transistor Q1 and the second transistor Q2 in the second half-bridge 31 are turned on, and the third transistor Q3 and the fourth transistor Q4 are turned off; When the fourth initial PWM signal / target PWM signal is at a high level, the first transistor Q1 and the second transistor Q2 in the second half-bridge 31 are turned off, and the third transistor Q3 and the fourth transistor Q4 are turned on.
[0053] Specifically, by performing differential processing on the output signals of the two half-bridges 31 , five levels of amplified signals can be generated by utilizing different conduction combinations of these transistors. For example, the output signal of the left half bridge is Vout1, and the output signal of the right half bridge is Vout2. When Vout1=0V and Vout2=Vdd, the level of the amplified signal output by the driving circuit 3 is -Vdd; when Vout1=VddV and Vout2=0, the level of the amplified signal output by the driving circuit 3 is Vdd; when Vout1=0V and Vout2=0 or Vout1=Vdd and Vout2=Vdd, the level of the amplified signal output by the driving circuit 3 is 0; when Vout1=0.5Vdd and Vout2=0V or Vout1=Vdd and Vout2=0.5Vdd, the level of the amplified signal output by the driving circuit 3 is 0.5Vdd; when Vout1=0V and Vout2=0.5Vdd or Vout1=0.5Vdd and Vout2=Vdd, the level of the amplified signal output by the driving circuit 3 is -0.5Vdd.
[0054] Alternatively, as Figure 2 As shown in (a) of FIG, each half-bridge 31 further includes a flying capacitor C1, one end of which is connected to the source of the first transistor Q1, and the other end is connected to the source of the third transistor Q3. Specifically, the flying capacitor C1 can assist in maintaining the voltage during the transistor switching process.
[0055] Furthermore, each half-bridge 31 further includes an EMI filter composed of an inductor L and a capacitor C2.
[0056] Specifically, the first end of the inductor L is connected to the output end of the half bridge 31; one end of the capacitor C2 is connected to the second end of the inductor L as the output end of the drive circuit 3, and the other end is grounded. Specifically, the EMI filter can suppress electromagnetic interference generated by the circuit.
[0057] like Figure 3 FIG2 is a schematic diagram showing another driving circuit principle provided in an embodiment of the present application. The driving circuit is composed of MOS transistors M1 to M8, capacitors C3 to C5, and inductors L1 to L2. L2 is connected to C4 as a first output terminal, and L3 is connected to C5 as a second output terminal. By differentially processing the output signals of the first output terminal and the second output terminal, five levels of amplified signals can be generated in combination.
[0058] Optionally, in some embodiments, the multi-level Class D power amplifier also includes feedback control, that is, the loop filter feeds back the filtered PWM amplified signal to the comparison module, the comparison module compares the error signal between the filtered PWM amplified signal and the input signal with N phase-shifted triangular waves with different phase shift angles, and outputs N adjusted PWM signals.
[0059] Based on the multi-level Class D power amplifier provided in the above embodiment, the present application also provides a PA chip, which includes the above multi-level Class D power amplifier. Specifically, when the multi-level Class D power amplifier is applied to the PA chip, its connection relationship is the same as that of the Class AB power amplifier. The input end of the multi-level Class D power amplifier is connected to the broadband carrier signal to be transmitted, and is used to amplify and transmit the broadband carrier signal to be transmitted. The output end is connected to the transmission line, antenna, or next-level signal processing module according to the specific application scenario.
[0060] An embodiment of the present application also provides a broadband carrier communication system, which includes the above-mentioned PA chip.
[0061] The following example uses N=6 to verify the sampling advantage of six phase-shifted triangle waves over a single triangle wave for high-frequency signals. The input signal frequency is 0.7-1MHz, and the frequency of a single phase-shifted triangle wave is 250kHz: If a single phase-shifted triangle wave is used to sample the input signal, since the frequency of the input signal is greater than the frequency of the phase-shifted triangle wave, its changes within a single phase-shifted triangle wave period cannot be completely sampled, resulting in a large quantization error; correspondingly, the duty cycle change frequency of the PWM signal generated based on sampling is the same as the frequency of the single phase-shifted triangle wave, so the rapid changes of the input signal cannot be tracked by the PWM signal, resulting in distortion.
[0062] If six phase-shifted triangle waves with a 60-degree phase shift are used to sample the input signal, since the six phase-shifted triangle waves are staggered by 60 degrees in time, this is equivalent to six samples within each phase-shifted triangle wave cycle. At this time, the rapid changes of the higher-frequency input signal can also be sampled more densely, thereby significantly reducing quantization error. At the same time, the duty cycle change frequency of the PWM signal is equivalent to the equivalent sampling frequency (i.e., 250kHz*6), which can effectively track the rapid changes of the high-frequency input signal and reduce distortion. In addition, the loop filter only needs to filter out the 250KHz PWM carrier signal, retaining the 0.7-1MHz input signal, which makes the loop filter design relatively flexible and easier to achieve distortion-free filtering.
[0063] like Figure 4 The figure shows a schematic diagram of a comparison module provided in an embodiment of the present application using multiple phase-shifted triangular waves to quantize an input signal into a triangular wave and then output a multi-level amplified signal; wherein, Figure 4 (a) is a schematic diagram of four phase-shifted triangle waves and input signals. Figure 4 (b) in the figure is a schematic diagram of multi-level amplification signal.
[0064] from Figure 4As can be seen from (a) in the figure, in this embodiment, there are four phase-shifted triangular wave signals with different phase shift angles. The phase shift angles of two adjacent phase-shifted triangular wave signals differ by 90°. The input signal is a differential input signal. After the input signal is quantized by the four phase-shifted triangular waves, four PWM signals with interlaced phases are output. After the four PWM signals are amplified by the driving circuit, the following is obtained: Figure 4 (b) shows an amplified signal with five levels: 0V, 6V, -6V, 12V, and -12V.
[0065] Obviously, the above embodiments are merely examples for clarity of explanation and are not intended to limit the implementation methods. Those skilled in the art will appreciate that other variations or modifications can be made based on the above description. It is not necessary and impossible to enumerate all implementation methods here. Obvious variations or modifications arising therefrom remain within the scope of protection of the present invention.
Claims
1. A multi-level class D power amplifier, characterized in that: Applied to OFDM-based broadband carrier communication systems, including: A triangle wave signal module is used to generate N phase-shifted triangle waves with different phase shift angles; wherein N is an even number and N ≥ 4; A comparison module is connected to the triangle wave signal module and is used to compare the input signal with N phase-shifted triangle waves with different phase shift angles, and output N PWM signals; The driving circuit is connected to the comparison module and is used to amplify N-channel PWM signals and output PWM amplified signals containing N+1 levels; The loop filter is connected to the driving circuit and is used to filter the PWM amplified signal to obtain a filtered PWM amplified signal.
2. The multi-level class D power amplifier according to claim 1, characterized in that: The bandwidth of the loop filter is the same frequency as the bandwidth of the phase-shifted triangle wave; N*f1>f, where f1 represents the frequency of a single phase-shifted triangle wave, and f represents the maximum frequency of the input signal.
3. The multi-level class D power amplifier according to claim 1, wherein: The phase shift angle difference between the nth phase-shifted triangle wave and the n+1th phase-shifted triangle wave is 360° / N; where n∈[1,N-1].
4. The multi-level class D power amplifier according to claim 1, characterized in that: N=4。 5. The multi-level class D power amplifier according to claim 4, characterized in that: The drive circuit is an H-bridge structure consisting of two half-bridges, each of which includes: The first bridge arm specifically includes: a first transistor, having a gate connected to the output terminal of the comparison module and a drain connected to a power supply; a second transistor, a gate of which is connected to the output terminal of the comparison module, and a drain of which is connected to the source of the first transistor; The second bridge arm specifically includes: a third transistor, whose gate is connected to the output terminal of the comparison module and whose drain is connected to the source of the second transistor as the output terminal of the half bridge; The fourth transistor has a gate connected to the output end of the comparison module, a drain connected to the source of the third transistor, and a source grounded.
6. The multi-level class D power amplifier according to claim 5, characterized in that: Each half-bridge further includes a flying capacitor, one end of which is connected to the source of the first transistor, and the other end of which is connected to the source of the third transistor.
7. The multi-level class D power amplifier according to claim 5, characterized in that: Each half-bridge also includes an EMI filter, which specifically includes: an inductor, a first end of which is connected to the output end of the half-bridge; The capacitor has one end connected to the second end of the inductor as the output end of the driving circuit, and the other end is grounded.
8. The multi-level class D power amplifier according to claim 1, wherein: The comparison module includes: N comparators are used to compare the input signal with N phase-shifted triangular waves with different phase shift angles, and output N PWM signals.
9. A PA chip, characterized in that: The PA chip comprises the multi-level class D power amplifier according to any one of claims 1 to 8.
10. A broadband carrier communication system, characterized in that: The broadband carrier communication system includes the PA chip according to claim 9.
Citation Information
Patent Citations
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