Process method for improving white points after polishing and etching and polishing equipment

Abstract

The invention discloses a technological method for improving white points after polishing and etching and polishing equipment. The technological method comprises the steps that a silicon wafer is preprocessed through a first working section, the preprocessed silicon wafer is polished through a second working section, and the polished silicon wafer is post-processed through a third working section. The first working section, the second working section and the third working section are each provided with an air draft device, the air draft pressure value of each working section can be independently adjusted, and the air draft pressure value of at least one of the first working section, the second working section and the third working section is selectively increased, so that the air draft pressure value of the working section exceeds 15% * A; a is the lower limit value of the set air draft pressure. By adjusting the air draft pressure value of each working section, the white spot proportion is reduced to 0.5% from 6.73% in the peak period, the black spot proportion is reduced to 0.3% from 1.22%, the white spot proportion is obviously reduced, and the product yield is greatly improved.

Description

Technical Field

[0001] The invention relates to the technical field of solar cells, in particular to a process method for improving white spots after polishing and etching and polishing equipment. Background Art

[0002] In recent years, with the global energy mix shifting toward cleaner, lower-carbon energy, photovoltaic power generation technology has rapidly developed. PERC (Passivated Emitter and Rear Cell) cells, with their superior conversion efficiency and mature mass production processes, have become a mainstream technology in the market. By 2023, PERC cells were expected to account for over 80% of the global photovoltaic market. Their efficiency improvements are crucial for reducing photovoltaic power generation costs and enhancing industry competitiveness.

[0003] In the PERC cell manufacturing process, alkaline polishing (NaOH / KOH solution polishing) is a key step. Its purpose is to remove the surface damage layer of the silicon wafer after texturing through chemical etching, creating a smooth surface, thereby reducing carrier recombination and improving cell efficiency. However, in actual production, the appearance of white spots after the polishing process (visible through AOI inspection) has become a major issue affecting yield. White spots increase the number of localized carrier recombination centers, reducing the cell's photoelectric conversion efficiency and, in severe cases, even rendering the cell scrapped.

[0004] Currently, industry research shows that the formation of white spots is closely related to acid and alkali residues after polishing. When alkaline or acidic substances remaining on the surface of the silicon wafer enter the subsequent annealing process, an oxidation and burning reaction will occur in a high-temperature environment, forming local defects that appear as white spots or black spots. Existing technologies usually alleviate this problem by adjusting the concentration of the polishing liquid, extending the cleaning time, or optimizing the annealing temperature, but these methods often have the disadvantages of a narrow process window, insufficient stability, or high cost. For example: while extending the cleaning time can reduce residue, it will reduce production efficiency; increasing the annealing temperature may aggravate oxidation and burning, which in turn increases the risk of white spots; adjusting the polishing liquid concentration may affect the surface roughness, resulting in a decrease in optical performance. In addition, existing research has not yet formed a systematic explanation for the formation mechanism of white spots, resulting in a lack of targeted improvement measures and a failure to fundamentally solve the residue problem in the polishing process.

[0005] Based on this, how to design a quantifiable and mass-producible process improvement plan is a technical problem that the industry urgently needs to solve. Summary of the Invention

[0006] In order to solve the problem of white spot defects on the surface of silicon wafers caused by the polishing process in the existing technology, the present invention proposes a process method for improving white spots after polishing and an etching and polishing equipment. Under this process method, the proportion of white spots is significantly reduced and the product yield is greatly improved.

[0007] The technical solution adopted by the present invention is to design a process method for improving white spots after polishing, comprising: pre-treating a silicon wafer through a first working section, polishing the pre-treated silicon wafer through a second working section, and post-treating the polished silicon wafer through a third working section;

[0008] Among them, the first working section, the second working section, and the third working section are all equipped with exhaust devices and the exhaust pressure value of each working section can be adjusted independently. The exhaust pressure value of at least one of the first working section, the second working section, and the third working section is selectively increased so that the exhaust pressure value of the working section exceeds 15%×A, where A is the set lower limit value of the exhaust pressure.

[0009] Furthermore, the contribution rate of increasing the exhaust pressure value in the third working section to the improvement of white spots is greater than that of increasing the exhaust pressure value in the second working section or increasing the exhaust pressure value in the first working section.

[0010] Furthermore, the exhaust pressure values of the first working section, the second working section and the third working section satisfy (1+35%)A<a<B, (1+50%)A<b<B, and (1+30%)A<c<B;

[0011] Among them, B is the set upper limit value of the exhaust pressure, a is the exhaust pressure value of the first working section, b is the exhaust pressure value of the second working section, and c is the exhaust pressure value of the third working section.

[0012] Furthermore, the exhaust pressure values of the first working section, the second working section and the third working section satisfy: 64%B<a≤84%B, 64%B<a≤84%B and 35%B<c<50%B.

[0013] In some feasible embodiments, when the exhaust pressure value of the first working section is 403 Pa, the exhaust pressure value of the second working section is 464 Pa, and the exhaust pressure value of the third working section is 388 Pa, the average white spot defect ratio is reduced to 0.5%; wherein, the set lower limit value of the exhaust pressure of each working section is 300 Pa, and the set upper limit value of the exhaust pressure is 1000 Pa.

[0014] In some preferred embodiments, when the exhaust pressure value of the first working section is 840 Pa, the exhaust pressure value of the second working section is 820 Pa, and the exhaust pressure value of the third working section is 480 Pa, the average white spot defect ratio is reduced to 0.01%; wherein, the set lower limit value of the exhaust pressure of each working section is 300 Pa, and the set upper limit value of the exhaust pressure is 1000 Pa.

[0015] Furthermore, the first working section includes a feeding station for loading silicon wafers into a flower basket, a pretreatment tank for pre-cleaning the silicon wafers, and a pretreatment water washing tank for washing the silicon wafers.

[0016] Furthermore, the second working section includes a polishing tank for alkali polishing of silicon wafers, a first polishing water washing tank for water washing silicon wafers, a post-washing tank for post-washing silicon wafers, and a second polishing water washing tank for water washing silicon wafers.

[0017] Furthermore, the third working section includes an acid washing tank for acid washing the silicon wafers, a post-treatment water washing tank for water washing the silicon wafers, a slow pulling tank for pre-dehydrating the silicon wafers, and a drying station for drying the silicon wafers.

[0018] The present invention also provides an etching and polishing device, comprising: a first working section, a second working section and a third working section distributed in sequence. The etching and polishing device adopts the above-mentioned process method to process silicon wafers.

[0019] Compared with the existing technology, this invention conducts in-depth analysis and improvement research on the white spot anomaly generated during the polishing process of PERC cells. Through investigation and analysis, it is determined that the degradation of white spots is caused by acid and alkali residues in the polishing process, which leads to oxidation and burning in the annealing process. The mechanism of white spot generation is analyzed, and an effective improvement measure is verified. Adjusting the exhaust pressure value of each working section reduces the white spot ratio from a peak of 6.73% to 0.5%, and the black spot ratio from 1.22% to 0.3%. The white spot ratio is significantly reduced, and the product yield rate is greatly improved. The technical solution of this invention provides an effective process improvement path for PERC solar cell production and has important engineering application value for improving the yield rate of photovoltaic cell manufacturing. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The present invention is described in detail below with reference to the embodiments and accompanying drawings, in which:

[0021] Figure 1a This is the normal appearance of a PERC solar cell after polishing;

[0022] Figure 1b This is the irregular appearance of a PERC solar cell after polishing;

[0023] Figure 1c This is the appearance of dense white spots after polishing of PERC solar cells;

[0024] Figure 2a This is the appearance of the white spot area 1 under a microscope;

[0025] Figure 2b This is the appearance of the white spot area 2 under a microscope;

[0026] Figure 3a This is the SEM image after alkali polishing of Experiment 1;

[0027] Figure 3b This is the SEM image of Experiment 2 after alkali polishing;

[0028] Figures 4a to 4d This is the electrical performance box plot of Experiment 3;

[0029] Figure 5 This is a white spot ratio trend diagram after implementing the process method of the present invention;

[0030] Figure 6 It is the degradation ratio of black spots and dirt after the process of the present invention is implemented. DETAILED DESCRIPTION

[0031] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0032] The analysis of white spot anomalies needs to be conducted from both macro and micro perspectives. First, the actual battery cells with white spots picked out by the on-site back film AOI camera are observed.

[0033] The process proposed in this invention is suitable for silicon wafer polishing, particularly alkaline polishing. In actual production, white spots (visible by AOI inspection) appearing after the polishing process are a major issue affecting yield. These spots increase the number of localized carrier recombination centers, reducing the photovoltaic conversion efficiency of the cell and, in severe cases, even rendering the cell scrapped.

[0034] Based on this, the inventors conducted in-depth analysis and improvement research on the white spot abnormality. The analysis of the white spot abnormality needs to be analyzed from both macro and micro perspectives. First, the actual white spot battery cells selected from the back film AOI camera are observed. Figures 1a to 1c It can be seen that there are two types of white spots, one of which is irregular (see Figure 1b ); one is dense white spots (see Figure 1c ), the overall halo shape. From the position of the white spots, they are mainly present at the edge of the cell, and are more concentrated at the bottom of the graphite boat. At the same time, they are also located at the bottom of the quartz boat during annealing and at the bottom of the flower basket during polishing.

[0035] To further explore, the white spot area was analyzed by microscope pictures, e.g. Figures 2a to 2b From the microscope picture, we can see a kind of black spot which is burnt type (see Figure 2a ), one is attached to the battery cell (see Figure 2b ).from Figures 2a to 2bAnalysis revealed that the white spots were caused by contaminants adhering to the silicon wafer, which, exposed to high temperatures, created burnt spots, resulting in the abnormal appearance. Initial suspicion was that the white spots were caused by acid and alkali residue from the alkaline polishing process, which oxidized at high temperatures during the annealing process.

[0036] In order to verify the influencing factors of white spots and explore the generation mechanism of white spots, three groups of experiments are provided below based on the conventional alkali polishing process and the subsequent annealing process. The experiments are Experiment 1, Experiment 2 and Experiment 3. All three groups of experiments have experimental and control groups.

[0037] The steps of the conventional alkali polishing process are as follows:

[0038] Step 1: Place the silicon wafer into a basket and place it in an etching and polishing machine for pretreatment. Specifically, use 1.5L of potassium hydroxide, 15L of hydrogen peroxide, 465L of pure water, and a 20% hot water ratio at 40°C for 120 seconds to remove organic residues on the surface.

[0039] Step 2: Wash the silicon wafer with water, specifically using overflow water to wash the mixed liquid brought from the pretreatment tank for 100 seconds;

[0040] Step 3: Alkali polishing the silicon wafer, specifically using 20L potassium hydroxide and 2.5L alkaline polishing additive, in 457L pure water, 70% hot water ratio, at 64°C for 210s, for backside polishing;

[0041] Step 4: Wash the silicon wafer with water, specifically using overflow water to clean the mixed liquid brought from the polishing tank, for 90 seconds;

[0042] Step 5: Post-clean the silicon wafer using 4 L of potassium hydroxide, 20 L of hydrogen peroxide, 475 L of pure water, and a 60% hot water ratio at 65°C for 120 seconds to remove organic residues on the surface.

[0043] Step 6: Wash the silicon wafer with water, specifically using overflow water to clean the mixed liquid brought from the polishing tank for 90 seconds;

[0044] Step 7: Acid wash the silicon wafer using 20 L of hydrofluoric acid and 475 L of pure water for 100 seconds to remove borosilicate glass and metal ions on the surface of the silicon wafer.

[0045] Step 8: Wash the silicon wafer with water, specifically using overflow water to remove organic residues on the surface, for 100 seconds;

[0046] Step 9: Pre-dehydrate the silicon wafer, specifically using a slow extraction method to pre-dehydrate the silicon wafer for 10 seconds;

[0047] Step 10: Dry the silicon wafer. Specifically, use high temperature to thoroughly dry the silicon wafer. The temperature is set to 95°C.

[0048] The alkali polishing process was verified, and a control group was set up with a conventional alkali polishing process flow plus a conventional annealing process flow. In Experiment 1, the reaction time in step 5 was adjusted from the original 120s to 200s. In Experiment 2, in step 7, the 20L hydrofluoric acid was changed to 30L, and statistical verification of the white spot ratio was performed.

[0049] The steps of the conventional annealing process are as follows:

[0050] Step S1: Nitrogen is passed into the boat. The silicon wafer that has undergone the backside polishing process is loaded into the quartz boat and placed on the silicon carbide slurry. The boat temperature is maintained at 680°C and the boat is fed into the furnace tube at a speed of 100 mm / s. The positive pressure state is 1060 Pa and the nitrogen flow rate is 10000 sccm. The boat is fed for 560 seconds.

[0051] Step S2: Pumping down the pressure and heating. Specifically, the boat is kept at a set temperature of 700°C, in a negative pressure environment of 500 Pa, and the heating time is 150s.

[0052] Step S3: constant temperature purging, specifically, the purging state is constant at 700°C, 500 Pa, and a nitrogen flow rate of 1000 sccm, and the constant purging time is 30 seconds;

[0053] Step S4: Leak detection, with a constant temperature of 700°C, a pressure of 1060 Pa, and a time of 60 seconds;

[0054] Step S5: vacuum oxidation, specifically, at a constant temperature of 700° C., a nitrogen flow rate of 5000 sccm, an oxygen flow rate of 1000 sccm, and a pressure of 500 Pa, to stabilize the pressure in the quartz boat at 500 Pa for 180 seconds;

[0055] Step S6: constant temperature oxidation, specifically, oxidizing the silicon wafer at a constant temperature of 700° C., with a nitrogen flow rate of 1000 sccm, an oxygen flow rate of 6000, and a pressure of 500 Pa for 600 seconds;

[0056] Step S7: cooling and oxidizing, specifically, setting the temperature to 680°C, oxidizing the silicon wafer at a nitrogen flow rate of 1000 sccm, an oxygen flow rate of 6000, and a pressure of 500 Pa for 380 seconds;

[0057] Step S8: cooling and oxidizing, specifically, setting the temperature to 650°C, oxidizing the silicon wafer at a nitrogen flow rate of 1000 sccm, an oxygen flow rate of 6000, and a pressure of 500 Pa for 300 seconds;

[0058] Step S9: Cool down and return the pressure. Set the target state to 600°C and 1060 Pa. Supplement nitrogen at a nitrogen flow rate of 10,000 sccm and simultaneously pass 6,000 sccm of oxygen to lower the temperature in the quartz boat and raise the pressure to 1060 Pa. The process takes 270 seconds.

[0059] Step S10: Nitrogen is passed through the boat to ensure positive pressure inside the tube. The quartz boat containing the treated silicon wafers is placed on the silicon carbide slurry. The temperature of the boat is maintained at 650°C and the boat is fed out of the furnace tube at a speed of 100 mm / s. Nitrogen is passed through the boat at a rate of 1000 sccm to ensure positive pressure inside the tube. The boat exit time is 560 seconds.

[0060] The annealing process was verified. A control group was set to a conventional alkali polishing process plus a conventional annealing process. Experiment 3 was to set the temperature of step S6 at 700°C and then cool it down by 680°C to perform statistical verification of the white spot ratio.

[0061] During the experiment, after the polishing process, the control group and the experimental group of Experiment 1 were randomly selected and observed by SEM (scanning electron microscope). Figures 3a to 3b There is no obvious difference between the two sets of SEM images (scanning electron microscope images) shown.

[0062] The tracking results of Experiment 1 are shown in Table 1. The control group was the conventional alkaline polishing process flow plus the conventional annealing process flow described above. In Experiment 1, the reaction time in step 8 was adjusted from the original 120s to 200s. With other conditions unchanged, the defective white spot ratio was as high as 30%. This shows that without changing the concentration of the post-cleaning tank, the white spot ratio worsens and increases as the silicon wafer stays in the tank.

[0063] Experimental groups Collecting silicon wafers Number of white spots Defective rate control group 448 14 3.28％ Experiment 1 448 134 30％

[0064] Table 1. Tracking results of Experiment 1

[0065] The tracking results of Experiment 2 are shown in Table 2. The control group used the conventional alkaline polishing process followed by the conventional annealing process described above. In Experiment 2, in step 11, the volume of hydrofluoric acid was changed from 20L to 30L. The white spot rate rose to almost 86%, directly demonstrating that residual acid is the primary cause of white spots. To address this white spot issue, it is important to ensure that the pH of the cell is within acceptable limits and that the cell is thoroughly rinsed before entering the slow pull tank. The elevated temperature of the silicon wafer during the slow pull tank and drying tank oxidizes residual acid, causing white spots.

[0066] Experimental groups Collecting silicon wafers Number of white spots Defective rate control group 460 15 3.26％ Experiment 2 460 395 86％

[0067] Table 2. Tracking results of Experiment 2

[0068] The tracking results of Experiment 3 are shown in Table 3 and Figure 4. The control group used the conventional alkaline polishing process flow plus the conventional annealing process flow described above. In Experiment 3, the temperature in step S6 was set at 700°C and then cooled by 680°C. White spots disappeared, indicating a significant improvement. This demonstrates that the oxidation rate of acid and alkali residues at high temperatures increases, resulting in white spots. Lowering the annealing temperature is equivalent to lowering the oxidation conditions, thereby reducing the proportion of white spots. However, based on the tracking electrical performance data, when the annealing temperature was lowered, the efficiency data was repeatedly verified to be lower than that of the control group, mainly reflected in a 0.0001-0.0009 reduction in the opening voltage and a 0.06-0.17% reduction in the fill FF factor. Therefore, lowering the annealing temperature significantly reduces efficiency. The annealing temperature is primarily intended to reshape the lattice and reduce defects. If the temperature is not reached, these advantages are lost. Therefore, it is not suitable as a method for improving white spot defects.

[0069] Experimental groups Collecting silicon wafers Number of white spots Defective rate control group 696 28 3.85％ Experiment 3 696 0 0％

[0070] Table 3. Tracking results of Experiment 3

[0071]

[0072] Electrical performance data of Experiment 3

[0073] The parameters of electrical performance data are defined as follows:

[0074] Eta is the energy conversion efficiency, which refers to the efficiency of solar cells in converting incident light energy into electrical energy, that is, the ratio of output electrical power to incident light power;

[0075] Uoc is the open circuit voltage, which refers to the output voltage of the solar cell under no-load (open circuit) conditions;

[0076] Isc is the short-circuit current, which refers to the output current of the battery when it is in a short-circuit state (output voltage = 0);

[0077] FF is the fill factor, which refers to the ratio of the actual maximum output power (Pmax) to the theoretical maximum power (Uoc×Isc), reflecting the "quality" of the battery;

[0078] Rsh is the parallel resistance, which refers to the resistance in parallel with the PN junction in the equivalent circuit, reflecting the impedance of the leakage current path;

[0079] Rs is the series resistance, which refers to the total impedance of the battery's internal materials, electrode contacts, etc.

[0080] IRev2 is the reverse saturation current, which refers to the leakage current of the PN junction under reverse bias and reflects the carrier recombination loss.

[0081] The three experiments show that white spots are caused by the combined effects of contaminants (i.e., acid and alkali residues) and high-temperature oxidation, which can affect the thickness of the anti-reflective coating. The root cause is the presence of acid and alkali residues on the silicon wafers before they enter the slow pull and drying tanks.

[0082] Experiments have confirmed that white spots are caused by acid and alkali residues in the polishing process of silicon wafers, as well as burnt spots formed under high-temperature oxidation conditions.

[0083] Based on the above experimental analysis results, the inventors further explored that in the polishing process, different steps are carried out in corresponding working sections, and steps one to two are carried out in the first working section. The first working section is the feeding section, that is, the entrance of the etching and polishing equipment and the silicon wafer loading area. Specifically, the first working section includes a feeding station for loading silicon wafers into a flower basket, a pretreatment tank for pre-cleaning silicon wafers, and a pretreatment water washing tank for washing silicon wafers.

[0084] Steps 3 to 6 are performed in the second working section. The second working section is the main etching reaction section, that is, the core reaction area where the alkaline solution and the silicon wafer undergo chemical etching. Specifically, the second working section includes a polishing tank for alkali polishing of the silicon wafer, a first polishing water washing tank for washing the silicon wafer, a post-cleaning tank for post-cleaning the silicon wafer, and a second polishing water washing tank for washing the silicon wafer.

[0085] Steps 7 to 10 are performed in the third working section, which is the post-processing section, that is, the cleaning, drying or discharge area of the silicon wafer after etching. Specifically, the third working section includes an acid pickling tank for pickling the silicon wafer, a post-processing water washing tank for washing the silicon wafer, a slow pulling tank for pre-dehydrating the silicon wafer, and a drying station for drying the silicon wafer.

[0086] The first working section, the second working section, and the third working section are all equipped with exhaust devices to discharge the alkaline solution vapor and acid waste gas remaining in the flushing process.

[0087] After investigation, it was found that the exhaust pressure values of different working sections were all biased towards the critical lower limit value. Generally speaking, the lower limit value of the exhaust pressure is set to A, the upper limit value of the exhaust pressure is set to B, the exhaust pressure value of the first working section is a, the exhaust pressure value of the second working section is b, and the exhaust pressure value of the third working section is c. Under normal circumstances, c<b<a. When (1-15%)A<a<(1+15%)A, (1-15%)A<b<(1+15%)A, (1-15%)A<c<(1+15%)A, that is, when the exhaust pressure values of the three sections deviate by 15% above and below the A value (that is, the exhaust pressure values are close to the lower limit value), white spots in the alkali throwing trough are prone to break out.

[0088] It can be seen that too low an exhaust pressure can cause white spots, and increasing the exhaust pressure helps exhaust gas out of the machine. By adjusting the etching and polishing equipment's own blower and air valve, or the peripheral blower connected to the etching and polishing equipment, the exhaust pressure value of each working section can be independently adjusted. On this basis, the exhaust pressure value of at least one of the first working section, the second working section, and the third working section can be selectively increased so that the exhaust pressure value of each working section exceeds 15% × A. This can improve the white spot situation and reduce the defect rate.

[0089] Due to the functional and temperature differences between the various working sections, increasing the exhaust pressure in different working sections has different benefits on improving white spots. During actual on-site operations, the three-section exhaust pressure within the etching and polishing equipment is required to gradually decrease from the first to the third working section, so that the waste gas is concentrated in the first working section and prevented from accumulating in the third working section. This is because the third section houses the slow pull-out tank and drying tank, which has a higher temperature and a higher probability of silicon wafer defects in the third section. Therefore, increasing the exhaust pressure in the third working section has the highest contribution to improving white spots, enabling waste to be quickly extracted from the third working section. This means that increasing the exhaust pressure in the third working section has the most significant improvement effect, while increasing the exhaust pressure in the second working section or the first working section has a less significant improvement effect.

[0090] As the research progresses, the debugging experimental data is used to illustrate that the lower limit of the exhaust pressure in each working section is set to 300Pa, and the upper limit of the exhaust pressure is set to 1000Pa. The tracking results of the wind pressure value and the white spot ratio change trend of the working section are shown in Table 4:

[0091] Experimental groups a(pa) b(pa) c(pa) white point ratio Example 1 285 304 275 6.73％ Example 2 305 315 289 4.64％ Example 3 330 340 310 3.85％ Example 4 358 416 327 2.78％ Example 5 372 433 355 1.58％ Example 6 403 464 388 0.50％ Example 7 536 517 402 0.41％ Example 8 632 613 428 0.33％ Example 9 734 711 447 0.25％ Example 10 840 820 480 0.01％

[0092] Table 4. Tracking results of wind pressure values and white spot ratios in three working sections

[0093] As can be seen from the above table, as the exhaust pressure values of the three working sections gradually increase, the white spot ratio shows a downward trend. Taking Example 6 as the dividing line, when the three working sections simultaneously meet (1+35%)A<a<B, (1+50%)A<b<B, and (1+30%)A<c<B, the white spot ratio can be significantly reduced to below 0.5%. Taking Example 8 as the dividing line, in order to reduce the white spot defect to a sufficiently low proportion (such as below 0.33%), it is necessary to control the exhaust pressure of the three working sections as much as possible, specifically, the exhaust pressure values of the first working section, the second working section and the third working section meet the following requirements: 64%B<a≤84%B, 64%B<b≤84%B and 35%B<c<50%B.

[0094] Specifically, without implementing the improvement measures, see Examples 1 to 3. In Example 3, each operating section reached above the set lower limit of exhaust pressure: the exhaust pressure value in the first operating section was 330 Pa, the exhaust pressure value in the second operating section was 340 Pa, and the exhaust pressure value in the third operating section was 310 Pa. After implementing the improvement measures, see Examples 4 to 10, the white spot ratio gradually decreased.

[0095] Adjust the exhaust pressure values of the three working sections, increase the exhaust pressure value of the first working section to 403Pa (increase 73Pa), the exhaust pressure value of the second working section to 464Pa (increase 124Pa), and the exhaust pressure value of the third working section to 388Pa (increase 78Pa). After implementing the improvement measures for a period of time, first count the white spot rework ratio of the back film AOI, and the statistical data is as follows: Figure 5 As shown in the figure, it can be seen from the collected data that the back film AOI white spot NG ratio has dropped to 0.5% (Case 6), and the rework rate of the production line has been effectively improved.

[0096] Continue to adjust the exhaust pressure values of the three working sections, so that the exhaust pressure value of the first working section reaches about 840Pa, the exhaust pressure value of the second working section reaches about 820Pa, and the exhaust pressure value of the third working section reaches about 480Pa. The white spots are completely improved, that is, dropped to 0.01% (Example 10).

[0097] In addition, the yield data of the finished screen battery was collected simultaneously. It was found that as the rework rate of white spots decreased, the degradation rate of black spots and dirt in the yield rate also gradually decreased. It dropped from 1.22% of black spots and 1% of dirt at the peak of white spots to 0.35% of black spots and 0.33% of dirt. Figure 6 shown.

[0098] From the statistical data of the above-mentioned multiple implementation results, it can be seen that solving the white spot anomaly in the polishing process has played an important role in improving the rework rate of the production line and the yield rate of finished batteries.

[0099] This paper conducts in-depth analysis and improvement research on the white spot anomaly generated during the polishing process of PERC cells. Through investigation and analysis, it is determined that the degradation of white spots is caused by acid and alkali residues in the polishing process, which leads to oxidation and burning during the annealing process. The mechanism of white spot generation is analyzed, and an effective improvement measure is verified. Adjusting the exhaust pressure value of each working section reduces the white spot ratio from a peak of 6.73% to 0.5%, and the black spot ratio from 1.22% to 0.3%. The white spot ratio is significantly reduced, and the product yield is greatly improved. The technical solution of this invention provides an effective process improvement approach for PERC solar cell production and has important engineering application value for improving the yield of photovoltaic cell manufacturing.

[0100] It should be noted that the terms used above are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present invention. When the terms "comprise" and / or "include" are used in this specification, they indicate the presence of features, steps, operations, devices, components and / or combinations thereof. The order of execution of actions, steps, etc. in the devices and methods shown in the specification and the drawings can be implemented in any order as long as there is no special explicit limitation on the order and as long as the output of the previous processing is not used in the subsequent processing. Similar sequential terms used for the convenience of description do not mean that they must be implemented in such an order.

[0101] Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, such techniques, methods, and apparatus should be considered part of the specification. In all examples shown and discussed herein, any specific values should be interpreted as merely exemplary and not limiting. Therefore, other examples of the exemplary embodiments may have different values. It should be noted that similar reference numerals and letters represent similar items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0102] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A process for improving white spots after polishing, characterized in that: include: Pre-processing the silicon wafer through the first working section, polishing the pre-processed silicon wafer through the second working section, and post-processing the polished silicon wafer through the third working section; The first working section, the second working section, and the third working section are all equipped with exhaust devices, and the exhaust pressure value of each working section can be adjusted independently. The exhaust pressure value of at least one of the first working section, the second working section, and the third working section is selectively increased so that the exhaust pressure value of the working section exceeds 15%×A, where A is the set lower limit value of the exhaust pressure.

2. The process according to claim 1, characterized in that: The contribution rate of increasing the exhaust pressure value of the third working section to the improvement of white spots is greater than that of increasing the exhaust pressure value of the second working section or increasing the exhaust pressure value of the first working section.

3. The process according to claim 2, characterized in that: The exhaust pressure values of the first working section, the second working section and the third working section meet (1+35%)A<a<B, (1+50%)A<b<B, and (1+30%)A<c<B; Among them, B is the set upper limit value of the exhaust pressure, a is the exhaust pressure value of the first working section, b is the exhaust pressure value of the second working section, and c is the exhaust pressure value of the third working section.

4. The process according to claim 3, characterized in that: The exhaust pressure values of the first working section, the second working section and the third working section meet the following requirements: 64%B<a≤84%B, 64%B<b≤84%B and 35%B<c<50%B.

5. The process according to claim 1, characterized in that: When the exhaust pressure value of the first working section is 403 Pa, the exhaust pressure value of the second working section is 464 Pa, and the exhaust pressure value of the third working section is 388 Pa, the average white spot defect ratio is reduced to 0.5%; Among them, the set lower limit of the exhaust pressure of each working section is 300Pa, and the set upper limit of the exhaust pressure is 1000Pa.

6. The process according to claim 1, characterized in that: When the exhaust pressure value of the first working section is 840 Pa, the exhaust pressure value of the second working section is 820 Pa, and the exhaust pressure value of the third working section is 480 Pa, the average white spot defect ratio is reduced to 0.01%; Among them, the set lower limit of the exhaust pressure of each working section is 300Pa, and the set upper limit of the exhaust pressure is 1000Pa.

7. The process according to any one of claims 1 to 6, characterized in that: The first working section comprises a feeding station for loading silicon wafers into a flower basket, a pretreatment tank for pre-cleaning the silicon wafers, and a pretreatment water washing tank for washing the silicon wafers.

8. The process according to any one of claims 1 to 6, characterized in that: The second working section includes a polishing tank for alkali polishing of silicon wafers, a first polishing water washing tank for water washing silicon wafers, a post-washing tank for post-washing silicon wafers, and a second polishing water washing tank for water washing silicon wafers.

9. The process according to any one of claims 1 to 6, characterized in that: The third working section includes an acid washing tank for acid washing the silicon wafers, a post-treatment water washing tank for water washing the silicon wafers, a slow pulling tank for pre-dehydrating the silicon wafers, and a drying station for drying the silicon wafers.

10. Etching and polishing equipment, including: The first working section, the second working section and the third working section are distributed in sequence, and are characterized in that the etching and polishing equipment uses the process method described in any one of claims 1 to 9 to process silicon wafers.

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