Stacked gate-all-around nanosheet feedback field effect transistor with tree-shaped channel
By introducing inter-germanium silicon bridge channel and biaxial strain structure into the feedback field effect transistor, the problem of insufficient open-state current of FBFET is solved, and higher on-current and lower power consumption characteristics are achieved, suitable for logic and storage fields.
Patent Information
- Application Number
- CN202510707194.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-29
- Publication Date
- 2025-08-22
AI Technical Summary
The existing feedback field effect transistor (FBFET) has a small open-state current, which limits its application in circuits, and traditional MOSFETs face the problem of increasing off-state leakage current when reducing power consumption.
A stacked ring-gate nanosheet feedback field effect transistor (Tree-FBFET) using tree-type channels provides an additional conduction area by introducing inter-germanium-silicon bridge channels, and generates biaxial strain with the silicon nanosheets, increasing carrier mobility and density, and forming a p+-n-p-n+ structure to increase the open-state current.
Without increasing the device footprint, the open-state current is significantly increased, the sub-threshold swing and threshold voltage are reduced, and the storage window is provided for a larger storage window for low-power logic and storage applications.
Smart Images
Figure CN120529607A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of semiconductor devices, and in particular relates to a tree-shaped channel stacked ring-gate nanosheet feedback field-effect transistor. Background Art
[0002] Over the past few decades, the semiconductor industry has made tremendous progress due to technological innovation. Metal-oxide-semiconductor field-effect transistors (MOSFETs) have achieved higher integration density and performance through continuous miniaturization. However, as the physical size of transistors continues to shrink, power consumption has become the most prominent challenge. The main way to reduce power consumption is to reduce the power supply voltage V. DD And reduce the subthreshold swing SS, while keeping the on-current unchanged while reducing the power supply voltage V DD , which causes the off-state leakage current to increase exponentially. Therefore, reducing power consumption by reducing the supply voltage is difficult to implement. Therefore, reducing the subthreshold swing of the device during operation has become the first solution to reduce power consumption. Since the theoretical limit of the subthreshold swing (SS) of traditional MOSFETs at room temperature is 60 mV / dec, logic switching devices based on novel physical mechanisms are worth exploring.
[0003] In recent years, a variety of new steep switching devices have been proposed to break through the Boltzmann limit of MOSFETs (60 mV / dec). Since the feedback field-effect transistor (FBFET) was first proposed and verified by Padilla et al. in 2008, its excellent characteristics have attracted widespread attention (Reference: Padilla A, Yeung CW, Shin C, et al, Feedback FET: Anovel transistor exhibiting steep switching behavior at low bias voltages. IEEE International Electron Devices Meeting, 2008: pp. 1-4). FBFETs regulate the channel barrier through a positive feedback mechanism, achieving extremely steep current switching (SS as low as ~0 mV / dec at room temperature), high on-off current ratios (~10¹ 0 ), low operating voltage, and a large memory window. Thanks to these characteristics, FBFETs have shown great potential in fields such as logic, memory, neuromorphic computing, and biosensing.
[0004] However, similar to other steep switching devices such as tunneling field-effect transistors (TFETs), although the off-current (I off ) is extremely low, and its on-state current (I on) is still slightly lower than traditional devices, limiting their application in circuits. Vertically stacked gate-all-around FBFETs have been shown to have higher gate control capabilities and better steep switching characteristics than traditional fin-type FBFETs (Reference: Lee C, Shin C, Study on various device structures for steep-switching silicon-on-insulator feedback field-effect transistors. IEEE Transactions on Electron Devices, 2020, 67(4): pp.1852-1858). The tree-type channel structure can significantly improve the on-state characteristics of vertically stacked nanosheet devices without increasing the occupied area. In recent years, it has been widely used in various advanced devices, such as tree-type reconfigurable field-effect transistors (Tree-RFETs) and junctionless tree-type channel field-effect transistors (Tree-JLFETs) (Reference: Andavarapu R, Bagati S, Valasa S, A proposal for optimization of spacer engineering at Sub-5-nm technology node for JL-TreeFET: a device to circuit level implementation. IEEE Transactions on Electron Devices, 2023, 71(1): pp.453-460.). Summary of the Invention
[0005] This invention addresses the low on-state current of conventional feedback field-effect transistors. By introducing a Germanium-Si bridge channel, the stacked gate-all-around nanosheet feedback field-effect transistor (Tree-FBFET) provides additional conduction area without increasing the device footprint. This technology also generates biaxial strain with the silicon nanosheet, thereby increasing carrier mobility and density. This significantly increases the on-state current while minimizing the off-state current variation. Furthermore, the Tree-FBFET exhibits a lower threshold voltage, subthreshold swing, and a larger memory window, making it beneficial for low-power storage applications.
[0006] To achieve the above object, the present invention adopts the following technical solutions: A tree-channel stacked gate-all-around nanosheet feedback field-effect transistor is characterized by comprising: A tree-shaped channel consisting of a silicon nanosheet channel and a germanium-silicon fin-type bridge channel; A drain metal electrode provided at one end of the tree-shaped channel; A source metal electrode provided at the other end of the tree-shaped channel; A gate oxide wrapped around the outside of the tree-shaped channel formed by the silicon nanosheet channel and the germanium silicon fin bridge channel and in contact with the metal gate, the drain electrical isolation sidewall and the source electrical isolation sidewall; A metal gate wrapped with gate oxide on all four sides; A source electrical isolation sidewall located on the right side of the source metal electrode and the left side of the metal gate, wrapping the silicon nanosheet channel and the germanium silicon fin bridge channel to form a tree-shaped channel; A drain electrical isolation sidewall is provided on the left side of the drain metal electrode and the right side of the metal gate, wrapping the tree-shaped channel formed by the silicon nanosheet channel and the germanium silicon fin bridge channel; A silicon-on-insulator substrate provided at the bottom; The tree-shaped channel is a stack of silicon nanosheets and germanium silicon fin-type bridge channels; The silicon nanosheet channel contains four independent doping regions, forming p + -npn + structure,; The Germanium-SiFin bridge channel includes four independent doping regions, forming a p + -npn + structure,; The doping concentrations of the silicon nanosheet channel and the germanium silicon fin bridge channel are consistent; The proportion of germanium in the germanium silicon of the germanium silicon fin bridge channel is 10% to 50%; The metal electrodes at the drain and source ends are one or a combination of aluminum, copper, titanium or titanium nitride; The gate oxide is silicon dioxide or hafnium dioxide; The metal gate is one or a combination of aluminum, copper, titanium, polysilicon or titanium nitride; The electrical isolation sidewall is made of silicon dioxide, silicon nitride, silicon oxynitride, hafnium dioxide, phosphosilicate glass or borophosphosilicate glass; The lengths of the silicon nanosheet channel and the germanium silicon fin bridge channel are equal; the heights of the drain electrical isolation sidewall, the source electrical isolation sidewall, and the metal gate are equal.
[0007] The tree-shaped channel stacked gate-all-around nanosheet feedback field-effect transistor proposed in the present invention has the following advantages over conventional stacked gate-all-around nanosheet feedback field-effect transistors: Without increasing the device footprint, the introduction of the Germanium-Si bridge channel can provide additional channel conduction area, thereby increasing the on-current, while at the same time providing very little additional process cost. The channel between the germanium-silicon bridge and the silicon nanosheet channel generates biaxial strain, which enhances the carrier density and mobility in the channel and further improves the on-state current; The biaxial strain-induced bandgap decreases, which enhances the carrier injection process and accelerates the opening of the channel. The device has a smaller subthreshold swing and a lower threshold voltage. Due to the larger on-state current, more carriers accumulate in the potential well in the on-state, thus having a larger storage window; In circuit design, the optimized drive current has a stronger load driving capability. When the device is used in the logic field, it can reduce the logic response time, and when used as a capacitor-free dynamic random access memory (1T-DRAM), it can improve the sensing margin. The lower threshold voltage and subthreshold swing make it better suitable for low-power applications; and the larger storage window is conducive to applications in the storage field. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figure 1 It is a schematic diagram of the three-dimensional structure of the present invention; Figure 2 for Figure 1 Cross-section at A-A'-A''; Figure 3 The picture above is Figure 1 The cross-sectional view at B-B'-B'' in the middle, and the figure below is a schematic diagram of the doping area distribution; Figure 4 for Figure 1 Cross-section diagram at C-C'-C''; Figure 5 Comparison of carrier mobility distribution along the X direction between NS-FBFET and the present invention; Figure 6 The transfer characteristic curves of the present invention characterizing the N-type and NS-FBFET are shown; Figure 7 The transfer characteristic curves of the present invention characterizing the P-type and NS-FBFET are shown; Figure 8 A transient simulation diagram of an inverter formed by the present invention and an inverter formed by an NS-FBFET; Figure 9 The storage timing operation diagram of a DRAM cell composed of the present invention and NS-FBFET respectively; Figure 10 It is a preparation flow chart of the present invention. DETAILED DESCRIPTION
[0009] The present invention is described in detail below with reference to the accompanying drawings and embodiments.
[0010] See Figure 1-4The present invention proposes a tree-channel stacked gate-all-around nanosheet feedback field-effect transistor (Tree-FBFET), whose channel consists of vertically stacked silicon nanosheets and a germanium-silicon fin-type bridge channel between the nanosheets. Figure 1 This is a schematic diagram of the three-dimensional structure of the present invention, in which the metal gate electrode is made transparent to facilitate viewing of the internal structure of the device.
[0011] The tree-shaped channel stacked ring-gate nanosheet feedback field-effect transistor includes a tree-shaped channel composed of a silicon nanosheet channel 1 and a germanium-silicon fin-type bridge channel 2; a source metal electrode 4 arranged at the left end of the tree-shaped channel and a drain metal electrode 3 arranged at the right end of the tree-shaped channel; a gate oxide 5 wrapped on all four sides around the outside of the tree-shaped channel composed of the silicon nanosheet and the germanium-silicon fin-type bridge channel and in contact with the drain electrical isolation sidewall and the source electrical isolation sidewall; a metal gate 6 wrapped on all four sides with the gate oxide; a source electrical isolation sidewall 7 arranged on the right side of the source metal electrode and on the left side of the metal gate; a drain electrical isolation sidewall 8 arranged on the left side of the drain metal electrode and on the right side of the metal gate; and a silicon-on-insulator substrate composed of a silicon base 9 and a buried oxide layer 10 arranged at the bottom of the above structure.
[0012] The silicon nanosheet 1 and the germanium silicon fin bridge channel 2 each include four doped regions, namely, heavily doped p-type silicon nanosheets 1 and silicon germanium fin bridge channel 2, which are in contact with the drain metal electrode 3. + Type region, heavily doped n + Type region, and p + The lightly doped n-type region adjacent to the n + The adjacent lightly doped p-type region forms a p + -npn + structure,; The proportion of germanium in the germanium silicon of the germanium silicon fin bridge channel is 10% to 50%; The drain metal electrode 3 and the source metal electrode 4 are made of one or a combination of aluminum, copper, titanium or titanium nitride; The gate oxide 5 is silicon dioxide or hafnium dioxide; The metal gate 6 is one or a combination of aluminum, copper, titanium, polysilicon or titanium nitride; The drain electrical isolation sidewall 7 and the source electrical isolation sidewall 8 are made of silicon dioxide, silicon nitride, silicon oxynitride, hafnium dioxide, phosphosilicate glass or borophosphosilicate glass; Feedback field-effect transistors (FBFETs) are a candidate for the next generation of new steep-switching devices. They achieve steep switching characteristics by manipulating carrier accumulation in the potential well through gate-induced positive feedback, which rapidly collapses the energy band. Compared to other steep-switching devices, FBFETs maintain a simple structure while also exhibiting low subthreshold swing, low operating voltage, and inherent bistability. However, similar to other traditional steep-switching devices, FBFETs still have lower on-state currents than conventional MOSFETs, limiting their practical applications. The proposed tree-channel stacked gate-all-around nanosheet feedback field-effect transistor (Tree-FFBET) employs a tree-shaped channel structure with a germanium-silicon fin-shaped inter-bridge channel inserted between stacked silicon nanosheets. The additional conduction area provided by the germanium-silicon fin inter-bridge channel, combined with the biaxial strain between the silicon nanosheets and the germanium-silicon fin inter-bridge channel, significantly improves the on-state current. The biaxial strain-induced reduction in the bandgap enhances carrier injection and accelerates channel opening. Consequently, the subthreshold swing and threshold voltage of the tree-channel stacked gate-all-around nanosheet feedback field-effect transistor are reduced, facilitating its application in low-power applications. Furthermore, thanks to the higher on-state current during device conduction, more carriers accumulate in the potential well, resulting in a larger memory window, facilitating its application in storage applications.
[0013] Figure 5 It shows the mobility distribution of electrons and holes along the channel direction of the present invention and the ordinary stacked ring gate feedback field effect transistor. The on-state current of the device depends on the speed, density and conduction area of the carriers, and the mobility reflects the average drift velocity of the carriers under the unit electric field strength. Therefore, the mobility distribution of the carriers along the channel direction is an important performance indicator that determines the magnitude of the on-state current of the device. As can be seen from the figure, the mobility of electrons and holes along the channel direction in the present invention is greater than that of the ordinary stacked ring gate feedback field effect transistor, which is due to the carrier mobility enhancement effect brought about by the introduction of the germanium silicon fin bridge channel and the biaxial strain generated by the silicon nanosheet. Therefore, this is one of the important reasons for the significant improvement of the on-state current in the present invention.
[0014] Figure 6 and Figure 7 The transfer characteristic curves of the present invention as an N-type and P-type device compared to a conventional stacked gate-all-around feedback field-effect transistor are shown, with the dashed line representing the reverse scan state. The device's on-state is defined as: source-drain bias |Vds| = 1V, gate bias |Vg| = 2V; the device's off-state is defined as: source-drain bias |Vds| = 1V, gate bias |VG| = 0V. When the device exhibits N-type characteristics, the present invention exhibits an on-state current of 5.72A, an off-state current of 0.263fA, and a current-on / off ratio of 2.17×10 10, the subthreshold swing is 2.57mV / dec, the threshold voltage is 0.754V, and the storage window is 2.64V; when the device adopts a conventional stacked nanosheet channel, the on-state current is 1.06A, the off-state current is 0.084fA, and the current switching ratio is 1.296×10 10 , subthreshold swing is 3.71mV / dec, threshold voltage is 0.84V, and storage window is 0.357V. When the device exhibits P-type characteristics, the on-state current of the present invention is 5.12A, the off-state current is 0.328fA, and the current switching ratio is 1.58×10 10 , the subthreshold swing is 2.75mV / dec, the threshold voltage is -0.43V, and the storage window is 1.12V; when the device uses a conventional stacked nanosheet channel, the on-state current is 0.90A, the off-state current is 0.065fA, and the current switching ratio is 1.42×10 10 , a subthreshold swing of 4.56mV / dec, a threshold voltage of -0.80V, and a memory window of 0.33V. It can be seen that compared to conventional stacked-ring-gate feedback field-effect transistors, the proposed tree-channel feedback field-effect transistor has an on-state current increase of 5.4 times (n-type) and 5.7 times (p-type), a subthreshold swing reduction of 30% (n-type) and 39% (p-type), a memory window increase of 7.4 times (n-type) and 3.4 times (p-type), and a threshold voltage reduction of 86mV (n-type) and 365mV (p-type).
[0015] Figure 8 The transient simulation images of the inverter formed by the present invention and the inverter formed by the conventional stacked ring gate feedback field effect transistor are provided. When the power supply voltage is 1V, the load capacitance is 1fF, and the input period is a square wave of 20ns, the t pLH 25ps, t pHL The output high level is 0.86V and the output low level is 0.13V. The t pLH 48ps, t pHL The output high level is 0.78 V and the output low level is 0.20 V. It can be seen that since the present invention has a larger on-current, the propagation delay and the output logic level loss are reduced.
[0016] Figure 9 The storage timing operation diagram of a DRAM cell composed of the present invention and NS-FBFET respectively. BL |=1V and word line voltage |V WLUnder the read condition of |=0V, the current of a DRAM cell constructed with the present invention when reading the logic state "1" is 351uA / um, and the current when reading the logic state "0" is 1.84nA / um. A DRAM cell constructed with a conventional stacked gate-all-around feedback field-effect transistor has a current of 126uA / um when reading the logic state "1" and a current of 0.54nA / um when reading the logic state "0". As can be seen, due to the larger on-state current of the present invention, the difference in read current is increased, and the discrimination of read current is improved, thus providing a larger sensing margin (SM), which enhances the anti-interference capability of the DRAM cell.
[0017] See Figure 10 , the production process of the present invention is as follows: Thermal oxidation growth is performed on the bulk silicon substrate 9 to obtain a buried oxide layer 10, thereby obtaining a BOX substrate; Perform overlapping epitaxy of silicon and silicon germanium on the BOX substrate to form the subsequent channel region; (3) Self-aligned double patterning technology is used to carve out the channel area on the overlapping epitaxial layers of silicon and germanium silicon using the sidewall as a hard mask; and the channel area is subjected to step-by-step low-energy ion implantation and rapid thermal annealing to form four independent doping regions; (4) Using chemical vapor deposition technology to deposit polysilicon virtual gate; (5) Using chemical vapor deposition technology or atomic layer deposition technology, depositing source electrical isolation wall 7 and leakage electrical isolation wall 8; (6) Using evaporation technology and rapid thermal annealing to prepare the source metal electrode 3 and the drain metal electrode 4; (7) Using reactive ion etching technology, anisotropically etch the polysilicon pseudo-gate, and precisely and selectively etch the germanium-silicon sacrificial layer to form the silicon nanosheet channel 1 and the germanium-silicon fin-type bridge channel 2; (8) Depositing high-K dielectric hafnium dioxide using atomic layer deposition technology to form gate oxide 5; (9) Using chemical vapor deposition technology, deposit a common metal gate 6, and perform rapid thermal annealing to form Figure 1 The structure shown.
[0018] Finally, the metal gate 6, source metal 3 and drain metal 4 are led out through interconnection metal, and all electrodes are flattened using chemical mechanical polishing technology. The devices of the present invention are connected together through metal wires using the CMOS ultra-large-scale circuit back-end Damascus process.
Claims
1. A tree-shaped channel stacked gate-all-around nanosheet feedback field effect transistor, characterized in that it include: A tree-shaped channel consisting of a silicon nanosheet channel (1) and a germanium silicon fin-type bridge channel (2); A drain metal electrode (3) provided at one end of the tree-shaped channel; A source metal electrode (4) provided at the other end of the tree-shaped channel; A gate oxide (5) wrapped around the outside of the tree channel; A metal gate (6) surrounded by a gate oxide (5) on four sides; A source electrical isolation sidewall (7) is provided on the right side of the drain metal electrode (3) and on the left side of the metal gate (6) and wraps around the tree-shaped channel; A drain electrical isolation sidewall (8) is provided on the right side of the source metal electrode (4) and the right side of the metal gate (6) and wraps around the tree-shaped channel; A silicon-on-insulator substrate is provided at the bottom and is composed of a silicon base (9) and a buried oxide layer (10).
2. The tree-channel stacked gate-all-around nanosheet feedback field-effect transistor according to claim 1, characterized in that: The silicon nanosheet channel (1) and the germanium silicon fin bridge channel (2) each include four doping regions, which are heavily doped p-type silicon nanosheets in contact with the drain metal electrode (3). + type region, heavily doped n-type region in contact with the source metal electrode (4) + Type region, and p + The lightly doped n-type region adjacent to the n + The lightly doped p-type region adjacent to the region forms a p + -npn + structure,; The proportion of germanium in the germanium silicon of the germanium silicon fin bridge channel is 10% to 50%; The drain metal electrode (3) and the source metal electrode (4) are one or a combination of aluminum, copper, titanium or titanium nitride; The gate oxide (5) is silicon dioxide or hafnium dioxide; The metal gate (6) is one or a combination of aluminum, copper, titanium, polysilicon or titanium nitride; The drain electrical isolation sidewall (7) and the source electrical isolation sidewall (8) are made of silicon dioxide, silicon nitride, silicon oxynitride, hafnium dioxide, phosphosilicate glass or borophosphosilicate glass.
3. The tree-channel stacked gate-all-around nanosheet feedback field-effect transistor according to claim 1, characterized in that: The lengths of the silicon nanosheet channel (1) and the germanium silicon fin bridge channel (2) are equal; and the heights of the source electrical isolation sidewall (7), the drain electrical isolation sidewall (8) and the metal gate (6) are equal.