Address mapping method of multi-host system and multi-host system

Abstract

The invention provides an address mapping method of a multi-host system and the multi-host system, and relates to the technical field of storage. The multi-host system comprises a register and at least two hosts, the register comprises a shared storage space and at least two private storage spaces, the shared storage space is stored in a paging mode, and each host corresponds to one private storage space; when any host sends a read-write instruction, determining whether a read-write address in the read-write instruction is a direct address; wherein the read-write instruction comprises a read-write address and a page pointer; if yes, reading and writing the corresponding private storage space according to the direct address; if not, a real address is generated according to the low-order address of the read-write address and the page pointer, and the shared storage space is read and written according to the real address. The address mapping method of the multi-host system and the multi-host system provided by the invention have the advantage of more flexible address mapping.

Description

Technical Field

[0001] The present application relates to the field of storage technology, and in particular to an address mapping method for a multi-host system and a multi-host system. Background Art

[0002] Address mapping is the process of converting the logical addresses used in the program address space into physical addresses directly addressed by the machine at runtime. This process is also called address relocation. The main purpose of address mapping is to establish the correspondence between virtual and real addresses to ensure that the CPU (Central Processing Unit) can correctly access the storage unit.

[0003] In operating systems, address mapping is widely used in memory management. For example, in paged memory management, logical addresses need to be converted to physical addresses through a page table before they can be directly accessed by the CPU. In specific implementations, the address mapping relationship can be determined during programming or compilation, or through static or dynamic address mapping.

[0004] In integrated circuit design systems, some systems have multiple hosts, but the number of registers is limited. Therefore, there is generally a fixed method for mapping addresses in the system.

[0005] At present, the conventional address mapping method generally divides the storage space into multiple parts, where the number of storage spaces is equal to the number of hosts, and the storage spaces are independent of each other, so that each host can correspond to a storage space, and each host can read and write its storage space through the corresponding logical address.

[0006] However, this address mapping method is not flexible, and the data stored between each host is independent of each other, resulting in relatively complex data reading and writing between the hosts and high read and write delays.

[0007] In summary, the prior art has the problem that the address mapping method for a multi-host system is inflexible. Summary of the Invention

[0008] The purpose of the present application is to provide an address mapping method for a multi-host system and a multi-host system, so as to solve the problem that the address mapping method for a multi-host system in the prior art is inflexible.

[0009] In order to achieve the above objectives, the technical solutions adopted in the embodiments of the present application are as follows: In one aspect, an embodiment of the present application provides an address mapping method for a multi-host system, which is applied to the multi-host system, wherein the multi-host system includes a register and at least two hosts, the register includes a shared memory space and at least two private memory spaces, the shared memory space is stored in pages, and each of the hosts corresponds to a private memory space; the method includes: When any host issues a read / write instruction, determining whether the read / write address in the read / write instruction is a direct address; wherein the read / write instruction includes the read / write address and a page pointer; If so, read and write the corresponding private storage space according to the direct address; If not, a real address is generated according to the low-order address of the read / write address and the page pointer, and the shared storage space is read and written according to the real address.

[0010] Optionally, each of the private storage spaces includes a first storage space and a second storage space, the first storage space cannot be read or written by other hosts, and the second storage space can be read and written by other hosts; after the step of determining whether the read / write address is a direct address, the method further includes: When determining that the read / write address is a direct address, determining whether the page pointer is a preset value; If so, reading and writing the second storage space of the corresponding host according to the page pointer; If not, read and write to the first storage space or the second storage space of the device.

[0011] Optionally, the step of reading and writing the second storage space of the corresponding host according to the page pointer includes: When performing a write operation on the second storage space of the corresponding host, performing the write operation according to the first secret key; The steps of reading and writing the first storage space or the second storage space of the device include: When performing a write operation on its own second storage space, the write operation is performed according to the second secret key; the first secret key is different from the second secret key.

[0012] Optionally, the step of reading and writing the second storage space of the corresponding host according to the page pointer includes: When performing a write operation on the second storage space of the corresponding host, performing the write operation according to the first secret key; The steps of reading and writing the first storage space or the second storage space of the device include: When performing a write operation on its own second storage space, the write operation is performed directly.

[0013] Optionally, the step of reading and writing the second storage space of the corresponding host according to the page pointer includes: The second storage space of the corresponding host is read and written according to the low-order address of the read and write address.

[0014] Optionally, the steps of any host issuing a read / write address include: Any host issues a read / write address based on a preset mapping table; wherein the mapping table includes at least the following user characteristics: Address code, name, shared / non-shared, member, member width, reset value, attributes, and description.

[0015] Optionally, the step of determining whether the read / write address in the read / write instruction is a direct address includes: The value of the read / write address is compared with a preset address value to determine whether the read / write address is a direct address.

[0016] Optionally, when the read / write address is an 8-bit address, the step of determining whether the read / write address in the read / write instruction is a direct address includes: When the value of the 8-bit address is between 0 and 127, determining that the read / write address is a direct address; When the value of the 8-bit address is between 128 and 255, the read / write address is determined to be an indirect address.

[0017] Optionally, when the read / write address is an address larger than 8 bits, the step of determining whether the read / write address in the read / write instruction is a direct address includes: When the value of the read / write address is between 0 and 127, determining that the read / write address is a direct address; When the value of the read / write address is greater than 127, it is determined that the read / write address is an indirect address.

[0018] On the other hand, an embodiment of the present application further provides a multi-host system, which is used to execute the above-mentioned address mapping method.

[0019] Compared with the prior art, this application has the following beneficial effects: The present application provides an address mapping method for a multi-host system, which is applied to a multi-host system. The multi-host system includes a register and at least two hosts. The register includes a shared storage space and at least two private storage spaces. The shared storage space is stored in pages, and each host corresponds to a private storage space. When any host issues a read / write instruction, it is determined whether the read / write address in the read / write instruction is a direct address. The read / write instruction includes a read / write address and a page pointer. If so, the corresponding private storage space is read and written based on the direct address. If not, a real address is generated based on the low-order address of the read / write address and the page pointer, and the shared storage space is read and written based on the real address. Since the present application divides the shared storage space and the private storage space in the register, and on this basis combines the page pointer to read and write the private storage space and the shared storage space, it ensures that the data between each host can be independent of each other or shared with each other, and is unified in the logical address, making the address mapping more flexible.

[0020] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0022] Figure 1 A schematic diagram of the modules of a multi-host system provided in an embodiment of the present application.

[0023] Figure 2 An exemplary flowchart of an address mapping method for a multi-host system provided in an embodiment of the present application.

[0024] Figure 3 A schematic diagram of a module for a shared storage space provided in an embodiment of the present application.

[0025] Figure 4 This is an exemplary flowchart of the sub-steps of S104 provided in an embodiment of the present application.

[0026] Figure 5 Another module schematic diagram of a multi-host system provided in an embodiment of the present application. DETAILED DESCRIPTION

[0027] To make the objectives, technical solutions, and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Generally, the components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations.

[0028] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for protection, but merely represents selected embodiments of the present application. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments in the present application without creative work are within the scope of protection of the present application.

[0029] It should be noted that similar reference numerals and letters represent similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings. At the same time, in the description of this application, the terms "first", "second", etc. are only used to distinguish the description and should not be understood as indicating or implying relative importance.

[0030] It should be noted that, in this document, relational terms such as first and second, etc. are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations.

[0031] The following describes some embodiments of the present application in detail with reference to the accompanying drawings. In the absence of conflict, the following embodiments and features therein may be combined with each other.

[0032] As described in the background art, the address mapping method in the prior art is not flexible, and the data stored between the hosts are independent of each other, resulting in relatively complex data reading and writing between the hosts and high reading and writing delays.

[0033] In view of this, in order to solve the above problems, this application provides an address mapping method for a multi-host system. Figure 1 The multi-host system includes a register and at least two hosts. The register includes a shared memory space and at least two private memory spaces. The shared memory space is paged, and each host corresponds to a private memory space. That is, in this application, N+1 memory spaces are divided into registers, where N represents the number of hosts. These N+1 memory spaces include N private memory spaces and 1 shared memory space. The private memory space is independently readable and writable by each host, while the shared memory space is readable and writable by all hosts.

[0034] For example, if there are two hosts, M0 and M1, the register is divided into two private memory spaces and one shared memory space. Typically, M0 reads and writes to one private memory space, while M1 reads and writes to the other. Simultaneously, both M0 and M1 can read and write to the shared memory space. Similarly, if there are three hosts, the register is divided into three private memory spaces and one shared memory space. This is not detailed here.

[0035] It is understood that the multi-host system provided by this application can provide a unified and private register interface, provide dedicated storage space for different hosts, and configure different features for different hosts. At the same time, it provides a storage space shared by all hosts, enabling data sharing.

[0036] Based on the architecture of the multi-host system provided above, please refer to Figure 2 , the address mapping method of the multi-host system provided by this application includes: S102, when any host issues a read / write instruction, determine whether the read / write address in the read / write instruction is a direct address; wherein the read / write instruction includes the read / write address and the page pointer; if so, execute S104; if not, execute S106.

[0037] S104, reading and writing the corresponding private storage space according to the direct address; S106 , generating a real address according to the low-order address of the read / write address and the page pointer, and reading and writing the shared storage space according to the real address.

[0038] In this application, the read / write instructions sent by the host include a read / write address and a page pointer. The basis for determining whether the host is reading or writing to a shared storage space or a private storage space is to determine whether the read / write address is a direct address. That is, each host sends a read / write instruction as {read / write address, page pointer}. For example, if the host sends a read / write instruction as {11111111, page5}, then 11111111 represents an 8-bit read / write address, and page5 indicates that the page pointer points to page 5.

[0039] In one implementation, when determining whether the host is reading or writing to a shared storage space or a private storage space, the determination may be made based on the value of the read / write address. For example, the value of the read / write address may be compared with a preset address value to determine whether the read / write address issued by the host is a direct address.

[0040] The read / write address values ​​of this application are decimal values, and the preset address values ​​of this application are also decimal values. For example, when the address is an 8-bit address, it can represent a value between 0 and 255 in decimal. When determining whether the read / write address in the read / write instruction is a direct address, it can be: When the value of the 8-bit address is between 0 and 127, the read / write address is determined to be a direct address.

[0041] When the 8-bit address value is between 128 and 255, the read / write address is determined to be an indirect address. In this application, an indirect address can also be defined as a page address. If the address sent by the host is determined to be a direct address, the corresponding private storage space is read and written; if the address sent by the host is a page address, the shared storage space is read and written.

[0042] For example, when the 8-bit address is 00000000, which is represented by decimal 0, it is determined that the read / write instruction issued by the host at this time is to read / write the private storage space. When the 8-bit address is 11111111, which is represented by decimal 255, it is determined that the read / write instruction issued by the host at this time is to read / write the shared storage space.

[0043] Of course, the preset address value can also be set to other values. For example, it can be set to determine that the read / write address is a direct address when the 8-bit address value is between 0 and 191. This is not limited here. Moreover, the determination between the direct address and the page address can be reversed. For example, when the 8-bit address value is between 0 and 127, the read / write address is determined to be a page address; when the 8-bit address value is between 128 and 255, the read / write address is determined to be a direct address. This is not limited here either.

[0044] In addition, the host's read and write address can also be an address greater than 8 bits. For example, the host's read and write can be a 16-bit address. In this case, the read and write address can be converted to a value between 0 and 65535. On this basis, as an implementation method, when determining whether the read and write address in the read and write instruction is a direct address, it can be: When the value of the read / write address is between 0 and 127, the read / write address is determined to be a direct address. When the value of the read / write address is greater than 127, it is determined that the read / write address is a non-direct address (page address).

[0045] In another implementation, when determining whether the read / write address in the read / write instruction is a direct address, it may be: When the value of the read / write address is between 0 and 32767, the read / write address is determined to be a direct address. When the value of the read / write address is greater than 32767, it is determined that the read / write address is a non-direct address (page address).

[0046] After determining whether the read / write address is a direct address, if the read / write address is a direct address, the corresponding private storage space is read and written. If the read / write address is a page address, the shared storage space is read and written. Figure 3 As shown in the figure, since the shared memory space is stored in pages, in order to determine the specific read and write location, it is necessary to generate the real address based on the low-order address of the read and write address and the page pointer. In the figure, 1# represents the first page, 2# represents the second page, and so on.

[0047] In this application, the real address can be expressed as {page_ptr, addr[6:0]}, where page_ptr represents the page pointer and addr[6:0] represents the low-order address in the read-write address. It should be noted that the low-order address in the read-write address described in this application refers to the last few bits of the read-write address. For example, if the read-write address is an 8-bit address, specifically 10101010, then the low-order address in the read-write address is the last 7 bits, that is, 0101010. Therefore, under the conditions of combining the page pointer and the low-order address of the read-write address, the specific read-write location in the shared storage space can be determined.

[0048] For example, the shared memory space is divided into 32 pages, and the host sends a read / write command of {11000001, page5}. At this time, because the read / write address value is greater than 127, it indicates that the host is reading or writing to the shared memory space. Based on this, the real address can be generated based on the low-order address of the read / write address and the page pointer. The real address can be expressed as {page5, 1000001}, which means that the host is reading or writing to the address 1000001 of the fifth page of the shared memory space.

[0049] Furthermore, as an implementation, each private storage space includes a first storage space and a second storage space. The first storage space is not readable or writable by other hosts, while the second storage space is readable and writable by other hosts. Specifically, the private storage space can be divided into two parts: the first storage space is readable and writable only by the host, while the second storage space is readable and writable by other hosts. For example, the first storage space can store the host's core parameters, while the second storage space can store operating parameters.

[0050] It should be noted that the division of the first storage space and the second storage space can also be implemented based on the value of the read / write address. For example, in combination with the above, when the value of the 8-bit address is between 0 and 127, the read / write address is determined to be a direct address. Furthermore, when the value of the 8-bit address is between 0 and 30, it indicates that the first storage space is being read and written; when the value of the 8-bit address is between 31 and 127, it indicates that the second storage space is being read and written.

[0051] On this basis, see Figure 4 , the steps of S104 include: S1041, determine whether the page pointer is a preset value, if so, execute S1042; if not, execute S1043.

[0052] S1042: Read and write the second storage space of the corresponding host according to the page pointer.

[0053] S1043, reading and writing the first storage space or the second storage space of the device.

[0054] That is, in this application, the page pointer can perform two functions: one is to determine which page of the shared storage space is read or written when the host reads or writes the shared storage space. The other function is to determine which host's private storage space is read or written when the host reads or writes the private storage space.

[0055] For example, when there are two hosts, the default value is set to the second page. Based on this, if the read / write address is determined to be a direct address and the page pointer is the second page, the second storage space of the other host is read and written. When the page pointer is other values, it means that the second storage space of the own host is read and written. For example, when the page pointer is the first page or the page pointer is the fifth page, it means that the second storage space of the own host is read and written.

[0056] For easier understanding, see Figure 5 This application takes two hosts and the read and write addresses issued by the hosts as 8-bit addresses as an example, and explains it with specific examples: The two hosts are M0 and M1, and the register is divided into two private storage spaces, D1 and D2, and a shared storage space S. Private storage space D1 corresponds to host M0, and private storage space D2 corresponds to host M1. In addition, private storage space D1 includes a first storage space D11 and a second storage space D12. The first storage space D11 can only be read and written by host M0, and cannot be read and written by host M1; the second storage space D12 can be read and written by host M0, and can also be read and written by host M1. At the same time, private storage space D2 includes a first storage space D21 and a second storage space D22. The first storage space D21 can only be read and written by host M1, and cannot be read and written by host M0; the second storage space D22 can be read and written by host M1, and can also be read and written by host M0.

[0057] When the host M0 issues a read / write instruction {11111111, page5}, it means that the host M0 reads and writes the shared storage space S. Specifically, based on the direct address {page5, 1111111}, the fifth page in the shared storage space S, at the address 1111111, is read and written.

[0058] When the host M0 issues a read / write instruction of {00000000, page0}, it means that the host M0 reads and writes the first storage space D11 in its own private storage space D1; when the host M0 issues a read / write instruction of {01100000, page0}, it means that the host M0 reads and writes the second storage space D12 in its own private storage space D1.

[0059] When the host M0 issues a read / write instruction {01100000, page2}, it indicates that the host M0 reads and writes the second storage space D22 in the private storage space D2.

[0060] Similarly, when host M1 issues the same read and write instructions, its read and write logic is consistent. It should be noted that in this application, when host M0 and host M1 both issue read and write instructions {01100000, page0}, although the instructions are the same, the specific read and write locations are different. Therefore, in the entire multi-host system, the read and write logic between each host is consistent, and the storage space between each other can be independent of each other and can read and write to each other to achieve data sharing; in the specific read and write process, even if the host sends the same read and write instructions, it can also achieve reading and writing at different locations. The address mapping method of the entire system is more flexible, data reading and writing is simpler, and all hosts are based on the same set of read and write logic, which can shorten the read and write delay.

[0061] When the number of hosts is greater, for example, when there are 3 or 4 hosts, when setting the preset value of the page pointer, the preset value of the page pointer can also be set to multiple. In one implementation, each host corresponds to a page pointer. For example, the system includes hosts M0, M1, and M2. The preset value of the page pointer corresponding to host M0 is the first page, the preset value of the page pointer corresponding to host M1 is the second page, and the preset value of the page pointer corresponding to host M2 is the third page. When the read and write instructions issued by host M0 are {01100000, page1}, the second storage space of its own private storage space is read and written; when the read and write instructions issued by host M0 are {01100000, page2}, the second storage space of the private storage space corresponding to host M1 is read and written; when the read and write instructions issued by host M0 are {01100000, page3}, the second storage space of the private storage space of host M2 is read and written.

[0062] In another implementation, all hosts are arranged in sequence and execute the preset values ​​of the page pointers in that order. For example, hosts M0, M1, and M2 are arranged in sequence. For host M0, when the read / write instruction issued by host M0 is {01100000, page1}, the second storage space of the private storage space corresponding to host M1 is read / written; when the read / write instruction issued by host M0 is {01100000, page2}, the second storage space of the private storage space corresponding to host M2 is read / written; and when the read / write instruction issued by host M0 is {01100000, pageX}, the second storage space of the private storage space corresponding to itself is read / written, where X is a number other than 1 or 2. Similarly, for host M1, when the read / write instruction issued by host M1 is {01100000, page1}, the second storage space of the private storage space corresponding to host M0 is read and written; when the read / write instruction issued by host M1 is {01100000, page2}, the second storage space of the private storage space corresponding to host M2 is read and written; when the read / write instruction issued by host M1 is {01100000, pageX}, the second storage space of the private storage space corresponding to itself is read and written, where X is a number other than 1 and 2, and so on.

[0063] Of course, since the register is divided into multiple storage spaces, the mapping table provided by this application also changes accordingly when the host performs reading and writing. When any host issues a read or write address according to the preset mapping table, the mapping table includes at least the following user characteristics: Address code, name, shared / non-shared, member, member width, reset value, attributes, and description.

[0064] Compared to existing technologies, the mapping table provided by this application includes "shared / non-shared" user characteristics, allowing for rapid access to private or shared storage space during read and write operations. Furthermore, by standardizing the register table format, designers can fill it out as needed. Subsequent verification and software developers all use this table as an interface and carrier, making actual operations much simpler.

[0065] In addition, in order to protect the data in different spaces from being arbitrarily rewritten, the corresponding secret key needs to be provided when the host performs a read operation.

[0066] As a first implementation, the steps of reading and writing the second storage space of the corresponding host according to the page pointer include: When a write operation is performed on the second storage space of the corresponding host, the write operation is performed according to the first key.

[0067] The steps of reading and writing the first storage space or the second storage space of the device include: When performing a write operation on its own second storage space, the write operation is performed according to the second secret key; the first secret key is different from the second secret key.

[0068] That is, for each second storage space, when a write operation is performed by its corresponding host, the host needs to provide a first key; when a write operation is performed by other hosts, the other hosts need to provide a second key different from the first key, so that different hosts need to provide different keys to perform write operations, thereby increasing the difficulty of write operations on the storage space and ensuring that the storage space is not arbitrarily rewritten.

[0069] For example, when performing a write operation on the second storage space D12 of the private storage space D1 corresponding to the host M0, the host M1 needs to issue the first key 0x69, while the host M0 needs to issue the second key 0x96. Of course, if a read operation is performed, there is no impact.

[0070] In addition, when the host performs read operations on the first storage space and the second storage space in its own private storage space, different keys need to be provided, and the complexity of the write operation key for the first storage space is greater than the complexity of the write operation key for the second storage space, so as to achieve the purpose of protecting the first storage space.

[0071] For example, when the host M0 performs a write operation on its corresponding private storage space D1, if the write operation is performed on the second storage space, the second key 0x96 needs to be issued; if the write operation is performed on the first storage space, the third key 0x9966 needs to be issued.

[0072] If the host M0 and the host M1 perform a read operation on the shared storage space, the secret keys provided by the host M0 and the host M1 are the same, for example, both are 0x6699.

[0073] As another implementation, the steps of reading and writing the second storage space of the corresponding host according to the page pointer include: When a write operation is performed on the second storage space of the corresponding host, the write operation is performed according to the first key.

[0074] The steps of reading and writing the first storage space or the second storage space of the device include: When performing a write operation on its own second storage space, the write operation is performed directly.

[0075] That is, in this implementation, the host does not need to provide a key when performing a write operation on its own second storage space, and only needs to provide a key when performing a write operation on the second storage space corresponding to other hosts. Of course, the host may not need to provide a key for write operations on shared storage space.

[0076] In summary, the present application provides an address mapping method for a multi-host system, which is applied to a multi-host system. The multi-host system includes a register and at least two hosts. The register includes a shared storage space and at least two private storage spaces. The shared storage space is stored in pages, and each host corresponds to a private storage space. When any host issues a read / write instruction, it is determined whether the read / write address in the read / write instruction is a direct address. The read / write instruction includes a read / write address and a page pointer. If so, the corresponding private storage space is read and written based on the direct address. If not, a real address is generated based on the low-order address of the read / write address and the page pointer, and the shared storage space is read and written based on the real address. Since the present application divides the shared storage space and the private storage space in the register, and on this basis, the private storage space and the shared storage space are read and written in combination with the page pointer, it ensures that the data between each host can be independent of each other or shared with each other, and is unified in the logical address, making the address mapping more flexible.

[0077] The above are merely preferred embodiments of the present application and are not intended to limit the present application. Those skilled in the art will readily appreciate that various modifications and variations are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present application shall be included within the scope of protection of the present application.

[0078] It will be apparent to those skilled in the art that the present application is not limited to the details of the exemplary embodiments described above and that the present application can be implemented in other specific forms without departing from the spirit or essential characteristics of the present application. Therefore, the embodiments should be considered in all respects as illustrative and non-restrictive, and the scope of the present application is defined by the appended claims, not the foregoing description, and all variations within the meaning and range of equivalents of the claims are intended to be included therein. Any reference sign in a claim should not be construed as limiting the claim to which it relates.

Claims

1. An address mapping method for a multi-host system, characterized in that: Applied to a multi-host system, the multi-host system includes a register and at least two hosts, the register includes a shared memory space and at least two private memory spaces, the shared memory space is stored in pages, and each of the hosts corresponds to a private memory space; the method includes: When any host issues a read / write instruction, determining whether the read / write address in the read / write instruction is a direct address; wherein the read / write instruction includes the read / write address and a page pointer; If so, read and write the corresponding private storage space according to the direct address; If not, a real address is generated according to the low-order address of the read / write address and the page pointer, and the shared storage space is read and written according to the real address.

2. The address mapping method for a multi-host system according to claim 1, wherein: Each of the private storage spaces includes a first storage space and a second storage space, wherein the first storage space cannot be read or written by other hosts, and the second storage space can be read or written by other hosts; After the step of determining whether the read / write address is a direct address, the method further includes: When determining that the read / write address is a direct address, determining whether the page pointer is a preset value; If so, reading and writing the second storage space of the corresponding host according to the page pointer; If not, read and write to the first storage space or the second storage space of the device.

3. The address mapping method for a multi-host system according to claim 2, wherein: The steps of reading and writing the second storage space of the corresponding host according to the page pointer include: When performing a write operation on the second storage space of the corresponding host, performing the write operation according to the first secret key; The steps of reading and writing the first storage space or the second storage space of the device include: When performing a write operation on its own second storage space, the write operation is performed according to the second secret key; the first secret key is different from the second secret key.

4. The address mapping method for a multi-host system according to claim 2, wherein: The steps of reading and writing the second storage space of the corresponding host according to the page pointer include: When performing a write operation on the second storage space of the corresponding host, performing the write operation according to the first secret key; The steps of reading and writing the first storage space or the second storage space of the device include: When performing a write operation on its own second storage space, the write operation is performed directly.

5. The address mapping method for a multi-host system according to claim 2, wherein: The steps of reading and writing the second storage space of the corresponding host according to the page pointer include: The second storage space of the corresponding host is read and written according to the low-order address of the read and write address.

6. The address mapping method for a multi-host system according to claim 1, wherein: The steps for any host to issue a read or write address include: Any host issues a read / write address based on a preset mapping table; wherein the mapping table includes at least the following user characteristics: Address code, name, shared / non-shared, member, member width, reset value, attributes, and description.

7. The address mapping method for a multi-host system according to claim 1, wherein: The step of determining whether the read / write address in the read / write instruction is a direct address comprises: The value of the read / write address is compared with a preset address value to determine whether the read / write address is a direct address.

8. The address mapping method for a multi-host system according to claim 7, wherein: When the read / write address is an 8-bit address, the step of determining whether the read / write address in the read / write instruction is a direct address includes: When the value of the 8-bit address is between 0 and 127, determining that the read / write address is a direct address; When the value of the 8-bit address is between 128 and 255, the read / write address is determined to be an indirect address.

9. The address mapping method for a multi-host system according to claim 7, wherein: When the read / write address is an address greater than 8 bits, the step of determining whether the read / write address in the read / write instruction is a direct address includes: When the value of the read / write address is between 0 and 127, determining that the read / write address is a direct address; When the value of the read / write address is greater than 127, it is determined that the read / write address is an indirect address.

10. A multi-host system, characterized in that: The multi-host system is used to execute the address mapping method for a multi-host system according to any one of claims 1 to 9.

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