3D-IC interlayer low-thermal-stress micro-channel heat dissipation structure based on cooperation of pin fins and semi-elliptical recesses

Abstract

A 3D-IC interlayer low thermal stress microchannel heat dissipation structure based on cooperation of pin fins and semi-elliptical recesses belongs to the field of semiconductor chip and integrated circuit heat dissipation, and comprises a heat dissipation structure body arranged at an interlayer position of a 3D-IC chip. The structure is provided with a plurality of micro-channels used for circulation of a cooling working medium, a plurality of equidistant needle fin and semielliptical recess cooperation units are arranged in the channels, a plurality of vertically-through circular-truncated-cone-shaped through silicon vias (TSV) convenient to fill are formed in the walls of the channels and the needle fins, and interconnection of 3D-IC chips is achieved through the hybrid bonding technology. The needle fins and the semi-elliptical concave holes are used for cooperatively dissipating heat, so that the heat transfer area is expanded, the development of a boundary layer is destroyed, the heat dissipation efficiency is improved, the generation of thermal stress is reduced, and a heat-force cooperative design space is provided for the TSV for signal transmission.

Description

Technical Field

[0001] The present invention belongs to the technical field of heat dissipation of semiconductor chips and integrated circuits, and in particular relates to a 3D-IC interlayer low thermal stress microchannel heat dissipation structure based on the cooperation of pin ribs and semi-elliptical recesses. Background Art

[0002] As technology advances, Moore's Law is also facing the constraints of physical limits. The resulting quantum effects and short-channel effects are becoming increasingly serious, slowing the increase in single-chip computing power. Relying solely on Moore's Law is no longer sufficient to enhance chip performance. With the advent of the AI ​​era, the demand for computing power and multifunctionality in emerging intelligent products is becoming increasingly urgent. Advanced packaging technology has become a new engine for integrated circuits.

[0003] Three-dimensional integrated circuits (3D-ICs) are a semiconductor technology that achieves high-density integration, low power consumption, and diverse functionality by vertically stacking multiple chips or wafers and utilizing advanced interconnect technologies (such as through-silicon vias (TSVs) and microbumps). However, the vertical stacking of integrated circuits increases the power density between the stacked chip layers, resulting in a nonlinear temperature rise in the chip's operating temperature. Furthermore, due to differences in the coefficient of thermal expansion (CTE) of different materials, thermal stress accumulates significantly under rapidly rising temperatures, leading to typical failures such as crack growth around the through-silicon vias (TSVs). Summary of the Invention

[0004] The purpose of the present invention is to provide a 3D-IC interlayer low thermal stress microchannel heat dissipation structure based on the cooperation of pin ribs and semi-elliptical recesses, aiming to solve or improve the above technical problems.

[0005] To achieve the above object, the present invention provides the following solutions:

[0006] A 3D-IC interlayer low thermal stress microchannel heat dissipation structure based on the cooperation of needle ribs and semi-elliptical recesses comprises a heat dissipation structure body (1), chips (2) are arranged on the upper and lower surfaces of the heat dissipation structure body, the heat dissipation structure body as a whole is a rectangular parallelepiped structure, the rectangular parallelepiped structure is provided with a plurality of parallel microchannels (3) for cooling medium flowing along the length direction of the rectangular parallelepiped, the plurality of microchannels are arranged equidistantly along the width direction of the rectangular parallelepiped; channel walls are provided between adjacent microchannels (3); the side walls on the left and right sides of each microchannel (i.e., the side surfaces corresponding to the channel walls) are further provided with a plurality of semi-elliptical recesses (4), the plurality of semi-elliptical recesses are evenly spaced along the length direction of the side walls, and the semi-elliptical recesses on the left and right sides are respectively opposite to each other, and each pair of left and right opposite one another is arranged. The two semi-elliptical recesses are marked as recesses, the long axis of the semi-elliptical recesses along the length direction of the cuboid corresponds to the long axis, the short semi-axis of the semi-elliptical recesses along the width direction of the cuboid corresponds to the short semi-axis, and the semi-elliptical concave cylinder along the height direction of the cuboid corresponds to the height of the cuboid; a needle rib (5) is set at the position of each recess in the microchannel (3), the length direction of the needle rib is consistent with the height direction of the cuboid, and the position of the needle rib is close to the upstream of the recess (i.e., the corresponding upstream when the cooling medium flows); a silicon-through hole TSV (6) is set at the position of the channel wall, the length of the silicon-through hole TSV runs through the height of the cuboid until there are micro-bumps (7) on the upper and lower surfaces of the cuboid, that is, there are micro-bumps (7) on the upper and lower surfaces of the heat dissipation structure body, and the micro-bumps are used to realize the electrical interconnection between the chip (2) and the heat dissipation structure body (1).

[0007] Alternatively, through silicon vias (TSVs) are provided in different needle fins as required, and corresponding micro-bumps (7) are provided on the upper and lower surfaces of the heat dissipation structure body; the through silicon vias (TSVs) are provided inside the needle fins.

[0008] The cross section of the needle rib is circular, teardrop-shaped, diamond-shaped, elliptical or trapezoidal.

[0009] The through silicon via (TSV) is a wrapping type consisting of a metal conductor (61), a diffusion barrier layer (62) and a dielectric isolation layer (63) in sequence from the center outward.

[0010] The through silicon via TSV is truncated cone-shaped, and the corresponding metal conductor is truncated cone-shaped, and the truncated cone shape is the height direction of the truncated cone along the height direction of the rectangular parallelepiped structure; the truncated cone-shaped side of the metal conductor is sequentially wrapped by diffusion barrier layer and dielectric isolation layer.

[0011] The width of the microchannel itself (ie, the width of the microchannel portion without the semi-elliptical recess) is 100 μm, the corresponding channel wall width is 100 μm, and the microchannel height is 200 μm.

[0012] The semi-elliptical recess has a semi-major axis of 100 μm, a semi-minor axis of 10-60 μm, a height of 200 μm, a cross-sectional dimension of 25-30 μm, a height of the needle fins that is the same as the height of the microchannel, and a spacing of 400 μm between adjacent needle fins along the length of the microchannel.

[0013] The diameters of the upper and lower surfaces of the metal conductor in the through silicon via (TSV) are 10-20 μm, and the lower surface diameter is smaller than the upper surface diameter. The diffusion barrier layer has a thickness of 5-50 nm, and the dielectric isolation layer has a thickness of 0.1-1 μm.

[0014] One end of the microchannel is the liquid inlet, and the other end is the liquid outlet, and the working fluid is deionized water.

[0015] The heat dissipation structure body is made of silicon.

[0016] The metal conductor is copper or tungsten, the diffusion barrier layer is titanium nitride or tantalum nitride, and the dielectric isolation layer is silicon dioxide or silicon nitride.

[0017] Compared with the prior art, the present invention provides a low-thermal-stress microchannel heat dissipation structure between 3D-IC layers based on the collaboration of pin-fins and semi-elliptical recesses, which has the following beneficial effects: a microchannel structure is directly constructed between 3D-IC chip layers, so that the heat generated by the stacked chips can be transferred to the heat sink through the shortest thermal path, and external heat dissipation is achieved by the coolant; the pin-fins and semi-elliptical recesses cooperate to dissipate heat, expanding the heat transfer area and disrupting the development of the boundary layer. The generated vortex disturbance induces chaotic convection in the central mainstream fluid, effectively reducing the laminar stagnation zone near the wall, balancing the flow resistance in the channel, and improving heat dissipation efficiency; the pin-fins are arranged upstream of the recesses, which helps to reduce the area of ​​the vortex zone at the recesses, reduce the drag coefficient along the path, and reduce energy loss; the channel wall and the pin-fin structure jointly provide a thermal-mechanical collaborative design space for the TSVs for signal transmission between 3D-IC chips; the truncated cone-shaped TSVs facilitate the filling of metal conductors and provide a more uniform stress distribution; the smooth curvature design of the semi-elliptical recesses can reduce the probability of contaminant adhesion, have strong self-cleaning ability, and provide uniform stress distribution. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a three-dimensional schematic diagram of the microchannel heat dissipation structure of the present invention.

[0019] Figure 2 It is a partial schematic diagram of the microchannel heat dissipation structure of the present invention.

[0020] Figure 3 It is a side sectional view of the microchannel heat dissipation structure of the present invention.

[0021] Figure 4 This is a cross-sectional view of the TSV structure of the microchannel heat dissipation structure of the present invention.

[0022] Figure 5This is a schematic diagram of the elliptical pin-fin structure of the microchannel heat dissipation structure of the present invention.

[0023] Figure 6 This is a schematic diagram of the water droplet needle fin structure of the microchannel heat dissipation structure of the present invention.

[0024] Figure 7 This is a schematic diagram of the trapezoidal pin-fin structure of the microchannel heat dissipation structure of the present invention.

[0025] Figure 8 This is a schematic diagram of the prismatic needle-fin structure of the microchannel heat dissipation structure of the present invention.

[0026] In the figure: 1. Chip; 2. Microchannel heat dissipation structure body; 3. Microchannel; 4. Semi-elliptical cavity; 5. Pin rib; 6. TSV structure; 61. Metal conductor; 62. Diffusion barrier layer; 63. Dielectric isolation layer; 7. Microbump. DETAILED DESCRIPTION

[0027] The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0028] In the description of the present invention, technical terms such as "middle," "upper," "lower," "upstream," "length," "width," and "height" are based on the orientation or positional relationships shown in the accompanying drawings. These terms are merely for the convenience of describing the embodiments of this application and simplifying the description. They do not indicate or imply that the device or component described must have a specific orientation, be constructed, or operate in a specific manner. Therefore, they should not be construed as limiting the embodiments of this application.

[0029] like Figure 1 、 2As shown in Figure 3, Example 1 provides a 3D-IC interlayer low thermal stress microchannel heat dissipation structure based on the cooperation of needle ribs and semi-elliptical recesses, including a heat dissipation structure body (2), a chip (1) arranged on the upper and lower sides of the heat dissipation structure body, and the structure is provided with a plurality of microchannels (3) for cooling medium to circulate along the length direction, the microchannels (3) are arranged equidistantly along the width direction, and adjacent channels are isolated by the channel wall. Since the length dimension of the microchannel is significantly greater than the width dimension, the improvement of the overall heat conduction efficiency of the radiator by a single microstructure is obviously limited. Therefore, each microchannel is composed of 24 groups of semi-elliptical recesses (4) arranged on both sides of the channel wall and 24 corresponding circular needle ribs (5) arranged in the middle of the channel and close to the upstream of the recess in the length direction. The circular needle ribs (5) and the semi-elliptical recesses (4) cooperate to dissipate heat, expand the heat transfer area and destroy the development of the boundary layer. The generated vortex disturbance induces the central mainstream fluid to produce chaotic convection, effectively reduces the laminar stagnation zone near the wall, balances the flow resistance in the channel, and improves the heat dissipation efficiency. The significance of arranging the needle fin (5) upstream of the cavity (4) is to destroy the flow boundary layer, enhance the heat transfer efficiency between the channel wall and the fluid, reduce the vortex area at the semi-elliptical cavity, reduce the drag coefficient along the way, and reduce energy loss.

[0030] The channel wall and the needle fins (5) have several silicon-through-holes (TSVs) distributed equidistantly along the length direction and penetrating the upper and lower surfaces of the heat dissipation structure body (2). At the same time, the chip (1) and the heat dissipation structure (2) are interconnected through micro-bumps (7). The structure is directly constructed between the 3D-IC chip layers so that the heat generated by the stacked chips can be transferred to the heat sink through the shortest thermal path. The microchannel (3) has a width of 100 μm, the channel wall has a width of 100 μm, and a height of 200 μm. The semi-major axis of the semi-elliptical recess (4) is 100 μm, the semi-minor axis is 50 μm, and the height is 200 μm. The diameter of the circular needle fin must be within a certain length to ensure that there is enough area for the TSV to be set. Therefore, the diameter of the needle fin (5) is 30 μm, and the longitudinal spacing between adjacent needle fins (5) is 400 μm. One end of the channel is the liquid inlet, and the other end is the liquid outlet. The working medium is deionized water. The heat dissipation structure body is made of silicon.

[0031] like Figure 4As shown, this embodiment 1 provides a 3D-IC interlayer low thermal stress microchannel heat dissipation structure based on the cooperation of needle ribs and semi-elliptical recesses. The silicon through hole TSV (6) is composed of a metal conductor (61), a diffusion barrier layer (62) and a dielectric isolation layer (63). In this embodiment, the metal conductor (61) is selected as copper, the diffusion barrier layer (62) is titanium nitride, and the dielectric isolation layer (63) is silicon dioxide. Due to the difference in the thermal expansion coefficient (CTE) of different materials, under high temperature conditions, the difference in the thermal expansion coefficient between the insulating layer and the silicon substrate will cause the constrained expansion of the metal core, thereby inducing thermal stress. At the same time, based on the feasibility requirements of the hole filling process, the metal conductor (61) is a truncated cone, which is wrapped in layers by annular diffusion barrier layers (62) and dielectric isolation layers (63). In this embodiment, the upper surface diameter of the metal conductor (61) is 10μm, the lower surface diameter is 8μm, the diffusion barrier layer (62) is 5nm thick, and the dielectric isolation layer (63) is 0.5μm thick.

[0032] In this embodiment 1, the heat flux density of the upper and lower surfaces of the heat dissipation structure body is set to 75W / cm 2 When the flow rate is 2.8m / s, the initial temperature is 293.15K. Compared with the traditional rectangular channel heat dissipation structure, the maximum temperature of the upper and lower surfaces of this heat dissipation structure is reduced by 12.9K, the average temperature is reduced by 9.85K, and the maximum thermal stress around the TSV, that is, the maximum von Mises equivalent stress, is reduced by 34.32MPa.

[0033] like Figure 5 、 6 As shown in Figures 7 and 8, Examples 2, 3, 4 and 5 respectively use elliptical, teardrop-shaped, trapezoidal and diamond-shaped needle fins. The different shapes of the needle fins will affect the position of the mainstream separation point, thereby affecting the area of ​​the vortex zone downstream of the needle fins and the pressure drop of the channel, but have little effect on the temperature and thermal stress of the structure.

[0034] In summary, those skilled in the art will appreciate that the present invention is not limited to the aforementioned embodiments, which are intended to illustrate the design principles thereof. Modifications and improvements may be made to the present invention without departing from its spirit and scope, and all such modifications shall fall within the scope of legal protection defined by the appended claims and their equivalents.

Claims

1. A 3D-IC interlayer low thermal stress microchannel heat dissipation structure based on the cooperation of pin fins and semi-elliptical recesses, characterized in that: The invention comprises a heat dissipation structure body (1), and chips (2) are arranged on the upper and lower surfaces of the heat dissipation structure body. The heat dissipation structure body is a rectangular parallelepiped structure as a whole. The rectangular parallelepiped structure is provided with a plurality of parallel microchannels (3) for cooling medium flowing along the length direction of the rectangular parallelepiped. The plurality of microchannels are evenly spaced and distributed along the width direction of the rectangular parallelepiped. Adjacent microchannels (3) are provided with channel walls. The side walls on the left and right sides of each microchannel (i.e., the side surfaces corresponding to the channel walls) are also provided with a plurality of semi-elliptical recesses (4). The plurality of semi-elliptical recesses are evenly spaced along the length direction of the side walls, and the semi-elliptical recesses on the left and right sides are respectively opposite to each other. Each pair of two semi-elliptical recesses opposite to each other is marked. The microchannel (3) is a concave cavity, and the long axis of the semi-elliptical concave cavity corresponds to the long axis of the semi-elliptical concave cavity along the length direction of the cuboid, the short semi-axis of the semi-elliptical concave cavity along the width direction of the cuboid, and the semi-elliptical concave cylindrical surface along the height direction of the cuboid; a needle rib (5) is set at the position of each concave cavity in the microchannel (3), the length direction of the needle rib is consistent with the height direction of the cuboid, and the position of the needle rib is close to the upstream of the concave cavity; a silicon-through hole TSV (6) is set at the position of the channel wall, and the length of the silicon-through hole TSV runs through the height of the cuboid until there are micro-bumps (7) on the upper and lower surfaces of the cuboid, that is, there are micro-bumps (7) on the upper and lower surfaces of the heat dissipation structure body, and the micro-bumps are used to realize the electrical interconnection between the chip (2) and the heat dissipation structure body (1).

2. A 3D-IC interlayer low thermal stress microchannel heat dissipation structure based on the cooperation of pin fins and semi-elliptical recesses according to claim 1, characterized in that: According to the needs, through silicon vias (TSVs) are also provided in different needle fins, and correspondingly, micro bumps (7) are also provided on the upper and lower surfaces of the heat dissipation structure body; the through silicon vias (TSVs) are provided inside the needle fins.

3. A 3D-IC interlayer low thermal stress microchannel heat dissipation structure based on the cooperation of pin fins and semi-elliptical recesses according to claim 1, characterized in that: The cross section of the needle rib is circular, teardrop-shaped, diamond-shaped, elliptical or trapezoidal.

4. A 3D-IC interlayer low thermal stress microchannel heat dissipation structure based on the cooperation of pin fins and semi-elliptical recesses according to claim 1, characterized in that: The through silicon via (TSV) is a wrapping type consisting of a metal conductor (61), a diffusion barrier layer (62) and a dielectric isolation layer (63) in sequence from the center outward.

5. A 3D-IC interlayer low thermal stress microchannel heat dissipation structure based on the cooperation of pin fins and semi-elliptical recesses according to claim 4, characterized in that: The through silicon via TSV is truncated cone-shaped, and the corresponding metal conductor is truncated cone-shaped, and the truncated cone shape is the height direction of the truncated cone along the height direction of the rectangular parallelepiped structure; the truncated cone-shaped side of the metal conductor is sequentially wrapped by diffusion barrier layer and dielectric isolation layer.

6. A 3D-IC interlayer low thermal stress microchannel heat dissipation structure based on the cooperation of pin fins and semi-elliptical recesses according to claim 1, characterized in that: The width of the microchannel itself, i.e., the width of the microchannel without the semi-elliptical recess, is 100 μm, the corresponding channel wall width is 100 μm, and the microchannel height is 200 μm; The semi-elliptical recess has a semi-major axis of 100 μm, a semi-minor axis of 10-60 μm, a height of 200 μm, a cross-sectional dimension of 25-30 μm, a height of the needle fins that is the same as the height of the microchannel, and a spacing of 400 μm between adjacent needle fins along the length of the microchannel.

7. The 3D-IC interlayer low thermal stress microchannel heat dissipation structure based on the cooperation of pin fins and semi-elliptical recesses according to claim 1, characterized in that: The diameters of the upper and lower surfaces of the metal conductor in the through silicon via (TSV) are 10-20 μm, and the lower surface diameter is smaller than the upper surface diameter. The diffusion barrier layer has a thickness of 5-50 nm, and the dielectric isolation layer has a thickness of 0.1-1 μm.

8. The 3D-IC interlayer low thermal stress microchannel heat dissipation structure based on the cooperation of pin fins and semi-elliptical recesses according to claim 1, characterized in that: One end of the microchannel is the liquid inlet, and the other end is the liquid outlet, and the working fluid is deionized water.

9. The 3D-IC interlayer low thermal stress microchannel heat dissipation structure based on the cooperation of pin fins and semi-elliptical recesses according to claim 1, characterized in that: The heat dissipation structure body is made of silicon; The metal conductor is copper or tungsten, the diffusion barrier layer is titanium nitride or tantalum nitride, and the dielectric isolation layer is silicon dioxide or silicon nitride.

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