LED monitoring circuit and control method thereof

Abstract

The application discloses an LED monitoring circuit and a control method thereof, and relates to the technical field of control circuits. The LED monitoring circuit comprises a load circuit, a switching circuit, a control chip and a sampling circuit. The sampling circuit is used for collecting a current signal of the load circuit. The control chip is used for extracting dynamic time-frequency features of the signal to obtain an original feature vector set. An association model is constructed based on circuit topology parameters. The original feature vector set is input into the model to perform feature fusion to generate a topology enhanced feature vector. An abnormal risk value is output by using an abnormality detection model to quantize the risk. Once the abnormal risk value exceeds a preset threshold, the control chip generates a switching control instruction to adjust the working state of the load circuit through the switching circuit. The application can effectively monitor abnormal conditions in the working state of the LED.

Description

Technical Field

[0001] The present invention relates to the technical field of control circuits, and in particular to an LED monitoring circuit and a control method thereof. Background Art

[0002] With the continuous development of LED technology and the gradual reduction of costs, LED has become an indispensable and important component of modern lighting and display equipment.

[0003] However, when the LED load current is too high or too low, the LED may overheat, flicker, lose brightness, or even be damaged. Existing LED control systems often lack sufficient intelligent monitoring and protection mechanisms. When the LED fails or operates abnormally, the existing system does not have the function of automatically stopping or adjusting. As a result, the LED operates in an abnormal state for a long time, affecting its service life and even causing safety hazards. Summary of the Invention

[0004] The embodiments of the present invention provide an LED monitoring circuit and a control method thereof, which can realize real-time and accurate monitoring of the working status of the LED load circuit, detect abnormalities in time and make adjustments, thereby improving the reliability and stability of the circuit operation.

[0005] An embodiment of the present invention provides an LED monitoring circuit, comprising a load circuit, a control circuit, and a sampling circuit. The sampling circuit is configured to collect a status signal of the load circuit, wherein the input of the sampling circuit is connected to the load circuit, and the output of the sampling circuit is connected to the input of the control circuit. The control circuit comprises a switch circuit and a control chip, wherein the output of the control chip is connected to the controlled end of the switch circuit, the output of the switch circuit is connected to the input of the load circuit, and the output of the sampling circuit is connected to the control port of the control chip. The control circuit comprises a switch circuit and a control chip, wherein the switch circuit is configured to control the on / off state of the load circuit, and the control chip is configured to:

[0006] The sampling circuit collects the current signal of the load circuit, performs dynamic time-frequency feature extraction processing on the current signal, and obtains an original feature vector set;

[0007] Based on the circuit topology parameters of the LED monitoring circuit, a circuit topology association model is constructed, and the original feature vector set is input into the circuit topology association model for feature fusion processing to generate a topology enhanced feature vector;

[0008] Inputting the topology enhanced feature vector into an anomaly detection model for risk quantification processing, and outputting an anomaly risk value;

[0009] When the abnormal risk value exceeds a preset threshold, a switch control instruction is generated to adjust the working state of the load circuit.

[0010] Another embodiment of the present invention provides a control method for an LED monitoring circuit, which is applied to the circuit as described in any one of the above items and includes the following steps:

[0011] The sampling circuit collects the current signal of the load circuit, performs dynamic time-frequency feature extraction processing on the current signal, and obtains an original feature vector set;

[0012] Based on the circuit topology parameters of the LED monitoring circuit, a circuit topology association model is constructed, and the original feature vector set is input into the circuit topology association model for feature fusion processing to generate a topology enhanced feature vector;

[0013] Inputting the topology enhanced feature vector into an anomaly detection model for risk quantification processing, and outputting an anomaly risk value;

[0014] When the abnormal risk value exceeds a preset threshold, a switch control instruction is generated to adjust the working state of the load circuit.

[0015] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0016] The sampling circuit collects the current signal of the load circuit. The control chip extracts dynamic time-frequency features of the current signal to obtain an original feature vector set that reflects the signal's time-varying characteristics and frequency components. A circuit topology association model is then constructed based on the topological parameters of the LED monitoring circuit. The original feature vector set is input into the circuit topology association model for fusion, allowing the features to include circuit structure information and improving the feature's ability to characterize anomalies. The fused topology-enhanced feature vector is then input into the anomaly detection model to quantify risk and output an anomaly risk value. When the risk value exceeds a threshold, the control chip generates a switch control instruction to adjust the on / off state of the load circuit through the switching circuit. The dynamic time-frequency feature extraction captures the instantaneous changes and frequency characteristics of the current signal, accurately reflecting the load operating state. The circuit topology association model integrates topological parameters and signal features, integrating feature analysis with circuit structure characteristics to enhance the accuracy of anomaly detection. The anomaly detection model quantifies risk and links switch control to achieve closed-loop control from detection to response. In summary, the embodiments of the present invention can achieve real-time and accurate monitoring of the operating state of the LED load circuit, promptly detect anomalies and make adjustments, and improve the reliability and stability of circuit operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0018] Figure 1 is a structural block diagram of a first embodiment of the present invention;

[0019] Figure 2 is a structural block diagram of a second embodiment of the present invention;

[0020] Figure 3 Is a circuit diagram of a second embodiment of the present invention;

[0021] Figure 4 This is a control flow chart of the control method of the LED monitoring circuit of the present invention.

[0022] Reference numerals:

[0023] 100, load circuit; 200, control circuit; 210, switching circuit; 220, control chip; 300, sampling circuit; 400, linear constant current circuit; 500, voltage source; 600, rectifier circuit; 700, voltage stabilization circuit. DETAILED DESCRIPTION

[0024] The present invention will be further described in detail below with reference to the accompanying drawings.

[0025] This specific embodiment is merely an explanation of the present invention and is not a limitation of the present invention. After reading this specification, those skilled in the art may make non-creative modifications to this embodiment as needed, but as long as they are within the scope of the claims of the present invention, they are protected by patent law.

[0026] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0027] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention as claimed, but rather merely represents selected embodiments of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort shall fall within the scope of protection of the present invention.

[0028] First embodiment:

[0029] 1 , the present invention provides an LED monitoring circuit, including a load circuit 100, a control circuit 200, and a sampling circuit 300. The sampling circuit 300 is used to collect a status signal of the load circuit 100. The control circuit 200 is used to control the on / off state of the load circuit 100 based on the status signal. The control end of the control circuit 200 is connected to the input end of the load circuit 100, the input end of the sampling circuit 300 is connected to the load circuit 100, and the output end of the sampling circuit 300 is connected to the input end of the control circuit 200. The control circuit 200 includes a switch circuit 210 and a control chip 220. The output end of the control chip 220 is connected to the controlled end of the switch circuit 210, the control end of the switch circuit 210 is connected to the input end of the load circuit 100, and the output end of the sampling circuit 300 is connected to the control port of the control chip 220. The control circuit 200 includes a switch circuit 210 and a control chip 220. The switch circuit 210 is used to control the on / off of the load circuit 100, and the control chip 220 is used to control the on / off of the switch circuit 210.

[0030] Wherein, the control chip is used for:

[0031] The sampling circuit collects the current signal of the load circuit, performs dynamic time-frequency feature extraction processing on the current signal, and obtains an original feature vector set;

[0032] Based on the circuit topology parameters of the LED monitoring circuit, a circuit topology constraint model is constructed, and the original feature vector set is input into the circuit topology constraint model for feature fusion processing to generate a topology enhanced feature vector;

[0033] Inputting the topology enhanced feature vector into an anomaly detection model for risk quantification processing, and outputting an anomaly risk value;

[0034] When the abnormal risk value exceeds a preset threshold, a switch control instruction is generated to adjust the working state of the load circuit.

[0035] The embodiment of the present invention can effectively monitor abnormal conditions in the working state of the LED, such as excessively high or low current values, by introducing a sampling circuit into the circuit to collect the status signal of the load circuit in real time, thereby avoiding problems such as overheating, flickering, and brightness decay of the LED.

[0036] Secondly, the control circuit automatically adjusts the on / off state of the LED load circuit according to the collected status signal. It can cut off the power supply or adjust the current in time when abnormal current occurs, preventing the LED from working in an abnormal state for a long time, significantly extending the service life of the LED and improving the stability and safety of the system.

[0037] Specifically, in this embodiment, the sampling circuit 300 is responsible for collecting the operating status signals of the LED load circuit 100 in real time and transmitting these signals to the control chip 220. The control chip 220 determines the operating status of the LED load based on the collected signals, such as whether there is an abnormal current that is too high or too low.

[0038] Specifically, the working status signal may be voltage, current, etc.

[0039] Specifically, the control chip 220 controls the on / off state of the load circuit 100 by controlling the switching state of the switch circuit 210. When the sampling circuit 300 detects that the current value is normal, the control chip 220 keeps the switch circuit 210 closed to ensure the power supply of the load circuit 100, and the LED lamp continues to work normally. When the current value is abnormal (such as the current is too high or too low), the control chip 220 sends a control signal according to the preset control logic to open or close the switch circuit 210, thereby cutting off the power supply of the LED lamp or adjusting it to avoid problems such as overheating and damage of the LED.

[0040] Therefore, compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0041] The sampling circuit collects the current signal of the load circuit. The control chip extracts dynamic time-frequency features of the current signal to obtain an original feature vector set that reflects the signal's time-varying characteristics and frequency components. A circuit topology association model is then constructed based on the topological parameters of the LED monitoring circuit. The original feature vector set is input into the circuit topology association model for fusion, allowing the features to include circuit structure information and improving the feature's ability to characterize anomalies. The fused topology-enhanced feature vector is then input into the anomaly detection model to quantify risk and output an anomaly risk value. When the risk value exceeds a threshold, the control chip generates a switch control instruction to adjust the on / off state of the load circuit through the switching circuit. The dynamic time-frequency feature extraction captures the instantaneous changes and frequency characteristics of the current signal, accurately reflecting the load operating state. The circuit topology association model integrates topological parameters and signal features, integrating feature analysis with circuit structure characteristics to enhance the accuracy of anomaly detection. The anomaly detection model quantifies risk and links switch control to achieve closed-loop control from detection to response. In summary, the embodiments of the present invention can achieve real-time and accurate monitoring of the operating state of the LED load circuit, promptly detect anomalies and make adjustments, and improve the reliability and stability of circuit operation.

[0042] Next, we first introduce the specific circuit structure of the LED monitoring circuit, and finally introduce the specific control method of the LED monitoring circuit.

[0043] First, as one example, a linear constant current circuit 400 is also included, which is used to provide a stable current for the load circuit 100, the output end of the linear constant current circuit 400 is connected to the input end of the load circuit 100, the control end of the switching circuit 210 is connected to the input end of the linear constant current circuit 400, and the input end of the sampling circuit 300 is connected to the sampling end of the linear constant current circuit 400.

[0044] In this embodiment, the linear constant current circuit 400 provides a stable current to the load circuit 100 through its output end to ensure the normal operation of the LED load. The control end of the switch circuit 210 is connected to the input end of the linear constant current circuit 400. The control chip 220 adjusts the on-off state of the switch circuit 210 according to the current signal obtained by the sampling circuit 300, thereby adjusting the current output of the linear constant current circuit. When the current is normal, the switch circuit remains closed, and the linear constant current circuit continues to provide a stable current to the load circuit 100; when the current is abnormal, the sampling circuit 300 detects the current fluctuation, and the control chip 220 controls the switch circuit 210 to open or close, thereby adjusting the current output of the linear constant current circuit to ensure that the load circuit 100 is not affected by the abnormal current. In this way, the circuit not only realizes the status monitoring and control of the LED, but also ensures the stability of the LED load current and avoids faults caused by overcurrent or overvoltage.

[0045] Optionally, it also includes a voltage source 500 and a rectifier circuit 600, wherein the voltage source 500 is used to provide an initial current, and the rectifier circuit 600 is used to perform polarity-independent processing on the current provided by the voltage source 500, and the output end of the voltage source 500 is connected to the input end of the rectifier circuit 600, and the output end of the rectifier circuit 600 is connected to the input end of the switching circuit 210.

[0046] In this embodiment, the voltage source 500 provides an initial current to ensure the basic power supply requirements of the circuit. Its output end is connected to the input end of the rectifier circuit 600. The rectifier circuit 600 is responsible for performing polarity-independent processing on the current output by the voltage source 500 and converting the alternating current (if any) into direct current to meet the working requirements of the subsequent circuit. The rectified current is transmitted to the input end of the switching circuit 210 through the output end of the rectifier circuit 600 for use in the subsequent circuit control. The switching circuit 210 adjusts the current on and off according to the instructions of the control chip 220, thereby affecting the current output of the linear constant current circuit 400 and the load circuit 100. In this way, the voltage source and the rectifier circuit provide a stable and adaptive power supply, so that the entire circuit system can operate efficiently and stably, and provide the necessary current and voltage support for the LED load circuit.

[0047] Optionally, a voltage stabilizing circuit 700 is also included, and a first node is provided between the output end of the rectifier circuit 600 and the input end of the switching circuit 210, the input end of the voltage stabilizing circuit 700 is connected to the first node, and the output end of the voltage stabilizing circuit 700 is connected to the power supply end of the control chip 220.

[0048] In this embodiment, the output end of the rectifier circuit 600 is connected to the switching circuit 210 through the first node, and the voltage stabilizing circuit 700 receives the current of the node and outputs it to the power supply end of the control chip 220 after stabilizing the voltage, ensuring that the control chip 220 operates normally under voltage stability conditions and avoiding voltage fluctuations affecting the control accuracy and stability of the system.

[0049] Furthermore, the linear constant current circuit 400 includes a first switch tube D6 and a linear constant current chip U1. The output end of the switch circuit 210 is connected to the first port VCC1, the second port VCC2 and the third port VCC3 of the linear constant current chip U1, the fifth port GND is grounded, and the two ends of the first switch tube D6 are connected to the sixth port F- and the fourth port F-.

[0050] Specifically, in this embodiment, the output end of the switching circuit 210 is connected to multiple ports (VCC1, VCC2, VCC3) of the linear constant current chip U1 to provide the required operating voltage for the constant current chip. The constant current chip U1 adjusts the current output through its port to ensure that a stable current is provided to the load circuit 100. The first switch tube D6 is connected to the F-port and the fourth port of the constant current chip to control the current to flow to the LED load circuit.

[0051] Specifically, the switch tube D6 adjusts the current according to the control signal of the constant current chip. When the current is abnormal, the switch tube D6 will adjust the current path to achieve precise control of the LED load current, keeping the current stable within a predetermined range. This can effectively prevent the LED from being damaged due to unstable current, ensuring the stability of the system and the long-term reliable operation of the LED.

[0052] Furthermore, a first capacitor C3 is provided between the first port VDD and the eighth port VSS of the control chip 220, a second node is provided between the first port VDD and one end of the first capacitor C3, the second node is the power supply end of the control chip 220, a third node is provided between the eighth port VSS and the other end of the first capacitor C3, the third node is connected to the ground end, and the fourth port P7 / RST of the control chip 220 is connected to the controlled end of the switching circuit 210.

[0053] Specifically, a first capacitor C3 is provided between the first port VDD and the eighth port VSS for stabilizing the power supply of the control chip 220. One end of the capacitor C3 is connected to the first port VDD, and the other end is connected to the ground. Through the filtering effect of the capacitor, the power supply voltage is smoothed, and the impact of voltage fluctuations on the operation of the control chip 220 is reduced, thereby ensuring stable operation of the chip.

[0054] On this basis, the second node is located between VDD and capacitor C3, serving as the power supply terminal of the control chip 220 to provide a stable power supply. The third node is connected to VSS and the other end of capacitor C3 and grounded to ensure the stability of the power ground.

[0055] In addition, the fourth port P7 / RST of the control chip 220 is connected to the controlled end of the switch circuit 210, which plays the role of reset and start control. When an abnormality is detected, the control chip 220 controls the switching state of the switch circuit 210 through this port to achieve power switching or reset, ensuring the normal operation of the entire circuit and preventing the LED system from malfunctioning.

[0056] Specifically, the sampling circuit 300 includes a first resistor R6 and a second resistor R8. The first resistor R6 has one end connected to one end of the second resistor R8 and a first switch tube D6. The other end of the first resistor R6 is connected to the sixth port P1 of the control chip 220 and the load circuit 100. The other end of the second resistor R8 is connected to the fifth port P2 of the control chip 220 and the load circuit 100.

[0057] Specifically, the two ends of the first resistor R6 are respectively connected to the second resistor R8 and the first switch tube D6, and the other end is connected to the sixth port P1 of the control chip 220 and the load circuit 100 for sampling the load current. The current generates a voltage drop through the resistor R6, and the voltage drop is fed back to the control chip 220 through the sixth port P1, thereby realizing the monitoring of the LED load current.

[0058] At the same time, the other end of the second resistor R8 is connected to the fifth port P2 of the control chip 220 and the load circuit 100. The function of the second resistor R8 is to further adjust the voltage signal to ensure the sampling accuracy. The control chip 220 makes a judgment based on the sampled voltage signal (reflecting the current change) and monitors the LED load current in real time. When the current is abnormal, the control chip 220 can adjust the switching circuit or perform other control actions to prevent damage or failure of the LED.

[0059] Furthermore, the switching circuit 210 includes a second switching transistor QP1, a third switching transistor QN1, a third resistor R3, a fourth resistor R5, and a fifth resistor R7. A first port (source) of the second switching transistor QP1 is connected to one end of the third resistor R3 and the output end of the rectifier circuit 600. The other end of the third resistor R3 is connected to the second port (gate) of the second switching transistor QP1 and one end of the fourth resistor R5. A third port (drain) of the second switching transistor QP1 is connected to the first port VCC1, the second port VCC2, and the third port VCC3 of the linear constant current chip U1. The other end of the fourth resistor R5 is connected to the first port (collector) of the third switching transistor QN1. The second port (base) of the third switching transistor QN1 is connected to one end of the fifth resistor R7. The other end of the fifth resistor R7 is connected to the fourth port P7 / RST of the control chip 220. The third port (emitter) of the third switching transistor QN1 is grounded.

[0060] First, the source of the second switching tube QP1 is connected to one end of the third resistor R3, and the source is also connected to the output end of the rectifier circuit 600 to provide power for the switching circuit. The other end of the third resistor R3 is connected to the gate of the second switching tube QP1, and the gate is also connected to one end of the fourth resistor R5. The other end of the fourth resistor R5 is connected to the collector of the third switching tube QN1. The drain of the second switching tube QP1 is connected to the ports (VCC1, VCC2, VCC3) of the linear constant current chip U1 to provide a stable operating voltage for the constant current chip and adjust the constant current of the LED. The constant current chip U1 adjusts the LED current according to the voltage regulation signal to ensure stable operation of the LED.

[0061] The base of the third switch QN1 is connected to one end of a fifth resistor R7, and the other end of the fifth resistor R7 is connected to a fourth port P7 / RST of the control chip 220. The control chip 220 sends a control signal to the third switch QN1 through this port to determine its operating state. When the power needs to be adjusted or shut down, the control chip 220 outputs a signal through port P7 to affect the switching state of the third switch QN1, thereby regulating the current flowing to the LED load.

[0062] The emitter of the third switch QN1 is grounded, completing the current loop. When the current is too high or too low, the control chip 220 can adjust the base voltage of QN1 through the P7 port, thereby affecting the switching state of its collector-emitter channel and controlling the flow of LED current. If the current is abnormal, the switch circuit 210 will automatically adjust or cut off the LED current by adjusting the switching states of the second switch QP1 and the third switch QN1 to prevent LED damage.

[0063] Furthermore, the voltage stabilizing circuit 700 includes a sixth resistor R1, a second capacitor C2, and a fifth switch tube D4. One end of the sixth resistor R1 is connected to the first node, the other end of the sixth resistor R1 is connected to one end of the second capacitor C2, the second node, and the second port (cathode) of the fifth switch tube D4, and the first port (anode) of the fifth switch tube D4 is connected to the other end of the second capacitor C2.

[0064] During operation, one end of the sixth resistor R1 is connected to the first node, and the other end is connected to one end of the second capacitor C2, the second node, and the cathode of the fifth switch tube D4. The current passes through the sixth resistor R1 to generate a voltage drop, which is filtered by the capacitor C2 to stabilize the voltage output. The anode of the fifth switch tube D4 is connected to the other end of the second capacitor C2, which controls the voltage stability. When the input voltage fluctuates, the switch tube D4 adjusts the current flow to maintain a stable output voltage, thereby providing a reliable voltage supply for the entire circuit and ensuring stable operation of the system.

[0065] Furthermore, the rectifier circuit 600 includes a sixth switching transistor D1, a seventh switching transistor D2, an eighth switching transistor D3, and a ninth switching transistor D4. The first port (anode) of the sixth switching transistor D1 is connected to the second port (cathode) of the seventh switching transistor D2 and the first port of the voltage source 500. The second port (cathode) of the seventh switching transistor D2 is connected to the second port (cathode) of the eighth switching transistor D3 and the first port (source) of the second switching transistor QP1. The first port (anode) of the eighth switching transistor D3 is connected to the second port (cathode) of the ninth switching transistor D4 and the second port of the voltage source 500. The first port (anode) of the seventh switching transistor D2 is connected to the first port (anode) of the ninth switching transistor D4 and the ground terminal.

[0066] Specifically, the anode of the sixth switch tube D1 is connected to the cathode of the seventh switch tube D2 and the first port of the voltage source 500, and the current of the voltage source begins to be input into the rectifier circuit. The cathode of the seventh switch tube D2 is connected to the cathode of the eighth switch tube D3 and the source of the second switch tube QP1. The current flows through this path into the eighth switch tube D3. The anode of the eighth switch tube D3 is connected to the cathode of the ninth switch tube D4 and the second port of the voltage source 500, forming a main path for the current flow.

[0067] In addition, the anode of the seventh switch tube D2 is connected to the anode of the ninth switch tube D4 and is grounded to complete the current loop. The entire rectifier circuit realizes positive and negative polarity-independent processing of the input voltage through the switching of each switch tube, so that the current can adapt to inputs of different polarities, ensuring that the subsequent circuit can stably receive the correct voltage and avoiding circuit damage or unstable operation due to incorrect voltage polarity.

[0068] Furthermore, the load circuit 100 includes a first load LED1 and a second load LED2, the first port (anode) of the first load LED1 is connected to the first port VCC1 of the linear constant current chip U1 and the third port (drain) of the second switch tube QP1, the second port (cathode) of the first load LED1 is connected to the sixth port P1 of the control chip 220 and the other end of the first resistor R6, the first port (anode) of the second load LED2 is connected to the first port VCC1 of the linear constant current chip U1, the first port (anode) of the first load LED1 and the third port (drain) of the second switch tube QP1, and the second port (cathode) of the second load LED2 is connected to the fifth port P2 of the control chip 220 and the other end of the second resistor R8.

[0069] Specifically, the load circuit 100 consists of a first load LED1 and a second load LED2, the currents of which are regulated by a linear constant current chip U1 and a second switch tube QP1. The anode of the first load LED1 is connected to the VCC1 port of the linear constant current chip U1 and the drain of the second switch tube QP1, and the cathode is connected to the P1 port of the control chip 220 and the first resistor R6. The anode of the second load LED2 is connected to the VCC1 port of the linear constant current chip U1, the anode of the first load LED1 and the drain of the second switch tube QP1, and its cathode is connected to the P2 port of the control chip 220 and the second resistor R8. The constant current chip U1 ensures the current stability of the two LEDs and adjusts the brightness of the two LEDs according to the signal of the control chip 220. The second switch tube QP1 serves as a key switch tube, controlling the current flow direction of the LED circuit, ensuring that the load current meets the preset conditions, and avoiding LED damage or overheating by adjusting the current and brightness.

[0070] Next, we will introduce the control method of the LED monitoring circuit in detail based on the above specific circuit structure:

[0071] See also Figure 4 , an embodiment of the present invention further provides a control method for an LED monitoring circuit, which is applied to the circuit described in the above embodiment, comprising the following steps;

[0072] S10, collecting a current signal of a load circuit through the sampling circuit, performing dynamic time-frequency feature extraction processing on the current signal, and obtaining an original feature vector set;

[0073] S11, constructing a circuit topology association model based on the circuit topology parameters of the LED monitoring circuit, and inputting the original feature vector set into the circuit topology association model for feature fusion processing to generate a topology enhanced feature vector;

[0074] S12, inputting the topology enhancement feature vector into an anomaly detection model for risk quantification processing, and outputting an anomaly risk value;

[0075] S13, when the abnormal risk value exceeds a preset threshold, generating a switch control instruction to adjust the working state of the load circuit.

[0076] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0077] The sampling circuit collects the current signal of the load circuit. The control chip extracts dynamic time-frequency features of the current signal to obtain an original feature vector set that reflects the signal's time-varying characteristics and frequency components. A circuit topology association model is then constructed based on the topological parameters of the LED monitoring circuit. The original feature vector set is input into the circuit topology association model for fusion, allowing the features to include circuit structure information and improving the feature's ability to characterize anomalies. The fused topology-enhanced feature vector is then input into the anomaly detection model to quantify risk and output an anomaly risk value. When the risk value exceeds a threshold, the control chip generates a switch control instruction to adjust the on / off state of the load circuit through the switching circuit. The dynamic time-frequency feature extraction captures the instantaneous changes and frequency characteristics of the current signal, accurately reflecting the load operating state. The circuit topology association model integrates topological parameters and signal features, integrating feature analysis with circuit structure characteristics to enhance the accuracy of anomaly detection. The anomaly detection model quantifies risk and links switch control to achieve closed-loop control from detection to response. In summary, the embodiments of the present invention can achieve real-time and accurate monitoring of the operating state of the LED load circuit, promptly detect anomalies and make adjustments, and improve the reliability and stability of circuit operation.

[0078] As one example, the control chip collects the current signal of the load circuit through the sampling circuit, performs dynamic time-frequency feature extraction processing on the current signal, and obtains an original feature vector set, including:

[0079] collecting the first current signal of the first load LED1 and the second current signal of the second load LED2 through the sampling circuit;

[0080] Performing time domain waveform analysis on the first current signal to extract rising edge time, falling edge time, and pulse width modulation duty cycle features to generate a first time domain feature vector;

[0081] Performing frequency domain transformation processing on the second current signal to extract fundamental wave amplitude, third harmonic distortion rate, and spectrum energy distribution characteristics to generate a second frequency domain feature vector;

[0082] Constructing a dual-load correlation matrix including an impedance coupling coefficient according to a physical connection topology relationship between the first load LED1 and the second load LED2 on the circuit board;

[0083] The first time-domain eigenvector, the second frequency-domain eigenvector, and the dual-load correlation matrix are aligned in terms of their characteristic dimensions to generate an original eigenvector set containing spatiotemporal correlation characteristics.

[0084] In this embodiment, for a load circuit comprising a first load, LED1, and a second load, LED2, a sampling circuit collects current signals from both loads. The control chip performs time-domain waveform analysis on the first load's current signal, extracting features such as rising edge time, falling edge time, and pulse-width modulation duty cycle. This generates a first time-domain eigenvector, capturing the temporal characteristics of the first load's current. The second load's current signal undergoes frequency-domain transformation, extracting features such as fundamental amplitude, third harmonic distortion, and spectral energy distribution. This generates a second frequency-domain eigenvector, analyzing the frequency components and energy distribution of the second load's current. Subsequently, based on the physical connection topology of the two loads on the circuit board, a dual-load correlation matrix containing impedance coupling coefficients is constructed. This matrix reflects the electrical connection characteristics between the two loads. Finally, the two eigenvectors are aligned with the correlation matrix by aligning their feature dimensions. The time-domain and frequency-domain features are then integrated with the spatial topological correlation characteristics between the loads to generate a set of original feature vectors containing temporal and spatial correlation characteristics, providing comprehensive and relevant feature data for subsequent anomaly detection. Therefore, this embodiment performs targeted feature extraction on the current signals of different loads from the time domain and frequency domain respectively, and constructs a correlation matrix based on the physical connection topology relationship between the loads, thereby realizing in-depth analysis of the multi-dimensional and spatiotemporal correlation of the dual-load current signals. Compared with the single-dimensional or independent analysis of load signals, it can more accurately and comprehensively capture the operating status characteristics of the load circuit, effectively improving the accuracy and reliability of anomaly detection.

[0085] Specifically, the working process of this embodiment is as follows:

[0086] During actual operation of the LED monitoring circuit, the sampling circuit serves as the front-end for signal acquisition. Its two sampling channels are connected in series to the current loops of the first load, LED1, and the second load, LED2. The circuit is periodically sampled at a fixed sampling frequency (e.g., 100kHz). During each sampling operation, the first current signal from the first load, LED1, and the second current signal from the second load, LED2, are transmitted in real time to designated pins of the control chip, completing the current signal acquisition process.

[0087] After the control chip receives the first current signal, it starts the time domain waveform analysis process. First, the first current signal is pre-processed and a sliding average filtering algorithm is used. By setting the sliding window size (for example, the window contains 10 sampling points), the continuously collected signal is smoothed to remove high-frequency noise interference and improve signal quality. When extracting the rising edge time, this embodiment improves the traditional fixed threshold detection method and adopts a dynamic threshold slope detection algorithm. The specific process is: first calculate the signal in a certain time window (set as , including 20 sampling points) , the formula is ,in For the The current value of the sampling point, is the sampling interval; then set the dynamic threshold , is the adjustment coefficient, and its value range is between 1.5 and 2.5. Record the start time , when the signal reaches 90% of the stable value, record the end time , rising edge time . Falling edge time The extraction method is similar to the rising edge, and accurate detection is achieved by dynamically adjusting the threshold. The control chip calculates the duration of the high level of the detection signal and a complete modulation cycle , using the formula The three extracted eigenvalues ​​of rising edge time, falling edge time and pulse width modulation duty cycle are arranged and combined in a specific order to generate a first time domain eigenvector.

[0088] For the second current signal, the control chip performs frequency domain transformation processing. An improved discrete Fourier transform (DFT) algorithm is used to introduce a phase compensation mechanism based on the traditional DFT. First, the second current signal is divided into multiple data segments, each of which is Sampling points (set = 1024), in order to reduce spectrum leakage, a 50% overlap rate is set between adjacent data segments. After DFT transformation of each data segment, according to the phase relationship of adjacent data segments, the formula Perform phase compensation, where is the original DFT transform result, is the phase compensation value calculated based on adjacent data segments, is the spectrum data after compensation. In the processed spectrum, the fundamental amplitude Frequency (LED fundamental frequency, such as 50Hz) amplitude; third harmonic distortion rate By formula Calculate, where for The amplitude at the subharmonic frequency is calculated; the energy contribution of each frequency component is calculated to obtain the spectrum energy distribution characteristics. The fundamental amplitude, third harmonic distortion rate, and spectrum energy distribution characteristics are combined in a specified format to generate the second frequency domain feature vector.

[0089] Subsequently, the control chip constructs a dual-load correlation matrix including the impedance coupling coefficient based on the physical connection information of the first load LED1 and the second load LED2 on the circuit board. This embodiment takes into account various influencing factors and uses the calculation formula ,in is the empirical coefficient (value range is 0.8-1.2), is the length of the wire between the two loads, and are the width and height of the wire, is the resistivity of the conductor material. , construct the double load correlation matrix , which reflects the electromagnetic coupling and electrical correlation characteristics between the two loads.

[0090] Finally, a feature dimension alignment operation is performed to generate the original feature vector set. Because the dimensions of the first time-domain feature vector and the second frequency-domain feature vector are different from those of the dual-load correlation matrix, the control chip first expands the dimension of the dual-load correlation matrix. A linear interpolation algorithm is used to expand the matrix elements according to the dimensional requirements of the feature vectors, so that the number of elements is consistent with the total number of elements in the two feature vectors. Then, the following feature importance-based splicing strategy is adopted: the first time-domain feature vector is placed at the starting position of the new vector, followed by the second frequency-domain feature vector, and finally the expanded dual-load correlation matrix elements are sequentially filled in the remaining positions. During the splicing process, to ensure the weight balance of different types of features, each eigenvalue is normalized and mapped to the range of 0-1, ultimately forming the original feature vector set containing spatiotemporal correlation characteristics, providing a comprehensive and accurate data foundation for subsequent feature fusion and anomaly detection based on circuit topology.

[0091] As one example, the control chip executes the circuit topology parameters based on the LED monitoring circuit, constructs a circuit topology association model, and inputs the original feature vector set into the circuit topology association model for feature fusion processing to generate a topology enhanced feature vector, including:

[0092] Obtaining an impedance parameter of a wire from an output end of the switching circuit to an input end of the linear constant current circuit;

[0093] Obtaining a current stability parameter and a voltage drop characteristic parameter from the output end of the linear constant current circuit to the input end of the load circuit;

[0094] Based on the conductor impedance parameter, the current stability parameter and the voltage drop characteristic parameter, a multi-dimensional topology edge weight calculation rule is defined;

[0095] Performing weight distribution processing on each feature vector in the original feature vector set according to the multi-dimensional topological edge weight calculation rule to obtain a weight distribution result;

[0096] Constructing a circuit topology association model having a three-level topology including a switch circuit node, a constant current circuit node, and a load circuit node based on the weight distribution result;

[0097] The original feature vector set is input into the circuit topology association model for feature fusion processing to generate a topology enhanced feature vector.

[0098] In this embodiment, in an architecture where a linear constant current circuit provides a stable current to a load circuit, the control chip first obtains the impedance parameters of the wire from the output of the switching circuit to the input of the linear constant current circuit. This parameter reflects the impedance characteristics of the power transmission path. It then obtains the current stability parameter and voltage drop characteristic parameter from the output of the linear constant current circuit to the input of the load circuit. These parameters reflect the quality of the constant current circuit's power supply to the load. Based on these three parameters, a multi-dimensional topological edge weight calculation rule is defined. Each feature vector in the original feature vector set is weighted according to the rule to reflect the importance and relevance of different features in the circuit topology. Subsequently, based on the weight assignment results, a three-level topological circuit topology association model is constructed, comprising switching circuit nodes, constant current circuit nodes, and load circuit nodes. This model presents the connection relationships and feature importance of each circuit component in the form of a graph structure. Finally, the original feature vector set is input into this model for feature fusion, so that the feature vector not only contains the signal characteristics itself but also incorporates circuit topology information, generating a topology-enhanced feature vector. In summary, this embodiment constructs a three-level circuit topology association model and performs feature fusion, so that the anomaly detection model can analyze the actual physical structure and electrical characteristics of the circuit. Compared with the traditional detection method based only on signal characteristics, it can more accurately identify potential faults caused by circuit topology abnormalities, such as changes in wire impedance and decreased stability of constant current circuits. It significantly improves the sensitivity and diagnostic accuracy of early latent faults, and provides a topological hierarchical basis for fault source location, thereby enhancing the intelligence and reliability of the LED monitoring circuit.

[0099] Specifically, the working process of this embodiment is as follows:

[0100] When the LED monitoring circuit is operating, the control chip first starts collecting circuit topology parameters. It obtains the impedance parameters of the wire from the output of the switching circuit to the input of the linear constant current circuit (pre-measured and stored). It then obtains the current stability parameters and voltage drop characteristic parameters from the output of the linear constant current circuit to the input of the load circuit (these parameters are also pre-measured and stored, and the parameter measurement method refers to existing technologies).

[0101] After obtaining the conductor impedance parameters, current stability parameters, and voltage drop characteristic parameters, the control chip defines the multi-dimensional topology edge weight calculation rules in the following way. First, the objective weight of each parameter is calculated using the entropy weight method. , the formula is (in For the The entropy value of each parameter); and then the analytic hierarchy process is used to determine the subjective weight , construct the judgment matrix and conduct consistency test to obtain the subjective weight of each parameter; finally, combine the subjective and objective weights and use the weighted average formula ( is the fusion coefficient, with a value of 0.6), and the final weight calculation rule is obtained, and a weight value is assigned to each topological edge. .

[0102] Subsequently, the control chip performs weight assignment processing on each eigenvector in the original eigenvector set. Based on the circuit topology, a feature-topology mapping table is established to clarify the topological connection relationship corresponding to each eigenvalue. For the eigenvalues ​​related to a specific topological edge, the weight of the edge is calculated based on the weight of the edge. Perform weighted processing using the formula ( is the original eigenvalue, After all eigenvalues ​​are weighted, they are recombined into weighted eigenvectors to form a weight distribution result, so that the eigenvectors incorporate the importance information of the topological structure.

[0103] Based on the weight distribution results, the control chip uses the graph convolutional network (GCN) architecture to build a three-level topology circuit topology association model. The switch circuit nodes, constant current circuit nodes and load circuit nodes are encoded as , the connection edges between nodes are . Using the node feature matrix (Contains attribute information of circuit elements corresponding to each node) and edge weight matrix (Adjacency matrix form, elements are edge weights ), through graph convolution operation ( is the adjacency matrix with self-loops added, for The diagonal node degree matrix of For the Layer node feature matrix, For the layer weight matrix, is the activation function), learns the topological association relationship between nodes, and builds a complete circuit topology association model.

[0104] Finally, the control chip inputs the original feature vector set into the circuit topology association model for feature fusion. A fusion algorithm based on the combination of the gated recurrent unit (GRU) and the topological attention mechanism is used. First, the topological attention mechanism is used to calculate the attention weights of each part of the feature vector based on the weights of each node and edge in the circuit topology association model. , the formula is ( is the first eigenvector parts, is a function for calculating attention scores). The attention weight and the original feature vector are then input into the GRU unit, and the gate mechanism 、 、 ( is the input feature, is the output feature, To reset the gate, To update the gate, is a candidate hidden state, is element-wise multiplication), to achieve selective fusion of features and ultimately generate a topologically enhanced feature vector, providing more accurate input data for subsequent anomaly detection.

[0105] As one example, the control chip, when inputting the original feature vector set into the circuit topology association model to perform feature fusion processing to generate a topology enhanced feature vector, includes:

[0106] Based on the node hierarchical relationship in the circuit topology association model, performing a topology node mapping process to divide the original feature vector set into a first feature subset corresponding to the switch circuit nodes, a second feature subset corresponding to the constant current circuit nodes, and a third feature subset corresponding to the load circuit nodes;

[0107] Performing switch control timing matching processing on the first feature subset to obtain a dynamic alignment result with the constant current characteristic of the constant current circuit node;

[0108] Performing constant current characteristic association processing on the second feature subset and the dynamic alignment result to generate an intermediate feature vector containing constant current parameters of the linear constant current chip;

[0109] Based on the physical connection topology relationship in the dual-load association matrix, convolution fusion processing is performed on the third feature subset and the intermediate feature vector to generate a topology enhanced feature vector with unified dimension.

[0110] In this embodiment, for a linear constant current circuit comprising a first switch tube and a linear constant current chip, the control chip divides the original feature vector set into three feature subsets corresponding to the switch circuit node, the constant current circuit node, and the load circuit node based on the node hierarchical relationship of the circuit topology association model. The first feature subset is subjected to switch control timing matching processing to achieve dynamic alignment with the constant current characteristics of the constant current circuit node, ensuring the synergy between the switching action and the constant current characteristics. The second feature subset is subjected to constant current characteristic association processing with the dynamic alignment result, and the constant current parameters of the linear constant current chip are incorporated to generate an intermediate feature vector, thereby enhancing the relevance and accuracy of the relevant features of the constant current circuit. Finally, based on the physical connection topology relationship reflected by the dual-load association matrix, the third feature subset and the intermediate feature vector are subjected to convolution fusion processing, deeply integrating the load characteristics with the constant current circuit characteristics and unifying the feature dimensions, thereby generating a topology-enhanced feature vector, providing more accurate and structured feature data for subsequent anomaly detection. Therefore, this embodiment effectively integrates the characteristic correlations of the switching circuit, constant current circuit and load circuit in the topological structure by performing hierarchical and targeted processing and fusion of the original feature vector set, so that the generated topology enhanced feature vector can more comprehensively and accurately reflect the actual operating status of the circuit. Compared with the traditional feature processing method, the detection accuracy and analysis depth of circuit abnormalities are improved, especially when identifying complex problems such as mismatch between switching timing and constant current characteristics, abnormal load and constant current circuit parameters, etc., it can enhance the accuracy and reliability of LED monitoring circuit fault diagnosis and ensure stable circuit operation.

[0111] Specifically, the working process of this embodiment is as follows:

[0112] When the LED monitoring circuit is running, the control chip starts to process the original feature vector set. First, based on the constructed circuit topology association model, the improved topology node mapping algorithm is used to perform topology node mapping processing. The model presents the switch circuit nodes, constant current circuit nodes and load circuit nodes in the circuit and their connection relationships in the form of a graph structure. The control chip first analyzes the key attribute characteristics of each node, such as the switching frequency of the switch circuit node, the output current range of the constant current circuit node, the impedance of the load circuit node, etc., and constructs a node feature library. For each feature vector in the original feature vector set, , by calculating its correlation with each node feature To divide the feature subset, the calculation formula is ,in They correspond to the switch circuit node, constant current circuit node, and load circuit node respectively; represents the feature dimension, is the total number of feature dimensions; For the The weight coefficient of each feature dimension is set according to the importance of the feature to the circuit function; is the eigenvector In the The eigenvalues ​​of the dimensions, It is The node in The characteristic value of the dimension. The feature subset corresponding to the smallest node is the subset to which the feature vector belongs, thereby dividing the original feature vector set into the first feature subset, the second feature subset and the third feature subset.

[0113] After completing the feature subset division, the switch control timing matching process is performed on the first feature subset. The first switch tube is controlled by the PWM signal output by the control chip. Its switch timing directly affects the input stability and output constant current characteristics of the linear constant current chip. The control chip obtains the constant current characteristic data of the linear constant current chip under different input conditions and builds a constant current characteristic database. In order to achieve dynamic alignment of the switch control timing and the constant current characteristic, the following timing matching algorithm is proposed: the position parameter of the particle is set to the frequency of the PWM signal. and duty cycle , the speed parameter is and The deviation between the output current of the linear constant current chip and the target constant current value is used as the fitness function. ,in yes The actual output current of the linear constant current chip at any moment, is the target constant current value, is the sampling period. In each iteration, the particles are 、 Update speed, according to the formula 、 Update location, where is the number of iterations, is the inertia weight, is the learning factor, is a random number between 0 and 1, is the particle’s own historical optimal position, is the global optimal position. Continuously iteratively adjust and , until the fitness function Less than the set threshold , and obtain the dynamic alignment result that best matches the constant current characteristics of the constant current circuit node.

[0114] Subsequently, the second feature subset is associated with the dynamic alignment result for constant current characteristic processing. The second feature subset contains multiple parameter features of the linear constant current chip, such as input voltage fluctuation, output current ripple, power loss, etc. The control chip uses an improved feature association fusion algorithm to construct a feature association matrix For each feature in the second feature subset and each timing parameter in the dynamic alignment results , through the formula Calculate the association weight, where Characterized by and timing parameters The cosine similarity of is the number of features in the second feature subset, The number of parameters for the dynamic alignment result. The second feature subset is weightedly fused to generate an intermediate feature vector containing the constant current parameters of the linear constant current chip.

[0115] Finally, based on the physical connection topology relationship in the dual-load association matrix, the third feature subset and the intermediate feature vector are convolutionally fused. The dual-load association matrix describes in detail the electrical connection and electromagnetic coupling characteristics between the first load LED1 and the second load LED2. The control chip uses an enhanced topology-aware convolution fusion algorithm to convert the third feature subset, the intermediate feature vector, and the dual-load association matrix into a multidimensional tensor form. Special topological convolution kernels are designed. , whose parameters are initialized according to the dual load correlation matrix and circuit topology to better capture the topological relationship between loads. In the convolution calculation process, the topological weight coefficient is introduced , the coefficient is determined by the elements of the double-load correlation matrix and the connection strength of the circuit nodes. The convolution calculation formula is ,in is the output tensor element, is the input tensor element, 、 is the convolution kernel size. After multiple layers of convolution, pooling, and activation, the output is dimensionally resized and normalized to generate a topologically enhanced feature vector with uniform dimensions. This provides more accurate, comprehensive, and circuit topology-integrated feature data for subsequent anomaly detection.

[0116] As one example, inputting the topology enhancement feature vector into an anomaly detection model for risk quantification processing and outputting an anomaly risk value includes:

[0117] Decomposing the topology enhanced feature vector into a time domain feature component and a frequency domain feature component;

[0118] Inputting the time domain feature component and the frequency domain feature component into a preset anomaly detection model, performing matching calculation processing with preset time domain benchmark features and frequency domain benchmark features, respectively, to generate a time domain matching score and a frequency domain matching score;

[0119] Based on a preset risk weight coefficient, weighted risk quantification processing is performed on the time domain matching score and the frequency domain matching score to obtain an abnormal risk value.

[0120] In this embodiment, the control chip decomposes the topology enhanced feature vector into a time domain feature component and a frequency domain feature component to restore the characteristics of the signal in the time dimension and the frequency dimension. Subsequently, the two feature components are respectively input into the preset anomaly detection model, and the matching degree is calculated with the preset time domain benchmark feature and frequency domain benchmark feature. By quantifying the difference between the actual feature and the benchmark feature, a time domain matching degree score and a frequency domain matching degree score are generated to intuitively reflect the degree of deviation between the circuit operation state and the normal state. Finally, based on the preset risk weight coefficient, the time domain and frequency domain matching degree scores are weighted risk quantified, and the difference in the degree of influence of the time domain and frequency domain features on the circuit anomaly is comprehensively considered. The score is converted into an abnormal risk value to achieve a quantitative assessment of the circuit operation risk. In summary, this embodiment can comprehensively and meticulously evaluate the circuit operation state in the time domain and frequency domain by decomposing the topology enhanced feature vector and calculating the matching degree with the benchmark feature respectively, and then combining the risk weight coefficient weighted quantification. Compared with the single-dimensional anomaly detection method, the accuracy and reliability of anomaly judgment are significantly improved.

[0121] Specifically, the working process of this embodiment is as follows:

[0122] During the operation of the LED monitoring circuit, after the control chip obtains the topology enhancement feature vector, it carries out risk quantification processing.

[0123] First, the topology enhancement feature vector is decomposed. The control chip adopts the following improved feature decomposition algorithm: construct an attention weight calculation module, for each element in the topology enhancement feature vector , through the formula Calculate its attention weight, where is a trainable weight matrix, is the bias vector, is the number of feature vector elements. Based on the inherent characteristics of features in the time domain and frequency domain, combined with the attention weight, the topological enhancement feature vector is decomposed into time domain feature components and frequency domain characteristic components For example, for features with obvious time series variation patterns, higher temporal attention weights are assigned and divided into the temporal feature components.

[0124] Then, the time domain feature component and the frequency domain feature component are input into the preset anomaly detection model for matching calculation. The anomaly detection model adopts an improved structure based on the generative adversarial network (GAN). According to the time domain characteristic components Generate time-domain signatures of simulations , discriminator Then the input is judged to be a real time domain reference feature Or the generated simulation features Through adversarial training, the parameters of the generator and discriminator are optimized to make the generated simulated features as close as possible to the real benchmark features. After the training is completed, the structural similarity index (SSIM) algorithm is used to calculate the time domain matching score. , the formula is ,in 、 are the means of the time domain benchmark characteristics and simulation characteristics, are their variances, is the covariance, 、 Is a constant. For the frequency domain feature component, the GAN-based structure is also used, and the frequency domain amplitude and phase comprehensive difference measurement is introduced when calculating the similarity. The formula Calculate the frequency domain matching score, where is the frequency domain reference feature, is the frequency domain characteristic component, is the adjustment coefficient, represent the amplitude and phase of the feature respectively.

[0125] Finally, the weighted risk is quantified based on the preset risk weight coefficient. The control chip uses the following weight dynamic adjustment algorithm: define multiple fuzzy variables, such as time domain matching score , frequency domain matching score , Circuit operating environment temperature , working hours etc. Construct a fuzzy rule base, for example, Lower, Lower and When the risk is high, appropriately increase the time domain and frequency domain risk weight coefficients. and Through the fuzzy inference system, the risk weight coefficient is dynamically adjusted according to the actual value of each fuzzy variable. Finally, the formula By calculating the abnormal risk value, the operating risk of the LED monitoring circuit can be accurately quantified, providing reliable data support for timely detection of potential circuit abnormalities and ensuring stable circuit operation.

[0126] When the abnormality risk value calculated by the control chip exceeds a preset threshold, it indicates a potential failure risk in the LED monitoring circuit. At this point, the control chip generates a corresponding switch control instruction. This instruction, through the switch circuit in the control circuit, adjusts the operating parameters of the first switch transistor and the linear constant current chip. For example, it adjusts the output current of the linear constant current chip or controls the on / off state of the first switch transistor, thereby changing the power supply to the first load LED1 and the second load LED2 in the load circuit. This dynamically adjusts the operating state of the load circuit, reduces the risk of circuit abnormalities, and ensures the safe and stable operation of the LED monitoring circuit.

[0127] The above is only used to illustrate the technical solution of the present invention and is not intended to limit it. Other modifications or equivalent substitutions made to the technical solution of the present invention by ordinary technicians in this field should be included in the scope of the claims of the present invention as long as they do not depart from the spirit and scope of the technical solution of the present invention.

Claims

1. A control method for an LED monitoring circuit, characterized in that: The following steps are included: The current signal of the load circuit is collected by a sampling circuit, and dynamic time-frequency feature extraction processing is performed on the current signal to obtain an original feature vector set; Based on the circuit topology parameters of the LED monitoring circuit, a circuit topology association model is constructed, and the original feature vector set is input into the circuit topology association model for feature fusion processing to generate a topology enhanced feature vector; Inputting the topology enhanced feature vector into an anomaly detection model for risk quantification processing, and outputting an anomaly risk value; When the abnormal risk value exceeds a preset threshold, a switch control instruction is generated to adjust the working state of the load circuit; The circuit topology association model is constructed based on the circuit topology parameters of the LED monitoring circuit, and the original feature vector set is input into the circuit topology association model for feature fusion processing to generate a topology enhanced feature vector, including: Obtaining impedance parameters of a wire from the output end of the switching circuit to the input end of the linear constant current circuit; Obtaining a current stability parameter and a voltage drop characteristic parameter from the output end of the linear constant current circuit to the input end of the load circuit; Based on the conductor impedance parameter, the current stability parameter and the voltage drop characteristic parameter, a multi-dimensional topology edge weight calculation rule is defined; Performing weight distribution processing on each feature vector in the original feature vector set according to the multi-dimensional topological edge weight calculation rule to obtain a weight distribution result; Constructing a circuit topology association model of a three-level topology including a switch circuit node, a constant current circuit node, and a load circuit node based on the weight distribution result; The original feature vector set is input into the circuit topology association model for feature fusion processing to generate a topology enhanced feature vector.

2. The control method of the LED monitoring circuit according to claim 1, characterized in that: The current signal of the load circuit is collected by the sampling circuit, and dynamic time-frequency feature extraction processing is performed on the current signal to obtain an original feature vector set, including: Collecting a first current signal of the first load LED1 and a second current signal of the second load LED2 by the sampling circuit; Performing time domain waveform analysis on the first current signal to extract rising edge time, falling edge time, and pulse width modulation duty cycle features to generate a first time domain feature vector; Performing frequency domain transformation processing on the second current signal to extract fundamental wave amplitude, third harmonic distortion rate, and spectrum energy distribution characteristics to generate a second frequency domain feature vector; Constructing a dual-load correlation matrix including an impedance coupling coefficient according to a physical connection topology relationship between the first load LED1 and the second load LED2 on the circuit board; The first time-domain eigenvector, the second frequency-domain eigenvector, and the dual-load correlation matrix are aligned in terms of their characteristic dimensions to generate an original eigenvector set containing spatiotemporal correlation characteristics.

3. The control method of the LED monitoring circuit according to claim 2, characterized in that: The step of inputting the original feature vector set into the circuit topology association model for feature fusion processing to generate a topology enhanced feature vector includes: Based on the node hierarchical relationship in the circuit topology association model, performing a topology node mapping process to divide the original feature vector set into a first feature subset corresponding to the switch circuit nodes, a second feature subset corresponding to the constant current circuit nodes, and a third feature subset corresponding to the load circuit nodes; Performing switch control timing matching processing on the first feature subset to obtain a dynamic alignment result with the constant current characteristic of the constant current circuit node; Performing constant current characteristic association processing on the second feature subset and the dynamic alignment result to generate an intermediate feature vector containing constant current parameters of the linear constant current chip; Based on the physical connection topology relationship in the dual-load association matrix, convolution fusion processing is performed on the third feature subset and the intermediate feature vector to generate a topology enhanced feature vector with unified dimension.

4. The control method of the LED monitoring circuit according to claim 3, characterized in that: The step of inputting the topology enhancement feature vector into an anomaly detection model for risk quantification processing and outputting an anomaly risk value includes: Decomposing the topology enhanced feature vector into a time domain feature component and a frequency domain feature component; Inputting the time domain feature component and the frequency domain feature component into a preset anomaly detection model, performing matching calculation processing with preset time domain benchmark features and frequency domain benchmark features, respectively, to generate a time domain matching score and a frequency domain matching score; Based on a preset risk weight coefficient, weighted risk quantification processing is performed on the time domain matching score and the frequency domain matching score to obtain an abnormal risk value.

5. An LED monitoring circuit, characterized in that: The system comprises a load circuit, a control circuit, and a sampling circuit. The sampling circuit is used to collect a status signal of the load circuit. The input of the sampling circuit is connected to the load circuit, and the output of the sampling circuit is connected to the input of the control circuit. The control circuit comprises a switch circuit and a control chip. The output of the control chip is connected to the controlled end of the switch circuit, the output of the switch circuit is connected to the input of the load circuit, and the output of the sampling circuit is connected to the control port of the control chip. The switch circuit is used to control the on / off of the load circuit. The control chip is used to: The sampling circuit collects the current signal of the load circuit, performs dynamic time-frequency feature extraction processing on the current signal, and obtains an original feature vector set; Based on the circuit topology parameters of the LED monitoring circuit, a circuit topology association model is constructed, and the original feature vector set is input into the circuit topology association model for feature fusion processing to generate a topology enhanced feature vector; Inputting the topology enhanced feature vector into an anomaly detection model for risk quantification processing, and outputting an anomaly risk value; When the abnormal risk value exceeds a preset threshold, a switch control instruction is generated to adjust the working state of the load circuit; The control chip is used to execute the control method of the LED monitoring circuit according to claim 1.

6. The LED monitoring circuit according to claim 5, characterized in that: The load circuit includes a first load LED1 and a second load LED2, and the current signal collected by the sampling circuit includes a first current signal of the first load LED1 and a second current signal of the second load LED2; The control chip is specifically configured to execute the following sub-steps when collecting the current signal of the load circuit through the sampling circuit, performing dynamic time-frequency feature extraction processing on the current signal, and obtaining the original feature vector set: collecting the first current signal of the first load LED1 and the second current signal of the second load LED2 through the sampling circuit; Performing time domain waveform analysis on the first current signal to extract rising edge time, falling edge time, and pulse width modulation duty cycle features to generate a first time domain feature vector; Performing frequency domain transformation processing on the second current signal to extract fundamental wave amplitude, third harmonic distortion rate, and spectrum energy distribution characteristics to generate a second frequency domain feature vector; Constructing a dual-load correlation matrix including an impedance coupling coefficient according to a physical connection topology relationship between the first load LED1 and the second load LED2 on the circuit board; The first time-domain eigenvector, the second frequency-domain eigenvector, and the dual-load correlation matrix are aligned in terms of their characteristic dimensions to generate an original eigenvector set containing spatiotemporal correlation characteristics.

7. The LED monitoring circuit according to claim 6, characterized in that: The circuit further includes a linear constant current circuit, which is used to provide a stable current for the load circuit, wherein the output end of the linear constant current circuit is connected to the input end of the load circuit, the output end of the switching circuit is connected to the input end of the linear constant current circuit, and the input end of the sampling circuit is connected to the sampling end of the linear constant current circuit; The control chip is specifically configured to perform the following sub-steps when executing the circuit topology parameters based on the LED monitoring circuit, constructing a circuit topology association model, and inputting the original feature vector set into the circuit topology association model for feature fusion processing to generate a topology enhanced feature vector: Obtaining an impedance parameter of a wire from an output end of the switching circuit to an input end of the linear constant current circuit; Obtaining a current stability parameter and a voltage drop characteristic parameter from the output end of the linear constant current circuit to the input end of the load circuit; Based on the conductor impedance parameter, the current stability parameter and the voltage drop characteristic parameter, a multi-dimensional topology edge weight calculation rule is defined; Performing weight distribution processing on each feature vector in the original feature vector set according to the multi-dimensional topological edge weight calculation rule to obtain a weight distribution result; Constructing a circuit topology association model of a three-level topology including a switch circuit node, a constant current circuit node, and a load circuit node based on the weight distribution result; The original feature vector set is input into the circuit topology association model for feature fusion processing to generate a topology enhanced feature vector.

8. The LED monitoring circuit according to claim 7, characterized in that: The linear constant current circuit includes a first switch tube and a linear constant current chip, the output end of the switch circuit is connected to the input end of the linear constant current chip, the output end of the linear constant current chip is connected to the input end of the load circuit, and the first switch tube is connected to the output end of the linear constant current chip; The control chip is specifically configured to perform the following sub-steps when inputting the original feature vector set into the circuit topology association model for feature fusion processing to generate a topology enhanced feature vector: Based on the node hierarchical relationship in the circuit topology association model, performing a topology node mapping process to divide the original feature vector set into a first feature subset corresponding to the switch circuit nodes, a second feature subset corresponding to the constant current circuit nodes, and a third feature subset corresponding to the load circuit nodes; Performing switch control timing matching processing on the first feature subset to obtain a dynamic alignment result with the constant current characteristic of the constant current circuit node; Performing constant current characteristic association processing on the second feature subset and the dynamic alignment result to generate an intermediate feature vector containing constant current parameters of the linear constant current chip; Based on the physical connection topology relationship in the dual-load association matrix, convolution fusion processing is performed on the third feature subset and the intermediate feature vector to generate a topology enhanced feature vector with unified dimension.

9. The LED monitoring circuit according to claim 8, characterized in that: When the control chip inputs the topology enhancement feature vector into the anomaly detection model for risk quantification processing and outputs an anomaly risk value, it is specifically configured to execute the following sub-steps: Decomposing the topology enhanced feature vector into a time domain feature component and a frequency domain feature component; Inputting the time domain feature component and the frequency domain feature component into a preset anomaly detection model, performing matching calculation processing with preset time domain benchmark features and frequency domain benchmark features, respectively, to generate a time domain matching score and a frequency domain matching score; Based on a preset risk weight coefficient, weighted risk quantification processing is performed on the time domain matching score and the frequency domain matching score to obtain an abnormal risk value.

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