Integrated circuit device and forming method thereof

Abstract

The invention provides an integrated circuit device and a forming method thereof, and the method comprises the following steps: forming a thin-film resistor, a titanium nitride layer and an anti-reflection layer which are stacked on a semiconductor substrate, and forming a protection layer on the side walls of the thin-film resistor, the titanium nitride layer and the anti-reflection layer; and carrying out dry etching on the anti-reflection layer, and carrying out wet etching on the titanium nitride layer to expose the thin-film resistor and form a foot pad. By adjusting the etching sequence, namely, the sequence of forming the thin film resistor firstly and then forming the foot pad, the process window of the foot pad can be effectively improved, and the problem of photoresist residue is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to an integrated circuit device and a method for forming the same. Background Art

[0002] Due to its excellent properties such as high resistivity, low temperature coefficient of resistance, high stability, no parasitic effects and easy film formation, chromium silicon thin film resistors are widely used in hybrid integrated circuits.

[0003] Currently, the preparation methods of integrated circuit devices include: Figure 1A As shown, a chromium silicon thin layer 31, a titanium nitride layer 32 and an anti-reflection layer 33 are sequentially formed on a substrate, wherein the substrate includes a silicon substrate 10, a bottom dielectric layer 20 located on the silicon substrate 10, and a first metal interconnection layer M1 buried in the bottom dielectric layer 20; Figure 1B As shown, a patterned first photoresist layer 34 is formed on the anti-reflection layer 33; Figure 1C As shown, the patterned first photoresist layer 34 is used as a mask, the anti-reflection layer 33 is dry-etched to expose the titanium nitride layer 32, and the first photoresist layer 34 is removed; Figure 1D As shown, the anti-reflection layer 33 is used as a mask to wet-etch the titanium nitride layer 32 to expose the chromium silicon thin layer 31 and form a pad 32'; Figure 1F As shown, a patterned second photoresist layer 35 is formed, and the patterned second photoresist layer 35 covers the anti-reflection layer 33 and the chromium silicon thin layer 31 between the anti-reflection layers 33; Figure 1G As shown, the patterned second photoresist layer 35 is used as a mask to dry-etch the chromium silicon thin layer 31 to form a chromium silicon thin film resistor 31 ′ and expose the bottom dielectric layer 20 .

[0004] Figure 1D The wet etching makes the cross section of the pad 32' into an inverted trapezoidal shape (specifically as shown in FIG. Figure 1E During the wet etching process, to ensure complete removal of the titanium nitride layer 32 outside the anti-reflective layer 33, the wet solution must remain in the solution for a sufficiently long time. As time passes, the angle θ between the lower edge of the foot 32' and the waist decreases, shortening the length of the lower edge of the inverted trapezoid. In severe cases, overetching may occur, causing the lower edge of the foot 32' to be etched through, resulting in a narrow process window for the foot 32', which poses a challenge to the large-scale production of integrated circuit devices. Furthermore, when forming chromium silicon thin film resistors, there is a risk of residual photoresist on the sidewalls of the foot 32' (i.e., at the angle). Summary of the Invention

[0005] The object of the present invention is to provide an integrated circuit device and a method for forming the same, which can improve the process window of the pad and also improve the problem of photoresist residue.

[0006] In order to solve the above technical problems, the present invention provides a method for forming an integrated circuit device, comprising the following steps:

[0007] forming a thin film resistor, a titanium nitride layer and an anti-reflection layer stacked on a semiconductor substrate, wherein a protective layer is formed on the sidewalls of the thin film resistor, the titanium nitride layer and the anti-reflection layer;

[0008] The anti-reflection layer is dry-etched, and the titanium nitride layer is wet-etched to expose the thin film resistor and form a pad.

[0009] Optionally, a specific method for forming the thin film resistor is:

[0010] forming a high-resistance thin film, a titanium nitride layer and an anti-reflection layer in sequence on the semiconductor substrate through a deposition process;

[0011] forming a patterned first photoresist layer on the anti-reflection layer, wherein the patterned first photoresist layer has a first pattern;

[0012] Using the patterned first photoresist layer as a mask, sequentially etching the anti-reflection layer, the titanium nitride layer, and the high-resistance thin film through a dry etching process to form a stacked thin-film resistor, the titanium nitride layer, and the anti-reflection layer below the first pattern;

[0013] The remaining first photoresist layer is removed.

[0014] Furthermore, a first metal interconnection layer is formed in the semiconductor substrate, the first metal interconnection layer includes a plurality of metal blocks arranged at intervals, and the first pattern is located above the interval between two adjacent metal blocks.

[0015] Furthermore, there is a first distance between the first metal interconnection layer and the high resistance film, and the value of the first distance is

[0016] Furthermore, the thickness of the high resistance film is The thickness of the titanium nitride layer is The thickness of the anti-reflection layer is The thickness of the protective layer is

[0017] Furthermore, the material of the high-resistance film is chromium silicide, and the material of the protective layer is silicon-rich oxide.

[0018] Furthermore, the protective layer also covers the upper surface of the anti-reflection layer and the upper surface of the semiconductor substrate.

[0019] Optionally, the specific method of forming the foot pad is:

[0020] forming a patterned second photoresist layer on the protective layer, wherein the patterned second photoresist layer has an opening, the opening is located above the anti-reflection layer, and the opening exposes the protective layer located away from both ends of the anti-reflection layer;

[0021] At the opening, using the patterned second photoresist layer as a mask, a dry etching process is used to sequentially etch the protective layer and the anti-reflection layer, and the etching stops at the titanium nitride layer;

[0022] removing the remaining second photoresist layer;

[0023] The titanium nitride layer is etched using the protective layer and the anti-reflection layer as masks using a wet etching process to expose the thin film resistor and form the pad.

[0024] Furthermore, each of the pads is arranged close to an end of the thin film resistor.

[0025] On the other hand, the present invention also provides an integrated circuit device, which is prepared using the above-mentioned method for forming an integrated circuit device, including a thin film resistor formed in a semiconductor substrate, and pads and an anti-reflection layer stacked on both ends of the thin film resistor. A protective layer is also formed on the surface of the semiconductor substrate, and the protective layer also covers the upper surface of the anti-reflection layer, the side walls of the two ends of the thin film resistor, and the side walls of the pads and anti-reflection layer close to the ends of the thin film resistor, and exposes the upper surface of the thin film resistor located between the two pads.

[0026] Compared with the prior art, the present invention has the following unexpected technical effects:

[0027] The present invention provides an integrated circuit device and a method for forming the same. The method comprises the following steps: forming a stacked thin-film resistor, a titanium nitride layer, and an anti-reflective layer on a semiconductor substrate, with a protective layer formed on the sidewalls of the thin-film resistor, titanium nitride layer, and anti-reflective layer; dry etching the anti-reflective layer and wet etching the titanium nitride layer to expose the thin-film resistor and form a pad. By adjusting the etching sequence, namely forming the thin-film resistor first and then the pad, the present invention effectively improves the process window for the pad and alleviates the problem of photoresist residue. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1A-1G The figure is a schematic diagram of the structure involved in each step in the preparation process of an integrated circuit device.

[0029] Figure 2A schematic flow chart of a method for forming an integrated circuit device provided in one embodiment of the present invention.

[0030] Figures 3A-3H A schematic diagram of the structures involved in each step of the preparation process of a method for forming an integrated circuit device provided by one embodiment of the present invention.

[0031] Description of reference numerals:

[0032] Figure 1A-1G Middle: 10 - silicon substrate; M1 - first metal interconnect layer; 20 - bottom dielectric layer; 31 - chromium silicon thin layer; 31' - chromium silicon thin film resistor; 32 - titanium nitride layer; 32' - pad; 33 - anti-reflective layer; 34 - first photoresist layer; 35 - second photoresist layer;

[0033] Figures 3A-3H middle:

[0034] 100 - substrate; 210 - bottom dielectric layer; 221 - first plug; 222 - first metal interconnect layer; 222' - metal block; 310 - high-resistance film; 310' - thin film resistor; 320 - titanium nitride layer; 320' - pad; 330 - anti-reflective layer; 410 - first photoresist layer; 420 - second photoresist layer; 421 - opening. DETAILED DESCRIPTION

[0035] The following is a further detailed description of an integrated circuit device and a method for forming the same according to the present invention. The present invention will be described in more detail below with reference to the accompanying drawings, which illustrate preferred embodiments of the present invention. It should be understood that those skilled in the art may modify the present invention described herein while still achieving the advantageous effects of the present invention. Therefore, the following description should be understood as a general guide for those skilled in the art and not as a limitation of the present invention.

[0036] For the sake of clarity, not all features of actual embodiments are described. In the following description, well-known functions and structures are not described in detail because they would obscure the present invention with unnecessary detail. It should be understood that in the development of any actual embodiment, numerous implementation details must be made to achieve the developer's specific goals, such as adapting from one embodiment to another to accommodate system or business constraints. Furthermore, it should be understood that such development work may be complex and time-consuming, but is nevertheless a routine undertaking for those skilled in the art.

[0037] In order to make the purpose and features of the present invention more obvious and easy to understand, the specific embodiments of the present invention are further described below with reference to the accompanying drawings. It should be noted that the drawings are all in a very simplified form and use non-precise ratios, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0038] Figure 2 FIG. 1 is a flow chart of a method for forming an integrated circuit device provided in this embodiment. Figure 2 As shown, the present embodiment provides a method for forming an integrated circuit device, comprising the following steps:

[0039] Step S10: forming a stacked thin film resistor, a titanium nitride layer, and an anti-reflection layer on a semiconductor substrate, wherein a protective layer is formed on the sidewalls of the thin film resistor, the titanium nitride layer, and the anti-reflection layer;

[0040] Step S20: dry-etching the anti-reflection layer and wet-etching the titanium nitride layer to expose the thin film resistor and form a pad.

[0041] This embodiment can effectively improve the process window of the pads and alleviate the problem of photoresist residue by adjusting the etching sequence, that is, forming the thin film resistor first and then forming the pads.

[0042] Figures 3A-3H The following is a schematic diagram of the structure of each step involved in the preparation process of a method for forming an integrated circuit device provided in this embodiment. Figures 3A-3H A method for forming an integrated circuit device provided in this embodiment is described in detail.

[0043] See also Figures 3A-3D First, step S10 is performed to form a stacked thin film resistor 310 ′, a titanium nitride layer 320 and an anti-reflection layer 330 on the semiconductor substrate 100 , and a protective layer is formed on the sidewalls of the thin film resistor 310 ′, the titanium nitride layer 320 and the anti-reflection layer 330 .

[0044] This step specifically includes:

[0045] like Figure 3A As shown, first, a semiconductor substrate 100 is provided, wherein the semiconductor substrate 100 includes a substrate 100 and a first interconnect structure layer located on the substrate 100 .

[0046] The substrate 100 includes a base, which is, for example, a silicon-on-insulator (SOI) base, a bulk silicon base, a germanium base, a germanium silicon base, an indium phosphide (InP) base, a gallium arsenide (GaAs) base, or a germanium-on-insulator base.

[0047] In one embodiment, an epitaxial layer is formed on the substrate, and a device layer is formed on the epitaxial layer. Various devices, such as transistors, capacitors, resistors, and similar components, can be formed on the surface of the epitaxial layer using any suitable method. Of course, some devices can also be formed within the epitaxial layer.

[0048] The first interconnect structure layer includes a first metal interconnect layer 222 and a bottom dielectric layer 210. The bottom dielectric layer 210 is located on the device layer. The first metal interconnect layer 222 is buried in the bottom dielectric layer 210. The first metal interconnect layer 222 is connected to various devices on the epitaxial layer through a first plug 221 on the side close to the substrate 100.

[0049] There is a first distance between the upper surface of the first metal interconnection layer 222 and the upper surface of the bottom dielectric layer 210, and the value of the first distance is This is to avoid interference between the thin film resistor 310' formed subsequently and the first metal interconnection layer 222. The first metal interconnection layer 222 includes a plurality of metal blocks 222' spaced apart.

[0050] Please continue reading Figure 3A Then, a high resistance film 310 , a titanium nitride layer 320 and an anti-reflection layer 330 are sequentially formed on the bottom dielectric layer 210 through a deposition process.

[0051] The material of the high-resistance film 310 can be chromium silicide. Since the thickness of the high-resistance film 310 varies with the film resistor 310', the thickness of the high-resistance film 310 can be adjusted according to the design. The titanium nitride layer 320 acts as a conductive layer or diffusion barrier, preventing interdiffusion between the high-resistance film 310 material and the overlying metal (such as aluminum or copper), while providing a good electrical contact interface. The anti-reflection layer 330 can reduce light reflection interference in the subsequent photolithography process. It also reduces the standing wave effect caused by the high reflectivity of titanium nitride by reducing the intensity of reflected light, thereby ensuring that the development result after the photoresist exposure is closer to the designed pattern and avoiding critical dimension (CD) deviation. It can also serve as an interface optimization layer to alleviate the physical / chemical property differences between different materials (such as titanium nitride and photoresist), improve the adhesion of the photoresist, and reduce process fluctuations during development and etching. In addition, the anti-reflection layer 330 can also serve as a passivation layer to protect the underlying titanium nitride layer 320 and high-resistance film 310 from damage in subsequent processes (such as wet etching or oxidation), thereby ensuring the long-term stability of the resistor.

[0052] In one embodiment, the thickness of the high resistance film 310 is The thickness of the titanium nitride layer 320 is In order to avoid the subsequent alignment process from not being able to proceed normally due to the thickness being too thick, and to avoid the subsequent formation of the foot 320' having poor effect due to the thickness being too thin, the thickness of the anti-reflection layer 330 is

[0053] like Figure 3B As shown, a patterned first photoresist layer 410 is then formed on the anti-reflective layer 330. The patterned first photoresist layer 410 has a first pattern. The first pattern is located above the gap between two adjacent metal blocks 222', that is, there is no metal block 222' directly below the first pattern.

[0054] like Figure 3C As shown, then, using the patterned first photoresist layer 410 as a mask, the anti-reflection layer 330, the titanium nitride layer 320 and the high-resistance film 310 are sequentially etched by a dry etching process to form a stacked thin film resistor 310', the titanium nitride layer 320 and the anti-reflection layer 330 under the first pattern.

[0055] The thin film resistor 310 ′ is located below the first pattern, that is, there is no metal block 222 ′ directly below the thin film resistor 310 ′.

[0056] Next, the remaining first photoresist layer 410 is removed.

[0057] like Figure 3D As shown, a protective layer is formed, which covers the upper surface and sidewalls of the anti-reflection layer 330, the sidewalls of the titanium nitride layer 320, the sidewalls of the thin film resistor 310', and the exposed upper surface of the bottom dielectric layer 210. The protective layer is used to protect the sidewalls of the titanium nitride layer 320 during subsequent etching processes.

[0058] The material of the protective layer is silicon rich oxide, and the thickness of the protective layer is

[0059] See also Figure 3E-3H Then, step S20 is performed to dry-etch the anti-reflection layer 330 and wet-etch the titanium nitride layer 320 to expose the thin film resistor 310 ′ and form the foot 320 ′.

[0060] This step specifically includes:

[0061] like Figure 3E As shown, first, a patterned second photoresist layer 420 is formed on the protective layer, and the patterned second photoresist layer 420 has an opening 421. The opening 421 is located above the anti-reflection layer 330, and the opening 421 exposes the protective layer located away from both ends of the anti-reflection layer 330.

[0062] like Figure 3FAs shown, then, at the opening 421, the protective layer and the anti-reflection layer 330 are etched in sequence using a dry etching process with the patterned second photoresist layer 420 as a mask, and the etching stops at the titanium nitride layer 320. At this time, the upper surface of the thin film resistor 310' is still covered by the titanium nitride layer 320.

[0063] Next, the remaining second photoresist layer 420 is removed.

[0064] like Figure 3G As shown, the titanium nitride layer 320 is then etched using a wet etching process with the protective layer and the anti-reflection layer 330 as masks to expose the thin film resistor 310', so that the remaining titanium nitride layer 320 forms two feet 320' respectively located at the two ends of the thin film resistor 310', that is, each of the feet 320' is arranged close to the end of the thin film resistor.

[0065] like Figure 3H As shown, in this step, the wet etching solution only contacts the side wall of the pad 320' located below the opening 421, and the side wall of the pad 320' away from the opening 421 is covered by the protective layer. Therefore, the wet etching solution only corrodes the side wall of the pad 320' located below the opening 421, forming a right-angled trapezoidal shape in cross section. Among them, the upper base of the right-angled trapezoid is longer than the lower base, and the vertical waist is the side wall of the pad 320' protected by the protective layer, and the oblique waist is the side wall of the pad 320' located below the opening 421. At this time, since only one side wall of the pad 320' has an inclination angle, compared with the prior art in which both sides of the pad 320' have an inclination angle, the length of the lower base is increased, thereby improving the process window of the pad 320' and improving the photoresist residue problem.

[0066] Next, an interlayer dielectric layer is formed on the protective layer, the interlayer dielectric layer also covering the exposed upper surface of the thin film resistor 310' and filling the gaps between the pads 320'; and at least one metal interconnection layer (for example, from the second metal interconnection layer to the Nth metal interconnection layer arranged at intervals from bottom to top, where N≥2) is formed in the interlayer dielectric layer above the pads 320', all metal interconnection layers are connected to each other through second plugs, wherein the second metal interconnection layer is electrically connected to the first metal interconnection layer 222 and the two pads 320' of the thin film resistor 310' through the second plugs.

[0067] Finally, a pin layer is formed on the surface of the interlayer dielectric layer, and the pin layer is electrically connected to the Nth metal interconnection layer through a plug.

[0068] The present application also provides an integrated circuit device, comprising a thin film resistor 310' formed in a semiconductor substrate 100, and footers 320' and an anti-reflection layer 330 stacked on both ends of the thin film resistor 310'. A protective layer is also formed on the surface of the semiconductor substrate 100, and the protective layer covers the upper surface of the anti-reflection layer 330, the side walls at both ends of the thin film resistor 310', and the side walls of the footers 320' and the anti-reflection layer 330 near the ends of the thin film resistor 310', and exposes the upper surface of the thin film resistor 310' located between the two footers 320'.

[0069] In summary, the present invention provides an integrated circuit device and a method for forming the same. The method comprises the following steps: forming a stacked thin-film resistor, a titanium nitride layer, and an anti-reflective layer on a semiconductor substrate, with a protective layer formed on the sidewalls of the thin-film resistor, titanium nitride layer, and anti-reflective layer; dry etching the anti-reflective layer and wet etching the titanium nitride layer to expose the thin-film resistor and form a pad. By adjusting the etching sequence, namely forming the thin-film resistor first and then the pad 320', the present invention effectively improves the process window for the pad and alleviates the problem of photoresist residue.

[0070] In addition, it should be noted that, unless otherwise specified or indicated, the terms "first" and "second" in the specification are only used to distinguish the various components, elements, steps, etc. in the specification, and are not used to indicate the logical relationship or sequential relationship between the various components, elements, steps, etc.

[0071] It is understood that although the present invention has been disclosed above with reference to preferred embodiments, the above embodiments are not intended to limit the present invention. For any person skilled in the art, without departing from the scope of the technical solution of the present invention, the technical content disclosed above can be used to make many possible changes and modifications to the technical solution of the present invention, or to modify it into an equivalent embodiment with equivalent changes. Therefore, any simple modification, equivalent change, and modification made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention still fall within the scope of protection of the technical solution of the present invention.

Claims

1. A method for forming an integrated circuit device, characterized in that: The following steps are involved: forming a thin film resistor, a titanium nitride layer and an anti-reflection layer stacked on a semiconductor substrate, wherein a protective layer is formed on the sidewalls of the thin film resistor, the titanium nitride layer and the anti-reflection layer; The anti-reflection layer is dry-etched, and the titanium nitride layer is wet-etched to expose the thin film resistor and form a pad.

2. The method for forming an integrated circuit device according to claim 1, wherein: The specific method of forming the thin film resistor is: forming a high-resistance thin film, a titanium nitride layer and an anti-reflection layer in sequence on the semiconductor substrate through a deposition process; forming a patterned first photoresist layer on the anti-reflection layer, wherein the patterned first photoresist layer has a first pattern; Using the patterned first photoresist layer as a mask, sequentially etching the anti-reflection layer, the titanium nitride layer, and the high-resistance thin film through a dry etching process to form a stacked thin-film resistor, the titanium nitride layer, and the anti-reflection layer below the first pattern; The remaining first photoresist layer is removed.

3. The method for forming an integrated circuit device according to claim 2, wherein: A first metal interconnection layer is formed in the semiconductor substrate. The first metal interconnection layer includes a plurality of metal blocks arranged at intervals. The first pattern is located above the interval between two adjacent metal blocks.

4. The method for forming an integrated circuit device according to claim 3, wherein: There is a first distance between the first metal interconnection layer and the high resistance film, and the value of the first distance is 5. The method for forming an integrated circuit device according to claim 2, wherein: The thickness of the high resistance film is The thickness of the titanium nitride layer is The thickness of the anti-reflection layer is The thickness of the protective layer is 6. The method for forming an integrated circuit device according to claim 2, wherein: The material of the high-resistance film is chromium silicide, and the material of the protective layer is silicon-rich oxide.

7. The method for forming an integrated circuit device according to claim 2, wherein: The protection layer also covers the upper surface of the anti-reflection layer and the upper surface of the semiconductor substrate.

8. The method for forming an integrated circuit device according to claim 1, wherein: The specific method of forming the foot pad is: forming a patterned second photoresist layer on the protective layer, wherein the patterned second photoresist layer has an opening, the opening is located above the anti-reflection layer, and the opening exposes the protective layer located away from both ends of the anti-reflection layer; At the opening, using the patterned second photoresist layer as a mask, a dry etching process is used to sequentially etch the protective layer and the anti-reflection layer, and the etching stops at the titanium nitride layer; removing the remaining second photoresist layer; The titanium nitride layer is etched using the protective layer and the anti-reflection layer as masks using a wet etching process to expose the thin film resistor and form the pad.

9. The method for forming an integrated circuit device according to claim 8, wherein: The pad is arranged close to the end of the thin film resistor.

10. An integrated circuit device manufactured by the method for forming an integrated circuit device according to claim 1, characterized in that: It includes a thin film resistor formed in a semiconductor substrate, and pads and an anti-reflection layer stacked on both ends of the thin film resistor. A protective layer is also formed on the surface of the semiconductor substrate. The protective layer also covers the upper surface of the anti-reflection layer, the side walls of the two ends of the thin film resistor, and the side walls of the pads and anti-reflection layer close to the ends of the thin film resistor, and exposes the upper surface of the thin film resistor located between the two pads.

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