Double-sided three-junction laminated cell

Abstract

The invention belongs to the technical field of solar cells, and discloses a double-sided triple-junction laminated cell, which is characterized in that a positive electrode region, a negative electrode region and an isolation layer are arranged on the back surface of crystalline silicon on the basis of a crystalline silicon-perovskite cell, p-type amorphous silicon and a positive electrode are arranged on the positive electrode region, n-type amorphous silicon and a negative electrode are arranged on the negative electrode region, and the isolation layer is arranged on the back surface of the crystalline silicon. The positive electrode region and the negative electrode region are divided by the isolation layer to form a three-junction solar cell, hole carriers and electron carriers in a crystalline silicon cell can be directionally transmitted to the positive electrode and the negative electrode, the photoelectric conversion efficiency is improved, in addition, a bottom layer perovskite cell is arranged on the isolation layer, and the photoelectric conversion efficiency is improved. The perovskite cell on the bottom layer can absorb reflected light on the back of the solar cell and indoor weak light to complete photoelectric conversion, the photoelectric conversion efficiency of the solar cell is remarkably improved, and the power generation power of the solar cell is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of solar cells, in particular to a double-sided triple-junction stacked cell. Background Art

[0002] The theoretical efficiency limit of a single-crystal silicon cell is only 29.4%. Currently, the highest efficiency of large-scale, industrialized, and technologically mature crystalline silicon modules is only 25%. This results in low energy density for photovoltaic power generation and requires a large amount of land, making large-scale deployment unsuitable in areas with limited land resources. Traditional perovskite-crystalline silicon tandem cells are single-sided. After light passes through the perovskite layer, the visible light is partially absorbed, while the crystalline silicon absorbs the near-infrared light that passes through the perovskite layer. This structure cannot generate electricity on both sides, and cannot utilize reflected light from the ground or rooftops, or low indoor light, to further improve cell efficiency.

[0003] Therefore, in order to improve the utilization rate of the backlight source of the perovskite-crystalline silicon tandem cell, the prior art CN118488725 A discloses a perovskite-crystalline silicon-perovskite tandem solar cell. In this technical solution, the perovskite cell is connected in series or in parallel with the crystalline silicon cell to support the front side of the three-layer solar cell, significantly improving the power generation efficiency of the cell. However, the present invention finds that the crystalline silicon cell and the perovskite cell in this technical solution are independent cell components. The three-layer stack structure is mainly made by the series and parallel connection of electrodes, which requires independent packaging. The resulting cell component structure is relatively complex, the cost is high, and the battery volume and weight are large. Summary of the Invention

[0004] The present invention provides a double-sided triple-junction stacked cell, which optimizes the structure of the bottom perovskite cell on the back of the crystalline silicon cell. Based on the crystalline silicon-perovskite cell, the cell is provided with a positive electrode region, a negative electrode region and an insulating layer on the back of the crystalline silicon. Heavily doped p-type silicon and a positive electrode are provided on the positive electrode region, and heavily doped n-type silicon and a negative electrode are provided on the negative electrode region. The positive electrode region and the negative electrode region are divided by the insulating layer, and the crystalline silicon cell forms a back-contact solar cell. Hole carriers and electron carriers in the back-contact crystalline silicon cell are directionally transmitted toward the positive electrode and the negative electrode, thereby improving the photoelectric conversion efficiency. In addition, a bottom perovskite cell is provided on the insulating layer, the hole transport layer on the bottom perovskite is connected to the positive electrode, and the electron transport layer on the bottom perovskite is connected to the negative electrode. The bottom perovskite cell can absorb the reflected light on the back of the solar cell and the weak light in the room to complete the photoelectric conversion, thereby significantly improving the photoelectric conversion efficiency of the solar cell and improving the power generation power of the solar cell.

[0005] The specific technical solutions of the present invention are: A double-sided triple-junction stacked cell comprises a crystalline silicon cell, wherein a surface perovskite cell assembly is provided on the upper surface of the crystalline silicon cell, and a positive electrode region, a negative electrode region and an insulating layer sandwiched between the positive electrode region and the negative electrode region are provided on the lower surface of the crystalline silicon cell; a bottom layer of heavily doped p-type silicon and a positive electrode is provided on the positive electrode region, a bottom layer of heavily doped n-type silicon and a negative electrode is provided on the negative electrode region, and a bottom layer of perovskite assembly is provided on the insulating layer, wherein the bottom layer of perovskite assembly comprises a bottom layer of perovskite, a bottom layer of hole transport layer connected to the positive electrode and a bottom layer of electron transport layer connected to the negative electrode.

[0006] Preferably, the insulating layer is made of transparent insulating material.

[0007] Preferably, the thickness of the insulating layer is 10 to 1000 nm.

[0008] Preferably, the width of the insulating layer is 20 to 200 μm.

[0009] Preferably, the material of the positive electrode is one or more of gold, silver, copper, aluminum, aluminum-doped zinc oxide, gallium-doped zinc oxide, fluorine-doped tin oxide, tin-doped indium oxide, zinc-doped indium oxide and cerium-doped indium oxide.

[0010] Preferably, the width of the positive electrode region is 20 to 200 μm.

[0011] Preferably, the material of the negative electrode is one or more of gold, silver, copper, aluminum, aluminum-doped zinc oxide, gallium-doped zinc oxide, fluorine-doped tin oxide, tin-doped indium oxide, zinc-doped indium oxide and cerium-doped indium oxide.

[0012] Preferably, the width of the negative electrode region is 20 to 200 μm.

[0013] Preferably, the crystalline silicon cell is n-type crystalline silicon and surface n-type amorphous silicon, a first composite layer is provided on the surface n-type amorphous silicon, the surface perovskite cell assembly includes a surface perovskite and a surface hole transport layer and a surface electron transport layer provided on both sides of the surface perovskite, the first composite layer is connected to the surface hole transport layer, and a transparent conductive oxide electrode is provided on the surface electron transport layer.

[0014] Preferably, the material of the first composite layer is one or more of aluminum-doped zinc oxide, gallium-doped zinc oxide, fluorine-doped tin oxide, tin-doped indium oxide, zinc-doped indium oxide and cerium-doped indium oxide.

[0015] Preferably, the crystalline silicon cell is p-type crystalline silicon and surface p-type amorphous silicon, a second composite layer is provided on the surface p-type amorphous silicon, the surface perovskite cell assembly includes a surface perovskite and a surface hole transport layer and a surface electron transport layer provided on both sides of the surface perovskite, the second composite layer is connected to the surface electron transport layer, and a transparent conductive oxide electrode is provided on the surface hole transport layer.

[0016] Preferably, the material of the second composite layer is one or more of aluminum-doped zinc oxide, gallium-doped zinc oxide, fluorine-doped tin oxide, tin-doped indium oxide, zinc-doped indium oxide and cerium-doped indium oxide.

[0017] The present invention provides a double-sided triple-junction stacked cell, which is based on a back-contact crystalline silicon cell and a back-contact perovskite cell; a positive electrode region, a negative electrode region and an isolation layer are arranged on the back of the back-contact crystalline silicon cell, and heavily doped p-type silicon and a positive electrode are arranged on the positive electrode region; heavily doped n-type silicon and a negative electrode are arranged on the negative electrode region, and the positive electrode region and the negative electrode region are separated by the isolation region, and the photogenerated holes and photogenerated electrons in the crystalline silicon cell are directionally transmitted to the heavily doped p-type silicon and the heavily doped n-type silicon, and then collected by the positive electrode and the negative electrode.

[0018] The present invention provides a bottom-layer back-contact perovskite cell on the insulating layer, with an alternating arrangement of hole transport layers and electron transport layers on the back. The hole transport layer on the bottom perovskite is connected to the positive electrode, while the electron transport layer on the bottom perovskite is connected to the negative electrode. The bottom perovskite cell absorbs reflected light from the back of the solar cell and weak indoor light to complete photoelectric conversion. Photogenerated holes and electrons are directed toward the hole transport layer and electron transport layer, and then collected by the positive and negative electrodes, significantly improving the photoelectric conversion efficiency of the solar cell and increasing the power generation of the solar cell.

[0019] The present invention superimposes a perovskite solar cell on the upper surface of a crystalline silicon cell, and forms a series connection with the composite layer and the crystalline silicon cell, thereby increasing the absorption spectrum of the cell and improving the conversion efficiency.

[0020] The insulating layer of the present invention uses a transparent insulating material. On the one hand, the insulating material can prevent heavily doped p-type silicon and heavily doped n-type silicon from contacting to form a conductive junction, thereby preventing the directional transmission of hole carriers and electron carriers from being destroyed. In addition, the transparent insulating layer can allow near-infrared light that passes through the underlying perovskite to enter the crystalline silicon cell to complete photoelectric conversion, further improving the utilization rate of the backlight of the solar cell and further improving the power generation capacity of the solar cell.

[0021] In addition, the structure of the triple-junction stacked cell provided by the present invention is simpler and has lower cost than the structure of a perovskite-crystalline silicon-perovskite cell directly connected in series or in parallel.

[0022] Compared with the existing technology, this application has the following technical effects: (1) Based on the crystalline silicon-perovskite cell, the cell is provided with a positive electrode region, a negative electrode region and an isolation region on the back of the crystalline silicon. The positive electrode region is provided with heavily doped p-type silicon and a positive electrode, and the negative electrode region is provided with heavily doped n-type silicon and a negative electrode. The positive electrode region and the negative electrode region are separated by the isolation region. The hole carriers and electron carriers in the crystalline silicon cell are transmitted in a direction toward the positive electrode and the negative electrode, thereby improving the photoelectric conversion efficiency. (2) A bottom perovskite cell is provided on the insulating layer, the hole transport layer on the bottom perovskite is connected to the positive electrode, and the electron transport layer on the bottom perovskite is connected to the negative electrode. The bottom perovskite cell can absorb the reflected light from the back of the solar cell and the weak light in the room to complete the photoelectric conversion, significantly improving the photoelectric conversion efficiency of the solar cell and increasing the power generation power of the solar cell; (3) The structure of the triple-junction stacked cell provided by the present invention is simpler than that of the perovskite-crystalline silicon-perovskite cell directly connected in series or parallel, has higher photoelectric conversion efficiency and lower manufacturing cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 This is a cross-sectional view of a triple-junction stacked battery according to Example 1 of the present invention.

[0024] Figure 2 This is a cross-sectional view of a triple-junction stacked battery according to Example 2 of the present invention.

[0025] Figure 3 This is a cross-sectional view of a triple-junction stacked battery according to Example 3 of the present invention.

[0026] Figure 4 This is a cross-sectional view of a triple-junction stacked battery according to Example 4 of the present invention.

[0027] Figure 5 1 and 2 are cross-sectional views of triple-junction stacked cells according to embodiments 5, 6, and 7 of the present invention.

[0028] Figure 6 10 are cross-sectional views of triple-junction stacked batteries according to embodiments 8, 9, and 10 of the present invention.

[0029] In the figure, there are crystalline silicon cell 1, positive electrode region 101, underlying p-type amorphous silicon 111, positive electrode 112, negative electrode region 102, underlying n-type amorphous silicon 121, negative electrode 122, insulation layer 103, underlying perovskite component 104, underlying perovskite 141, underlying hole transport layer 142, underlying electron transport layer 143, n-type crystalline silicon 105, surface n-type amorphous silicon 106, first composite layer 107, p-type crystalline silicon 108, surface p-type amorphous silicon 109, second composite layer 110, surface perovskite component 2, surface perovskite 201, surface hole transport layer 202, surface electron transport layer 203 and transparent conductive oxide electrode 204. DETAILED DESCRIPTION

[0030] The present invention will be further described below with reference to the embodiments.

[0031] Example 1: A double-sided triple-junction stacked battery, such as Figure 1 As shown, it includes a crystalline silicon cell 1, which includes n-type crystalline silicon 105 and n-type amorphous silicon 106 arranged on the upper surface of the n-type crystalline silicon, a surface perovskite component 2 is provided on the upper surface of the n-type amorphous silicon, and a positive electrode region 101, a negative electrode region 102 and an insulating layer 103 sandwiched between the positive electrode region and the negative electrode region are provided on the lower surface of the n-type crystalline silicon. A bottom layer of heavily doped p-type silicon 111 is provided on the positive electrode region, a positive electrode 112 is provided on the bottom layer of heavily doped n-type silicon, a bottom layer of heavily doped n-type silicon 121 is provided on the negative electrode region, a negative electrode 122 is provided on the bottom layer of heavily doped n-type silicon, and the positive electrode is electrically connected to the negative electrode; a bottom layer of perovskite component 104 is provided on the insulating layer, and the bottom layer of perovskite component includes a bottom layer of perovskite 141, a bottom layer of hole transport layer 142 and a bottom layer of electron transport layer 143 arranged on the bottom layer of perovskite, the bottom layer of hole transport layer is connected to the positive electrode and the bottom layer of perovskite respectively, and the bottom layer of electron output layer is connected to the negative electrode and the bottom layer of perovskite respectively.

[0032] A first composite layer 107 is provided on the n-type amorphous silicon, the first composite layer connecting the n-type amorphous silicon and the surface perovskite component, the surface perovskite component including a surface hole transport layer 202 connected to the first composite layer, a surface perovskite 201 connected to the surface hole output layer, a surface electron transport layer 203 on the upper surface of the surface perovskite, and a transparent conductive oxide electrode 204 provided on the surface electron transport layer, the transparent conductive oxide electrode serving as a negative electrode electrically connected to the positive electrode.

[0033] Example 2: A double-sided triple-junction stacked battery, such as Figure 2 As shown, it includes a crystalline silicon cell 1, which includes p-type crystalline silicon 108 and p-type amorphous silicon 109 arranged on the upper surface of the p-type crystalline silicon, a surface perovskite component 2 is provided on the upper surface of the p-type amorphous silicon, and a positive electrode region 101, a negative electrode region 102 and an insulating layer 103 sandwiched between the positive electrode region and the negative electrode region are provided on the lower surface of the p-type crystalline silicon. A bottom layer of heavily doped p-type silicon 111 is provided on the positive electrode region, a positive electrode 112 is provided on the bottom layer of heavily doped n-type silicon 121 is provided on the negative electrode region, a negative electrode 122 is provided on the bottom layer of heavily doped n-type silicon, and the positive electrode is electrically connected to the negative electrode; a bottom layer of perovskite component 104 is provided on the insulating layer, and the bottom layer of perovskite component includes a bottom layer of perovskite 141, a bottom layer of hole transport layer 142 and a bottom layer of electron transport layer 143 arranged on the bottom layer of perovskite, the bottom layer of hole transport layer is connected to the positive electrode and the bottom layer of perovskite respectively, and the bottom layer of electron output layer is connected to the negative electrode and the bottom layer of perovskite respectively.

[0034] A second composite layer 110 is provided on the p-type amorphous silicon, and the second composite layer connects the p-type amorphous silicon and the surface perovskite component. The surface perovskite component includes a surface electron transport layer 203 connected to the second composite layer, a surface perovskite 201 connected to the surface electron output layer, a surface hole transport layer 202 on the upper surface of the surface perovskite, and a transparent conductive oxide electrode 204 provided on the surface hole transport layer. The transparent conductive oxide electrode serves as a positive electrode and is electrically connected to the negative electrode.

[0035] Example 3: A double-sided triple-junction stacked battery, such as Figure 3 As shown, it includes a crystalline silicon cell 1, which includes n-type crystalline silicon 105 and n-type amorphous silicon 106 provided on the upper surface of the n-type crystalline silicon. The upper surface of the n-type amorphous silicon is provided with a surface perovskite component 2, and the lower surface of the n-type crystalline silicon is provided with a plurality of electrode areas. An isolation layer is provided between adjacent electrode areas. The electrode area includes a positive electrode area 101, a negative electrode area 102, and an isolation layer 103 sandwiched between the positive electrode area and the negative electrode area. The positive electrode area is provided with a bottom layer of heavily doped p-type silicon 111, and the bottom layer is heavily doped p A positive electrode 112 is provided on the n-type silicon, heavily doped n-type silicon is provided on the negative electrode region, a negative electrode is provided on the n-type silicon, and the positive electrode is electrically connected to the negative electrode; a bottom perovskite component 104 is provided on the insulating layer, and the bottom perovskite component includes a bottom perovskite 141, a bottom hole transport layer 142 and a bottom electron transport layer 143 arranged on the bottom perovskite, the bottom hole transport layer is respectively connected to the positive electrode and the bottom perovskite, and the bottom electron output layer is respectively connected to the negative electrode and the bottom perovskite.

[0036] A first composite layer 107 is provided on the n-type amorphous silicon, and the first composite layer connects the n-type amorphous silicon and the surface perovskite component. The surface perovskite component includes a surface hole transport layer 202 connected to the composite layer, a surface perovskite 201 connected to the surface hole output layer, a surface electron transport layer 203 on the upper surface of the surface perovskite, and a transparent conductive oxide electrode 204 provided on the surface electron transport layer. The transparent conductive oxide electrode serves as a negative electrode and is electrically connected to the positive electrode.

[0037] Example 4: A double-sided triple-junction stacked battery, such as Figure 4As shown, it includes a crystalline silicon cell 1, which includes p-type crystalline silicon 108 and p-type amorphous silicon 109 provided on the upper surface of the p-type crystalline silicon. The upper surface of the p-type amorphous silicon is provided with a surface perovskite component 2, and the lower surface of the p-type crystalline silicon is provided with a plurality of electrode areas. An isolation layer is provided between adjacent electrode areas. The electrode area includes a positive electrode area 101, a negative electrode area 102, and an isolation layer 103 sandwiched between the positive electrode area and the negative electrode area. The positive electrode area is provided with a bottom layer of heavily doped p-type silicon 111, and the bottom layer is heavily doped p A positive electrode 112 is provided on the n-type silicon, heavily doped n-type silicon is provided on the negative electrode region, a negative electrode is provided on the heavily doped n-type silicon, and the positive electrode is electrically connected to the negative electrode; a bottom perovskite component 104 is provided on the insulating layer, and the bottom perovskite component includes a bottom perovskite 141, a bottom hole transport layer 142 and a bottom electron transport layer 143 provided on the bottom perovskite, the bottom hole transport layer is respectively connected to the positive electrode and the bottom perovskite, and the bottom electron output layer is respectively connected to the negative electrode and the bottom perovskite.

[0038] A second composite layer 110 is provided on the p-type amorphous silicon, and the second composite layer connects the p-type amorphous silicon and the surface perovskite component. The surface perovskite component includes a surface electron transport layer 203 connected to the composite layer, a surface perovskite 201 connected to the surface electron output layer, a surface hole transport layer 202 on the upper surface of the surface perovskite, and a transparent conductive oxide electrode 204 provided on the surface hole transport layer. The transparent conductive oxide electrode serves as a positive electrode and is electrically connected to the negative electrode.

[0039] Example 5: A double-sided triple-junction stacked battery, such as Figure 5 As shown, it includes a crystalline silicon cell 1 with a size of 210 half a piece, the crystalline silicon cell includes n-type crystalline silicon 105 and n-type amorphous silicon 106 provided on the upper surface of the n-type crystalline silicon, the upper surface of the n-type amorphous silicon is provided with a surface perovskite component 2, the lower surface of the n-type crystalline silicon is provided with an isolation layer 103 (thickness 200nm, width 200μm) and a positive electrode region 101 (width 200μm) and a negative electrode region 102 (width 200μm) alternately arranged in the isolation layer interval region, and the extension direction of the lower surface of the n-type crystalline silicon is positive electrode region, isolation layer, negative electrode region, isolation layer, positive electrode region, isolation layer, A negative electrode region, an isolation layer and a positive electrode region, the positive electrode region is provided with an underlying heavily doped p-type silicon 111, the underlying heavily doped p-type silicon is provided with a positive electrode 112, the negative electrode region is provided with heavily doped n-type silicon, the heavily doped n-type silicon is provided with a negative electrode, and the positive electrode is electrically connected to the negative electrode; a bottom perovskite component 104 is provided on the isolation layer, the bottom perovskite component includes a bottom perovskite 141 and several bottom hole transport layers 142 and a bottom electron transport layer 143 arranged on the bottom perovskite, the bottom hole transport layer is respectively connected to the positive electrode and the bottom perovskite, and the bottom electron output layer is respectively connected to the negative electrode and the bottom perovskite.

[0040] A first composite layer 107 is provided on the n-type amorphous silicon, and the first composite layer connects the n-type amorphous silicon and the surface perovskite component. The surface perovskite component includes a surface hole transport layer 202 connected to the composite layer, a surface perovskite 201 connected to the surface hole output layer, a surface electron transport layer 203 on the upper surface of the surface perovskite, and a transparent conductive oxide electrode 204 provided on the surface electron transport layer. The transparent conductive oxide electrode serves as a negative electrode and is electrically connected to the positive electrode.

[0041] Example 6: A double-sided triple-junction stacked battery, such as Figure 5 As shown, it includes a crystalline silicon cell 1 with a size of 210 half a piece, the crystalline silicon cell includes n-type crystalline silicon 105 and n-type amorphous silicon 106 provided on the upper surface of the n-type crystalline silicon, the upper surface of the n-type amorphous silicon is provided with a surface perovskite component 2, the lower surface of the n-type crystalline silicon is provided with an isolation layer 103 (thickness 100nm, width 200μm) and a positive electrode region 101 (width 200μm) and a negative electrode region 102 (width 200μm) alternately arranged in the isolation layer interval region, and the extension direction of the lower surface of the n-type crystalline silicon is positive electrode region, isolation layer, negative electrode region, isolation layer, positive electrode region, isolation layer, A negative electrode region, an isolation layer and a positive electrode region, the positive electrode region is provided with an underlying heavily doped p-type silicon 111, the underlying heavily doped p-type silicon is provided with a positive electrode 112, the negative electrode region is provided with heavily doped n-type silicon, the heavily doped n-type silicon is provided with a negative electrode, and the positive electrode is electrically connected to the negative electrode; a bottom perovskite component 104 is provided on the isolation layer, the bottom perovskite component includes a bottom perovskite 141 and several bottom hole transport layers 142 and a bottom electron transport layer 143 arranged on the bottom perovskite, the bottom hole transport layer is respectively connected to the positive electrode and the bottom perovskite, and the bottom electron output layer is respectively connected to the negative electrode and the bottom perovskite.

[0042] A first composite layer 107 is provided on the n-type amorphous silicon, and the first composite layer connects the n-type amorphous silicon and the surface perovskite component. The surface perovskite component includes a surface hole transport layer 202 connected to the composite layer, a surface perovskite 201 connected to the surface hole output layer, a surface electron transport layer 203 on the upper surface of the surface perovskite, and a transparent conductive oxide electrode 204 provided on the surface electron transport layer. The transparent conductive oxide electrode serves as a negative electrode and is electrically connected to the positive electrode.

[0043] Example 7: A double-sided triple-junction stacked battery, such as Figure 5As shown, it includes a crystalline silicon cell 1 with a size of 210 half a piece, the crystalline silicon cell includes n-type crystalline silicon 105 and n-type amorphous silicon 106 provided on the upper surface of the n-type crystalline silicon, the upper surface of the n-type amorphous silicon is provided with a surface perovskite component 2, the lower surface of the n-type crystalline silicon is provided with an isolation layer 103 (thickness of 100nm, width of 100μm) and a positive electrode region 101 (width of 100μm) and a negative electrode region 102 (width of 100μm) alternately arranged in the isolation layer interval, and the extension direction of the lower surface of the n-type crystalline silicon is positive electrode region, isolation layer, negative electrode region, isolation layer, positive electrode region, isolation layer, A negative electrode region, an isolation layer and a positive electrode region, the positive electrode region is provided with an underlying heavily doped p-type silicon 111, the underlying heavily doped p-type silicon is provided with a positive electrode 112, the negative electrode region is provided with heavily doped n-type silicon, the heavily doped n-type silicon is provided with a negative electrode, and the positive electrode is electrically connected to the negative electrode; a bottom perovskite component 104 is provided on the isolation layer, the bottom perovskite component includes a bottom perovskite 141 and several bottom hole transport layers 142 and a bottom electron transport layer 143 arranged on the bottom perovskite, the bottom hole transport layer is respectively connected to the positive electrode and the bottom perovskite, and the bottom electron output layer is respectively connected to the negative electrode and the bottom perovskite.

[0044] A first composite layer 107 is provided on the n-type amorphous silicon, and the first composite layer connects the n-type amorphous silicon and the surface perovskite component. The surface perovskite component includes a surface hole transport layer 202 connected to the composite layer, a surface perovskite 201 connected to the surface hole output layer, a surface electron transport layer 203 on the upper surface of the surface perovskite, and a transparent conductive oxide electrode 204 provided on the surface electron transport layer. The transparent conductive oxide electrode serves as a negative electrode and is electrically connected to the positive electrode.

[0045] Example 8: A double-sided triple-junction stacked battery, such as Figure 6As shown, it includes a crystalline silicon cell 1 with a size of 210 half a piece, the crystalline silicon cell includes p-type crystalline silicon 108 and p-type amorphous silicon 109 provided on the upper surface of the p-type crystalline silicon, a surface perovskite component 2 is provided on the upper surface of the p-type amorphous silicon, and an isolation layer 103 (thickness 200nm, width 200μm) and a positive electrode region 101 (width 200μm) and a negative electrode region 102 (width 200μm) alternately provided in the isolation layer spacer on the lower surface of the p-type crystalline silicon. Along the extension direction of the lower surface of the p-type crystalline silicon, it is the positive electrode region, isolation layer, negative electrode region, isolation layer, positive electrode region, isolation layer, A negative electrode region, an isolation layer and a positive electrode region, the positive electrode region is provided with an underlying heavily doped p-type silicon 111, the underlying heavily doped p-type silicon is provided with a positive electrode 112, the negative electrode region is provided with heavily doped n-type silicon, the heavily doped n-type silicon is provided with a negative electrode, and the positive electrode is electrically connected to the negative electrode; a bottom perovskite component 104 is provided on the isolation layer, the bottom perovskite component includes a bottom perovskite 141 and several bottom hole transport layers 142 and a bottom electron transport layer 143 arranged on the bottom perovskite, the bottom hole transport layer is respectively connected to the positive electrode and the bottom perovskite, and the bottom electron output layer is respectively connected to the negative electrode and the bottom perovskite.

[0046] A first composite layer 107 is provided on the p-type amorphous silicon, and a second composite layer connects the p-type amorphous silicon and the surface perovskite component. The surface perovskite component includes a surface electron transport layer 203 connected to the composite layer, a surface perovskite 201 connected to the surface electron output layer, a surface hole transport layer 202 on the upper surface of the surface perovskite, and a transparent conductive oxide electrode 204 provided on the surface hole transport layer. The transparent conductive oxide electrode serves as a positive electrode and is electrically connected to the negative electrode.

[0047] Example 9: A double-sided triple-junction stacked battery, such as Figure 6As shown, it includes a crystalline silicon cell 1 with a size of 210 half a piece, the crystalline silicon cell includes p-type crystalline silicon 108 and p-type amorphous silicon 109 provided on the upper surface of the p-type crystalline silicon, the upper surface of the p-type amorphous silicon is provided with a surface perovskite component 2, the lower surface of the p-type crystalline silicon is provided with an isolation layer 103 (thickness 100nm, width 200μm) and a positive electrode region 101 (width 200μm) and a negative electrode region 102 (width 200μm) alternately arranged in the isolation layer interval area, along the extension direction of the lower surface of the p-type crystalline silicon are the positive electrode region, isolation layer, negative electrode region, isolation layer, positive electrode region, isolation layer, A negative electrode region, an isolation layer and a positive electrode region, the positive electrode region is provided with an underlying heavily doped p-type silicon 111, the underlying heavily doped p-type silicon is provided with a positive electrode 112, the negative electrode region is provided with heavily doped n-type silicon, the heavily doped n-type silicon is provided with a negative electrode, and the positive electrode is electrically connected to the negative electrode; a bottom perovskite component 104 is provided on the isolation layer, the bottom perovskite component includes a bottom perovskite 141 and several bottom hole transport layers 142 and a bottom electron transport layer 143 arranged on the bottom perovskite, the bottom hole transport layer is respectively connected to the positive electrode and the bottom perovskite, and the bottom electron output layer is respectively connected to the negative electrode and the bottom perovskite.

[0048] A first composite layer 107 is provided on the p-type amorphous silicon, and a second composite layer connects the p-type amorphous silicon and the surface perovskite component. The surface perovskite component includes a surface electron transport layer 203 connected to the composite layer, a surface perovskite 201 connected to the surface electron output layer, a surface hole transport layer 202 on the upper surface of the surface perovskite, and a transparent conductive oxide electrode 204 provided on the surface hole transport layer. The transparent conductive oxide electrode serves as a positive electrode and is electrically connected to the negative electrode.

[0049] Example 10: A double-sided triple-junction stacked battery, such as Figure 6As shown, it includes a crystalline silicon cell 1 with a size of 210 half a piece, the crystalline silicon cell includes p-type crystalline silicon 108 and p-type amorphous silicon 109 provided on the upper surface of the p-type crystalline silicon, a surface perovskite component 2 is provided on the upper surface of the p-type amorphous silicon, and an isolation layer 103 (thickness of 100nm, width of 100μm) and a positive electrode region 101 (width of 100μm) and a negative electrode region 102 (width of 100μm) alternately provided in the isolation layer spacer on the lower surface of the p-type crystalline silicon. Along the extension direction of the lower surface of the p-type crystalline silicon, it is the positive electrode region, isolation layer, negative electrode region, isolation layer, positive electrode region, isolation layer, A negative electrode region, an isolation layer and a positive electrode region, the positive electrode region is provided with an underlying heavily doped p-type silicon 111, the underlying heavily doped p-type silicon is provided with a positive electrode 112, the negative electrode region is provided with heavily doped n-type silicon, the heavily doped n-type silicon is provided with a negative electrode, and the positive electrode is electrically connected to the negative electrode; a bottom perovskite component 104 is provided on the isolation layer, the bottom perovskite component includes a bottom perovskite 141 and several bottom hole transport layers 142 and a bottom electron transport layer 143 arranged on the bottom perovskite, the bottom hole transport layer is respectively connected to the positive electrode and the bottom perovskite, and the bottom electron output layer is respectively connected to the negative electrode and the bottom perovskite.

[0050] A first composite layer 107 is provided on the p-type amorphous silicon, and a second composite layer connects the p-type amorphous silicon and the surface perovskite component. The surface perovskite component includes a surface electron transport layer 203 connected to the composite layer, a surface perovskite 201 connected to the surface electron output layer, a surface hole transport layer 202 on the upper surface of the surface perovskite, and a transparent conductive oxide electrode 204 provided on the surface hole transport layer. The transparent conductive oxide electrode serves as a positive electrode and is electrically connected to the negative electrode.

[0051] Comparative Example 1: The difference between Comparative Example 1 and Example 5 is that a single-sided crystalline silicon perovskite cell with a size of 210 half a cell is used, and the other conditions are the same as those of Example 5.

[0052] Comparative Example 2: The difference between Comparative Example 2 and Example 5 is that no insulating layer is provided, and the other conditions are the same as those of Example 5.

[0053] Comparative Example 3: The difference between Comparative Example 3 and Example 5 is that a non-transparent insulating material is used in the insulating layer, and the other conditions are the same as those in Example 5.

[0054] Comparative Example 4: The difference between Comparative Example 4 and Example 5 is that the widths of the positive electrode region, the negative electrode region and the insulating layer are too large, the width of the positive electrode region is 2 mm, the width of the negative electrode region is 2 mm, and the width of the insulating layer is 2 mm. The other conditions are the same as those of Example 5.

[0055] Test Example 1: The power generation of the double-sided triple-junction stacked cells prepared in Examples 5 to 10 and Comparative Examples 1 to 4 was tested. The test items included: 210-size cell power test, double-sided cell front light intensity 1000W / m 2 , simulate standard sunlight; the incident light intensity from the reverse side is 500W / m 2 , simulating low-light environments.

[0056] The test method is based on the public content.

[0057] The test results are shown in Table 1.

[0058] Table 1 Test results Power (W) Example 5 9.73 Example 6 9.91 Example 7 10.10 Example 8 9.17 Example 9 9.24 Example 10 9.31 Comparative Example 1 5.73 Comparative Example 2 1.70 Comparative Example 3 9.42 Comparative Example 4 3.80 As shown in Table 1, the power of the 210 half-cell double-sided triple-junction stacked cell prepared by the present invention can reach 9.17 to 10.10W. Comparative Example 1 is a single-sided crystalline silicon perovskite cell with a power generation power of 9.73W. The power generation power of the solar cell prepared by the present invention is significantly improved compared with the single-sided crystalline silicon perovskite cell. Comparative Example 2 is a case where no insulating layer is set. It is found that the power of the solar cell of Comparative Example 2 is only 1.7W and cannot be used normally. The insulating layer of Comparative Example 3 uses an opaque insulating material, and its power generation power is 9.42W. The power generation power of Comparative Example 3 is lower than that of Example 1. The results of Comparative Example 3 and Example 1 show that the use of transparent materials in the insulating layer can increase the power generation power of the solar cell and further improve the light utilization efficiency. In Comparative Example 4, the sizes of the positive electrode region, the negative electrode region and the isolation region are enlarged. The power generation power of Comparative Example 4 is only 3.8 W. The power generation power of Comparative Example 4 is significantly lower than that of Example 1. The results of Comparative Example 4 and the example show that the sizes of the positive electrode region, the negative electrode region and the isolation region have an important influence on the power generation power of the solar cell, and their sizes need to be controlled within a certain range so that the solar cell can obtain excellent power generation power.

[0059] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any way. Any simple modification, change and equivalent transformation made to the above embodiment based on the technical essence of the present invention still fall within the scope of protection of the technical solution of the present invention.

Claims

1. A double-sided triple-junction stacked battery, characterized in that: The invention comprises a crystalline silicon cell (1), wherein a surface perovskite cell component (2) is provided on the upper surface of the crystalline silicon cell, a positive electrode region (101), a negative electrode region (102) and an insulating layer (103) sandwiched between the positive electrode region and the negative electrode region are provided on the lower surface of the crystalline silicon cell, a bottom layer of heavily doped p-type silicon (111) and a positive electrode (112) are provided on the positive electrode region, a bottom layer of heavily doped n-type silicon (121) and a negative electrode (122) are provided on the negative electrode region, and a bottom layer of perovskite component (104) is provided on the insulating layer, wherein the bottom layer of perovskite component comprises a bottom layer of perovskite (141), a bottom layer of hole transport layer (142) connected to the positive electrode and a bottom layer of electron transport layer (143) connected to the negative electrode.

2. The double-sided triple-junction stacked battery according to claim 1, characterized in that: The insulating layer is made of transparent insulating material.

3. The double-sided triple-junction stacked battery according to claim 1 or 2, characterized in that: The thickness of the insulating layer is 100-1000 nm, and the width of the insulating layer is 20-200 μm.

4. The double-sided triple-junction stacked battery according to claim 1, characterized in that: The material of the positive electrode is one or more of gold, silver, copper, aluminum, aluminum-doped zinc oxide, gallium-doped zinc oxide, fluorine-doped tin oxide, tin-doped indium oxide, zinc-doped indium oxide and cerium-doped indium oxide.

5. The double-sided triple-junction stacked battery according to claim 1, characterized in that: The material of the negative electrode is one or more of gold, silver, copper, aluminum, aluminum-doped zinc oxide, gallium-doped zinc oxide, fluorine-doped tin oxide, tin-doped indium oxide, zinc-doped indium oxide and cerium-doped indium oxide.

6. The double-sided triple-junction stacked battery according to claim 1, characterized in that: The width of the positive electrode region is 20~200 μm, and the width of the negative electrode region is 20~200 μm.

7. The double-sided triple-junction stacked battery according to claim 6, characterized in that: The crystalline silicon cell comprises n-type crystalline silicon (105) and surface n-type amorphous silicon (106); a first composite layer (107) is provided on the surface n-type amorphous silicon; the surface perovskite cell assembly comprises a surface perovskite (201) and a surface hole transport layer (202) and a surface electron transport layer (203) provided on both sides of the surface perovskite; the first composite layer is connected to the surface hole transport layer; and a transparent conductive oxide (TCO) electrode (204) is provided on the surface electron transport layer.

8. The double-sided triple-junction stacked battery according to claim 7, characterized in that: The material of the first composite layer is one or more of aluminum-doped zinc oxide, gallium-doped zinc oxide, fluorine-doped tin oxide, tin-doped indium oxide, zinc-doped indium oxide and cerium-doped indium oxide.

9. The double-sided triple-junction stacked battery according to claim 1, characterized in that: The crystalline silicon cell comprises p-type crystalline silicon (108) and surface p-type amorphous silicon (109); a second composite layer (110) is provided on the surface p-type amorphous silicon; the surface perovskite cell assembly comprises a surface perovskite (201) and a surface hole transport layer (202) and a surface electron transport layer (203) provided on both sides of the surface perovskite; the second composite layer is connected to the surface electron transport layer; and a transparent conductive oxide electrode (204) is provided on the surface hole transport layer.

10. The double-sided triple-junction stacked battery according to claim 9, characterized in that: The material of the second composite layer is one or more of aluminum-doped zinc oxide, gallium-doped zinc oxide, fluorine-doped tin oxide, tin-doped indium oxide, zinc-doped indium oxide, and cerium-doped indium oxide.

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