Radar device and corresponding operating method

Abstract

According to a first aspect of the present disclosure, there is provided a radar apparatus comprising: a plurality of receiver channels; a plurality of mixers, wherein each of the receiver channels comprises one of the mixers; a first frequency synthesizer configured to generate a chirp signal; at least one test tone generator configured to generate a test tone signal having a constant frequency; wherein the mixer is configured to be fed with the chirp signal and the test tone signal. According to a second aspect of the present disclosure, a corresponding method of operating a radar apparatus is conceived.

Description

Technical Field

[0001] The present disclosure relates to a radar device. Furthermore, the present disclosure relates to a corresponding method of operating a radar device. Background Art

[0002] Automotive radar solutions for advanced driver assistance systems (ADAS) are currently being deployed on a large scale. These solutions can be generally categorized into long-range radar (LRR) and short-range radar (SRR) applications. Both applications typically utilize radar devices that employ frequency-modulated continuous wave (FMCW) modulation technology to identify radar targets such as cars or pedestrians. These radar devices, which may also be referred to as radar sensors, typically utilize millimeter wave (mmW) frequencies for transmission and reception. Summary of the Invention

[0003] According to a first aspect of the present disclosure, there is provided a radar apparatus, comprising: a plurality of receiver channels; a plurality of mixers, wherein each of the receiver channels comprises one of the mixers; a first frequency synthesizer configured to generate a chirp signal; and at least one test tone generator configured to generate a test tone signal having a constant frequency; wherein the mixer is configured to be fed with the chirp signal and the test tone signal.

[0004] In one or more embodiments, the radar apparatus further includes at least one transmitter, wherein the test tone generator is configured to be coupled to the transmitter via a switch.

[0005] In one or more embodiments, the test tone generator is configured to be coupled to the receiver channel through a built-in self-test (BIST) structure.

[0006] In one or more embodiments, the test tone generator is implemented as a second frequency synthesizer, wherein the second frequency synthesizer is embedded in a follower integrated circuit (IC) of the radar device.

[0007] In one or more embodiments, receiver channels are distributed across multiple ICs, and each of the ICs includes a test tone generator configured to be coupled to a corresponding receiver channel of the IC through a BIST structure of the IC.

[0008] In one or more embodiments, the radar apparatus further comprises a post-processing unit configured to derive a time offset between receiver channels from the digitized output signal provided by the mixer.

[0009] In one or more embodiments, the post-processing unit is configured to calculate a set of Fast Fourier Transforms (FFTs) of the digitized output signal.

[0010] In one or more embodiments, the post-processing unit is configured to multiply the FFTs in the frequency domain for a given pair of receiver channels and calculate the corresponding phases of the subcarriers.

[0011] In one or more embodiments, the post-processing unit is configured to fit the phase-over-frequency data derived from the calculated phases of the subcarriers by a first-order polynomial, the slope of the first-order polynomial being a measure of the time offset.

[0012] In one or more embodiments, the receiver channel includes an analog-to-digital converter configured to digitize the output signal provided by the mixer.

[0013] In one or more embodiments, the receiver channel includes a filter configured to filter the output signal provided by the mixer.

[0014] In one or more embodiments, a vehicle includes a radar device of the kind set forth.

[0015] According to a second aspect of the present disclosure, a method of operating a radar apparatus is contemplated, the method comprising: generating a chirp signal by a first frequency synthesizer included in the radar apparatus; generating a test tone signal having a constant frequency by at least one test tone generator included in the radar apparatus; and feeding the chirp signal and the test tone signal to a mixer included in a receiver channel of the radar apparatus.

[0016] In one or more embodiments, the method further comprises deriving, by a post-processing unit comprised in the radar device, a time offset between the receiver channels from a digitized output signal provided by the mixer.

[0017] In one or more embodiments, the post-processing unit calculates a set of Fast Fourier Transforms (FFTs) of the digitized output signal.

[0018] In one or more embodiments, the post-processing unit multiplies the FFTs in the frequency domain and calculates corresponding phases of subcarriers for a given pair of the receiver channels.

[0019] In one or more embodiments, the post-processing unit fits the phase versus frequency data derived from the calculated phase of the subcarriers by a first-order polynomial, the slope of the first-order polynomial being a measure of the time offset.

[0020] In one or more embodiments, the receiver channel includes an analog-to-digital converter that digitizes the output signal provided by the mixer.

[0021] In one or more embodiments, the receiver channel includes a filter that filters the output signal provided by the mixer. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The embodiments will be described in more detail with reference to the accompanying drawings.

[0023] Figure 1 An example of a radar device is shown.

[0024] Figure 2 Show Figure 1 Signal diagram of the radar device shown.

[0025] Figure 3 An example of a coupling path on a radar sensor board is shown.

[0026] Figure 4 An illustrative embodiment of a radar device is shown.

[0027] Figure 5 An illustrative embodiment of a method of operating a radar device is shown.

[0028] Figure 6 Another illustrative embodiment of a radar device is shown.

[0029] Figure 7 Show Figure 6 Signal diagram of the radar device shown.

[0030] Figure 8 Additional illustrative embodiments of radar devices are shown.

[0031] Figure 9 Shows an example of coupling paths on a radar sensor board with cascaded ICs.

[0032] Figure 10 Additional illustrative embodiments of radar devices are shown.

[0033] Figure 11 Additional illustrative embodiments of radar devices are shown.

[0034] Figure 12 Additional illustrative embodiments of radar devices are shown.

[0035] Figure 13 An illustrative embodiment of a test execution flow is shown. DETAILED DESCRIPTION

[0036] To enable the development of functionally safe radar systems, an FMCW radar multiple-input, multiple-output (MIMO) sensor or system typically measures the consistency and stability of the signal phase between its receiver (RX) channels to ensure proper operation of coherent combining and direction-of-arrival algorithms. However, testing the time synchronization between these RX channels is also crucial, as timing deviations introduce phase errors that increase linearly with frequency in the intermediate frequency (IF) portion of the RX channel.

[0037] While it is possible to test internal IC time synchronization by comparing, for example, the edges of control signals, this becomes much more complicated when the radar system deploys a so-called cascade, in which one transceiver chip (called the leader) is generating the base FM signal and trigger signal to all other transceiver chips (called followers). In this case, testing of time synchronization can be performed by feeding a digital signal from the follower IC back to the leader IC and checking the time alignment between the local trigger signal and the remote trigger signal. However, this requires additional wiring between the ICs and typically takes up limited input / output (IO) resources. In addition, due to the limited bandwidth of the IO connection, the accuracy can be quite low.

[0038] In general, measurement and test methods using analog RF signals can provide sufficient accuracy with respect to phase errors, but they may not be able to detect time synchronization errors. This could be the case, for example, if the phase error caused by the time offset is too small or if the phase and timing errors cancel each other out at the test frequency used. Typically, when measuring phase and timing stability via looped-back radio frequency (RF) signals, a sufficient signal-to-noise ratio (SNR) is required. This conflicts with the desire to suppress direct coupling paths in normal radar operation. Therefore, countermeasures against direct coupling (e.g., high-pass filters in the IF) should be bypassed, or dedicated loopback paths should be added. The latter are often present within conventional ICs but not between different ICs in a cascaded setup.

[0039] Figure 1 An example of a radar device 100 is shown. Radar device 100 is a typical transceiver IC for an FMCW radar system, and includes multiple receiver channels, each of which includes a receiver (RX) antenna 102, a receiver unit 104 (i.e., an amplifier), a mixer unit 106, a filter unit 108, and an analog-to-digital converter (ADC) unit 110. Furthermore, radar device 100 includes a post-processing unit 112, a transmitter (TX) antenna 114, a transmitter unit 116 (i.e., an amplifier), a frequency synthesizer 118 (i.e., a local oscillator), a timing engine 120, and a system clock generator 122.

[0040] In operation, the system clock generator 122 acts as a central clock generation unit for generating all system clocks. In addition, the timing engine 120 ensures timing synchronization between all units in the signal path; it is usually controlled by an internal or external trigger signal and generates outgoing trigger signals for other chips. The frequency synthesizer 118 generates a basic time-dependent frequency modulated signal. It should be noted that there may also be a multiplier stage that converts the synthesizer output signal to a higher frequency. In addition, the transmitter unit 116 converts and amplifies the transmit signal before outputting it to the TX antenna 114. In addition, the receiver unit 104 amplifies the signal received from the RX antenna 102. The mixer unit 106 down-converts the received signal to an intermediate frequency (IF) IF ). Filter unit 108 performs high-pass filtering to suppress self-interference and performs low-pass filtering to suppress aliasing after sampling. Furthermore, ADC unit 110 converts the filtered IF signal from the analog domain to the digital domain through sampling and quantization. Furthermore, radar apparatus 100 is prepared for integration into a cascaded setup, in which it includes input and output ports as a local oscillator interface (LOIF) for an FMCW signal from another local oscillator (not shown).

[0041] More specifically, Figure 1 The radar device 100 shown can be timed using a base clock derived, for example, from a crystal oscillator. All internal clocks can be derived from this clock. In addition, the functional units of the radar device 100 can also be synchronized in time with this clock. Based on a predefined event (e.g., the rise of an external trigger signal, an internal timer, or a software write), the timing engine 120 initiates a sequence in which the frequency synthesizer 118 generates a continuous wave signal having a frequency that generally changes linearly with time. This signal is called a chirp signal; it can be determined by starting frequency f CS , duration T and bandwidth B. In addition, the chirp slope can be expressed by K f =B / T derived. The resulting signal is then frequency multiplied, conditioned, amplified, and transmitted via the TX antenna 114.

[0042] The transmitted signal then travels as an electromagnetic wave, for example through the air, until it reaches a target that reflects the incoming wave back to radar device 100. The reflected wave arrives at radar device 100 after a certain amount of time, defined by 2*distance / speed of light. After reaching radar device 100's RX antenna 102, the resulting signal is amplified by receiver unit 104 and down-converted by mixer unit 106, where the mixed signal is the instantaneous frequency of the local oscillator at a multiplied frequency. The output signal of mixer unit 106, i.e., the IF signal, is then filtered and passed to ADC unit 110. The operation of ADC unit 110 (i.e., the start of sampling and the length of the sampling window) can also be controlled by timing engine 120. Finally, the digitized data is post-processed by a post-processing unit, which can be implemented as hardware and / or software.

[0043] Figure 2 Show Figure 1 Figure 2 shows a radar device signal diagram 200. Since the RX signal 204 is essentially a delayed copy of the frequency-multiplied local oscillator signal, the output of the mixer (i.e., IF signal 206) is a continuous wave signal whose frequency is equivalent to the RX signal delayed compared to the chirp slope, and therefore equivalent to the radar device's range from the target.

[0044] Figure 3 An example of a coupling path 300 on a radar sensor board is shown. Typically, the output of the mixer is filtered before converting the signal to the digital domain, mainly for two reasons. First, the analog / digital conversion requires attenuation of signals with frequencies exceeding the limit of the sampling theorem to suppress aliasing. Therefore, a low-pass filter is also added to the channel before the signal is passed to the ADC unit. Secondly, self-interference due to local coupling within the IC, on the PCB or from the TX antenna to the RX antenna generates unwanted signals with high power, which will limit the dynamic range for further processing. Since the coupling path is usually much shorter than the distance to the nearest target of interest, the resulting beat frequency is very low. Therefore, in order to suppress the signal originating from the self-interference, the high-pass filter introduces a strong attenuation in the affected frequency range. Examples of such coupling paths are shown in Figure 3 3. Shown in FIG. 3: coupling between RX antenna 308 and TX antenna 306, coupling on radar sensor board 302, and coupling within radar IC 304.

[0045] A radar device and a corresponding method of operating the radar device are now described, which facilitate achieving a sufficient signal-to-noise ratio (SNR) for testing time synchronization between different receiver channels in the radar device. The disclosed radar device may include a single integrated circuit or multiple cascaded integrated circuits. The disclosed radar device may be integrated into a vehicle, for example.

[0046] Figure 4An illustrative embodiment of a radar device 400 is shown. Radar device 400 includes multiple receiver channels 402, 406, each of which includes a mixer 406, 406. Furthermore, radar device 400 includes a first frequency synthesizer 410 (i.e., a local oscillator) and at least one test tone generator 412. First frequency synthesizer 410 is configured to generate a chirp signal. Furthermore, test tone generator 412 is configured to generate a test tone signal having a constant frequency. Furthermore, mixers 406, 408 integrated into receiver channel 402 are configured to be fed with the chirp signal generated by first frequency synthesizer 410 and the test tone signal generated by test tone generator 412. By feeding the chirp signal and the test tone signal to mixers 406, 408, the output signals (i.e., IF signals) of mixers 406, 408 also become chirp signals, which in turn increases the signal energy available for accurate measurement. In other words, sufficient SNR for testing time synchronization between receiver channels 402, 404 may be obtained.

[0047] In one or more embodiments, the radar apparatus further includes at least one transmitter, wherein the test tone generator is configured to be coupled to the transmitter via a switch. This facilitates achieving a sufficient signal-to-noise ratio (SNR) for testing time synchronization between different receiver channels in a radar apparatus having a single, standalone radar IC. In one or more embodiments, the test tone generator is configured to be coupled to the receiver channel via a built-in self-test (BIST) structure. This facilitates achieving a sufficient signal-to-noise ratio (SNR) for testing time synchronization between different receiver channels in a radar apparatus having a single, standalone radar IC where a BIST structure is available.

[0048] In one or more embodiments, the test tone generator is implemented as a second frequency synthesizer, wherein the second frequency synthesizer is embedded in a follower integrated circuit (IC) of the radar device. This helps to obtain a sufficient SNR for testing time synchronization between different receiver channels in a radar device that includes cascaded ICs, particularly in a radar device that has a leader IC and one or more follower ICs. In one or more embodiments, the receiver channels are distributed across multiple ICs, wherein each of the ICs includes a test tone generator that is configured to be coupled to a corresponding receiver channel of the IC via a BIST structure of the IC. This helps to obtain a sufficient SNR for testing time synchronization between different receiver channels in a radar device that includes cascaded ICs (where a BIST structure is available).

[0049] In one or more embodiments, the radar apparatus further comprises a post-processing unit configured to derive a time offset between receiver channels from a digitized output signal provided by the mixer. This facilitates determining the time offset between receiver channels. In one or more embodiments, the post-processing unit is configured to calculate a set of fast Fourier transforms (FFTs) of the digitized output signal. This further facilitates determining the time offset between receiver channels. In one or more embodiments, the post-processing unit is configured to multiply the FFTs in the frequency domain for a given pair of receiver channels and calculate the corresponding phases of the subcarriers. This further facilitates determining the time offset between receiver channels. Furthermore, in one or more embodiments, the post-processing unit is configured to fit a first-order polynomial to the phase versus frequency data derived from the calculated phases of the subcarriers, the slope of the first-order polynomial being a measure of the time offset. This further facilitates determining the time offset between receiver channels.

[0050] In one or more embodiments, the receiver channel includes an analog-to-digital converter configured to digitize the output signal provided by the mixer. In this way, post-processing of the output signal provided by the mixer is facilitated. In addition, in one or more embodiments, the receiver channel includes a filter configured to filter the output signal provided by the mixer. In this way, aliasing and signals originating from self-interference can be suppressed.

[0051] The disclosed radar apparatus and corresponding operating method facilitate testing time synchronization between multiple RX channels of an integrated transceiver IC performing FMCW radar, or between multiple ICs in a radar system with cascaded ICs. Note that as used herein, the term "receiver channel" or "RX channel" refers to a series of circuits that implement typical receiver functions. To enable time difference measurements, a test tone generator for a fixed-frequency continuous wave is applied. This generator can be a separate entity on a single chip (dedicated circuitry) or an otherwise unused local oscillator (LO) in a system with cascaded radar ICs. While the frequency of the test tone generator remains constant throughout the test procedure, the frequency of the LO of the device under test (DUT) is linearly increased during the measurement cycle, as would be the case with conventional chirping operations. The fixed-frequency signals received at the DUT's individual RX antennas can then be down-mixed with the chirped signal from the LO. This results in a chirped signal at the mixer's intermediate frequency (IF) output—in contrast to conventional FMCW radar operation, where the IF signal consists of various sinusoidal waves. After down-mixing, the IF signal can be filtered, sampled, and quantized by an analog-to-digital converter. The calculation of the time difference between the RX channels can be performed by cross-correlating the RX signals in the frequency domain, extracting the useful frequency range, and fitting the phase of the cross-correlation using a first-order polynomial. According to the present disclosure, it is not necessary to use a dedicated loopback path to the radar device's hardware to obtain a good SNR for timing measurements. Because the IF signal can be a chirped signal with spectral components throughout the passband of the IF filter stage, sufficient signal energy is available for accurate measurement when relying on parasitic coupling that already exists in practical designs.

[0052] Typically, the frequency synthesizer (i.e., LO) of an FMCW radar device generates a continuous wave signal with a frequency that changes linearly with time. This signal serves as the input to the transmitter and as the second input to the mixer. The signal received by the receiver channel includes a delayed and attenuated copy of the transmitted signal. After down-mixing, this produces a superposition of harmonic signals (i.e., tones) at the IF stage. In contrast, according to the present disclosure, a chirp signal can be used as the input to the mixer, but a constant test tone is used as the input to the transmitter. Therefore, the signal at the output of the mixer stage is no longer a tone (or a superposition of tones), but a chirp signal. This signal can then be filtered, sampled, quantized, and stored in memory as usual. The signal data can then be post-processed using the good correlation properties of the chirp signal. First, the Fast Fourier Transform (FFT) of all RX channels can be calculated. The FFT outputs of a pair of RX antennas can then be multiplied in the frequency domain in a conjugate-complex manner, and the phases of the subcarriers within the useful range can be calculated. Finally, the phase versus frequency data can be fitted with a first-order polynomial, whose first-order coefficient (i.e., slope) is a direct measure of the time offset between the signals of the two RX channels. This post-processing can be repeated for other pairs of RX antennas, resulting in a set of extremely accurate time offsets within the radar device.

[0053] Self-interference caused by non-zero coupling from TX to RX (on the IC, via the board, or from the TX antenna to the RX antenna) can cause the radar system to malfunction. In particular, for FMCW radar systems, a common approach to mitigate or reduce the effects of such self-interference is to include a high-pass filter in the RX signal path after down-conversion, thereby suppressing the low-frequency signal components originating from the self-interference. However, according to the present disclosure, the IF signal can be a chirped signal, which has inherent broadband characteristics. Therefore, for example, it is not necessary to bypass or fine-tune the high-pass filter in the IF chain to obtain an acceptable SNR. In addition, it makes it possible to transmit the test signal using the direct coupling path between the leader IC and the follower IC.

[0054] As will be explained in more detail below, the radar device disclosed herein can be implemented in various ways. More specifically, depending on the use case, for example, there are multiple options for generating a constant test tone. For radar devices with a standalone radar IC, a separate test tone generator can be used. This generator can reside internally or externally to the IC. For radar devices deploying a cascaded solution with two ICs, the unused frequency synthesizer of the follower IC can be used to generate the constant test tone. In this case, the IC circuitry should provide the option of routing the input signal separately to the transmitter and mixer. Furthermore, for radar devices deploying a cascaded solution with three or more ICs, one of the ICs can be assigned to generate the test tone while performing synchronization checks on the remaining ICs. In this case, no hardware expansion or enhancement is required, and full coverage can be achieved by applying a polling solution.

[0055] Figure 5 An illustrative embodiment of a method 500 for operating a radar device is shown. The method 500 includes the following steps. At 502, a first frequency synthesizer included in the radar device generates a chirp signal. Furthermore, at 504, at least one test tone generator included in the radar device generates a test tone signal having a constant frequency. Furthermore, at 506, a mixer included in a receiver channel of the radar device is fed with the chirp signal and the test tone signal. As described above with reference to Figure 4 As mentioned in the corresponding radar apparatus shown, by feeding the chirp signal and the test tone signal to the mixer, the output signal of the mixer also becomes a chirp signal, which in turn increases the signal energy available for accurate measurement.

[0056] Figure 6 Another illustrative embodiment of a radar device 600 is shown. Specifically, a possible implementation of the disclosed radar device is shown with a single, standalone radar IC. Radar device 600 includes multiple receiver channels, each of which includes an RX antenna 602, a receiver unit 604 (i.e., an amplifier), a mixer unit 606, a filter unit 608, and an ADC unit 610. Furthermore, radar device 600 includes a post-processing unit 612, a TX antenna 614, a transmitter unit 616 (i.e., an amplifier), a frequency synthesizer 618 (i.e., a local oscillator), a timing engine 620, and a system clock generator 622. Furthermore, radar device 600 includes a test tone generator 624 configured to generate a test tone signal having a constant frequency. Test tone generator 624 can be connected to TX antenna 614 via a switch, allowing the test tone signal to be fed to mixer unit 606.

[0057] More specifically, the radar device 600 has been extended by a test tone generator 624 and a switch that can connect the input of one of the transmitter units 616 to the test tone generator 624 instead of to the output of the frequency synthesizer 618. The LO input of the mixer unit 606 remains connected to the frequency synthesizer 618. During the test mode of the radar device 600, a chirp operation can be started on the timing engine 620, the frequency synthesizer 618, and the ADC unit 610. The receiver unit 604 receives the test tone signal from the transmitter unit 616 via the chip and board coupling and provides it in an amplified form to the RX input of the individual mixer unit 606. Since the signal on the LO input of the mixer unit 606 is chirped, the output signal of the mixer unit 606 (i.e., the IF signal) also becomes chirped. This is Figure 7 Shown in.

[0058] Figure 7 Show Figure 6 Signal diagram 700 of a radar device is shown. Signal diagram 700 shows that the bandwidth BIF of IF signal 706 is the same as the bandwidth B of the chirp signal. A high-pass (HP) filter and a low-pass (LP) filter that receive IF signal 706 will reduce signal energy at the edges of the IF frequency range, but most of the energy in the IF passband can be fully utilized for timing estimation. Therefore, it is not necessary to bypass the HP filter to obtain an acceptable SNR for phase estimation.

[0059] Figure 8 Another illustrative embodiment of a radar device 800 is shown. Specifically, a possible implementation of the disclosed radar device is shown with a single, standalone radar IC (with a BIST architecture available). Radar device 800 includes multiple receiver channels, each of which includes an RX antenna 802, a receiver unit 804 (i.e., an amplifier), a mixer unit 806, a filter unit 808, and an ADC unit 810. Furthermore, radar device 800 includes a post-processing unit 812, a TX antenna 814, a transmitter unit 816 (i.e., an amplifier), a frequency synthesizer 818 (i.e., a local oscillator), a timing engine 820, and a system clock generator 822. Furthermore, radar device 800 includes a test tone generator 824 configured to generate a test tone signal having a constant frequency. Test tone generator 824 is connected to receiver unit 804 via a multiplexer forming part of the BIST architecture, allowing the test tone signal to be fed to mixer unit 806.

[0060] More specifically, there may be situations where board coupling is insufficient to achieve an acceptable SNR for estimating timing. However, in these cases, the IC may already contain internal BIST structures through which internal signals can be fed into the RF path between the antenna port and the first amplifier stage. The test tone generator 824 is then connected to this BIST structure. It should be noted that in this case, the test tone generator 824 and the frequency synthesizer 818 should operate independently.

[0061] In the following, another possible embodiment of the radar device disclosed in the present invention is discussed, which is based on cascaded radar ICs instead of independent radar ICs. A radar device that deploys a cascade with two ICs typically includes at least a leader IC, a follower IC, and a printed circuit board (PCB). More specifically, one radar transceiver IC acts as a leader, which generates the basic system clock, frequency modulated LO signal, and trigger signal for all ICs in the system. In addition, the other radar transceiver IC acts as a follower, which consumes the basic system clock, frequency modulated LO signal, and trigger signal. Finally, the PCB carries the structure and circuit system that distributes the above-mentioned signals from the leader IC to the follower IC. The LO signal for the leader IC is also routed through the chip interface (LOIF) via the PCB to obtain the same characteristics for the leader IC and the follower IC. On a radar device with cascaded ICs, there is parasitic coupling via the PCB or from the TX antenna to the RX antenna, such as Figure 9 shown.

[0062] Figure 9 An example of a coupling path 900 on a radar sensor board with cascaded ICs is shown. Specifically, radar sensor board 902 includes a leader IC 904 and a follower IC 906. Coupling path 900 includes an antenna coupling path and a board coupling path. This cascaded system typically synchronizes the timing engines in both ICs 904 and 906 via a shared system clock and a trigger signal transmitted from leader IC 904 to follower IC 906. Furthermore, the LO of leader IC 904 is used to generate a chirp signal, which is then distributed to both ICs 904 and 906 via board 902. A key characteristic of a cascaded system is that ADC sampling is synchronized across all ICs 904 and 906. If synchronization cannot be guaranteed, data from different ICs cannot be correctly combined, potentially impacting target detection and estimation performance. Furthermore, the trigger mechanism can be affected by random or systematic distortions such as external noise, clock jitter, or reduced slew rate on the trigger line. Therefore, monitoring and testing time synchronization is important from a functional safety perspective.

[0063] Figure 10Another illustrative embodiment of a radar device 1000 is shown. Specifically, a possible implementation of the disclosed radar device is shown with two cascaded radar ICs. More specifically, radar device 1000 includes a leader IC 1002 and a follower IC 1026. Leader IC 1002 includes multiple receiver channels, each of which includes an RX antenna 1004, a receiver unit 1006 (i.e., an amplifier), a mixer unit 1008, a filter unit 1010, and an ADC unit 1012. Leader IC 1002 also includes a post-processing unit 1014, a TX antenna 1016, a transmitter unit 1018 (i.e., an amplifier), a frequency synthesizer 1020 (i.e., a local oscillator), a timing engine 1022, and a system clock generator 1024. Similarly, follower IC 1026 includes multiple receiver channels, each of which includes an RX antenna 1028, a receiver unit 1030 (i.e., an amplifier), a mixer unit 1032, a filter unit 1034, and an ADC unit 1036. In addition, follower IC 1026 includes a post-processing unit 1038, a TX antenna 1040, a transmitter unit 1042 (i.e., an amplifier), a frequency synthesizer 1044 (i.e., a local oscillator), a timing engine 1046, and a system clock generator 1048.

[0064] It should be noted that follower IC 1026 is a general-purpose radar IC that shares components with the leader IC. This means that follower IC 1026 still possesses frequency synthesizer 1044, even though this frequency synthesizer 1044 is not used in cascade operation. For this reason, frequency synthesizer 1044 can be used as a test tone generator of the type described. In other words, in test mode, cascade radar apparatus 1000 utilizes "spare" frequency synthesizer 1044 to generate a constant test tone. To facilitate this implementation, the input of mixer unit 1032 is driven from a different source than the input of transmitter unit 1042, as illustrated by the switching between frequency synthesizer 1044 and transmitter unit 1042.

[0065] Figure 11 1 shows another illustrative embodiment of a radar device 1100. Specifically, a possible implementation of the radar device disclosed herein is shown having three cascaded radar ICs. More specifically, the radar device 1100 includes a leader IC 1102, a first follower IC 1126, and a second follower IC 1150. Each of the ICs includes, for example, Figure 10 The embodiment shown has the same components as the cascaded IC. However, Figure 10Unlike the follower ICs shown, follower ICs 1126 and 1150 do not include switches. In fact, one of the follower ICs (i.e., the second follower IC 1150) acts as a test tone generator only when the synchronization between the leader IC 1102 and the other follower IC (i.e., the first follower IC 1126) is being tested. Therefore, the unused frequency synthesizer 1168 of the second follower IC 1150 is used as a source for generating a test tone signal when the synchronization between the leader IC 1102 and the first follower IC 1126 is being tested. It should be noted that coverage of timing differences between all ICs can be achieved by applying an alternating scheme, in which the role of test tone generation changes over time, for example, between runs. According to this scheme, after the synchronization between the leader IC 1102 and the first follower IC 1126 has been tested, the synchronization between the leader IC 1102 and the second follower IC 1150 can be tested by using the unused frequency synthesizer 1146 of the first follower IC 1126 as a source for generating a test tone signal. By applying this method, no hardware expansion is required at all.

[0066] Figure 12 1 shows another illustrative embodiment of a radar device 1200. Specifically, a possible implementation of the radar device disclosed herein is shown with two cascaded radar ICs (in which a BIST structure is available). More specifically, radar device 1200 includes a leader IC 1202 and a follower IC 1228. Each of the ICs includes, for example, Figure 10 The embodiment shown has the same components as the cascaded IC. However, Figure 10 Unlike the follower ICs shown, follower IC 1228 does not include switches. In practice, both leader IC 1202 and follower IC 1128 include test tone generators 1226, 1252 coupled to the BIST structures of ICs 1202, 1128.

[0067] More specifically, there may be situations where the board coupling between the cascaded ICs is insufficient to achieve an acceptable SNR for estimating timing. However, in these situations, the ICs may already contain internal BIST structures through which internal signals can be fed into the RF path between the antenna port and the first amplifier stage within each IC. Thus, each of the cascaded ICs may be equipped with its own test tone generator 1226, 1252. In this case, the test tone generators 1226, 1252 should be synchronized in frequency with the system clock generator 1224, 1250 of each IC. In this way, frequency synchronization between all test tone generators in the cascaded system is enabled because the system clock generators 1224, 1250 are synchronized with each other anyway. Figure 12 In the embodiment shown, the test tone generators 1226, 1252 should deliver a fixed tone continuous wave signal with high quality in terms of frequency stability and phase noise. One possibility for implementing this generator is as a frequency multiplier of the system clock. It should be noted that Figure 12 The illustrated embodiment advantageously avoids the need for additional RF BIST structures between cascaded ICs.

[0068] The skilled person will appreciate that in any of the above-described embodiments of the radar apparatus, the post-processing unit may calculate (ie estimate) the timing offset as shown in detail below. In the following calculation, x ch (t) represents the transmitted chirp signal.

[0069] Then, assuming a non-frequency selective channel, the received signal on RX channel i can be expressed as shown in Equation 1, where g i is the gain, is a fixed phase offset, and t Off,i is the individual timing offset of RX channel i.

[0070]

[0071] Thus, in the frequency domain, this becomes:

[0072]

[0073] Thus, the cross-correlation between the two receiver channels i and k produces the results shown in Equations 3 and 4.

[0074] CCF ik (f) = X RX,i (f)·conj(X RX,k (f)) (Equation 3)

[0075]

[0076] Use chirp signal X ch (f)·conj(X ch The well-known autocorrelation property of (f)) = 1 is used to calculate the phase of the cross-correlation function as shown in Equations 5 and 6, where represents a constant phase difference between RX chains i and k, and Δt Off,ik Indicates the desired time difference between two RX channels.

[0077]

[0078] It should be noted that for a practical implementation of the radar device disclosed in the present invention, the data may not be received in a composite format. In other words, there may only be an in-phase signal that is further processed after the mixer. Alternatively, the radar device disclosed in the present invention may be implemented using both real-valued data and composite data. In this case, both I data and Q data will be output by the mixer and further processed. In this way, better performance can be achieved. In addition, in a practical implementation of the radar device disclosed in the present invention, the received signal contains additive noise. In addition, the received chirp data is band-limited, for example, by high-pass and low-pass filters in the IF path. Finally, calculations can only be performed on sampled discrete ADC data. For these reasons, the time offset estimation algorithm may include the following steps, assuming that the sampled and ADC-converted signal x RX1 (k) and x RX2 (k)(where k=0...n FFT -1) is available in the memory of the post-processing unit.

[0079] First, the FFT can be calculated as shown in Equations 7 and 8.

[0080] X RX1 =FFT(x RX1 ) (Equation 7)

[0081] X RX2 =FFT(x RX2 ) (Equation 8)

[0082] Then, to cope with band-limited chirp, subcarrier n=n can be selected from the interval (0, nFFT / 2) containing the main energy from the chirp signal. Min …n Max Subsequently, the cross-correlation function can be calculated in the frequency domain by element-wise conjugate complex multiplication, as shown in Equation 9.

[0083] CCF 12 (n) = X RX1 (n)·conj(X RX1 (n))(Equation 9)

[0084] The phase of the cross-correlation function can then be calculated as shown in Equation 10. It should be noted that in order to ensure ambiguity-free and wrap-free results, the angle calculation may include an unwrap step.

[0085] Φ CCF,12 (n) = angle(CCF 12 (n))(Equation 10)

[0086] The noise phase data can then be fit with a linear function f(n)=b0+b1*n in a minimum mean square error (MMSE) sense. Next, the estimated time offset between the two receiver channels can be calculated as shown in Equation 11.

[0087] Δt Off,Est =b1·n FFT / (2π·fSample) (Equation 11)

[0088] Finally, the estimated time offset can be compared to a given threshold, and if the estimated time offset exceeds the threshold, an error can be flagged. In cases where more data needs to be collected to obtain sufficient SNR, the CCF from multiple FFT cycles can be accumulated before calculating the angle. Furthermore, it should be noted that b0 is equal to the phase difference between the two receiver channels relative to the transmitted test tone. This phase difference is not necessarily the same as the phase difference observed during normal radar operation.

[0089] Figure 13 An illustrative embodiment of a test execution flow 1300 is shown. In automotive applications, continuous monitoring of key system characteristics is essential for functional safety. Therefore, the timed synchronization test described above can be performed periodically during a monitoring phase that can precede or be in addition to regular radar operations, such as Figure 13 Specifically, in the test execution flow 1300 , timing synchronization tests 1302 , 1308 , and 1310 are performed before and after conventional radar processing 1304 , 1306 , and 1312 .

[0090] It should be noted that the SNR for timing estimation can be further improved in the following way. Existing IC internal loopback paths can be used to measure the time offset between receiver channels on the same chip (i.e., radar IC), which can provide significantly less attenuation. Once proper synchronization is confirmed at this level, the chip-to-chip timing offset can be calculated by combining the results from all antennas of each chip. In addition, a phase stability test can be added. More specifically, as mentioned earlier, the coefficient b0 provides an estimate of the phase difference between the receiver channels - including any phase rotation introduced by the loopback path. Therefore, this estimated phase difference may not be suitable for measuring or calibrating phase alignment for normal operation. However, it may be feasible to measure the phase difference before and after normal operation and check the phase stability to ensure functional safety.

[0091] Furthermore, it should be noted that the disclosed method facilitates the implementation of self-calibration of a radar device. Specifically, if the radar device exhibits timing uncertainties by design (e.g., due to temperature-dependent changes in the group delay of an analog filter), the disclosed method can be used to determine the actual timing offsets and provide a basis for later correction and compensation of these offsets.

[0092] Finally, it should be noted that, given the transmission requirements, it may be desirable to avoid the transmission of fixed tones. In this case, an alternative approach can be used for radar devices with cascaded ICs, where coarse time synchronization can be ensured or checked by other means. More specifically, a practically inactive frequency synthesizer in one of the follower ICs can be used to generate a chirp signal with a different slope than the chirp signal on the leader IC. The result is again a chirp signal in the IF - which can be evaluated using the same algorithm but with a different scaling. Note that coarse timing synchronization only ensures that the frequency difference between the two chirp sources is within the IF bandwidth for a long enough time so that there is sufficient signal energy in the capture interval for post-processing. However, using a fixed tone as the test signal is preferable because, in this case, the distribution of the electromagnetic waves from TX to RX is not time-dependent (standing wave scenario), so propagation delays do not affect the measurement results until the period of the RF signal.

[0093] It should be noted that the above embodiments have been described with reference to different subject matters. Specifically, some embodiments may have been described with reference to method claims, while other embodiments may have been described with reference to apparatus claims. However, those skilled in the art will appreciate from the foregoing that, unless otherwise indicated, any combination of features relating to different subject matters, in addition to any combination of features belonging to one type of subject matter, and in particular, any combination of features from a method claim with features from an apparatus claim, are also considered disclosed herein.

[0094] In addition, it should be noted that the drawings are schematic. Similar or identical elements are represented by the same reference numerals in different drawings. In addition, it should be noted that in order to provide a concise description of the illustrative embodiments, implementation details that are customary practices of technicians may not be described. It should be understood that in the development process of any such embodiment, as in any engineering or design project, many implementation-specific decisions must be made to achieve the developer's specific goals, such as complying with system-related and business-related constraints, which may vary from one embodiment to another. In addition, it should be understood that this development work may be complex and time-consuming, but it will still be a common practice for technicians to engage in design, production, and manufacturing.

[0095] Finally, it should be noted that the skilled person will be able to design many alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps other than those listed in the claim. The words "a / an" preceding an element do not exclude the presence of a plurality of such elements. The measures recited in the claims may be implemented by means of hardware comprising several distinct elements and / or by means of a suitably programmed processor. In a device claim listing several components, several of these components may be embodied by one and the same piece of hardware. The fact that certain measures are recited in mutually different dependent claims does not in itself indicate that a combination of these measures cannot be used to advantage.

[0096] Reference Signs List

[0097] 100 radar devices

[0098] 102 Receiver Antenna

[0099] 104 receiver unit (amplifier)

[0100] 106 mixer units

[0101] 108 filter units

[0102] 110 A / D converter units

[0103] 112 post-processing unit

[0104] 114 Transmitter Antenna

[0105] 116 transmitter units (amplifiers)

[0106] 118 frequency synthesizer (local oscillator)

[0107] 120 Timing Engine

[0108] 122 System Clock Generator

[0109] 200 Signal Graph

[0110] 202 Mixer input signal

[0111] 204 Received Signal

[0112] 206 IF signal

[0113] 300 coupling paths

[0114] 302 radar sensor board

[0115] 304 radar IC

[0116] 306 Transmitter Antenna

[0117] 308 Receiver Antenna

[0118] 400 radar devices

[0119] 402 Receiver Channel

[0120] 404 Mixer

[0121] 406 Receiver Channel

[0122] 408 Mixer

[0123] 410 First Frequency Synthesizer

[0124] 412 Test Tone Generator

[0125] 500 Method of operating a radar device

[0126] 502 A chirp signal is generated by a first frequency synthesizer included in the radar device

[0127] 504 is generated by at least one test tone generator included in the radar device.

[0128] Constant frequency test tone signal

[0129] 506 Feeding the chirp signal to a mixer included in a receiver channel of the radar device

[0130] and test tone signal

[0131] 600 radar devices

[0132] 602 Receiver Antenna

[0133] 604 receiver unit (amplifier)

[0134] 606 mixer unit

[0135] 608 filter unit

[0136] 610 A / D converter unit

[0137] 612 post-processing unit

[0138] 614 Transmitter Antenna

[0139] 616 transmitter unit (amplifier)

[0140] 618 frequency synthesizer (local oscillator)

[0141] 620 Timing Engine

[0142] 622 System Clock Generator

[0143] 624 Test Tone Generator

[0144] 700 Signal Diagram

[0145] 702 mixer input signal

[0146] 704 sent / received signals

[0147] 706 IF signal

[0148] 800 radar device

[0149] 802 Receiver Antenna

[0150] 804 receiver unit (amplifier)

[0151] 806 mixer unit

[0152] 808 filter unit

[0153] 810 A / D converter unit

[0154] 812 post-processing unit

[0155] 814 Transmitter Antenna

[0156] 816 transmitter unit (amplifier)

[0157] 818 frequency synthesizer (local oscillator)

[0158] 820 Timing Engine

[0159] 822 System Clock Generator

[0160] 824 Test Tone Generator

[0161] 900 coupling paths

[0162] 902 Radar sensor board with cascade IC

[0163] 904 guide IC

[0164] 906 follower IC

[0165] Transmitter antenna for 908 guide IC

[0166] Receiver antenna for 910 guide IC

[0167] Receiver antenna for 912 follower IC

[0168] Transmitter antenna for 914 follower IC

[0169] 1000 radar devices

[0170] 1002 Boot IC

[0171] 1004 Receiver Antenna

[0172] 1006 Receiver Unit (Amplifier)

[0173] 1008 Mixer Unit

[0174] 1010 filter unit

[0175] 1012 analog / digital converter units

[0176] 1014 Post-processing unit

[0177] 1016 Transmitter Antenna

[0178] 1018 transmitter unit (amplifier)

[0179] 1020 frequency synthesizer (local oscillator)

[0180] 1022 Timing Engine

[0181] 1024 system clock generator

[0182] 1026 follower IC

[0183] 1028 receiver antenna

[0184] 1030 Receiver Unit (Amplifier)

[0185] 1032 mixer unit

[0186] 1034 filter units

[0187] 1036 A / D converter units

[0188] 1038 Post-processing unit

[0189] 1040 Transmitter Antenna

[0190] 1042 transmitter unit (amplifier)

[0191] 1044 frequency synthesizer (local oscillator)

[0192] 1046 Timing Engine

[0193] 1048 System Clock Generator

[0194] 1100 Radar Device

[0195] 1102 guide IC

[0196] 1104 Receiver Antenna

[0197] 1106 Receiver Unit (Amplifier)

[0198] 1108 Mixer Unit

[0199] 1110 filter unit

[0200] 1112 analog / digital converter unit

[0201] 1114 Post-processing unit

[0202] 1116 Transmitter Antenna

[0203] 1118 transmitter unit (amplifier)

[0204] 1120 frequency synthesizer (local oscillator)

[0205] 1122 Timing Engine

[0206] 1124 System Clock Generator

[0207] 1126 follower IC1

[0208] 1128 receiver antenna

[0209] 1130 Receiver Unit (Amplifier)

[0210] 1132 Mixer Unit

[0211] 1134 filter unit

[0212] 1136 A / D converter unit

[0213] 1138 Post-processing unit

[0214] 1140 Transmitter Antenna

[0215] 1142 transmitter unit (amplifier)

[0216] 1144 frequency synthesizer (local oscillator)

[0217] 1146 Timing Engine

[0218] 1148 System Clock Generator

[0219] 1150 follower IC2

[0220] 1152 Receiver Antenna

[0221] 1154 Receiver Unit (Amplifier)

[0222] 1156 Mixer Unit

[0223] 1158 filter unit

[0224] 1160 A / D converter unit

[0225] 1162 Post-processing unit

[0226] 1164 Transmitter Antenna

[0227] 1166 transmitter unit (amplifier)

[0228] 1168 frequency synthesizer (local oscillator)

[0229] 1170 Timing Engine

[0230] 1172 System Clock Generator

[0231] 1200 Radar Device

[0232] 1202 guide IC

[0233] 1204 receiver antenna

[0234] 1206 receiver unit (amplifier)

[0235] 1208 mixer unit

[0236] 1210 filter unit

[0237] 1212 analog / digital converter unit

[0238] 1214 Post-processing unit

[0239] 1216 Transmitter Antenna

[0240] 1218 transmitter unit (amplifier)

[0241] 1220 frequency synthesizer (local oscillator)

[0242] 1222 Timing Engine

[0243] 1224 System Clock Generator

[0244] 1226 Test Tone Generator

[0245] 1228 follower IC

[0246] 1230 receiver antenna

[0247] 1232 receiver unit (amplifier)

[0248] 1234 mixer unit

[0249] 1236 filter unit

[0250] 1238 analog / digital converter unit

[0251] 1240 Post-processing unit

[0252] 1242 Transmitter Antenna

[0253] 1244 transmitter unit (amplifier)

[0254] 1246 frequency synthesizer (local oscillator)

[0255] 1248 Timing Engine

[0256] 1250 System Clock Generator

[0257] 1300 Test Execution Process

[0258] 1302 Timing Synchronization Test

[0259] 1304 Radar Processing

[0260] 1306 Radar Processing

[0261] 1308 Timing Synchronization Test

[0262] 1310 Timing Synchronization Test

[0263] 1312 Radar processing.

Claims

1. A radar device, characterized in that: include: multiple receiver channels; a plurality of mixers, wherein each of said receiver channels comprises one of said mixers; a first frequency synthesizer configured to generate a chirp signal; at least one test tone generator configured to generate a test tone signal having a constant frequency; wherein the mixer is configured to be fed with the chirp signal and the test tone signal.

2. The radar device according to claim 1, wherein The test tone generator is implemented as a second frequency synthesizer, wherein the second frequency synthesizer is embedded in a follower integrated circuit IC of the radar device.

3. The radar device according to claim 1, wherein The receiver channels are distributed across a plurality of ICs, and wherein each of the ICs includes a test tone generator configured to be coupled to a corresponding receiver channel of the IC through a BIST structure of the IC.

4. The radar device according to claim 1, wherein Additionally included is a post-processing unit configured to derive a time offset between the receiver channels from a digitized output signal provided by the mixer.

5. The radar device according to claim 4, characterized in that The post-processing unit is configured to calculate a set of Fast Fourier Transforms (FFTs) of the digitized output signal.

6. The radar device according to claim 5, characterized in that The post-processing unit is configured to multiply the FFTs in the frequency domain and calculate corresponding phases of subcarriers for a given pair of the receiver channels.

7. The radar device according to claim 6, characterized in that The post-processing unit is configured to fit the phase versus frequency data derived from the calculated phases of the subcarriers by a first order polynomial, the slope of the first order polynomial being a measure of the time offset.

8. A vehicle, characterized in that: Comprising the radar apparatus according to claim 1.

9. A method of operating a radar device, characterized in that include: generating a chirp signal by a first frequency synthesizer included in the radar apparatus; generating a test tone signal having a constant frequency by at least one test tone generator included in the radar apparatus; The chirp signal and the test tone signal are fed to a mixer included in a receiver channel of the radar apparatus.

10. The method according to claim 9, characterized in that Furthermore, a post-processing unit included in the radar device is configured to derive a time offset between the receiver channels from a digitized output signal provided by the mixer.

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