Constant-voltage digital adjustable load circuit for ultrasonic power supply and working method of constant-voltage digital adjustable load circuit

Abstract

The invention provides a constant-voltage digital adjustable load circuit for an ultrasonic power supply and a working method of the constant-voltage digital adjustable load circuit, the constant-voltage digital adjustable load circuit comprises a control signal processing circuit, a subtraction circuit and a voltage control circuit which are connected in sequence, and the voltage control circuit is further connected with a rectifying circuit and an overcurrent protection circuit. The input end of the rectifying circuit is connected with a transformer; and the voltage control circuit is used for receiving an output signal of the subtraction circuit and the direct-current voltage output by the rectifying circuit, controlling the primary voltage of the ultrasonic circuit to be 0-100V linear adjustable constant voltage, and outputting the direct-current voltage to the ultrasonic circuit. According to the invention, a multi-path output transformer is simplified into a single-path output transformer, and a multi-path relay required for voltage switching is removed, so that the volume of the ultrasonic power supply is reduced, the working stability is improved, the production cost is reduced, the linearly adjustable function of the output voltage is realized, the power supply function becomes stronger and more stable, and the power supply is more convenient to use. And the practicability of the power supply is greatly improved.

Description

Technical Field

[0001] The present invention relates to the technical field of ultrasonic power supplies, in particular to a constant voltage digital adjustable load circuit for ultrasonic power supplies and a working method thereof. Background Art

[0002] Ultrasonic technology is widely used in many fields such as cleaning, welding, medical treatment, industrial processing, and industrial automation. As a key device for driving ultrasonic transducers, the performance of ultrasonic power supply directly affects the working efficiency and stability of the ultrasonic system.

[0003] Existing ultrasonic power supplies require the use of a multi-channel transformer in conjunction with multiple relays to achieve the function of switching multiple voltage outputs. However, this method of achieving multiple voltage switching outputs not only requires a large and expensive load circuit, but also has low output stability. Summary of the Invention

[0004] In response to the problems existing in the prior art, the present invention proposes a constant voltage digitally adjustable load circuit for an ultrasonic power supply and its working method, aiming to solve the problems of low output stability, large size, high assembly difficulty and high cost of the load circuit of a traditional ultrasonic power supply.

[0005] To achieve the above object, the technical solution adopted by the present invention is:

[0006] A constant voltage digitally adjustable load circuit for an ultrasonic power supply, comprising a control signal processing circuit, a subtraction circuit, a voltage control circuit, and an ultrasonic circuit connected to the voltage control circuit, the voltage control circuit being further connected to a rectifier circuit, the input end of the rectifier circuit being connected to a transformer, and the transformer being connected to the ultrasonic power supply;

[0007] a rectifier circuit, configured to convert an AC voltage into a DC voltage and output the DC voltage to the voltage control circuit;

[0008] A control signal processing circuit is used to convert the input control signal into a DC 0-5V analog signal;

[0009] a subtraction circuit, configured to invert the DC 0-5V analog signal converted by the control signal processing circuit into a DC 5-0V analog signal;

[0010] A voltage control circuit, configured to receive the DC 5-0V analog signal converted by the subtraction circuit and the DC voltage output by the rectifier circuit, control the primary voltage of the ultrasonic circuit to be a linearly adjustable constant voltage of 0-100V, and output a DC voltage to the ultrasonic circuit;

[0011] The ultrasonic circuit is used to convert the electrical energy received from the voltage control circuit into ultrasonic energy for output.

[0012] Furthermore, the control signal processing circuit includes a diode D11, a diode D13, a transistor Q1, a transistor Q2, a transistor Q3, a transistor Q5, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C7, a capacitor C42, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R19, a resistor R20, a resistor R21, a resistor R23, a resistor R24, a connector J4, a connector J5, a connector J6, a connector J7 and a potentiometer RV2; one end of the connector 6 and the connector 7 are both connected to the signal input end, the other end of the connector is connected to the base of the transistor Q5, the other end of the connector 7 is connected to the collector of the transistor Q5 through the diode D13, and the transistor Q 3 is connected to the collector of the transistor Q5, the emitters of the transistor Q3 and the transistor Q5 are commonly grounded, the collector of the transistor Q3 is connected to one end of the connector 5, a potentiometer RV2 is further provided between the collector and emitter of the transistor Q3, pin 2 of the potentiometer RV2 is connected to one end of the connector 4, the other ends of the connector 4 and the connector 5 are connected to the base of the transistor Q1 through resistors R4, R21 and R23 in sequence, the emitter of the transistor Q1 is connected to the base of the transistor Q2, the base and collector of the transistor Q2 are further connected to a 12V positive voltage through resistors R5 and R6, respectively, and the emitter of the transistor Q2 serves as an output end, outputting a 0-5V analog signal to the subtraction circuit.

[0013] Based on the above, the PWM input signal is selected as either active-high or active-low via connectors J6 and J7. When connector J6 is shorted to select active-high, transistor Q5 inverts the PWM digital signal, and transistor Q3 converts the 12V PWM digital signal into a 5V PWM digital signal. Diode D11 functions so that, when connector J7 is shorted to select active-low, the low level of the PWM digital signal lowers the voltage at point NER2, while the high level of the PWM digital signal directly drives transistor Q5 without bypassing current-limiting resistor R9. Potentiometer RV2 adjusts the amplitude range of the input analog signal. The power supply can be selected for PWM digital signal control or 0-5V analog signal control via connectors J4 and J5. When connector J5 is shorted, PWM digital signal control is enabled, while when connector J4 is shorted, 0-5V analog signal control is enabled.

[0014] Furthermore, the control voltage circuit includes an operational amplifier U1A, a resistor R7, a resistor R8, a resistor R10, a resistor R36, a resistor R71, a resistor R79, a resistor R83, a voltage regulator Z1, a voltage regulator Z2, a diode D14, a capacitor C6, a capacitor C45, a capacitor C49, and a first MOS tube voltage regulation circuit, a second MOS tube voltage regulation circuit, a third MOS tube voltage regulation circuit, and a fourth MOS tube voltage regulation circuit in parallel. One end of the resistor R7 is connected to the signal input end, and the other end is connected to one end of the resistor R8. The other end of the resistor R8 is connected to the inverting input end of the operational amplifier U1A. The output end of the operational amplifier U1A is connected to the first MOS tube voltage regulation circuit. A capacitor C45 and a resistor R10 are further connected in series between the output end and the inverting input end of the operational amplifier U1A. The negative electrode of the voltage regulator Z2, the resistor R7, and the resistor R8 are connected in series. 9 and one end of the capacitor C49 are connected to the non-inverting input terminal of the operational amplifier U1A, the positive electrode of the voltage-stabilizing tube Z2, the other end of the resistor R79 and the other end of the capacitor C49 are connected to the positive electrode of the voltage-stabilizing tube Z1, and the negative electrode of the voltage-stabilizing tube Z1 is connected to the common connection point of the resistor R7 and the resistor R8; one end of the resistor R71 is connected to the drain of the MOS tube V1 and connected to the ultrasonic circuit, and the other end is connected to the non-inverting input terminal of the operational amplifier U1A; one end of the resistor R83 is connected to the 5V positive voltage, and the other end is connected to the anode of the diode D14, and the cathode of the diode D14 is connected to the non-inverting input terminal of the operational amplifier U1A; one end of the resistor R36 and one end of the capacitor C6 are connected to one end of the resistor R71, and the other end of the resistor R36 and the capacitor C6 are grounded together.

[0015] Based on the above, the signal output by the subtraction circuit is input into the operational amplifier U1A through resistors R7 and R8. The operational amplifier U1A converts the input analog signal into a drive signal, regulating the conduction of subsequent MOS transistors V1, V2, V3, and V4, thereby achieving linearly adjustable output voltage. Resistor R10 is used to feed information from the output of the operational amplifier U1A back to the inverting input of the operational amplifier U1A, forming a closed feedback loop, while capacitor C45 filters out high-frequency noise from the signal and improves control accuracy. The voltage regulator Z1 is used to clamp the reference voltage, limiting the reference voltage amplitude to prevent the reference voltage from running out of control and causing output overvoltage. The voltage regulator Z2 and resistor R79 form a clamping circuit to limit the input signal amplitude and prevent op amp overload.

[0016] Furthermore, the first MOS transistor voltage regulating circuit includes a MOS transistor V1, a transistor Q10, a resistor R11, a resistor R15, a resistor R35, and a resistor RS4. The output end of the operational amplifier U1A is connected to the gate of the MOS transistor V1 through the resistor R11. The gate of the MOS transistor V1 is also connected to the collector of the transistor Q10 and one end of the resistor R15. The emitter of the transistor Q10 and the other end of the resistor R15 are commonly grounded. The two ends of the resistor R35 are respectively connected to the source of the MOS transistor V1 and the base of the transistor Q10. The source of the MOS transistor V1 is also grounded through the resistor RS4.

[0017] Based on the above, the transistor Q10, resistors R15, R35, and RS4 form an overcurrent protection circuit. When the current of MOS transistor V1 is too high, the voltage of resistor R35 increases, turning on transistor Q10, lowering the gate voltage of MOS transistor V1 and reducing the degree of conduction. Ultimately, the current of the parallel MOS transistors tends to be consistent, thereby achieving adaptive current sharing. In addition, when the total current is too high, the voltage drop of resistor R35 exceeds the conduction voltage of MOS transistor V1, and transistor Q10 is turned on at a large scale, forcing the op amp output to be lowered, limiting the conduction of MOS transistor V1 and achieving overcurrent protection.

[0018] Furthermore, the subtraction circuit includes an operational amplifier U1A, a transistor Q7, a transistor Q9, a transistor Q11, a resistor R72, a resistor R73, a resistor R74, a resistor R75, a resistor R76, a resistor R77, a resistor R30 and a capacitor C8; one end of the resistor R72 and the resistor R73 are both connected to the inverting input terminal of the operational amplifier U1A, the other end of the resistor R72 is connected to the analog signal input terminal, the other end of the R73 is connected to the analog signal output terminal, one end of the resistor R74 and the resistor R75 are both connected to the non-inverting input terminal of the operational amplifier U1A, the other end of the resistor R74 is connected to the 5V positive voltage, and the other end of the resistor R75 is connected to the 5V positive voltage. The output end of the operational amplifier U1A is connected to the base of the transistor Q7, the collector of the transistor Q7 is connected to the 12V positive voltage through the resistor R31, the emitter is connected to the output end of the analog signal, and is grounded through the capacitor C8; the output end of the operational amplifier U1A is also grounded through the resistor R77; the bases of the transistor Q9 and the transistor Q11 are connected to each other, the collector of the transistor Q9 is connected to the emitter of the transistor Q7, the collector of the transistor Q11 is connected to the 5V positive voltage through the resistor R76, the emitters of the transistor Q9 and the transistor Q11 are grounded in common, and the base and collector of the transistor Q11 are short-circuited.

[0019] Based on the above, the subtraction circuit converts the input 0-5V analog signal into a 5-0V analog control signal through operational amplifier U1A and transistor Q7. Transistors Q9 and Q11 work together to act as a mirrored constant current source, ensuring efficient and stable driving of the output control signal.

[0020] Furthermore, the rectifier circuit includes a fuse F1, a capacitor C14, an inductor LF1 and a rectifier bridge D3. Pin 1 and pin 3 of the inductor LF1 are respectively connected to pin 1 and pin 2 of the transformer. A fuse F1 is arranged between pin 1 of the inductor LF1 and pin 2 of the transformer. The two ends of the capacitor C14 are respectively connected to pin 1 and pin 2 of the varactor. Pin 2 of the transformer is connected to the live wire ACL, and pin 1 is connected to the neutral wire ACN. Pin 1 of the rectifier bridge D3 is connected to pin 2 of the inductor LF1. Pin 2 of the rectifier bridge D3 outputs a positive voltage of 141V, and pins 3 and 4 are both grounded to pin 4 of the inductor LF1.

[0021] Based on the above, when the current is too high, fuse F1 blows, providing overcurrent protection. Inductor LF1 acts as a common-mode inductor, filtering common-mode electromagnetic interference signals and EMI filtering. Capacitor C14 is used to filter high-frequency interference and improve power quality. The rectifier bridge is used to convert AC voltage into DC voltage and output a +141V DC voltage to the voltage control circuit.

[0022] Furthermore, the ultrasonic circuit includes a current transformer T1, a current transformer T3, an inductor L1, an operational amplifier U8, a MOS transistor V8, a MOS transistor V9, a diode D8, a diode D9, a capacitor C23, a capacitor C24, a capacitor C27, a capacitor C28, a capacitor C29, a capacitor C30, a capacitor C31, a resistor R33, a resistor R34, a resistor R47, a resistor R48, a resistor R50, a resistor R51, a resistor R60, a resistor R61 and an ultrasonic transducer P2; the drain of the MOS transistor V9 is connected to a positive voltage of 141V, The source is connected to the drain of the MOS tube V8, the two ends of the resistor R33 are respectively connected to the gate and source of the MOS tube V9, and the two ends of the resistor R34 are respectively connected to the gate and source of the MOS tube V8; the pin 1 of the current transformer T1 is connected to the drain of the MOS tube V9 and the source of the MOS tube V8, the pin 2 is connected to the source of the MOS tube V9 and the drain of the MOS tube V8, the pin 3 is connected to one end of the inductor L1, the pin 4 is connected to the pin 1 of the current transformer T3, and the other end of the inductor L1 is connected to the drain of the MOS tube V9 and the source of the MOS tube V8. The ultrasonic transducer P2 is connected to one end of the ultrasonic transducer P2, and the other end of the ultrasonic transducer P2 is connected to the pin 2 of the current transformer T3. The capacitor C23 and the capacitor C24 are connected in parallel with the ultrasonic transducer P2; the pin 4 of the current transformer T3 is connected to the non-inverting input terminal of the operational amplifier U8 through the resistor R60, and the pin 3 of the current transformer T3 is connected to the inverting input terminal of the operational amplifier U8 through the resistor R47; one end of the capacitor C28, one end of the capacitor C27, one end of the resistor R48, and one end of the resistor R61 are connected to the non-inverting input terminal of the operational amplifier U8. The cathode of the diode D9 and the anode of the diode D8 are all connected to the non-inverting input terminal of the operational amplifier U8, the other end of the capacitor C28, one end of the capacitor C29, one end of the capacitor C31, one end of the resistor R48, one end of the resistor R49, one end of the resistor R50, the anode of the diode D9 and the cathode of the diode D8 are all connected to the inverting input terminal of the operational amplifier U8, the other ends of the resistor R50, the resistor R61, the capacitor C27 and the capacitor C31 are all grounded, and the other ends of the capacitor C29 and the resistor R49 are connected to the 12V positive voltage.

[0023] Based on the above, the inductor L1, capacitor C23, capacitor C24, ultrasonic transducer P2 and current transformer T3 constitute a secondary resonant circuit, the current transformer T3 is a 1:200 current transformer, and the phase sequence of the resonant circuit is detected in real time. The resistor R47, resistor R48, resistor R60, resistor R61, capacitor C28, diode D8, diode D9 and capacitor C27 constitute a phase sequence detection clamping circuit. The operational amplifier U8 compares the voltage of the phase sequence signal output by the secondary resonant circuit with the voltage divider circuit composed of the capacitor C29, resistor R49, capacitor C31, and resistor R50, and outputs the signal to the upper-level chip circuit for frequency adjustment. The ultrasonic transducer P2 converts electrical energy into ultrasonic energy for output.

[0024] Furthermore, the ultrasonic circuit also includes a capacitor C18, a capacitor C19, a resistor R28, and a resistor R29. One end of the capacitor C18, the capacitor C19, the resistor R28, and the resistor R29 is connected to pin 1 of the current transformer T1, the other end of the capacitor C18 and the resistor R28 is connected to the source of the MOS transistor V8, and the other end of the capacitor C19 and the resistor R29 is connected to the drain of the MOS transistor V9.

[0025] Based on the above, the capacitor C18, capacitor C19, resistor R28, resistor R29, current transformer T1, MOS transistor V8 and MOS transistor V9 form a half-bridge drive circuit, which transmits electric energy from the current transformer T1 to the secondary resonant circuit.

[0026] Furthermore, the control signal processing circuit selects analog control signal input or PWM digital signal input through a jumper, and the PWM digital signal can be selected to be high level valid or low level valid.

[0027] The working method of the constant voltage digital adjustable load circuit for ultrasonic power supply includes the following steps:

[0028] Step 1: The ultrasonic power supply outputs 100V AC power through the transformer, and then the rectifier circuit rectifies the 100V AC power into a maximum value of 141V DC power, and outputs the 141V DC voltage to the voltage control circuit;

[0029] Step 2: The control signal is input to the control signal processing circuit. The control signal processing circuit selects analog control signal input or PWM digital signal input through a jumper. The PWM digital signal can be selected to be high-level active or low-level active. The control signal processing circuit converts the input control signal into a DC 0-5V linear adjustable analog signal.

[0030] Step 3: using the subtraction circuit to invert the DC 0-5V linear adjustable analog signal converted in step 2 into a DC 5-0V analog signal;

[0031] Step 4: The voltage control circuit receives the DC 5-0V analog signal converted by the subtraction circuit in Step 3, compares it with the ultrasonic primary voltage sampling signal through the operational amplifier U1A, and amplifies the output. When the voltage value of the ultrasonic primary voltage sampling signal is lower than the voltage value of the input analog signal, the output of the operational amplifier U1A decreases, and the gate voltages of the MOS transistors V1, MOS transistors V2, MOS transistors V3, and MOS transistors V4 decrease. Since the MOS transistors V1, MOS transistors V2, MOS transistors V3, and MOS transistors V4 work in parallel in the amplification region of the operational amplifier U1A, the drain voltages of the MOS transistors V1, MOS transistors V2, MOS transistors V3, and MOS transistors V4 increase, and the voltage of the ultrasonic primary voltage sampling signal input to the non-inverting input terminal of the operational amplifier U1A also increases proportionally. When it increases to the same voltage value as the analog signal, the output of the operational amplifier U1A stabilizes at a constant voltage value, thereby controlling the primary voltage of the ultrasonic circuit to a linearly adjustable constant voltage of 0-100V.

[0032] In summary, the beneficial effects of the present invention are as follows: compared with the traditional load circuit for ultrasonic power supply, the present invention simplifies the multi-channel output transformer into a single-channel output transformer, removes the multi-channel relay required for switching voltage, and realizes the function of linearly adjustable output voltage while reducing the volume of ultrasonic power supply, improving working stability, and reducing production costs, making the power supply function more powerful and more stable, and greatly improving the practicality of the power supply. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 It is a circuit working principle framework diagram of the present invention;

[0034] Figure 2 This is a schematic diagram of the voltage control circuit and ultrasonic circuit of the present invention;

[0035] Figure 3 This is a schematic diagram of the control signal processing circuit of the present invention;

[0036] Figure 4 This is a schematic diagram of the subtraction circuit of the present invention;

[0037] Figure 5 This is a schematic diagram of the rectifier circuit of the present invention. DETAILED DESCRIPTION

[0038] like Figures 1 to 5As shown, a constant voltage digital adjustable load circuit for an ultrasonic power supply includes a control signal processing circuit, a subtraction circuit, a voltage control circuit, and an ultrasonic circuit connected to the voltage control circuit in sequence. The voltage control circuit is also connected to a rectifier circuit, and the input end of the rectifier circuit is connected to a transformer, and the transformer is connected to the ultrasonic power supply;

[0039] a rectifier circuit, configured to convert an AC voltage into a DC voltage and output the DC voltage to the voltage control circuit;

[0040] A control signal processing circuit is used to convert the input control signal into a DC 0-5V analog signal;

[0041] a subtraction circuit, configured to invert the DC 0-5V analog signal converted by the control signal processing circuit into a DC 5-0V analog signal;

[0042] A voltage control circuit, configured to receive the DC 5-0V analog signal converted by the subtraction circuit and the DC voltage output by the rectifier circuit, control the primary voltage of the ultrasonic circuit to be a linearly adjustable constant voltage of 0-100V, and output a DC voltage to the ultrasonic circuit;

[0043] The ultrasonic circuit is used to convert the electrical energy received from the voltage control circuit into ultrasonic energy for output.

[0044] The voltage control circuit includes an operational amplifier U1A, resistors R7, R8, R10, R36, R71, R79, R83, a voltage regulator Z1, a voltage regulator Z2, a diode D14, capacitors C6, C45, C49, and a first MOS transistor voltage regulation circuit, a second MOS transistor voltage regulation circuit, a third MOS transistor voltage regulation circuit, and a fourth MOS transistor voltage regulation circuit connected in parallel.

[0045] The first MOS transistor voltage regulating circuit includes a MOS transistor V1, a transistor Q10, a resistor R11, a resistor R15, a resistor R35, and a resistor RS4. One end of the resistor R7 is connected to the signal input terminal, and the other end is connected to one end of the resistor R8. The other end of the resistor R8 is connected to the inverting input terminal of the operational amplifier U1A. The output end of the operational amplifier U1A is connected to the first MOS transistor voltage regulating circuit. Specifically, the output end of the operational amplifier U1A is connected to the gate of the MOS transistor V1 through the resistor R11. The gate of the MOS transistor V1 is also connected to the collector of the transistor Q10 and one end of the resistor R15. The emitter of the transistor Q10 and the other end of the resistor R15 are commonly grounded. The two ends of the resistor R35 are respectively connected to the source of the MOS transistor V1 and the base of the transistor Q10. The source of the MOS transistor V1 is also grounded through the resistor RS4.

[0046] The second MOS transistor voltage regulating circuit includes a MOS transistor V2, a transistor Q8, a resistor R12, a resistor R16, a resistor R80, and a resistor RS3. The output of the operational amplifier U1A is connected to the gate of the MOS transistor V2 via the resistor R12. The gate of the MOS transistor V2 is also connected to the collector of the transistor Q8 and one end of the resistor R16. The emitter of the transistor Q8 and the other end of the resistor R16 are both grounded. The two ends of the resistor 80 are respectively connected to the source of the MOS transistor V2 and the base of the transistor Q8. The source of the MOS transistor V2 is also grounded via the resistor RS3. The third MOS transistor voltage regulating circuit includes a MOS transistor V3, a transistor Q6, a resistor R13, a resistor R17, a resistor R81, and a resistor RS2. The output end of the operational amplifier U1A is connected to the gate of the MOS transistor V3 via the resistor R13. The gate of the MOS transistor V3 is also connected to the collector of the transistor Q6 and one end of the resistor R17. The emitter of the transistor Q6 and the other end of the resistor R17 are both grounded. The two ends of the resistor 81 are connected to the source of the MOS transistor V3 and the base of the transistor Q6, respectively. The source of the MOS transistor V3 is also grounded via the resistor RS2. The fourth MOS transistor voltage regulating circuit includes a MOS transistor V4, a transistor Q4, a resistor R14, a resistor R18, a resistor R82, and a resistor RS1. The output end of the operational amplifier U1A is connected to the gate of the MOS transistor V4 through the resistor R14. The gate of the MOS transistor V4 is also connected to the collector of the transistor Q4 and one end of the resistor R18. The emitter of the transistor Q4 and the other end of the resistor R18 are commonly grounded. The two ends of the resistor 82 are respectively connected to the source of the MOS transistor V4 and the base of the transistor Q4. The source of the MOS transistor V4 is also grounded through the resistor RS1.

[0047] In addition, a capacitor C45 and a resistor R10 are connected in series between the output and inverting input of the operational amplifier U1A. The cathode of the voltage regulator diode Z2, one end of the resistor R79, and one end of the capacitor C49 are all connected to the non-inverting input of the operational amplifier U1A. The anode of the voltage regulator diode Z2, the other end of the resistor R79, and the other end of the capacitor C49 are all connected to the anode of the voltage regulator diode Z1. The cathode of the voltage regulator diode Z1 is connected to the common connection point of the resistors R7 and R8. One end of the resistor R71 is connected to the drain of the MOS transistor V1 and to the ultrasonic circuit, and the other end is connected to the non-inverting input of the operational amplifier U1A. One end of the resistor R83 is connected to the 5V positive voltage and the other end is connected to the anode of the diode D14. The cathode of the diode D14 is connected to the non-inverting input of the operational amplifier U1A. One end of the resistor R36 and one end of the capacitor C6 are both connected to one end of the resistor R71 , and the other ends of the resistor R36 and the capacitor C6 are grounded together.

[0048] The control signal processing circuit includes a diode D11, a diode D12, a diode D13, a transistor Q1, a transistor Q2, a transistor Q3, a transistor Q5, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C7, a capacitor C42, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R19, a resistor R20, a resistor R21, a resistor R23, a resistor R24, a connector J2, a connector J4, a connector J5, a connector J6, a connector J7 and a potentiometer RV2. One end of the connector 6 and the connector 7 are both connected to the signal input terminal, the other end of the connector is connected to the base of the transistor Q5, the other end of the connector 7 is connected to the collector of the transistor Q5 through the diode D13, the base of the transistor Q3 is connected to the collector of the transistor Q5, the emitter of the transistor Q3 and the transistor Q5 are grounded together, the collector of the transistor Q3 is connected to one end of the connector 5, and a potential is provided between the collector and emitter of the transistor Q3. The potentiometer RV2 has a pin 2 connected to one end of the connector 4. The other ends of the connector 4 and the connector 5 are connected to the base of the transistor Q1 through resistors R4, R21, and R23, respectively. The emitter of the transistor Q1 is connected to the base of the transistor Q2. The base and collector of the transistor Q2 are further connected to a 12V positive voltage through resistors R5 and R6, respectively. The emitter of the transistor Q2 serves as an output end, outputting a 0-5V analog signal to the subtraction circuit.

[0049] In addition, diode D11 is provided between connector 6 and the signal input terminal, and resistor R9 is provided between connector 7 and the signal input terminal. The other end of connector 7 is also connected to a 12V positive voltage via resistor R19. Capacitor C1 is connected in parallel with resistor R9. Resistor R20 and diode D12 are connected in series and connected to both ends of connector J6. Capacitor C2 is connected in parallel with the diode. The collector of transistor Q3 is connected to a 5V positive voltage and capacitor C42 via resistor R2. The collector of transistor Q3 is also connected to a 5V positive voltage via connector J2. One end of resistor R3 is connected to the common connection terminal of connectors 4 and 5, and the other end is grounded. One end of capacitors C3 and C4 is connected to both ends of resistor R21, and the other ends of capacitors C3 and C4 are grounded. The capacitor C5 is arranged between the base and the collector of the transistor Q1. The emitter of the transistor Q2 is further connected to a capacitor C7 and a resistor R24. The capacitor C7 and the resistor R24 ​​are connected in parallel.

[0050] The rectifier circuit includes a fuse F1, a capacitor C14, an inductor LF1 and a rectifier bridge D3. Pin 1 and pin 3 of the inductor LF1 are respectively connected to pin 1 and pin 2 of the transformer. A fuse F1 is provided between pin 1 of the inductor LF1 and pin 2 of the transformer. The two ends of the capacitor C14 are respectively connected to pin 1 and pin 2 of the varactor. Pin 2 of the transformer is connected to the live wire ACL, and pin 1 is connected to the neutral wire ACN. Pin 1 of the rectifier bridge D3 is connected to pin 2 of the inductor LF1. Pin 2 of the rectifier bridge D3 outputs a positive voltage of 141V. Pins 3 and 4 are both grounded to pin 4 of the inductor LF1.

[0051] The subtraction circuit includes an operational amplifier U1A, a transistor Q7, a transistor Q9, a transistor Q11, a resistor R72, a resistor R73, a resistor R74, a resistor R75, a resistor R76, a resistor R77, a resistor R30, and a capacitor C8. One end of each resistor R72 and R73 is connected to the inverting input of the operational amplifier U1A, the other end of each resistor R72 is connected to the analog signal input, and the other end of each resistor R73 is connected to the analog signal output. One end of each resistor R74 and R75 is connected to the non-inverting input of the operational amplifier U1A, the other end of each resistor R74 is connected to a 5V positive voltage, and the other end of each resistor R75 is grounded. The output of the operational amplifier U1A is connected to the base of the transistor Q7, the collector of the transistor Q7 is connected to a 12V positive voltage via the resistor R31, the emitter is connected to the analog signal output, and is grounded via the capacitor C8. In addition, the output of the operational amplifier U1A is also grounded via the resistor R77. The bases of the transistor Q9 and the transistor Q11 are connected to each other, the collector of the transistor Q9 is connected to the emitter of the transistor Q7, the collector of the transistor Q11 is connected to a 5V positive voltage through the resistor R76, the emitters of the transistor Q9 and the transistor Q11 are grounded, and the base and collector of the transistor Q11 are short-circuited.

[0052] The ultrasonic circuit includes a current transformer T1, a current transformer T3, an inductor L1, an operational amplifier U8, a MOS transistor V8, a MOS transistor V9, a diode D8, a diode D9, capacitors C18, C19, C23, C24, C27, C28, C29, C30, C31, resistors R28, R33, R34, R47, R48, R50, R51, R60, R61, and an ultrasonic transducer P2. The drain of the MOS transistor V9 is connected to a positive voltage of 141V, and its source is connected to the drain of the MOS transistor V8. The two ends of the resistor R33 are respectively connected to the gate and source of the MOS transistor V9. The two ends of the resistor R34 are respectively connected to the gate and source of the MOS transistor V8. Pin 1 of the current transformer T1 is connected to the drain of the MOS transistor V9 and the source of the MOS transistor V8. Pin 2 is connected to the source of the MOS transistor V9 and the drain of the MOS transistor V8. Pin 3 is connected to one end of the inductor L1, and pin 4 is connected to pin 1 of the current transformer T3. Furthermore, pin 1 of the current transformer T1 is connected to one end of capacitors C18, C19, and resistors R28 and R29. The other ends of capacitors C18 and R28 are connected to the source of the MOS transistor V8, and the other ends of capacitors C19 and R29 are connected to the drain of the MOS transistor V9. The other end of inductor L1 is connected to one end of the ultrasonic transducer P2, the other end of which is connected to pin 2 of the current transformer T3. Capacitors C23 and C24 are connected in parallel with the ultrasonic transducer P2. Pin 4 of the current transformer T3 is connected to the non-inverting input of the operational amplifier U8 through the resistor R60, and pin 3 of the current transformer T3 is connected to the inverting input of the operational amplifier U8 through the resistor R47. One end of the capacitor C28, one end of the capacitor C27, one end of the resistor R48, one end of the resistor R61, the cathode of the diode D9, and the anode of the diode D8 are all connected to the non-inverting input of the operational amplifier U8, the other end of the capacitor C28, one end of the capacitor C29, one end of the capacitor C31, one end of the resistor R48, one end of the resistor R49, one end of the resistor R50, the anode of the diode D9, and the cathode of the diode D8 are all connected to the inverting input of the operational amplifier U8, the other ends of the resistor R50, the resistor R61, the capacitor C27, and the capacitor C31 are all grounded, and the other ends of the capacitor C29 and the resistor R49 are connected to a 12V positive voltage.

[0053] The working method of this embodiment includes the following steps:

[0054] Step 1: rectifying the 100V AC power output by the transformer into a maximum DC power of 141V through the rectifier circuit;

[0055] Step 2: The control signal is input to the control signal processing circuit. The control signal processing circuit selects analog control signal input or PWM digital signal input through a jumper. The PWM digital signal can be selected to be high-level active or low-level active. The control signal processing circuit converts the input control signal into a DC 0-5V linear adjustable analog signal.

[0056] Step 3: using the subtraction circuit to invert the DC 0-5V linear adjustable analog signal converted in step 2 into a DC 5-0V analog signal;

[0057] Step 4: The voltage control circuit receives the DC 5-0V analog signal converted by the subtraction circuit in Step 3, compares it with the ultrasonic primary voltage sampling signal collected by resistors R71 and R79, and amplifies the output via operational amplifier U1A. When the voltage value of the ultrasonic primary voltage sampling signal is lower than the voltage value of the input analog signal, the output of operational amplifier U1A decreases, and the gate voltages of MOS transistors V1, V2, V3, and V4 decrease. Since MOS transistors V1, V2, V3, and V4 operate in parallel in the amplification region, their drain voltages increase. When the voltage of the ultrasonic primary voltage sampling signal input at the non-inverting input terminal also increases proportionally to the voltage value of the analog signal, the output of operational amplifier U1A stabilizes at a constant voltage, thereby controlling the primary voltage of the ultrasonic circuit to a linearly adjustable constant voltage of 0-100V. The calculation formula for the drain voltage U of MOS transistors V1, V2, V3, and V4 is:

[0058]

[0059] Where Ua represents the voltage value of the ultrasonic primary voltage sampling signal, the resistance value of resistor R71 is 100K, and the resistance value of resistor R79 is 5.1K.

[0060] The specific voltage regulation process principle is as follows:

[0061] When the analog signal input to the inverting terminal of the operational amplifier U1A is 4.5V and the ultrasonic primary voltage sampling signal input to the non-inverting terminal is 4.4V, the drain voltage U of the MOS transistors V1, V2, V3, and V4 is calculated to be 90.67V according to the formula. At this time, the output of the operational amplifier U1A decreases, and the integration circuit formed by the capacitor C45 and the resistor R10 is fed back to the inverting terminal as negative feedback, which stabilizes the circuit. The output of the operational amplifier U1A decreases, and the gate voltages of the MOS transistors V1, V2, V3, and V4 also decrease. Because the MOS transistors V1, V2, V3, and V4 operate in parallel in the amplification region of the operational amplifier U1A, the drain voltages of the MOS transistors V1, V2, V3, and V4 rise. When the voltage of the ultrasonic primary voltage sampling signal input to the non-inverting input terminal of the operational amplifier U1A also proportionally rises to 4.5V, the output of the operational amplifier U1A stabilizes at a constant voltage value, always maintaining the drain voltage of the parallel MOS transistors V1, V2, V3, and V4 at 92.74V.

[0062] Similarly, when the analog signal input to the inverting terminal of the operational amplifier U1A is 1.0V and the ultrasonic primary voltage sampling signal input to the non-inverting terminal is 0.9V, the drain voltage U of the MOS transistors V1, V2, V3, and V4 is calculated to be 18.54V according to the formula. At this time, the output of the operational amplifier U1A decreases, and the integration circuit formed by the capacitor C45 and the resistor R10 is fed back to the inverting terminal as negative feedback, which stabilizes the circuit. The output of the operational amplifier U1A decreases, and the gate voltages of the MOS transistors V1, V2, V3, and V4 also decrease. As the MOS transistors V1, V2, V3 and V4 work in parallel in the amplification region of the operational amplifier U1A, the drain voltages of the MOS transistors V1, V2, V3 and V4 rise. When the voltage of the ultrasonic primary voltage sampling signal input to the non-inverting input terminal of the operational amplifier U1A also rises proportionally to 1.0V, the output of the operational amplifier U1A stabilizes at a constant voltage value, and the drain voltage of the MOS transistors V1, V2, V3 and V4 connected in parallel is always maintained at 20.61V.

[0063] Thus, the primary voltage of the ultrasonic circuit is controlled to be a linearly adjustable constant voltage of 0 to 100V, and a DC voltage is output to the ultrasonic circuit.

[0064] The above description is only the optimal solution embodiment of the present invention and is not intended to limit the present invention. Various modifications or substitutions made by those skilled in the art without departing from the essence and protection scope of the present invention should also be within the protection scope of the present invention.

Claims

1. Constant voltage digital adjustable load circuit for ultrasonic power supply, characterized by: The device comprises a control signal processing circuit, a subtraction circuit, a voltage control circuit, and an ultrasonic circuit connected to the voltage control circuit, the voltage control circuit is further connected to a rectifier circuit, the input end of the rectifier circuit is connected to a transformer, and the transformer is connected to an ultrasonic power supply; a rectifier circuit, configured to convert an AC voltage into a DC voltage and output the DC voltage to the voltage control circuit; A control signal processing circuit is used to convert the input control signal into a DC 0-5V analog signal; a subtraction circuit, configured to invert the DC 0-5V analog signal converted by the control signal processing circuit into a DC 5-0V analog signal; A voltage control circuit, configured to receive the DC 5-0V analog signal converted by the subtraction circuit and the DC voltage output by the rectifier circuit, control the primary voltage of the ultrasonic circuit to be a linearly adjustable constant voltage of 0-100V, and output a DC voltage to the ultrasonic circuit; The ultrasonic circuit is used to convert the electrical energy received from the voltage control circuit into ultrasonic energy for output.

2. The constant voltage digital adjustable load circuit for ultrasonic power supply according to claim 1, characterized in that: The control signal processing circuit includes a diode D11, a diode D13, a transistor Q1, a transistor Q2, a transistor Q3, a transistor Q5, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C7, a capacitor C42, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R19, a resistor R20, a resistor R21, a resistor R23, a resistor R24, a connector J4, a connector J5, a connector J6, a connector J7 and a potentiometer RV2; one end of the connector 6 and the connector 7 are both connected to the signal input end, the other end of the connector is connected to the base of the transistor Q5, the other end of the connector 7 is connected to the collector of the transistor Q5 through the diode D13, the base of the transistor Q3 is The base of the transistor Q1 is connected to the collector of the transistor Q5, the emitters of the transistor Q3 and the transistor Q5 are commonly grounded, the collector of the transistor Q3 is connected to one end of the connector 5, a potentiometer RV2 is further provided between the collector and emitter of the transistor Q3, pin 2 of the potentiometer RV2 is connected to one end of the connector 4, the other ends of the connector 4 and the connector 5 are connected to the base of the transistor Q1 through resistors R4, R21 and R23 in sequence, the emitter of the transistor Q1 is connected to the base of the transistor Q2, the base and collector of the transistor Q2 are further connected to a 12V positive voltage through resistors R5 and R6, respectively, and the emitter of the transistor Q2 serves as an output end, outputting a 0-5V analog signal to the subtraction circuit.

3. The constant voltage digital adjustable load circuit for ultrasonic power supply according to claim 1, characterized in that: The control voltage circuit includes an operational amplifier U1A, a resistor R7, a resistor R8, a resistor R10, a resistor R36, a resistor R71, a resistor R79, a resistor R83, a voltage regulator Z1, a voltage regulator Z2, a diode D14, a capacitor C6, a capacitor C45, a capacitor C49, and a first MOS tube voltage regulation circuit, a second MOS tube voltage regulation circuit, a third MOS tube voltage regulation circuit, and a fourth MOS tube voltage regulation circuit connected in parallel. One end of the resistor R7 is connected to the signal input end, and the other end is connected to one end of the resistor R8. The other end of the resistor R8 is connected to the inverting input end of the operational amplifier U1A. The output end of the operational amplifier U1A is connected to the first MOS tube voltage regulation circuit. A capacitor C45 and a resistor R10 are further connected in series between the output end and the inverting input end of the operational amplifier U1A. The negative electrode of the voltage regulator Z2 and the negative electrode of the resistor R79 are connected in series. One end of the resistor R83 is connected to the positive electrode voltage of the MOS transistor V1 and the other end of the resistor R79 is connected to the positive electrode of the diode D14. The cathode of the diode D14 is connected to the positive input of the operational amplifier U1A. The positive electrode of the voltage regulator Z2, the other end of the resistor R79 and the other end of the capacitor C49 are all connected to the positive electrode of the voltage regulator Z1, and the negative electrode of the voltage regulator Z1 is connected to the common connection point of the resistor R7 and the resistor R8; one end of the resistor R71 is connected to the drain of the MOS transistor V1 and connected to the ultrasonic circuit, and the other end is connected to the non-inverting input of the operational amplifier U1A; one end of the resistor R83 is connected to the positive electrode voltage of 5V, and the other end is connected to the anode of the diode D14. The cathode of the diode D14 is connected to the non-inverting input of the operational amplifier U1A; one end of the resistor R36 and the capacitor C6 are both connected to one end of the resistor R71, and the other end of the resistor R36 and the capacitor C6 are grounded together.

4. The constant voltage digital adjustable load circuit for ultrasonic power supply according to claim 3, characterized in that: The first MOS transistor voltage regulating circuit includes a MOS transistor V1, a transistor Q10, a resistor R11, a resistor R15, a resistor R35, and a resistor RS4. The output end of the operational amplifier U1A is connected to the gate of the MOS transistor V1 through the resistor R11. The gate of the MOS transistor V1 is also connected to the collector of the transistor Q10 and one end of the resistor R15. The emitter of the transistor Q10 and the other end of the resistor R15 are commonly grounded. The two ends of the resistor R35 are respectively connected to the source of the MOS transistor V1 and the base of the transistor Q10. The source of the MOS transistor V1 is also grounded through the resistor RS4.

5. The constant voltage digital adjustable load circuit for ultrasonic power supply according to claim 1, characterized in that: The subtraction circuit includes an operational amplifier U1A, a transistor Q7, a transistor Q9, a transistor Q11, a resistor R72, a resistor R73, a resistor R74, a resistor R75, a resistor R76, a resistor R77, a resistor R30 and a capacitor C8; one end of the resistor R72 and the resistor R73 are both connected to the inverting input terminal of the operational amplifier U1A, the other end of the resistor R72 is connected to the analog signal input terminal, the other end of the resistor R73 is connected to the analog signal output terminal, one end of the resistor R74 and the resistor R75 are both connected to the non-inverting input terminal of the operational amplifier U1A, the other end of the resistor R74 is connected to a 5V positive voltage, and the other end of the resistor R75 is grounded. The output end of the operational amplifier U1A is connected to the base of the transistor Q7, the collector of the transistor Q7 is connected to the 12V positive voltage through the resistor R31, the emitter is connected to the output end of the analog signal, and is grounded through the capacitor C8; the output end of the operational amplifier U1A is also grounded through the resistor R77; the bases of the transistor Q9 and the transistor Q11 are connected to each other, the collector of the transistor Q9 is connected to the emitter of the transistor Q7, the collector of the transistor Q11 is connected to the 5V positive voltage through the resistor R76, the emitters of the transistor Q9 and the transistor Q11 are grounded in common, and the base and collector of the transistor Q11 are short-circuited.

6. The constant voltage digital adjustable load circuit for ultrasonic power supply according to claim 1, characterized in that: The rectifier circuit includes a fuse F1, a capacitor C14, an inductor LF1 and a rectifier bridge D3. Pin 1 and pin 3 of the inductor LF1 are respectively connected to pin 1 and pin 2 of the transformer. A fuse F1 is provided between pin 1 of the inductor LF1 and pin 2 of the transformer. The two ends of the capacitor C14 are respectively connected to pin 1 and pin 2 of the varactor. Pin 2 of the transformer is connected to the live wire ACL, and pin 1 is connected to the neutral wire ACN. Pin 1 of the rectifier bridge D3 is connected to pin 2 of the inductor LF1. Pin 2 of the rectifier bridge D3 outputs a positive voltage of 141V. Pins 3 and 4 are both grounded to pin 4 of the inductor LF1.

7. The constant voltage digital adjustable load circuit for ultrasonic power supply according to claim 1, characterized in that: The ultrasonic circuit includes a current transformer T1, a current transformer T3, an inductor L1, an operational amplifier U8, a MOS transistor V8, a MOS transistor V9, a diode D8, a diode D9, a capacitor C23, a capacitor C24, a capacitor C27, a capacitor C28, a capacitor C29, a capacitor C30, a capacitor C31, a resistor R33, a resistor R34, a resistor R47, a resistor R48, a resistor R50, a resistor R51, a resistor R60, a resistor R61 and an ultrasonic transducer P2; the drain of the MOS transistor V9 is connected to a 141V positive voltage, and the source is connected to the The drain of the MOS tube V8 is connected, the two ends of the resistor R33 are respectively connected to the gate and source of the MOS tube V9, and the two ends of the resistor R34 are respectively connected to the gate and source of the MOS tube V8; the pin 1 of the current transformer T1 is connected to the drain of the MOS tube V9 and the source of the MOS tube V8, the pin 2 is connected to the source of the MOS tube V9 and the drain of the MOS tube V8, the pin 3 is connected to one end of the inductor L1, the pin 4 is connected to the pin 1 of the current transformer T3, and the other end of the inductor L1 is connected to the One end of the ultrasonic transducer P2 is connected, and the other end of the ultrasonic transducer P2 is connected to pin 2 of the current transformer T3. The capacitor C23 and the capacitor C24 are connected in parallel with the ultrasonic transducer P2; the pin 4 of the current transformer T3 is connected to the non-inverting input terminal of the operational amplifier U8 through the resistor R60, and the pin 3 of the current transformer T3 is connected to the inverting input terminal of the operational amplifier U8 through the resistor R47; one end of the capacitor C28, one end of the capacitor C27, one end of the resistor R48, and one end of the resistor R61 , the cathode of the diode D9 and the anode of the diode D8 are all connected to the non-inverting input terminal of the operational amplifier U8, the other end of the capacitor C28, one end of the capacitor C29, one end of the capacitor C31, one end of the resistor R48, one end of the resistor R49, one end of the resistor R50, the anode of the diode D9 and the cathode of the diode D8 are all connected to the inverting input terminal of the operational amplifier U8, the other ends of the resistor R50, the resistor R61, the capacitor C27 and the capacitor C31 are all grounded, and the other ends of the capacitor C29 and the resistor R49 are connected to the 12V positive voltage.

8. The constant voltage digital adjustable load circuit for ultrasonic power supply according to claim 7, characterized in that: The ultrasonic circuit also includes a capacitor C18, a capacitor C19, a resistor R28, and a resistor R29. One end of the capacitor C18, the capacitor C19, the resistor R28, and the resistor R29 is connected to pin 1 of the current transformer T1, the other end of the capacitor C18 and the resistor R28 is connected to the source of the MOS transistor V8, and the other end of the capacitor C19 and the resistor R29 is connected to the drain of the MOS transistor V9.

9. The constant voltage digital adjustable load circuit for ultrasonic power supply according to claim 7, characterized in that: The control signal processing circuit selects analog control signal input or PWM digital signal input through a jumper, and the PWM digital signal can be selected to be high level effective or low level effective.

10. A method for operating a constant voltage digital adjustable load circuit for an ultrasonic power supply, characterized in that: The following steps are involved: Step 1: The ultrasonic power supply outputs a 100V AC voltage through the transformer, and then the rectifier circuit rectifies the 100V AC voltage into a maximum DC voltage of 141V, and outputs the DC voltage to the voltage control circuit; Step 2: The control signal is input to the control signal processing circuit. The control signal processing circuit selects analog control signal input or PWM digital signal input through a jumper. The PWM digital signal can be selected as high-level active or low-level active. The control signal processing circuit converts the input control signal into a DC 0-5V linear adjustable analog signal. Step 3: Use a subtraction circuit to invert the DC 0-5V linear adjustable analog signal converted in step 2 into a DC 5-0V analog signal; Step 4: The voltage control circuit receives the DC 5-0V analog signal converted by the subtraction circuit in Step 3, compares it with the ultrasonic primary voltage sampling signal through the operational amplifier U1A, and amplifies the output. When the voltage value of the ultrasonic primary voltage sampling signal is lower than the voltage value of the input analog signal, the output of the operational amplifier U1A decreases, and the gate voltages of the MOS transistors V1, MOS transistors V2, MOS transistors V3, and MOS transistors V4 decrease. Since the MOS transistors V1, MOS transistors V2, MOS transistors V3, and MOS transistors V4 work in parallel in the amplification region of the operational amplifier U1A, the drain voltages of the MOS transistors V1, MOS transistors V2, MOS transistors V3, and MOS transistors V4 increase, and the voltage of the ultrasonic primary voltage sampling signal input to the non-inverting input terminal of the operational amplifier U1A also increases proportionally. When it increases to the same voltage value as the analog signal, the output of the operational amplifier U1A stabilizes at a constant voltage value, thereby controlling the primary voltage of the ultrasonic circuit to a linearly adjustable constant voltage of 0-100V.

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