Display panel and display equipment
By setting the data line different layer to the second metal layer in the OLED display panel, the problem of bad dots and lines due to the increase in the number of sub-pixels is solved, and a larger spacing and higher display yield are achieved, while saving process.
Patent Information
- Application Number
- CN202510638017.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-16
- Publication Date
- 2025-08-29
AI Technical Summary
In the medium-sized OLED display panel, the increase in pixel circuit and signal traces due to the increase in the number of sub-pixels, resulting in limited wiring space in the display area, and poor dots and lines occur, especially the distance between the data line and the fan-out trace is too small, which increases the risk of poor dots and lines.
Some of the data lines are transferred to the second metal layer, and arranged in the opposite layer from the fan-out traces and other traces in the first metal layer. By utilizing the residual space of the second metal layer, the spacing between the data lines and the fan-out traces is increased, and the layout of the positive power supply voltage lines is adjusted if necessary, to reduce the risk of poor dots and lines.
By setting data lines and fan-out lines on the other layer, the spacing is increased, the incidence of dotted lines is reduced, and the mask process is saved, which improves the display effect and yield.
Smart Images

Figure CN120569044A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art
[0002] In existing medium-sized OLED display panels, the increase in the number of sub-pixels has led to a significant increase in pixel circuits and related signal wiring, making the wiring space in the display area quite limited, resulting in poor dot-line performance.
[0003] Based on the design of placing some fan-out lines in the display area (Fanout In AA, FIAA), some fan-out lines are set on the same layer as all data lines, so that the spacing between the data lines in the display area and their adjacent lines is very small, resulting in a high incidence of dot line defects. Summary of the Invention
[0004] Embodiments of the present application provide a display panel and a display device, which can increase the spacing between at least one of a first data line and a fan-out line and its adjacent line, thereby reducing the risk of defective dots and lines.
[0005] An embodiment of the present application provides a display panel, including a display area, wherein the display panel includes:
[0006] a first metal layer comprising a plurality of first data lines and a plurality of fan-out lines, portions of the plurality of fan-out lines and the plurality of first data lines being arranged in the display area, and the first data lines and the fan-out lines being arranged at intervals along a first direction;
[0007] The second metal layer is arranged in a different layer from the first metal layer. The second metal layer includes multiple second data lines and multiple routing lines. The multiple second data lines and multiple routing lines are arranged in the display area. The second data lines and the routing lines are arranged at intervals along the first direction.
[0008] Optionally, in some embodiments of the present application, in the display area of the display panel from a top-down perspective, in the first direction, the minimum distance from at least one of the first data line and the fan-out line to the second data line adjacent thereto is a first distance, and the minimum distance from the first data line to the fan-out line adjacent thereto is a second distance, and the first distance is smaller than the second distance.
[0009] Optionally, in some embodiments of the present application, the first metal layer also includes a first positive power supply voltage line. In the display area of the display panel from a top-down perspective, in the first direction, the minimum distance from the first positive power supply voltage line to the fan-out line adjacent to it is a third distance, and the first distance is less than the third distance.
[0010] Optionally, in some embodiments of the present application, the second distance and the third distance are both greater than 3.5 microns.
[0011] Optionally, in some embodiments of the present application, the first positive power supply voltage line includes a first portion, a second portion, and a third portion sequentially connected along a second direction, the second direction intersecting the first direction, and both sides of the first portion extending along the second direction; in the first direction, the width of the second portion is greater than the width of the first portion, and both sides of the second portion protrude from the first portion;
[0012] In the first direction, a distance from the first portion to the adjacent fan-out trace is equal to a distance from the second portion to the adjacent fan-out trace.
[0013] Optionally, in some embodiments of the present application,
[0014] The plurality of fan-out lines include a first fan-out line, wherein in a display area of the display panel viewed from above, in the first direction, the first fan-out line is arranged on one side of the first positive power supply voltage line, and the second data line is arranged on a side of the first fan-out line away from the first positive power supply voltage line;
[0015] There are multiple third distances, and the minimum distance from the first fan-out line to the second portion is one of the multiple third distances. The minimum distance from the first fan-out line to the second portion is greater than or equal to 4 microns.
[0016] Optionally, in some embodiments of the present application, in the first direction, a minimum distance from the second data line to the first fan-out line is one of multiple first distances, and a minimum distance from the second data line to the first fan-out line is less than 3 microns.
[0017] Optionally, in some embodiments of the present application, the plurality of fan-out lines further include a second fan-out line, and in the display area of the display panel viewed from above, in the first direction, the second fan-out line is arranged on the other side of the first positive power supply voltage line, and another second data line is arranged on a side of the second fan-out line away from the first positive power supply voltage line;
[0018] The minimum distance from the second fan-out trace to the second portion is another one of the plurality of third distances, and the minimum distance from the second fan-out trace to the second portion is greater than or equal to 4 micrometers.
[0019] Optionally, in some embodiments of the present application, in the first direction, the minimum distance from another second data line to the second fan-out routing is one of multiple first distances, and the minimum distance from another second data line to the second fan-out routing is less than 3 microns.
[0020] Optionally, in some embodiments of the present application, in a display area of the display panel in a top-down perspective, in the first direction, the first data line is arranged on a side of the second fan-out line away from the first positive power supply voltage line, and another second data line is arranged between the first data line and the second fan-out line;
[0021] In the first direction, the minimum distance from the first data line to the second fan-out line is one of the plurality of second distances, and the minimum distance from the first data line to the second fan-out line is greater than the third distance.
[0022] Optionally, in some embodiments of the present application, the first data line is configured to provide a data voltage to a pixel circuit driving a first light-emitting device, the second fan-out line and another second data line are respectively configured to provide a data voltage to a pixel circuit driving a second light-emitting device, and the first light-emitting device and the second light-emitting device are configured to emit light of different colors;
[0023] The minimum distance from one side of another second data line to the second fan-out line is one of the first distances, and the minimum distance from the other side of another second data line to the first data line is another of the first distances.
[0024] A minimum distance from one side of another second data line to the second fan-out line is smaller than a minimum distance from the other side of another second data line to the first data line.
[0025] Optionally, in some embodiments of the present application, the plurality of fan-out lines further include a third fan-out line, and in the display area of the display panel in a top view, in the first direction, the third fan-out line is arranged on a side of the first data line away from the second fan-out line;
[0026] The minimum distance from the first data line to the third fan-out line is another one of the plurality of second distances, and the minimum distance from the first data line to the third fan-out line is greater than the third distance.
[0027] Optionally, in some embodiments of the present application, the second fan-out line is configured to provide a data voltage to a pixel circuit driving a second light-emitting device, the third fan-out line and the first data line are respectively configured to provide a data voltage to a pixel circuit driving a first light-emitting device, and the first light-emitting device and the second light-emitting device are configured to emit light of different colors;
[0028] A minimum distance from the first data line to the second fan-out line is greater than a minimum distance from the first data line to the third fan-out line.
[0029] Optionally, in some embodiments of the present application, the first data line is configured to provide a data voltage to a pixel circuit driving a first light-emitting device, some of the plurality of second data lines are configured to provide a data voltage to a pixel circuit driving a second light-emitting device, and another part of the plurality of second data lines is configured to provide a data voltage to a pixel circuit driving a third light-emitting device, and any two of the first light-emitting device, the second light-emitting device and the third light-emitting device are configured to emit light of different colors.
[0030] Optionally, in some embodiments of the present application, one of the first data line and the second data line is configured to simultaneously provide a data voltage to a pixel circuit that drives a first light-emitting device and a third light-emitting device, and the other of the first data line and the second data line is configured to provide a data voltage to a pixel circuit that drives a second light-emitting device, the first light-emitting device is configured to emit blue light, the second light-emitting device is configured to emit green light, and the third light-emitting device is configured to emit red light.
[0031] Correspondingly, an embodiment of the present application further provides a display device, which includes the display panel as described in any one of the above embodiments.
[0032] The display panel of the embodiment of the present application includes a first metal layer and a second metal layer arranged in different layers, the first metal layer includes multiple first data lines and multiple fan-out routings, parts of the multiple fan-out routings and the multiple first data lines are arranged in the display area, the second metal layer includes multiple second data lines and multiple routings, and the multiple second data lines and the multiple routings are arranged in the display area.
[0033] It can be understood that, compared to setting all the data lines and fan-out lines arranged in the display area in one metal layer, the display panel of the embodiment of the present application transfers the second data line to the second metal layer, so that the spacing between at least one of the first data line and the fan-out line and the adjacent line can be set larger to reduce the risk of poor dot line; secondly, the second data line is transferred to the second metal layer, and the surplus space outside the second metal layer where other lines are arranged is used to set the second data line, so there is no need to set an additional metal layer, which can save a mask process. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] Figure 1 is a schematic diagram of a top view of the display panel provided in an embodiment of the present application;
[0035] Figure 2 is a schematic diagram of a partial structure of a display panel provided in an embodiment of the present application;
[0036] Figure 3 yes Figure 2 Schematic diagram of the structure of the first metal layer;
[0037] Figure 4 yes Figure 2 Schematic diagram of the structure of the second metal layer;
[0038] Figure 5 It is a structural schematic diagram of the display device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0039] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application. In addition, it should be understood that the specific embodiments described here are only used to illustrate and explain the present application and are not used to limit the present application. In this application, the various embodiments can be combined with each other but will not be repeated one by one. In addition, unless otherwise specified, the directional words used, such as "upper" and "lower", generally refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the drawings; while "inner" and "outer" refer to the outline of the device; the terms "first", "second", "third", etc. are used only as labels and do not impose numerical requirements or establish an order.
[0040] The embodiments of the present application provide a display panel and a display device, which are described in detail below. It should be noted that the order of description of the following embodiments does not limit the preferred order of the embodiments.
[0041] Please refer to Figure 1 The present invention provides a display panel 100 including a display area AA and a fan-out area DF. The fan-out area DF is located on one side of the display area AA. The display area AA may include pixels that display an image. The fan-out area DF may include fan-out traces 112.
[0042] A plurality of light-emitting devices and a plurality of pixel circuits are provided in the display area AA. One pixel circuit is correspondingly connected to one light-emitting device, and one pixel circuit is correspondingly connected to one data line d1.
[0043] Optionally, in some embodiments of the present application, the light-emitting device may include an anode, a light-emitting layer and a cathode.
[0044] The plurality of light emitting devices include a first light emitting device configured to emit a first color light, a second light emitting device configured to emit a second color light, and a third light emitting device configured to emit a third color light. The first color light, the second color light, and the third color light are different in color.
[0045] Optionally, in some embodiments of the present application, the first color light is blue light, the second color light is green light, and the third color light is red light. However, the present invention is not limited thereto. For example, the first color light is green light, the second color light is red light, and the third color light is blue light, etc.
[0046] Optionally, in some embodiments, a plurality of first light-emitting devices are arranged along the second direction F2 as a first sub-pixel column, with each first sub-pixel column correspondingly connected to a data line d1. A plurality of second light-emitting devices are arranged along the second direction F2 as a second sub-pixel column, with each second sub-pixel column correspondingly connected to a data line d1. A plurality of third light-emitting devices are arranged along the second direction F2 as a third sub-pixel column, with each third sub-pixel column correspondingly connected to a data line d1. In the first direction F1, a first sub-pixel column, a second sub-pixel column, and a third sub-pixel column form a first repeating unit, and a plurality of first repeating units are arranged along the first direction F1.
[0047] Alternatively, in some other embodiments, the first light-emitting devices and the third light-emitting devices are arranged alternately along the second direction F2 to form a first sub-pixel column, with each first sub-pixel column correspondingly connected to a data line d1. A plurality of second light-emitting devices are arranged along the second direction F2 to form a second sub-pixel column, with each second sub-pixel column correspondingly connected to a data line d1. The third light-emitting devices and the first light-emitting devices are arranged alternately along the second direction F2 to form a third sub-pixel column, with each third sub-pixel column correspondingly connected to a data line d1. In the first direction F1, a first sub-pixel column, a second sub-pixel column, a third sub-pixel column, and another second sub-pixel column form a second repeating unit, with multiple second repeating units arranged along the first direction F1.
[0048] In the fan-out region DF, a fan-out trace 112 is correspondingly connected to a data line d1 .
[0049] Please refer to Figures 2 to 4 In some embodiments of the present application, the display panel 100 includes a first metal layer 11 and a second metal layer 12 . The plurality of data lines d1 include a first data line 111 formed in the first metal layer 11 and a second data line 121 formed in the second metal layer 12 .
[0050] Optionally, the first metal layer 11 includes a plurality of first data lines 111 and a plurality of fan-out traces 112. Parts of the plurality of fan-out traces 112 and the plurality of first data lines 111 are disposed in the display area AA, and the first data lines 111 and the fan-out traces 112 are alternately arranged along the first direction F1.
[0051] The second metal layer 12 is disposed in a different layer from the first metal layer 11. The second metal layer 12 includes a plurality of second data lines 121 and a plurality of traces 122. The plurality of second data lines 121 and the plurality of traces 122 are disposed in the display area AA and are alternately arranged along the first direction F1.
[0052] Optionally, the first direction F1 may be parallel to the extending direction of the scan line. The first direction F1 and the second direction F2 are intersecting, for example, the first direction F1 is perpendicular to the second direction F2.
[0053] It can be understood that compared to forming all data lines and fan-out lines arranged in the display area in one metal layer, the minimum spacing between any two adjacent lines in the display area (such as between the data line and the fan-out line, and between the fan-out line and the positive power supply voltage line) is only 3.5 microns, resulting in a higher incidence of point line defects.
[0054] The display panel 100 of the embodiment of the present application transfers the second data line 121 to the second metal layer 12, so that the spacing between at least one of the first data line 111 and the fan-out line 112 and the adjacent line can be set to be larger, so as to reduce the risk of poor dot line. Secondly, the second data line 121 is transferred to the second metal layer 12, and the second data line 121 is set by utilizing the surplus space in the second metal layer 12 other than that of other lines. Therefore, there is no need to set an additional metal layer, which can save a mask process.
[0055] It should be noted that the display panel 100 also includes a positive power supply voltage line (VDD) and an initial voltage signal line 12b. The positive power supply voltage line also includes a first positive power supply voltage line 113 and a first positive power supply voltage line 113 connected in parallel with the second positive power supply voltage line 12a. The positive power supply voltage line is configured to provide a high-level voltage signal to the pixel circuit. The initial voltage signal line 12b is configured to provide a low-level voltage signal to the pixel circuit. The second positive power supply voltage line 12a and the initial voltage signal line 12b are both traces 122 in the second metal layer 12.
[0056] Optionally, in some embodiments of the present application, the first data line 111 is configured to provide a data voltage to a pixel circuit driving a first light-emitting device. Some of the plurality of second data lines 121 are configured to provide a data voltage to a pixel circuit driving a second light-emitting device. Another portion of the plurality of second data lines 121 is configured to provide a data voltage to a pixel circuit driving a third light-emitting device. Any two of the first light-emitting device, the second light-emitting device, and the third light-emitting device are configured to emit light of different colors.
[0057] Optionally, in other embodiments of the present application, based on the SPR sub-pixel arrangement structure, one of the first data line 111 and the second data line 121 is configured to simultaneously provide a data voltage to the pixel circuit driving the first light-emitting device and the third light-emitting device. The other of the first data line 111 and the second data line 121 is configured to provide a data voltage to the pixel circuit driving the second light-emitting device. Any two of the first light-emitting device, the second light-emitting device, and the third light-emitting device are configured to emit light of different colors. The first light-emitting device emits blue light, the second light-emitting device emits green light, and the third light-emitting device emits red light.
[0058] That is, the first light-emitting device and the third light-emitting device use the same first data line 111 or second data line 121, so that all the second data lines 121 are in one metal layer and all the first data lines 111 are in another metal layer, thereby making the load of the data line that provides data signals to the light-emitting devices emitting light of the same color tend to be consistent.
[0059] For example, Figure 2 For example, the first light emitting device and the third light emitting device use the same first data line 111 , so that all the first data lines 111 are in the first metal layer 11 , and all the second data lines 121 are in the second metal layer 12 .
[0060] Optionally, in some embodiments of the present application, in the display area AA of the display panel 100 in a top-down perspective, in the first direction F1, the minimum distance between at least one of the first data line 111 and the fan-out trace 112 and the adjacent second data line 121 is a first distance L1, and the minimum distance between the first data line 111 and the adjacent fan-out trace 112 is a second distance L2. The first distance L1 is smaller than the second distance L2.
[0061] It is understood that the transfer of the second data line 121 to the second metal layer 12 creates more space in the first metal layer 11, thereby increasing the second distance L2 between the first data line 111 and the adjacent fan-out trace 112, thereby reducing the risk of poor dot-line performance. Furthermore, because the first and second metal layers 11 and 12 are arranged in different layers, the first distance L1 between the second data line 121 and the adjacent traces of the first metal layer 11 (e.g., the first data line 111 and the fan-out trace 112) can be reduced, thus meeting display requirements.
[0062] Secondly, the second data line 121 has a first distance L1 to the routing of the adjacent first metal layer 11 (such as the first data line 111 and the fan-out routing 112), that is, the second data line 121 is not overlapped with the first data line 111 and the fan-out routing 112, respectively, thereby reducing the risk of mutual interference and improving the display effect.
[0063] Optionally, in some embodiments of the present application, the first metal layer 11 further includes a first positive power supply voltage line 113. In the display area AA of the display panel 100 viewed from above, in the first direction F1, the minimum distance between the first positive power supply voltage line 113 and the adjacent fan-out trace 112 is a third distance L3.
[0064] The first distance L1 is smaller than the third distance L3.
[0065] It can be understood that based on the transfer of the second data line 121 to the second metal layer 12, the first metal layer 11 has a larger space, and thus the third distance L3 from the first positive power supply voltage line 113 to the adjacent fan-out line 112 can be increased to reduce the risk of poor dot line.
[0066] Optionally, in some embodiments of the present application, the second distance L2 and the third distance L3 are both greater than 3.5 microns.
[0067] It should be noted that compared with the design in the related art in which the minimum distance between the data line and its adjacent wiring is 3.5 microns, the display panel 100 of the embodiment of the present application transfers the second data line 121 to the second metal layer 12, so that the second distance L2 and the third distance L3 are both greater than 3.5 microns, thereby increasing the distance between the first data line 111 and the fan-out wiring 112 and the adjacent wirings, thereby reducing the risk of defective dots and lines.
[0068] Optionally, the second distance L2 and the third distance L3 can each be 3.6 microns, 3.7 microns, 3.8 microns, 3.9 microns, 4.0 microns, 4.1 microns, 4.2 microns, 4.3 microns, 4.4 microns, 4.5 microns, 4.6 microns, 4.7 microns, 4.8 microns, 4.9 microns, 5.0 microns, 5.1 microns, 5.2 microns, 5.3 microns, 5.4 microns, 5.5 microns, 5.6 microns, 5.7 microns, 5.8 microns, 5.9 microns, 6.0 microns, 6.1 microns, 6.2 microns, 6.3 microns, 6.4 microns, 6.5 microns, 6.6 microns, 6.7 microns, 6.8 microns, 6.9 microns or 7.0 microns.
[0069] Optionally, the second distance L2 and the third distance L3 are both greater than or equal to 4.5 micrometers, so as to fully utilize the space of the first metal layer 11 and further reduce the risk of defective dots and lines.
[0070] Optional, please refer to Figure 2 and Figure 4 In some embodiments of the present application, in the second metal layer 12 , the minimum distance between the second data line 121 and the adjacent trace 122 is a fourth distance L4 , and the fourth distance L4 is greater than the first distance L1 .
[0071] It is understandable that by utilizing the spare space of the second metal layer 12 to set the second data line 121 and setting the fourth distance L4 greater than the first distance L1 , the risk of defective dots and lines can be reduced.
[0072] Furthermore, the fourth distance L4 is greater than 3.5 micrometers to fully utilize the surplus space of the second metal layer 12 and reduce the risk of defective dots and lines.
[0073] Optionally, the fourth distance L4 can be 3.6 microns, 3.7 microns, 3.8 microns, 3.9 microns, 4.0 microns, 4.1 microns, 4.2 microns, 4.3 microns, 4.4 microns, 4.5 microns, 4.6 microns, 4.7 microns, 4.8 microns, 4.9 microns, 5.0 microns, 5.1 microns, 5.2 microns, 5.3 microns, 5.4 microns, 5.5 microns, 5.6 microns, 5.7 microns, 5.8 microns, 5.9 microns, 6.0 microns, 6.1 microns, 6.2 microns, 6.3 microns, 6.4 microns, 6.5 microns, 6.6 microns, 6.7 microns, 6.8 microns, 6.9 microns or 7.0 microns.
[0074] Optionally, the fourth distance L4 is greater than or equal to 4.5 micrometers, so as to fully utilize the space of the first metal layer 11 and further reduce the risk of defective dots and lines.
[0075] Optionally, in the second metal layer 12, a second positive power supply voltage line 12a is arranged between two adjacent second data lines 121; since the second positive power supply voltage line 12a is connected to a constant voltage, the risk of the two adjacent second data lines 121 being affected by interference signals can be reduced, and the risk of mutual interference between the two adjacent second data lines 121 can be reduced.
[0076] It should be noted that, in the Figure 2 In the display panel 100 of the embodiment of the present application, when the minimum distance between any two adjacent traces in the first metal layer 11 is 4.5 microns and the minimum distance between any two adjacent traces in the second metal layer 12 is also 4.5 microns, the dot line yield can be improved by approximately 4%.
[0077] It should be noted that, in the embodiments of the present application, the minimum distances between different traces can be different or the same. Figure 2 , a first distance L1 from the second data line 121 to the adjacent first data line 111 is different from a first distance L1 from the second data line 121 to the adjacent fan-out line 112; a third distance L3 from the first positive power supply voltage line 113 to the fan-out line 112 on the left is equal to a third distance L3 from the first positive power supply voltage line 113 to the fan-out line 112 on the right.
[0078] Optionally, in some embodiments of the present application, the first positive power supply voltage line 113 includes a first portion 11a, a second portion 11b, and a third portion 11c sequentially connected along a second direction F2. The second portion 11b defines an opening k1. The second direction F2 intersects the first direction F1. Both sides of the first portion 11a extend along the second direction F2.
[0079] In the first direction F1, the width v3 of the second portion 11b is greater than the width v1 of the first portion 11a, and both sides of the second portion 11b protrude from the first portion 11a. It should be noted that the width v1 of the first portion 11a is the maximum width of the first portion 11a, and the width v3 of the second portion 11b is the maximum width of the second portion 11b.
[0080] Please refer to Figure 3 In the first direction F1, the distance from the first portion 11a to the adjacent fan-out trace 112 is equal to the distance from the second portion 11b to the adjacent fan-out trace 112. That is, the distance from the side edge of the first portion 11a to the adjacent fan-out trace 112 is equal to the distance from the second portion 11b to the adjacent fan-out trace 112.
[0081] In the first direction F1 , a width v1 of the first portion 11 a is greater than a width v2 of the opening k1 .
[0082] It should be noted that the width v2 of the opening k1 is the maximum width of the opening k1 in the first direction F1. The transfer of the second data line 121 to the second metal layer 12 creates space to complete the first portion 11a. This not only makes the two sides of the first portion 11a straight, but also ensures that the distance from the side of the first portion 11a to the adjacent fan-out trace 112 is equal to the distance from the second portion 11b to the adjacent fan-out trace 112, thereby increasing the area of the first positive power supply voltage line 113 and reducing the impedance of the positive power supply voltage line. Furthermore, the spacing between the two fan-out traces 112 located on either side of the first portion 11a is increased and equalized. Furthermore, since the first positive power supply voltage line 113 is connected to a constant voltage, it can shield interference signals, thereby reducing the risk of mutual interference between the electrical signals of the two fan-out traces 112.
[0083] Optionally, in some embodiments of the present application,
[0084] The plurality of fan-out traces 112 include a first fan-out trace 112a. In a top view of the display area AA of the display panel 100, the first fan-out trace 112a is disposed on one side of the first positive power supply voltage line 113 in a first direction F1, and a second data line 121 is disposed on a side of the first fan-out trace 112a away from the first positive power supply voltage line 113.
[0085] There are multiple third distances L3, and the minimum distance from the first fan-out trace 112a to the second portion 11b is one of the multiple third distances L3. The minimum distance from the first fan-out trace 112a to the second portion 11b is greater than or equal to 4 microns.
[0086] It can be understood that since the second portion 11b protrudes from the first portion 11a in the first direction F1, the distance from the second portion 11b to the first fan-out trace 112a is the minimum distance from the first positive power voltage line 113 to the first fan-out trace 112a.
[0087] Furthermore, since the second data line 121 is transferred to the second metal layer 12, freeing up space, the portion of the first fan-out trace 112a close to the second portion 11b can be moved outward to increase the distance between the two, so that the minimum distance from the first fan-out trace 112a to the second portion 11b can be greater than or equal to 4 microns, thereby reducing the risk of poor dot line performance.
[0088] Optionally, the minimum distance from the first fan-out trace 112 a to the second portion 11 b may be 4 micrometers, 4.1 micrometers, 4.2 micrometers, 4.3 micrometers, 4.4 micrometers, 4.5 micrometers, 4.6 micrometers, or 4.7 micrometers.
[0089] Optionally, in some embodiments of the present application, in the first direction F1, the minimum distance from a second data line 121 to the first fan-out line 112a is one of a plurality of first distances L1. The minimum distance from a second data line 121 to the first fan-out line 112a is less than 3 microns.
[0090] It is understood that since the second data line 121 is transferred to the second metal layer 12, the second data line 121 and the first fan-out trace 112a of a different film layer are separated by an insulating layer. As a result, the distance between the second data line 121 and the adjacent first fan-out trace 112a in the first direction F1 can be closer, making the minimum distance from a second data line 121 to the adjacent first fan-out trace 112a less than 3 microns, thereby saving space. Secondly, the minimum distance from a second data line 121 to the first fan-out trace 112a is greater than 0 microns, that is, the second data line 121 and the first fan-out trace 112a do not overlap, reducing the risk of signal interference between the two.
[0091] Secondly, optionally, first fan-out trace 112a is configured to provide a data signal to a pixel circuit driving a third light-emitting device. A second data line 121 adjacent to first fan-out trace 112a is configured to provide a data signal to a pixel circuit driving a third light-emitting device. That is, adjacent first fan-out trace 112a and second data line 121 provide data signals to a third light-emitting device emitting light of the same color. Therefore, a closer distance between adjacent first fan-out trace 112a and second data line 121 has minimal impact on the lighting effect.
[0092] Optionally, the minimum distance between adjacent second data lines 121 and first fan-out traces 112a can be 2.9 microns, 2.8 microns, 2.7 microns, 2.6 microns, 2.5 microns, 2.4 microns, 2.3 microns, 2.2 microns, 2.1 microns, 2.0 microns, 1.9 microns, 1.8 microns, 1.7 microns, 1.6 microns, 1.5 microns, 1.4 microns, 1.3 microns, 1.2 microns, 1.1 microns, 1.0 micron, 0.9 micron, 0.8 micron, 0.7 micron, 0.6 micron or 0.5 micron, etc.
[0093] Optionally, in some embodiments of the present application, the plurality of fan-out traces 112 further include a second fan-out trace 112b. In a top-down view of the display area AA of the display panel 100, in the first direction F1, the second fan-out trace 112b is disposed on the other side of the first positive power supply voltage line 113, and another second data line 121 is disposed on a side of the second fan-out trace 112b away from the first positive power supply voltage line 113.
[0094] The minimum distance from the second fan-out trace 112b to the second portion 11b is another one of the plurality of third distances L3. The minimum distance from the second fan-out trace 112b to the second portion 11b is greater than or equal to 4 micrometers.
[0095] It can be understood that since the second portion 11b protrudes from the first portion 11a in the first direction F1, the distance from the second portion 11b to the second fan-out trace 112b is the minimum distance from the first positive power voltage line 113 to the second fan-out trace 112b.
[0096] Since the second data line 121 is transferred to the second metal layer 12, free space is created, so the portion of the second fan-out trace 112b close to the second portion 11b can be moved outward to increase the distance between the two, so that the minimum distance from the second fan-out trace 112b to the second portion 11b can be greater than or equal to 4 microns, thereby reducing the risk of defective dots and lines.
[0097] Optionally, the minimum distance from the second fan-out trace 112 b to the second portion 11 b may be 4 micrometers, 4.1 micrometers, 4.2 micrometers, 4.3 micrometers, 4.4 micrometers, 4.5 micrometers, 4.6 micrometers, or 4.7 micrometers.
[0098] Optionally, in some embodiments of the present application, in the first direction F1, the minimum distance from another second data line 121 to the second fan-out wiring 112b is one of the plurality of first distances L1. The minimum distance from another second data line 121 to the second fan-out wiring 112b is less than 3 microns.
[0099] It is understood that since the second data line 121 is transferred to the second metal layer 12, the second data line 121 and the second fan-out trace 112b of a different film layer are separated by an insulating layer. Consequently, the distance between the second data line 121 and the adjacent second fan-out trace 112b in the first direction F1 can be closer, making the minimum distance from the second data line 121 to the adjacent second fan-out trace 112b less than 3 microns, thereby saving space. Furthermore, the minimum distance from the second data line 121 to the second fan-out trace 112b is greater than 0 microns, meaning that the second data line 121 and the second fan-out trace 112b do not overlap, reducing the risk of signal interference between the two.
[0100] Second, optionally, second fan-out trace 112b is configured to provide a data signal to a pixel circuit driving a second light-emitting device. A second data line 121 adjacent to second fan-out trace 112b is also configured to provide a data signal to a pixel circuit driving a second light-emitting device. That is, adjacent second fan-out trace 112b and second data line 121 provide data signals to a second light-emitting device emitting light of the same color. Therefore, a closer distance between adjacent second fan-out trace 112b and second data line 121 has minimal impact on the lighting effect.
[0101] Optionally, the minimum distance between adjacent second data lines 121 and second fan-out lines 112b can be 2.9 microns, 2.8 microns, 2.7 microns, 2.6 microns, 2.5 microns, 2.4 microns, 2.3 microns, 2.2 microns, 2.1 microns, 2.0 microns, 1.9 microns, 1.8 microns, 1.7 microns, 1.6 microns, 1.5 microns, 1.4 microns, 1.3 microns, 1.2 microns, 1.1 microns, 1.0 micron, 0.9 micron, 0.8 micron, 0.7 micron, 0.6 micron or 0.5 micron, etc.
[0102] Optionally, in some embodiments of the present application, in the display area AA of the display panel 100 from a top-down perspective, in the first direction F1, the first data line 111 is arranged on the side of the second fan-out line 112b away from the first positive power supply voltage line 113, and another second data line 121 is arranged between the first data line 111 and the second fan-out line 112b.
[0103] In the first direction F1, the minimum distance from the first data line 111 to the second fan-out line 112b is one of the second distances L2. The minimum distance from the first data line 111 to the second fan-out line 112b is greater than the third distance L3.
[0104] It will be appreciated that the third distance L3 is the minimum distance between the fan-out trace 112 and the first positive power supply voltage line 113. Because the first positive power supply voltage line 113 is connected to a constant voltage, there is no risk of voltage jumps interfering with the fan-out trace 112. Therefore, the minimum distance between the fan-out trace 112 and the first positive power supply voltage line 113 is smaller to free up space for other traces. However, the first data line 111 and the second fan-out trace 112b both receive data voltage signals, which pose a risk of mutual voltage jump interference. Therefore, the minimum distance between the first data line 111 and the second fan-out trace 112b is larger to reduce the risk of mutual signal interference, thereby reducing the risk of poor dot-line performance.
[0105] Optionally, in some embodiments of the present application, the first data line 111 is configured to provide a data voltage to a pixel circuit driving a first light-emitting device. The second fan-out trace 112b and another adjacent second data line 121 are each configured to provide a data voltage to a pixel circuit driving a second light-emitting device. The first light-emitting device and the second light-emitting device are configured to emit light of different colors.
[0106] The minimum distance from one side of another second data line 121 to the second fan-out trace 112b is one of the first distances L1. The minimum distance from the other side of another second data line 121 to the first data line 111 is another of the first distances L1.
[0107] The minimum distance from one side of the other second data line 121 to the second fan-out wiring 112 b is smaller than the minimum distance from the other side of the other second data line 121 to the first data line 111 .
[0108] It can be understood that, based on the data voltage provided by the adjacent second fan-out wiring 112b and the other second data line 121 to the second light-emitting device emitting light of the same color, the voltage signal difference between the adjacent second fan-out wiring 112b and the other second data line 121 is small, so the minimum distance between the two is close. Even if crosstalk occurs due to parasitic capacitance coupling, the impact on brightness consistency can be ignored.
[0109] The adjacent second data line 121 and the first data line 111 respectively provide data voltages to the second light-emitting device and the first light-emitting device that emit light of different colors. Therefore, the voltage signals of the adjacent second data line 121 and the first data line 111 are quite different. Therefore, the minimum distance from the second data line 121 to the first data line 111 is set to be larger, which can reduce parasitic capacitance and reduce the risk of color deviation or brightness interference caused by coupling of different color signals.
[0110] For example, when the first data line 111 provides a blue data voltage and the second data line 121 adjacent to the first data line 111 provides a green data voltage, the data voltage provided by the first data line 111 is higher. Therefore, increasing the spacing between the adjacent first data line 111 and the second data line 121 can reduce the coupling interference of the blue light signal jump to the green light signal.
[0111] Optionally, in some embodiments of the present application, the plurality of fan-out traces 112 further include a third fan-out trace 112c. In the display area AA of the display panel 100 viewed from above, in the first direction F1, the third fan-out trace 112c is disposed on a side of the first data line 111 away from the second fan-out trace 112b.
[0112] The minimum distance from the first data line 111 to the third fan-out line 112c is another one of the plurality of second distances L2. The minimum distance from the first data line 111 to the third fan-out line 112c is greater than the third distance L3.
[0113] It will be appreciated that the third distance L3 is the minimum distance between the fan-out trace 112 and the first positive power supply voltage line 113. Because the first positive power supply voltage line 113 is connected to a constant voltage, there is no risk of voltage jumps interfering with the fan-out trace 112. Therefore, the minimum distance between the fan-out trace 112 and the first positive power supply voltage line 113 is smaller to free up space for other traces. However, the first data line 111 and the third fan-out trace 112c both receive data voltage signals, which poses a risk of mutual voltage jump interference. Therefore, the minimum distance between the first data line 111 and the third fan-out trace 112c is larger to reduce the risk of signal interference between the two, thereby reducing the risk of poor dot-line performance.
[0114] Optionally, in some embodiments of the present application, the second fan-out trace 112b is configured to provide a data voltage to a pixel circuit driving a second light-emitting device. The third fan-out trace 112c and the first data line 111 are each configured to provide a data voltage to a pixel circuit driving a first light-emitting device. The first light-emitting device and the second light-emitting device are configured to emit light of different colors.
[0115] The minimum distance from the first data line 111 to the second fan-out wiring 112 b is greater than the minimum distance from the first data line 111 to the third fan-out wiring 112 c .
[0116] It can be understood that, based on the data voltage provided by the adjacent third fan-out wiring 112c and the first data line 111 to the first light-emitting device emitting light of the same color, the voltage signal difference between the adjacent third fan-out wiring 112c and the first data line 111 is small, and therefore the minimum distance between the two is close. Even if crosstalk occurs due to parasitic capacitance coupling, the impact on brightness consistency can be ignored.
[0117] The adjacent second fan-out trace 112b and the first data line 111 respectively provide data voltages to the second light-emitting device and the first light-emitting device that emit light of different colors. Therefore, the voltage signals of the adjacent second fan-out trace 112b and the first data line 111 are quite different. Therefore, the minimum distance from the second fan-out trace 112b to the first data line 111 is set to be larger, which can reduce parasitic capacitance and reduce the risk of color deviation or brightness interference caused by coupling of different color signals.
[0118] For example, when the first data line 111 provides a blue data voltage and the second fan-out line 112b adjacent to the first data line 111 provides a green data voltage, the data voltage provided by the first data line 111 is higher. Therefore, increasing the distance between the adjacent first data line 111 and the second fan-out line 112b can reduce the coupling interference of the blue light signal jump on the green light signal.
[0119] Please refer to Figure 5 Accordingly, an embodiment of the present application further provides a display device 1000 , which includes the display panel 100 as described in any one of the above embodiments.
[0120] It should be noted that the structure of the display panel 100 of the display device 1000 of the embodiment of the present application is similar to or the same as the structure of the display panel 100 of the above embodiments. Figures 1 to 4 , so I will not repeat it here.
[0121] It can be understood that, compared to setting all the data lines and the fan-out lines arranged in the display area in one metal layer, the display device 1000 of the embodiment of the present application transfers the second data line 121 to the second metal layer 12, so that the spacing between the first data line 111 and at least one of the fan-out lines 112 and the adjacent lines can be set larger to reduce the risk of poor dot lines; secondly, the second data line 121 is transferred to the second metal layer 12, and the second data line 121 is set by utilizing the surplus space in the second metal layer 12 outside the arrangement of other lines, so there is no need to set an additional metal layer, which can save a mask process.
[0122] Optionally, the display device 1000 can be a smart phone, a tablet computer, a mobile phone, a video phone, an e-book reader, a desktop computer, a laptop, a netbook, a workstation, a server, a personal digital assistant, a portable media player, an MP3 player, a television, a mobile medical machine, a camera, a game console, a digital camera, a car navigation system, a car display screen, an electronic billboard, an ATM or at least one of a wearable device, a VR device, and an AR device.
[0123] The above is a detailed introduction to a display panel and a display device provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for those skilled in the art, based on the ideas of the present application, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.
Claims
1. A display panel comprising a display area, characterized in that: The display panel includes: a first metal layer comprising a plurality of first data lines and a plurality of fan-out lines, portions of the plurality of fan-out lines and the plurality of first data lines being arranged in the display area, and the first data lines and the fan-out lines being arranged at intervals along a first direction; and The second metal layer is arranged in a different layer from the first metal layer. The second metal layer includes multiple second data lines and multiple routing lines. The multiple second data lines and multiple routing lines are arranged in the display area. The second data lines and the routing lines are arranged at intervals along the first direction.
2. The display panel according to claim 1, wherein: In the display area of the display panel from a top-down perspective, in the first direction, the minimum distance from at least one of the first data line and the fan-out line to the second data line adjacent thereto is a first distance, and the minimum distance from the first data line to the fan-out line adjacent thereto is a second distance, and the first distance is smaller than the second distance.
3. The display panel according to claim 2, wherein: The first metal layer also includes a first positive power supply voltage line. In the display area of the display panel from a top-down perspective, in the first direction, the minimum distance from the first positive power supply voltage line to the fan-out line adjacent to it is a third distance, and the first distance is less than the third distance.
4. The display panel according to claim 3, wherein: The second distance and the third distance are both greater than 3.5 micrometers.
5. The display panel according to claim 3, wherein: The first positive power supply voltage line includes a first portion, a second portion, and a third portion connected in sequence along a second direction, the second direction intersecting the first direction, and both sides of the first portion extending along the second direction; in the first direction, the width of the second portion is greater than the width of the first portion, and both sides of the second portion protrude from the first portion; In the first direction, a distance from the first portion to the adjacent fan-out trace is equal to a distance from the second portion to the adjacent fan-out trace.
6. The display panel according to claim 5, wherein: The plurality of fan-out lines include a first fan-out line, wherein in a display area of the display panel viewed from above, in the first direction, the first fan-out line is arranged on one side of the first positive power supply voltage line, and the second data line is arranged on a side of the first fan-out line away from the first positive power supply voltage line; There are multiple third distances, and the minimum distance from the first fan-out line to the second portion is one of the multiple third distances. The minimum distance from the first fan-out line to the second portion is greater than or equal to 4 microns.
7. The display panel according to claim 6, wherein: In the first direction, a minimum distance from the second data line to the first fan-out line is one of the plurality of first distances, and a minimum distance from the second data line to the first fan-out line is less than 3 micrometers.
8. The display panel according to claim 6, wherein: The plurality of fan-out lines further include a second fan-out line, wherein in the display area of the display panel viewed from above, in the first direction, the second fan-out line is arranged on the other side of the first positive power supply voltage line, and another second data line is arranged on the side of the second fan-out line away from the first positive power supply voltage line; The minimum distance from the second fan-out trace to the second portion is another one of the plurality of third distances, and the minimum distance from the second fan-out trace to the second portion is greater than or equal to 4 micrometers.
9. The display panel according to claim 8, wherein: In the first direction, a minimum distance from another second data line to the second fan-out line is one of the first distances, and a minimum distance from another second data line to the second fan-out line is less than 3 microns.
10. The display panel according to claim 8, wherein In the display area of the display panel in a top-down perspective, in the first direction, the first data line is arranged on a side of the second fan-out line away from the first positive power supply voltage line, and another second data line is arranged between the first data line and the second fan-out line; In the first direction, the minimum distance from the first data line to the second fan-out line is one of the plurality of second distances, and the minimum distance from the first data line to the second fan-out line is greater than the third distance.
11. The display panel according to claim 10, wherein: The first data line is configured to provide a data voltage to a pixel circuit driving a first light-emitting device, and the second fan-out line and another second data line are respectively configured to provide a data voltage to a pixel circuit driving a second light-emitting device, and the first light-emitting device and the second light-emitting device are configured to emit light of different colors; The minimum distance from one side of another second data line to the second fan-out line is one of the first distances, and the minimum distance from the other side of another second data line to the first data line is another of the first distances. A minimum distance from one side of another second data line to the second fan-out line is smaller than a minimum distance from the other side of another second data line to the first data line.
12. The display panel according to claim 10, wherein: The plurality of fan-out lines further include a third fan-out line, and in the display area of the display panel in a top view, the third fan-out line is arranged on a side of the first data line away from the second fan-out line in the first direction; The minimum distance from the first data line to the third fan-out line is another one of the plurality of second distances, and the minimum distance from the first data line to the third fan-out line is greater than the third distance.
13. The display panel according to claim 12, wherein: The second fan-out trace is configured to provide a data voltage to a pixel circuit driving a second light-emitting device, and the third fan-out trace and the first data line are respectively configured to provide a data voltage to a pixel circuit driving a first light-emitting device, wherein the first light-emitting device and the second light-emitting device are configured to emit light of different colors; A minimum distance from the first data line to the second fan-out line is greater than a minimum distance from the first data line to the third fan-out line.
14. The display panel according to any one of claims 1 to 13, wherein: The first data line is configured to provide a data voltage to a pixel circuit driving a first light-emitting device, some of the plurality of second data lines are configured to provide a data voltage to a pixel circuit driving a second light-emitting device, and another part of the plurality of second data lines is configured to provide a data voltage to a pixel circuit driving a third light-emitting device, and any two of the first light-emitting device, the second light-emitting device and the third light-emitting device are configured to emit light of different colors.
15. The display panel according to any one of claims 1 to 13, characterized in that: One of the first data line and the second data line is configured to simultaneously provide a data voltage to a pixel circuit that drives a first light-emitting device and a third light-emitting device, and the other of the first data line and the second data line is configured to provide a data voltage to a pixel circuit that drives a second light-emitting device, the first light-emitting device is configured to emit blue light, the second light-emitting device is configured to emit green light, and the third light-emitting device is configured to emit red light.
16. A display device, characterized in that: Comprising the display panel according to any one of claims 1-15.