Display device

Abstract

The invention relates to a display device. There is provided a display device in which a first sub-pixel emits light of a first color different from light emitted by a second sub-pixel, and the second sub-pixel emits white light, in which a structure of a first electrode of the first sub-pixel is different from a structure of a first electrode of the second sub-pixel. Further, a display device is provided in which a second electrode includes a first conductive layer and a second conductive layer, in which a transmittance of the second conductive layer is different from a transmittance of the first conductive layer.

Description

Technical Field

[0001] The present disclosure relates to display devices, and more particularly, for example but not limitation, to display devices including high efficiency and low reflective electrode structures. Background Art

[0002] In addition to being used as display screens for televisions and monitors, display devices are also widely used as display screens for laptops, tablet computers, smartphones, portable display devices, and portable information devices. With technological advancements, display devices can provide not only image display functions but also photography or various sensing functions. Therefore, display devices can include electronic devices such as cameras or sensors.

[0003] Among display devices, organic light-emitting displays (OLEDs) are self-luminous and offer advantages over liquid crystal displays (LCDs), such as superior viewing angles and contrast. They can be lightweight and thinner because they do not require a separate backlight, and they are also superior in terms of power consumption. OLEDs also have the advantages of being able to operate with low DC voltages, having fast response speeds, and being manufactured at exceptionally low costs.

[0004] Recently, electrodes comprising highly reflective materials have been used to improve the light efficiency of display devices. For example, in a top-emitting display device, the anode of the light-emitting device may be formed of a highly reflective material. In this case, when light generated by the light-emitting layer of the light-emitting device travels toward the lower portion of the display device, the light is reflected by the anode, and the path of the light may be changed from the direction of the lower portion of the display device to the direction of the upper portion of the display device. Therefore, the light efficiency of the display device can be improved. However, the electrode comprising a highly reflective material reflects external light, and the reflectivity of the display device with respect to external light may increase. Therefore, there is a problem of reduced visibility of the display device.

[0005] The description provided in this Description of the Related Art section should not be assumed to be prior art simply because it is mentioned in or associated with the description in the Description of the Related Art section. The discussion in the Related Art section may include information that describes one or more aspects of the subject technology, and the descriptions in this section do not limit the present disclosure. Summary of the Invention

[0006] Therefore, the inventors of the present disclosure recognized the above-mentioned limitations or problems and other limitations associated with the related art, and conducted various experiments to realize a display device including a high-efficiency and low-reflection electrode structure.

[0007] The present disclosure is made in view of the above problems, and an object of the present disclosure is to provide a display device including a high-efficiency and low-reflection electrode structure.

[0008] According to one aspect of the present disclosure, the above-mentioned purpose and other purposes can be achieved by providing a display device, which includes a substrate on which a first sub-pixel and a second sub-pixel are arranged, each of the first sub-pixel and the second sub-pixel includes a light-emitting area and a non-light-emitting area surrounding the light-emitting area, wherein each of the first sub-pixel and the second sub-pixel includes a first electrode arranged in the light-emitting area, a light-emitting layer arranged on the first electrode, and a second electrode arranged on the light-emitting layer, the first sub-pixel emits light of a first color different from the light emitted by the second sub-pixel, the second sub-pixel emits white light, and the structure of the first electrode of the first sub-pixel is different from the structure of the first electrode of the second sub-pixel.

[0009] In addition, according to one aspect of the present disclosure, the above-mentioned purpose and other purposes can be achieved by providing a display device, which includes a substrate on which a plurality of sub-pixels are arranged, and the plurality of sub-pixels include a light-emitting area and a non-light-emitting area surrounding the light-emitting area, wherein each of the plurality of sub-pixels includes a first electrode arranged in the light-emitting area, a light-emitting layer arranged on the first electrode, and a second electrode arranged on the light-emitting layer, the second electrode includes a first conductive layer and a second conductive layer arranged on the first conductive layer, and the transmittance of the second conductive layer is different from the transmittance of the first conductive layer.

[0010] The effects according to the present disclosure are not limited to those exemplified above, and more various effects are included in the present disclosure.

[0011] It is to be understood that both the foregoing general description and the following detailed description of the present disclosure are exemplary and explanatory and are intended to provide further explanation of the inventive concepts as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The above and other aspects, features and other advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0013] Figure 1 is a plan view of a display device according to an exemplary embodiment of the present disclosure.

[0014] Figure 2 is a plan view of one pixel according to an exemplary embodiment of the present disclosure.

[0015] Figure 3 is a cross-sectional view of a sub-pixel according to an exemplary embodiment of the present disclosure.

[0016] Figure 4 is a cross-sectional view of a pixel according to a first exemplary embodiment of the present disclosure.

[0017] Figure 5 is a cross-sectional view of a pixel according to a second exemplary embodiment of the present disclosure.

[0018] Figure 6 is a cross-sectional view of a pixel according to a third exemplary embodiment of the present disclosure.

[0019] Figure 7 is a cross-sectional view of a pixel according to a fourth exemplary embodiment of the present disclosure.

[0020] Figures 8A to 8D are plan views of sub-pixels according to various exemplary embodiments.

[0021] Figure 9 is a cross-sectional view of a sub-pixel according to another exemplary embodiment of the present disclosure.

[0022] Figure 10 is a cross-sectional view of a pixel according to a fifth exemplary embodiment of the present disclosure.

[0023] Figure 11 is a cross-sectional view of a pixel according to a sixth exemplary embodiment of the present disclosure.

[0024] Figure 12 is a cross-sectional view of a pixel according to a seventh exemplary embodiment of the present disclosure.

[0025] Throughout the drawings and detailed description, unless otherwise described, the same reference numerals should be understood to refer to the same elements, features, and structures. For clarity, illustration, and convenience, the sizes, lengths, and thicknesses of layers, regions, and elements, and their descriptions may be exaggerated. DETAILED DESCRIPTION

[0026] Reference will now be made in detail to embodiments of the present disclosure, examples of which may be illustrated in the accompanying drawings. The described progression of processing steps and / or operations is an example; however, the order of the steps and / or operations is not limited to that set forth herein and may be varied as is known in the art, except that steps and / or operations must occur in a specific order. The names of corresponding elements used in the following description may have been selected solely for ease of writing the description and, therefore, may differ from names used in actual products.

[0027] The advantages and features of the present disclosure and their implementation methods will be illustrated by the exemplary embodiments described below with reference to the accompanying drawings. However, the present disclosure can be implemented in different forms and should not be construed as being limited to the exemplary embodiments set forth herein. On the contrary, these exemplary embodiments are provided to make the present disclosure sufficiently comprehensive and complete and to fully convey the scope of the present disclosure to those skilled in the art. Furthermore, the present disclosure is limited only by the scope of the claims.

[0028] The shapes, sizes, proportions, angles, quantities, etc. disclosed in the drawings for describing the exemplary embodiments of the present disclosure are merely examples, and therefore the present disclosure is not limited to the details shown. Throughout the specification, similar reference numerals refer to similar elements. In the following description, when it is determined that a detailed description of related known functions or configurations would unnecessarily obscure various aspects of the present disclosure, such detailed description will be omitted. Where “including,” “having,” and “comprising” are used as described in the present disclosure, additional parts may be added unless they are used together with “only.” Unless otherwise mentioned, terms in the singular may include plural forms.

[0029] When interpreting an element, even if not explicitly described, the element is to be interpreted as including a margin of error.Any implementation described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other implementations.

[0030] When describing a positional relationship, for example, when the positional relationship is described as "on...", "above...", "below...", "next to...", "immediately adjacent to...", etc., one or more parts may be disposed between two other parts, unless "only" or "directly" is used, that is, one or more other parts may be disposed between the two parts. For example, when one element or layer is disposed "on" another element or layer, a third layer or element may be interposed therebetween.

[0031] Terms such as "below," "below," "above," and "upper" may be used herein to describe the relationship between elements shown in the drawings. It should be understood that these terms are spatially relative and based on the orientation depicted in the drawings.

[0032] It should be understood that although the terms "first," "second," "A," "B," "(a)," and "(b)" may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element without departing from the scope of this disclosure.

[0033] As will be fully understood by those skilled in the art, the features of the various exemplary embodiments of the present disclosure may be combined or combined with each other in part or in whole, and may interoperate and technically drive each other differently. The exemplary embodiments of the present disclosure may be performed independently of each other, or may be performed together in a mutually dependent relationship.

[0034] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the exemplary embodiment belongs. It will also be understood that terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, for example, and should not be interpreted in an idealized or overly formal sense unless expressly defined as such herein. For example, the term "component" or "unit" may apply, for example, to a separate circuit or structure, an integrated circuit, a computing block of a circuit device, or any structure configured to perform the described function, as would be understood by one of ordinary skill in the art.

[0035] Furthermore, when referring to any dimensions, relative dimensions, etc., it should be considered that the numerical value or corresponding information (e.g., level, range, etc.) of an element or feature includes tolerances or error ranges that may be caused by various factors (e.g., process factors, internal or external influences, noise, etc.), even if no relevant description is specified. In addition, the word "may" fully encompasses all meanings of the word "can."

[0036] Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. For ease of description, the scale of each element shown in the drawings is different from the actual scale and is therefore not limited to the scale shown in the drawings.

[0037] Hereinafter, preferred exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0038] Figure 1 is a plan view of a display device according to an exemplary embodiment of the present disclosure.

[0039] refer to Figure 1 The display device according to an exemplary embodiment of the present disclosure may include a display area DA and a non-display area NDA surrounding the display area DA. The display area DA is an area where an image can be displayed, and the non-display area NDA is an area where no image is displayed.

[0040] The display area DA may include a plurality of pixels P. The plurality of pixels P may be arranged in a matrix consisting of a plurality of rows and columns. In addition, the non-display area NDA may include a plurality of wirings, pads, drive circuits, etc. for driving the plurality of pixels P. However, the configuration of the display area DA and the non-display area NDA is not limited thereto.

[0041] Figure 2 is a plan view of one pixel P according to an exemplary embodiment of the present disclosure.

[0042] refer to Figure 2, a pixel P may include a plurality of sub-pixels, such as a first sub-pixel SP1, a second sub-pixel SP2, a third sub-pixel SP3, and a fourth sub-pixel SP4, but is not limited thereto. A plurality of sub-pixels, such as the first sub-pixel SP1 to the fourth sub-pixel SP4, may emit light different from each other, such as red, green, or blue (e.g., white, red, green, blue, cyan, magenta, or yellow, etc.). For example, the first sub-pixel SP1 may emit light of a first color, such as red light, the second sub-pixel SP2 may emit light of a second color, such as white light, the third sub-pixel SP3 may emit light of a third color, such as blue light, and the fourth sub-pixel SP4 may emit light of a fourth color, such as green light, but is not limited thereto. In addition, although Figure 2 It is shown that one pixel P includes four sub-pixels SP1 to SP4 , but one pixel P is not limited thereto, and one pixel P may include fewer or more sub-pixels.

[0043] Each of the first to fourth subpixels SP1 to SP4 is disposed on a substrate 100 and may include an emission area EA and a non-emission area NEA surrounding the emission area EA. The emission area EA is an area capable of emitting light, and the non-emission area NEA is an area that does not emit light. Furthermore, a light-emitting element may be disposed in the emission area EA, and a bank may be disposed in the non-emission area NEA.

[0044] Figure 3 is a cross-sectional view of a sub-pixel SP according to an exemplary embodiment of the present disclosure. Figure 3 The first sub-pixel SP1 is along Figure 2 Cross-sectional view taken along line AA′.

[0045] refer to Figure 3 According to an exemplary embodiment of the present disclosure, a sub-pixel SP may include a substrate 100, a buffer layer 110, a light blocking layer 115, a thin film transistor 120, a passivation layer 130, a first planarization layer 140, a second planarization layer 150, a light emitting device 160, a dam 170 and a first color filter 181, etc., but the present disclosure is not limited thereto.

[0046] The substrate 100 may be made of glass, plastic or a flexible polymer film, but is not limited thereto. For example, the flexible polymer film may be made of any one of the following: polyethylene terephthalate (PET), polycarbonate (PC), acrylonitrile butadiene styrene (ABS), polymethyl methacrylate (PMMA), polyethylene naphthalate (PEN), polyethersulfone (PES), cyclic olefin copolymer (COC), triacetyl cellulose (TAC) film, polyvinyl alcohol (PVA) film, polyimide (PI) film and polystyrene (PS), which are examples only and are not necessarily limited thereto. The display device according to the exemplary embodiment of the present disclosure may adopt a bottom emission type, in which the emitted light is emitted downward. Therefore, a transparent material may be used as the material of the substrate 100.

[0047] A light blocking layer 115 may be provided on the substrate 100. The light blocking layer 115 may be provided in a region overlapping the thin film transistor 120 and the bank 170. The light blocking layer 115 may prevent or reduce external light from penetrating into the channel region of the thin film transistor 120. In addition, the light blocking layer 115 may prevent or reduce light from penetrating into the non-emission area NEA. The light blocking layer 115 may include an opaque metal material such as molybdenum (Mo), but is not limited thereto.

[0048] The buffer layer 110 may be provided on the substrate 100 and the light blocking layer 115. The buffer layer 110 may cover the light blocking layer 115 and compensate for the step difference caused by the light blocking layer 115. In addition, the adhesion between the thin film transistor 120 and the substrate 100 may be improved. The buffer layer 110 may be formed of an inorganic insulating material such as silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy), etc., but is not limited thereto.

[0049] The thin film transistor 120 may be provided on the buffer layer 110 and may be provided in the non-emission area NEA. In addition, the thin film transistor 120 may be provided in a region overlapping with the light blocking layer 115. The thin film transistor 120 may include a gate electrode 121, a semiconductor layer 122, a gate insulating layer 123, a first electrode (such as a source electrode) 124, and a second electrode (such as a drain electrode) 125, but is not limited thereto.

[0050] The semiconductor layer 122 of the thin film transistor 120 may be disposed on the buffer layer 110. Furthermore, a gate electrode 121 may be disposed on the semiconductor layer 122. The semiconductor layer 122 may include a polycrystalline silicon semiconductor or an oxide semiconductor. Furthermore, when the semiconductor layer 122 includes an oxide semiconductor, it may include at least one of indium gallium zinc oxide (IGZO), indium zinc oxide (IZO), indium gallium tin oxide (IGTO), and indium gallium oxide (IGO). Furthermore, the gate electrode 121 may be formed of a conductive material, such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof, but is not limited thereto.

[0051] In order to insulate the gate electrode 121 from the semiconductor layer 122, a gate insulating layer 123 may be provided between the gate electrode 121 and the semiconductor layer 122. The gate insulating layer 123 may include a single layer of silicon nitride (SiNx) or silicon oxide (SiOx), or a multilayer thereof. Figure 3 A top gate structure in which the gate electrode 121 is disposed on the semiconductor layer 122 is shown, but the present invention is not limited thereto. For example, a bottom gate structure in which the semiconductor layer 122 is disposed on the gate electrode 121 may be disclosed.

[0052] The passivation layer 130 may be provided on the gate electrode 121. The passivation layer 130 may be formed of an inorganic insulating material such as silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy), etc. Depending on the circumstances, when the first planarization layer 140 has the function of protecting the thin film transistor 120, the passivation layer 130 may be omitted. The source electrode 124 and the drain electrode 125 may be provided on the passivation layer 130 while facing each other. The source electrode 124 and the drain electrode 125 may be connected to the semiconductor layer 122 through contact holes formed in the gate insulating layer 123 and the passivation layer 130.

[0053] A first planarization layer 140 and a second planarization layer 150 may be provided on the thin film transistor 120. The first planarization layer 140 may be provided on the thin film transistor 120, and the second planarization layer 150 may be provided on the first planarization layer 140. The first planarization layer 140 and the second planarization layer 150 may protect the thin film transistor 120. The first planarization layer 140 and the second planarization layer 150 may compensate for a step difference caused by the thin film transistor 120 to planarize an upper region of the thin film transistor 120. In addition, the first planarization layer 140 and the second planarization layer 150 may be formed of an organic insulating material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin, but the embodiment is not limited thereto.

[0054] The light emitting device 160 may be disposed on the second planarization layer 150. The light emitting device 160 may include a first electrode 161, a light emitting layer 162, and a second electrode 163, but is not limited thereto.

[0055] The first electrode 161 may be disposed on the second planarization layer 150 and may function as an anode of the display device. The first electrode 161 may be electrically connected to the drain electrode 125 of the thin film transistor 120 through a contact hole formed in the first and second planarization layers 140 and 150, but is not limited thereto.

[0056] Since the display device according to the exemplary embodiment of the present disclosure is configured as a bottom emission type, the first electrode 161 may include a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) to transmit light emitted from the light emitting layer 162 to the lower side of the display device. In addition, the display device according to the exemplary embodiment of the present disclosure may be configured as a top emission type.

[0057] The bank 170 may be disposed on the second planarization layer 150 and the first electrode 161. The bank 170 is used to define sub-pixels. The bank 170 may define an emission area EA and a non-emission area NEA. In other words, an area without the bank 170 may become the emission area EA, and an area with the bank 170 may become the non-emission area NEA.

[0058] The bank 170 may include an organic insulating material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, or the like. Alternatively, the bank 170 may include an inorganic insulating material such as silicon oxide (SiOx), silicon nitride (SiNx), or silicon oxynitride (SiOxNy). In addition, the bank 170 may include a black dye to absorb light incident from the outside. In addition, the bank 170 may also be made of a transparent insulating material.

[0059] The light-emitting layer 162 may be provided on the first electrode 161. The light-emitting layer 162 may also be provided on the upper surface of the bank 170. The light-emitting layer 162 may include one or more of a hole transport layer, an organic light-emitting layer, and an electron transport layer, but the present disclosure is not limited thereto. In this case, when a voltage is applied to the first electrode 161 and the second electrode 163, holes and electrons move to the organic light-emitting layer through the hole transport layer and the electron transport layer, respectively, and may combine with each other in the organic light-emitting layer to emit light.

[0060] The second electrode 163 may be disposed on the light emitting layer 162. The second electrode 163 may function as a cathode of the display device, but is not limited thereto. Similar to the light emitting layer 162, the second electrode 163 may also be disposed on the upper surface of the bank 170.

[0061] The second electrode 163 may be made of a highly reflective metal material. For example, the second electrode 163 may include a metal material such as aluminum (Al), silver (Ag), copper (Cu), molybdenum (Mo), titanium (Ti), tungsten (W), or chromium (Cr), or an alloy thereof. In addition, the second electrode 163 may include a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0062] The first color filter 181 may be disposed on the first planarization layer 140 and may be disposed in the emission area EA. That is, the first color filter 181 may be disposed below the light-emitting device 160. The first color filter 181 may transmit light of a specific color band (such as a red band). Therefore, when light generated by the light-emitting device 160 is incident on the first color filter 181, red light may be emitted from the first color filter 181. That is, the first subpixel SP1 may emit red light, but is not limited thereto.

[0063] Figure 4 is a cross-sectional view of a pixel P according to a first exemplary embodiment of the present disclosure. In detail, Figure 4 yes Figure 2 1 is a cross-sectional view of the first to fourth sub-pixels SP1 to SP4 taken along line BB′.

[0064] like Figure 4 As shown, each sub-pixel SP may include a substrate 100, a buffer layer 110, a light blocking layer 115, a thin film transistor 120, a passivation layer 130, a first planarization layer 140, a second planarization layer 150, a light emitting device 160, and a bank 170. Figure 4 It is along Figure 2 This is a cross-sectional view taken along line BB′, and thus the structure of the thin film transistor 120 is not shown.

[0065] refer to Figure 4 A buffer layer 110 , a light blocking layer 115 , a gate insulating layer 123 of a thin film transistor 120 , a passivation layer 130 , a first planarization layer 140 and a second planarization layer 150 may be sequentially disposed on the substrate 100 , but the present invention is not limited thereto.

[0066] The light blocking layer 115 may be disposed at a position overlapping the bank 170. Furthermore, the light blocking layer 115 may be patterned. For example, a plurality of light blocking layers 115 spaced apart from each other may be disposed between the first sub-pixel SP1 and the second sub-pixel SP2, but the present invention is not limited thereto. Furthermore, a single light blocking layer 115 may be disposed between the second sub-pixel SP2 and the third sub-pixel SP3, but the present invention is not limited thereto. Furthermore, a plurality of light blocking layers 115 spaced apart from each other may be disposed between the third sub-pixel SP3 and the fourth sub-pixel SP4, but the present invention is not limited thereto.

[0067] A plurality of color filters, such as a first color filter 181, a second color filter 182, and a third color filter 183, may be provided on the first planarization layer 140. The first color filter 181 may be provided in the first sub-pixel SP1 and may transmit light of a first color, such as red light, but is not limited thereto. The second color filter 182 may be provided in the third sub-pixel SP3 and may transmit light of a second color, such as blue light, but is not limited thereto. The third color filter 183 may be provided in the fourth sub-pixel SP4 and may transmit light of a third color, such as green light, but is not limited thereto. Furthermore, since the second sub-pixel SP2 emits white light, the second sub-pixel SP2 may not include a color filter.

[0068] Each of the first to fourth sub-pixels SP1 to SP4 may include a light emitting device 160. As described above, the light emitting device 160 may include a first electrode 161, a light emitting layer 162, and a second electrode 163, but is not limited thereto.

[0069] The first electrode 161 of the first subpixel SP1 may include a transparent conductive material such as, but not limited to, indium tin oxide (ITO) or indium zinc oxide (IZO). Similarly, the first electrodes 161 of the third and fourth subpixels SP3 and SP4 may include a transparent conductive material such as, but not limited to, indium tin oxide (ITO) or indium zinc oxide (IZO). Furthermore, the first electrodes 161 of the first to fourth subpixels SP1 to SP4 may be separated by a bank 170.

[0070] In addition, the first electrode 161 of the second sub-pixel SP2 emitting white light may include a first conductive layer 161 a and a second conductive layer 161 b , but is not limited thereto.

[0071] The first conductive layer 161a may be provided on the second planarization layer 150. The first conductive layer 161a may be provided over the entire area of ​​the light emitting area EA of the second sub-pixel SP2. In addition, the first conductive layer 161a may be formed of a conductive material having a high transmittance, but is not limited thereto. For example, the first conductive layer 161a may be formed of a metal oxide. In addition, the first conductive layer 161a may be formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), but is not limited thereto. In addition, the first conductive layer 161a may be a layer having a thickness of or smaller metal films.

[0072] The second conductive layer 161b may be disposed on the first conductive layer 161a. Furthermore, the second conductive layer 161b may be disposed over the entire emission area EA of the second subpixel SP2 and may cover the entire upper surface of the first conductive layer 161a. The second conductive layer 161b may be made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). That is, the transmittance of the second conductive layer 161b may be greater than or equal to the transmittance of the first conductive layer 161a, but is not limited thereto.

[0073] The light-emitting layers 162 of the first to fourth sub-pixels SP1 to SP4 may be formed of the same material, but are not limited thereto. All of the light-emitting layers 162 of the first to fourth sub-pixels SP1 to SP4 may emit white light. Alternatively, the light-emitting layer 162 of the first sub-pixel SP1 may emit red light, the light-emitting layer 162 of the second sub-pixel SP2 may emit white light, the light-emitting layer 162 of the third sub-pixel SP3 may emit blue light, and the light-emitting layer 162 of the fourth sub-pixel SP4 may emit green light, but are not limited thereto. Furthermore, the light-emitting layers 162 of the first to fourth sub-pixels SP1 to SP4 may be formed continuously on the bank 170, but are not limited thereto.

[0074] Similarly, the second electrodes 163 of the first to fourth sub-pixels SP1 to SP4 can be formed of the same material, but are not limited thereto. That is, the second electrodes 163 of the first to fourth sub-pixels SP1 to SP4 can be formed of a highly reflective metal material. Furthermore, the second electrodes 163 of the first to fourth sub-pixels SP1 to SP4 can be continuously formed on the bank 170, but the present disclosure is not limited thereto. Specifically, the second electrodes 163 of the first to fourth sub-pixels SP1 to SP4 can be continuously formed on the light-emitting layer 162, but the present disclosure is not limited thereto.

[0075] That is, the first exemplary embodiment of the present disclosure discloses that the first electrode 161 of the second sub-pixel SP2 emitting white light has a double-layer structure of a bottom emission type, but the present disclosure is not limited thereto. Specifically, the first electrode 161 may include a first conductive layer 161a made of a conductive material having high transmittance and a second conductive layer 161b made of a transparent conductive material, but the present disclosure is not limited thereto.

[0076] The first exemplary embodiment of the present disclosure is a bottom-emission type display. To improve the light efficiency of the display device, the second electrode 163 of the light-emitting device 160 may be formed of a highly reflective metal material, but the present disclosure is not limited thereto. Specifically, when light generated by the light-emitting layer 162 of the light-emitting device travels toward the upper portion of the display device, the light is reflected by the second electrode 163. As a result, the light path can be changed from the upper portion of the display device to the lower portion of the display device. As a result, the amount of light directed toward the lower portion of the display device can be increased, thereby improving the light efficiency of the display device.

[0077] In this case, external light can penetrate into the display device from the lower portion of the substrate 100. When external light penetrates the first subpixel SP1, the third subpixel SP3, and the fourth subpixel SP4, the external light can be absorbed by the first to third color filters 181 to 183. Specifically, when external light penetrates the red, green, and blue subpixels, the external light can be absorbed by the color filters. However, since the second subpixel SP2, such as the white subpixel, does not include a color filter, the external light can be reflected by the second electrode 163. Therefore, the reflectivity of the display device to external light can be increased.

[0078] However, the first exemplary embodiment of the present disclosure has an effect of reducing or minimizing the reflectivity of the display device with respect to external light by forming the first electrode 161 of the second sub-pixel SP2 emitting white light in a double-layered structure.

[0079] Specifically, after passing through the first electrode 161 in the second subpixel SP2, the external light L1 may be reflected by the second electrode 163. The external light L1 may then pass through the first electrode 161 again. During this process, destructive interference occurs due to the first conductive layer 161a having a high transmittance, and the amount of light L1′ that ultimately passes through the first electrode 161 is reduced compared to the amount of the first incident light L1. Therefore, the reflectivity of the display device with respect to external light may be reduced.

[0080] Furthermore, in order to allow the sub-pixel SP to emit light, the light L2 generated in the light-emitting layer 162 may pass through the first conductive layer 161 a toward the lower portion of the substrate 100. In this case, since the first conductive layer 161 a has a high transmittance, even if the light L2 passes through the first conductive layer 161 a, the amount of light L2 generated in the light-emitting layer 162 may be maintained to a certain extent. Therefore, the reduction of the light generated in the light-emitting layer 162 by the first conductive layer 161 a may be minimized.

[0081] Figure 5 is a cross-sectional view of a pixel P according to a second exemplary embodiment of the present disclosure.

[0082] and Figure 4 compared to, Figure 5shows substantially the same structure except for the structure of the first electrode 161 of the second sub-pixel SP2. Figure 4 The same or substantially the same components of the illustrated pixel P are denoted by the same reference numerals, and repeated descriptions are omitted or briefly provided.

[0083] refer to Figure 5 In addition to the first conductive layer 161a and the second conductive layer 161b, the first electrode 161 of the second subpixel SP2 may further include a third conductive layer 161c. The third conductive layer 161c may be disposed between the first conductive layer 161a and the second planarization layer 150. Specifically, the third conductive layer 161c may be disposed on the second planarization layer 150 and may cover the entire emission area EA of the second subpixel SP2. The first conductive layer 161a may be disposed on the third conductive layer 161c and may cover the entire emission area EA of the second subpixel SP2. The second conductive layer 161b may be disposed on the first conductive layer 161a and may cover the entire emission area EA of the second subpixel SP2. Furthermore, the third conductive layer 161c may be made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). Therefore, while the adhesion between the first electrode 161 and the second planarization layer 150 is improved, the effect of destructive interference when external light penetrates may be increased.

[0084] Figure 6 is a cross-sectional view of a pixel P according to a third exemplary embodiment of the present disclosure.

[0085] and Figure 4 compared to, Figure 6 shows substantially the same structure except for the structure of the first electrode 161 of the second sub-pixel SP2. Figure 4 The same or substantially the same components of the illustrated pixel P are denoted by the same reference numerals, and repeated descriptions are omitted or briefly provided.

[0086] refer to Figure 6 , the first electrode 161 of the second sub-pixel SP2 may include a first conductive layer 161a and a second conductive layer 161b. In this case, the first conductive layer 161a may not be provided over the entire area of ​​the emission area EA of the second sub-pixel SP2. The first conductive layer 161a may be formed in a ring shape surrounding the edge of the emission area EA of the second sub-pixel SP2. In other words, the first conductive layer 161a may not be provided at the center of the emission area EA of the second sub-pixel SP2.

[0087] As an example, the second conductive layer 161b may be disposed on the first conductive layer 161a and may be disposed over the entire area of ​​the emission area EA of the second sub-pixel SP2, but is not limited thereto. That is, the second conductive layer 161b may cover the upper surface and inner side surface of the first conductive layer 161a. Furthermore, the second conductive layer 161b may cover the upper surface of the second planarization layer 150 exposed by the first conductive layer 161a.

[0088] Therefore, the third exemplary embodiment of the present disclosure discloses that only a portion of the first electrode 161 of the second subpixel SP2 is formed as a double layer. That is, the edge region of the first electrode 161 may include both the first conductive layer 161a and the second conductive layer 161b, while the central region of the first electrode 161 may include only the second conductive layer 161b. Therefore, light generated by the light-emitting layer 162 may not pass through the first conductive layer 161a, but may pass only through the second conductive layer 161b. Therefore, compared to the first embodiment, the possibility of a reduction in the amount of light generated by the light-emitting layer 162 is further reduced, thereby further preventing a reduction in the light efficiency of the display device.

[0089] Figure 7 is a cross-sectional view of a pixel P according to a fourth exemplary embodiment of the present disclosure.

[0090] and Figure 6 compared to, Figure 7 shows substantially the same structure except for the structure of the first electrode 161 of the second sub-pixel SP2. Figure 6 The same or substantially the same components of the illustrated pixel P are denoted by the same reference numerals, and repeated descriptions are omitted or briefly provided.

[0091] refer to Figure 7 , the first electrode 161 of the second sub-pixel SP2 may further include a fourth conductive layer 161d in addition to the first conductive layer 161a and the second conductive layer 161b.

[0092] The fourth conductive layer 161d may be disposed between the first conductive layer 161a and the second conductive layer 161b. In addition, the fourth conductive layer 161d may have a shape corresponding to the shape of the first conductive layer 161a, but is not limited thereto. That is, as described above, Figure 6 As described above, since the first conductive layer 161a is formed in a ring shape surrounding the edge of the emission area EA of the second subpixel SP2, the fourth conductive layer 161d may also be formed in a ring shape surrounding the edge of the emission area EA of the second subpixel SP2, but is not limited thereto.

[0093] The fourth conductive layer 161d may be formed of a highly reflective metal material. The fourth conductive layer 161d may include a metal material such as aluminum (Al), silver (Ag), copper (Cu), molybdenum (Mo), titanium (Ti), tungsten (W), or chromium (Cr), or an alloy thereof, but is not limited thereto.

[0094] Therefore, when external light penetrates, the light can be reflected by the fourth conductive layer 161d. The light reflected by the fourth conductive layer 161d can be guided to the first subpixel SP1 and the third subpixel SP3 adjacent to the second subpixel SP2. Since the first color filter 181 is provided in the first subpixel SP1 and the second color filter 182 is provided in the third subpixel SP3, the light reflected by the fourth conductive layer 161d can be guided to the first color filter 181 and the second color filter 182. Therefore, the external light can be absorbed by the first color filter 181 and the second color filter 182. Therefore, the external light can be further reduced. In addition, since the fourth conductive layer 161d is provided at the edge of the emission area EA of the second subpixel SP2, the impact on the path of the light generated by the emission layer 162 can be reduced or minimized.

[0095] Figures 8A to 8D is a plan view of a sub-pixel according to various exemplary embodiments. Specifically, Figures 8A to 8D is a plan view of the first electrode 161 of the second sub-pixel SP2.

[0096] Figure 8A yes Figure 6 , which is a plan view of the third embodiment described above. That is, the first conductive layer 161a may be formed in a ring shape surrounding the edge of the emission area EA and may not be provided over the entire emission area EA of the second subpixel SP2. Furthermore, the second conductive layer 161b may be provided on the first conductive layer 161a and may be provided over the entire emission area EA of the second subpixel SP2. That is, the second conductive layer 161b may cover the upper and inner surfaces of the first conductive layer 161a and the upper surface of the second planarization layer 150 exposed by the first conductive layer 161a.

[0097] In addition, the first conductive layer 161a may not include a single layer, but may include a plurality of regions spaced apart from each other. Figure 8B , the first conductive layer 161a may include a plurality of regions spaced apart from each other along the first direction. Alternatively, referring to Figure 8CThe first conductive layer 161a may include a plurality of regions spaced apart along a second direction intersecting the first direction. The first conductive layer 161a may be spaced apart from the edge of the emission area EA. Furthermore, the second conductive layer 161b may be disposed on the first conductive layer 161a and may be disposed over the entire emission area EA of the second subpixel SP2. In other words, the second conductive layer 161b may cover the upper surface of the first conductive layer 161a.

[0098] refer to Figure 8D The first conductive layer 161a may be formed along the first direction and the second direction and may have a shape that intersects each other. For example, the first conductive layer 161a may have a shape in which two regions spaced apart from each other in the first direction overlap with two regions spaced apart from each other in the second direction. In addition, the first electrode 161 of the second sub-pixel SP2 is not limited to Figures 8A to 8D The shapes disclosed in , and may have various shapes.

[0099] Figure 9 is a cross-sectional view of a sub-pixel SP according to another exemplary embodiment of the present disclosure. In detail, Figure 9 It is along Figure 2 FIG. 5 is a cross-sectional view of the first sub-pixel SP1 taken along line AA′.

[0100] because Figure 9 Publicly disclosed with Figure 3 Basically the same structure, so for Figure 3 The same or substantially the same components of the illustrated sub-pixel SP are denoted by the same reference numerals, and duplicate descriptions are omitted or briefly provided.

[0101] Figure 3 The exemplary embodiment discloses a bottom emission type in which the emitted light is emitted downward, and Figure 9 The embodiment discloses a top emission type in which emitted light is emitted upward. Therefore, a transparent material or an opaque material may be used as the material of the lower substrate 100.

[0102] The light blocking layer 115 may be disposed on the lower substrate 100. The light blocking layer 115 may be disposed in a region overlapping the thin film transistor 120. In addition, the light blocking layer 115 may be disposed in both the emission area EA and the non-emission area NEA.

[0103] The thin film transistor 120 may be provided on the buffer layer 110. The thin film transistor 120 may include a gate electrode 121, a semiconductor layer 122, a gate insulating layer 123, a first electrode (such as a source electrode) 124, and a second electrode (such as a drain electrode) 125, but the present disclosure is not limited thereto. Figure 9A bottom gate structure in which the semiconductor layer 122 is disposed on the gate electrode 121 is disclosed, but is not limited thereto. For example, a top gate structure in which the gate electrode 121 is disposed on the semiconductor layer 122 may be disclosed.

[0104] The auxiliary electrode 135 may be disposed on the gate insulating layer 123 . The auxiliary electrode 135 may be formed of the same material and the same process as the semiconductor layer 112 , but is not limited thereto. The passivation layer 130 may be disposed on the semiconductor layer 112 and the auxiliary electrode 135 .

[0105] The first planarization layer 140 and the second planarization layer 150 may be disposed on the thin film transistor 120. The first planarization layer 140 may be disposed on the thin film transistor 120, and the second planarization layer 150 may be disposed on the first planarization layer 140. The first planarization layer 140 and the second planarization layer 150 may protect the thin film transistor 120.

[0106] The light emitting device 160 may be disposed on the second planarization layer 150. The light emitting device 160 may include a first electrode 161, a light emitting layer 162, and a second electrode 163, but is not limited thereto.

[0107] The first electrode 161 may be disposed on the second planarization layer 150 and may function as an anode of the display device. The first electrode 161 may be electrically connected to the drain electrode 125 of the thin film transistor 120 through the connection electrode 155 disposed on the first planarization layer 140.

[0108] The first electrode 161 may include a first transparent conductive layer 161 a , a reflective layer 161 b , and a second transparent conductive layer 161 c , but is not limited thereto.

[0109] The first transparent conductive layer 161a may be disposed on the second planarization layer 150. The first transparent conductive layer 161a may include a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), but is not limited thereto.

[0110] The reflective layer 161b may be disposed on the first transparent conductive layer 161a. The reflective layer 161b may be formed of a metal material. For example, the reflective layer 161b may include a metal material such as aluminum (Al), silver (Ag), copper (Cu), molybdenum (Mo), titanium (Ti), tungsten (W), or chromium (Cr), or an alloy thereof, but is not limited thereto.

[0111] The second transparent conductive layer 161c may be disposed on the reflective layer 161b. The second transparent conductive layer 161c may include a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), but is not limited thereto.

[0112] The light emitting layer 162 may be provided on the first electrode 161. The light emitting layer 162 may also be provided on an upper surface of the bank 170. The light emitting layer 162 may be provided on the entire area of ​​the emission area EA and the non-emission area NEA.

[0113] The second electrode 163 may be provided on the light emitting layer 162. The second electrode 163 may include a first conductive layer 163a, a second conductive layer 163b, and the like.

[0114] The first conductive layer 163a may be provided on the light emitting layer 162. The first conductive layer 163a may be provided over the entire area of ​​the light emitting area EA and the non-light emitting area NEA. In addition, the first conductive layer 163a may be formed of a material having high transmittance, but is not limited thereto. For example, the first conductive layer 163a may be formed of a metal oxide, but is not limited thereto. In addition, the first conductive layer 163a may be formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), but is not limited thereto. In addition, the first conductive layer 163a may be a For example, the first conductive layer 163a may be a thin film including a metal such as aluminum (Al), silver (Ag), copper (Cu), molybdenum (Mo), titanium (Ti), tungsten (W), or chromium (Cr), but is not limited thereto.

[0115] The second conductive layer 163b may be disposed on the first conductive layer 163a. ​​Furthermore, the second conductive layer 163b may be disposed over the entire emission area EA and the non-emission area NEA and may cover the entire upper surface of the first conductive layer 163a. ​​The second conductive layer 163b may be formed of a transparent conductive material such as, but not limited to, indium tin oxide (ITO) or indium zinc oxide (IZO). That is, the transmittance of the second conductive layer 163b may be greater than or equal to the transmittance of the first conductive layer 163a, but not limited thereto.

[0116] The first color filter 181 and the black matrix BM may be disposed on the lower surface of the upper substrate 200. The first color filter 181 may be disposed in the emission area EA, and the black matrix BM may be disposed in the non-emission area NEA. The black matrix BM may absorb light.

[0117] The lower substrate 100 and the upper substrate 200 may be bonded by an encapsulation layer 190. That is, the encapsulation layer 190 may be provided between the light emitting device 160 and the color filter 181. The encapsulation layer 190 may include an organic insulating material such as, but not limited to, an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, etc. In addition, the encapsulation layer 190 may include an inorganic insulating material such as silicon nitride (SiN), silicon oxide (SiO), silicon oxynitride (SiON), and aluminum oxide (AlO).

[0118] refer to Figure 9 , a structure in which an insulating layer is provided between the light blocking layer 115 and the auxiliary electrode 135 may be disclosed. Thus, a first storage capacitor Cst1 may be formed. In addition, a structure in which an insulating layer is provided between the auxiliary electrode 135 and the first electrode 161 may be disclosed. Thus, a second storage capacitor Cst2 may be formed.

[0119] Figure 10 is a cross-sectional view of a pixel according to a fifth exemplary embodiment of the present disclosure. In detail, Figure 10 It is along Figure 2 FIG. 5 is a cross-sectional view of the first to fourth sub-pixels SP1 to SP4 taken along line BB′.

[0120] As above Figure 9 As described in , each sub-pixel SP may include a lower substrate 100, a buffer layer 110, a light blocking layer 115, a thin film transistor 120, a passivation layer 130, a first planarization layer 140, a second planarization layer 150, a light emitting device 160, and a bank 170, etc.

[0121] refer to Figure 10 The buffer layer 110 , the light blocking layer 115 , the gate insulating layer 123 of the thin film transistor 120 , the auxiliary electrode 135 , the passivation layer 130 , the first planarization layer 140 and the second planarization layer 150 may be sequentially disposed on the lower substrate 100 , but are not limited thereto.

[0122] The light blocking layer 115 may be disposed at a position overlapping the bank 170. In addition, the light blocking layer 115 may be disposed at a position overlapping the light emitting device 160.

[0123] A plurality of color filters, such as first to third color filters 181 to 183, may be provided on the lower surface of the upper substrate 200. The first color filter 181 may be provided in the first subpixel SP1 and may transmit light of a first color, such as red light, but is not limited thereto. The second color filter 182 may be provided in the third subpixel SP3 and may transmit light of a second color, such as blue light, but is not limited thereto. The third color filter 183 may be provided in the fourth subpixel SP4 and may transmit light of a third color, such as green light, but is not limited thereto. Furthermore, since the second subpixel SP2 emits white light, the second subpixel SP2 may not include a color filter.

[0124] The black matrix BM may be disposed on the lower surface of the upper substrate 200. Also, the black matrix BM may be disposed in a boundary region of the sub-pixels SP adjacent to each other.

[0125] Each of the first to fourth sub-pixels SP1 to SP4 may include a light emitting device 160. As described above, the light emitting device 160 may include a first electrode 161, a light emitting layer 162, and a second electrode 163, but is not limited thereto.

[0126] The first electrode 161 of the first sub-pixel SP1 may include a first transparent conductive layer 161a, a reflective layer 161b, and a second transparent conductive layer 163c, but is not limited thereto. Similarly, the first electrode 161 of each of the second to fourth sub-pixels SP2 to SP4 may include a first transparent conductive layer 161a, a reflective layer 161b, and a second transparent conductive layer 163c. The first electrode 161 of each of the first to fourth sub-pixels SP1 to SP4 may be separated by a bank 170.

[0127] The light-emitting layers 162 of the first to fourth sub-pixels SP1 to SP4 may be formed of the same material, but are not limited thereto. All of the light-emitting layers 162 of the first to fourth sub-pixels SP1 to SP4 may generate white light. Alternatively, the light-emitting layer 162 of the first sub-pixel SP1 may generate red light, the light-emitting layer 162 of the second sub-pixel SP2 may emit white light, the light-emitting layer 162 of the third sub-pixel SP3 may emit blue light, and the light-emitting layer 162 of the fourth sub-pixel SP4 may emit green light, but are not limited thereto. Furthermore, the light-emitting layers 162 of the first to fourth sub-pixels SP1 to SP4 may be formed continuously on the bank 170, but are not limited thereto.

[0128] The second electrode 163 of the first sub-pixel SP1 may include a first conductive layer 163a and a second conductive layer 163b. Similarly, the second electrode 163 of each of the second to fourth sub-pixels SP2 to SP4 may include a first conductive layer 163a and a second conductive layer 163b. The second electrodes 163 of the first to fourth sub-pixels SP1 to SP4 may be continuously formed on the bank 170, but the present disclosure is not limited thereto.

[0129] That is, the fifth exemplary embodiment of the present disclosure discloses that the second electrode 163 of the first to fourth sub-pixels SP1 to SP4 has a double-layer structure of a top emission type, but is not limited thereto. Specifically, the second electrode 163 may include a first conductive layer 162a made of a conductive material having high transmittance and a second conductive layer 162b made of a transparent conductive material.

[0130] The fifth exemplary embodiment of the present disclosure is a top-emission type display. To improve the light efficiency of the display device, the first electrode 161 of the light-emitting device 160 is formed to include a reflective layer 161b. Specifically, when light generated by the light-emitting layer 162 of the light-emitting device travels toward the lower portion of the display device, the light is reflected by the reflective layer 161b of the first electrode 161. As a result, the path of the light can be changed from the direction of the lower portion of the display device to the direction of the upper portion of the display device. As a result, the amount of light directed toward the upper portion of the display device can be increased, thereby improving the light efficiency of the display device.

[0131] In this case, external light can penetrate from the upper portion of the upper substrate 200 into the interior of the display device. When external light penetrates the first subpixel SP1, the third subpixel SP3, and the fourth subpixel SP4, the external light can be absorbed by the first to third color filters 181 to 183. Specifically, when external light penetrates the red, green, and blue subpixels, the external light can be absorbed by the color filters. However, since the second subpixel SP2, such as the white subpixel, does not include a color filter, the external light can be reflected by the reflective layer 161b of the first electrode 161. Therefore, the reflectivity of the display device to external light can be increased.

[0132] However, the fifth exemplary embodiment of the present disclosure has an effect of reducing or minimizing the reflectivity of the display device to external light by forming the second electrodes 163 of the first to fourth sub-pixels SP1 to SP4 in a double-layered structure.

[0133] Specifically, after passing through the second electrode 163 in the second subpixel SP2, the external light L1 may be reflected by the reflective layer 161b of the first electrode 161. The external light L1 may then pass through the second electrode 163 again. During this process, destructive interference occurs due to the first conductive layer 163a having a high transmittance, and the amount of light L1′ that ultimately passes through the second electrode 163 is reduced compared to the amount of the first incident light L1. Therefore, the reflectivity of the display device with respect to external light can be reduced.

[0134] Furthermore, in order to allow the sub-pixel SP to emit light, the light L2 generated in the light-emitting layer 162 may pass through the first conductive layer 163 a toward the upper substrate 200. In this case, since the first conductive layer 163 a has a high transmittance, even if the light L2 passes through the first conductive layer 163 a, the amount of the light L2 generated in the light-emitting layer 162 may be maintained to a certain extent. Therefore, the reduction of the light generated in the light-emitting layer 162 by the first conductive layer 163 a may be minimized.

[0135] Figure 11 is a cross-sectional view of a pixel P according to a sixth exemplary embodiment of the present disclosure.

[0136] and Figure 10compared to, Figure 11 The substantially same structure is disclosed except for the structure of the second electrode 163 of the first to fourth sub-pixels SP1 to SP4. Figure 10 The same or substantially the same components of the illustrated pixel P are denoted by the same reference numerals, and repeated descriptions are omitted.

[0137] refer to Figure 11 , in addition to the first conductive layer 163a and the second conductive layer 163b, the second electrode 163 of the first sub-pixel SP1 to the fourth sub-pixel SP4 may further include a third conductive layer 163c. The third conductive layer 163c may be provided between the first conductive layer 163a and the light emitting layer 162. The third conductive layer 163c may be provided on the entire area of ​​the light emitting area EA and the non-light emitting area NEA. In addition, the third conductive layer 163c may be formed of a material having high transmittance. For example, the third conductive layer 163c may be formed of a metal oxide. In addition, the third conductive layer 163c may be formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), but is not limited thereto. In addition, the third conductive layer 163c may be a Therefore, when external light penetrates, the influence of destructive interference may increase.

[0138] Figure 12 is a cross-sectional view of a pixel according to a seventh exemplary embodiment of the present disclosure.

[0139] Figure 12 Published in Figure 11 In the sixth embodiment, the structure of the second conductive layer 163b is omitted. That is, the second electrode 163 of the first to fourth subpixels SP1 to SP4 may include a first conductive layer 163a and a third conductive layer 163c. The third conductive layer 163c may be disposed between the first conductive layer 163a and the light emitting layer 162. Furthermore, the first conductive layer 163a may be in contact with the encapsulation layer 190. Therefore, while improving the adhesion between the second electrode 163 and the encapsulation layer 190, destructive interference may be performed when external light penetrates.

[0140] According to the present disclosure, the following advantageous effects can be obtained.

[0141] According to the present disclosure, a plurality of light conversion layers may be formed, so that light efficiency may be improved and reflection due to external light may be reduced.

[0142] The display device according to one or more exemplary embodiments of the present disclosure can be applied to mobile devices, video phones, smart watches, watch phones, wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, curved devices, variable devices, sliding devices, electronic notepads, e-books, portable multimedia players (PMPs), personal digital assistants (PDAs), MP3 players, mobile medical devices, desktop personal computers (PCs), laptop PCs, netbook computers, workstations, navigation devices, car navigation devices, automatic display devices, automotive devices, theater devices, theater display devices, televisions, wallpaper display devices, signage devices, game consoles, laptops, monitors, cameras, camcorders, home appliances, etc., but the embodiments of the present disclosure are not limited thereto.

[0143] Although the exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto and can be implemented in many different forms without departing from the technical concept of the present disclosure. Therefore, the exemplary embodiments of the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are illustrative in all aspects and do not limit the present disclosure. The scope of protection of the present disclosure should be interpreted based on the attached claims, and all technical concepts within their equivalent scope should be interpreted as falling within the scope of the present disclosure.

[0144] CROSS-REFERENCE TO RELATED APPLICATIONS

[0145] This application claims priority to and the benefit of Korean Patent Application No. 10-2024-0030215, filed on February 29, 2024, which is hereby incorporated by reference as if fully set forth herein.

Claims

1. A display device, comprising: a substrate on which a first sub-pixel and a second sub-pixel are provided, each of the first sub-pixel and the second sub-pixel including a light-emitting area and a non-light-emitting area surrounding the light-emitting area; Each of the first sub-pixel and the second sub-pixel includes a first electrode disposed in the light-emitting region, a light-emitting layer disposed on the first electrode, and a second electrode disposed on the light-emitting layer. The first subpixel emits light of a first color different from the light emitted by the second subpixel, and the second subpixel emits white light, and The structure of the first electrode of the first sub-pixel is different from the structure of the first electrode of the second sub-pixel.

2. The display device according to claim 1, wherein The light of the first color includes any one of red light, green light and blue light.

3. The display device according to claim 1, wherein The first electrode of the first sub-pixel includes a transparent conductive layer, The first electrode of the second sub-pixel includes a first conductive layer and a second conductive layer disposed on the first conductive layer, and The transmittance of the second conductive layer is greater than or equal to the transmittance of the first conductive layer.

4. The display device according to claim 3, wherein The first conductive layer includes a metal oxide, and the second conductive layer includes a transparent conductive material.

5. The display device according to claim 3, wherein The first electrode of the second sub-pixel further includes a third conductive layer, which is disposed on a lower surface of the first conductive layer and includes a transparent conductive material.

6. The display device according to claim 4 or 5, wherein: The first conductive layer is disposed on the entire surface of the light emitting region of the second sub-pixel, and The second conductive layer is disposed on the entire surface of the light emitting region of the second sub-pixel and covers the upper surface of the first conductive layer.

7. The display device according to claim 3, wherein: The first conductive layer has a ring shape surrounding an edge of a light emitting area of ​​the second sub-pixel, and The second conductive layer is disposed on the entire surface of the light emitting region of the second sub-pixel and covers the upper surface and inner side surfaces of the first conductive layer.

8. The display device according to claim 7, wherein: The second conductive layer covers the upper surface and the inner side surface of the first conductive layer and the upper surface of the planarization layer exposed by the first conductive layer.

9. The display device according to claim 7, wherein: The first electrode of the second sub-pixel further includes a fourth conductive layer disposed between the first conductive layer and the second conductive layer, and the fourth conductive layer has a shape corresponding to that of the first conductive layer.

10. The display device according to claim 9, wherein The fourth conductive layer has a higher reflectivity than the first conductive layer and the second conductive layer.

11. The display device according to claim 3, wherein The first conductive layer includes a plurality of regions spaced apart from each other in the light emitting area of ​​the second sub-pixel, and The second conductive layer is disposed on the entire light emitting region of the second sub-pixel and covers upper surfaces of the plurality of regions of the first conductive layer.

12. The display device according to claim 1, wherein The first sub-pixel includes any one of: a red color filter, a green color filter, and a blue color filter disposed under the first electrode.

13. The display device according to claim 1 , further comprising a third sub-pixel disposed on the substrate and emitting light different from light emitted by the first sub-pixel. in, The third sub-pixel emits any one of red light, green light and blue light, The structure of the first electrode of the third sub-pixel is the same as the structure of the first electrode of the first sub-pixel, and The structure of the first electrode of the third sub-pixel is different from the structure of the first electrode of the second sub-pixel.

14. The display device according to claim 13, further comprising a fourth sub-pixel disposed on the substrate and emitting light different from light emitted by the first sub-pixel and the third sub-pixel. in, The fourth sub-pixel emits any one of red light, green light and blue light, The structure of the first electrode of the fourth sub-pixel is the same as the structure of the first electrode of the first sub-pixel, and The structure of the first electrode of the fourth sub-pixel is different from the structure of the first electrode of the second sub-pixel.

15. A display device, comprising: a substrate on which a plurality of sub-pixels are arranged, wherein the plurality of sub-pixels include a light-emitting area and a non-light-emitting area surrounding the light-emitting area; Each of the plurality of sub-pixels includes a first electrode disposed in the light-emitting region, a light-emitting layer disposed on the first electrode, and a second electrode disposed on the light-emitting layer. The second electrode includes a first conductive layer and a second conductive layer disposed on the first conductive layer, and The transmittance of the second conductive layer is different from the transmittance of the first conductive layer.

16. The display device according to claim 15, wherein The transmittance of the second conductive layer is greater than or equal to the transmittance of the first conductive layer.

17. The display device according to claim 16, wherein: The first conductive layer includes a metal oxide, and the second conductive layer includes a transparent conductive material.

18. The display device according to claim 17, wherein: The second electrode further includes a third conductive layer disposed below the first conductive layer, and the third conductive layer includes a metal oxide.

19. The display device according to claim 18, wherein The second electrode includes the first conductive layer and the third conductive layer disposed below the first conductive layer, without the second conductive layer.

20. The display device according to claim 15, wherein The transmittance of the first conductive layer is greater than or equal to the transmittance of the second conductive layer.

21. The display device according to claim 20, wherein The first conductive layer includes a transparent conductive material, and the second conductive layer includes a metal oxide.

22. The display device according to claim 15, wherein The plurality of sub-pixels include a first sub-pixel and a second sub-pixel, and The first sub-pixel emits any one of red light, green light, and blue light, and the second sub-pixel emits white light.

23. The display device according to claim 22, wherein: The first sub-pixel includes any one of: a red color filter, a green color filter, and a blue color filter disposed on the second electrode.

24. The display device according to claim 15, wherein The first electrode includes a first transparent conductive layer, a reflective layer disposed on the first transparent conductive layer, and a second transparent conductive layer disposed on the reflective layer.

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