Microresonator and method for manufacturing a microresonator

Abstract

The embodiment of the present application provides a kind of micro resonator and the preparation method of micro resonator, the micro resonator can be connected using MIM flat plate capacitor and planar coil structure inductance, the upper and lower electrodes of MIM flat plate capacitor, inductance and the microstrip line of connecting capacitance and inductance are prepared using superconducting material, and the dielectric layer of MIM flat plate capacitor can be prepared using ALD technology, the dielectric film grown by ALD technology is not only very dense, also have good thickness uniformity, and can realize higher dielectric constant, combined with the zero resistance characteristics of superconducting material, the quality factor of micro resonator can be significantly improved, and the miniaturization of micro resonator can be realized.And in the preparation process, by first depositing to form three-layer film for forming capacitance and inductance, then layer by layer to three-layer film is patterned, can avoid introducing too much impurity, can optimize interlayer contact, reduce the risk of electric leakage.

Description

Technical Field

[0001] This application relates to the fields of integrated electronic device technology and superconducting electronic technology, and more specifically, to a microresonator and a method for fabricating the microresonator. Background Technology

[0002] Resonators are widely used in superconducting electronics, such as in quantum computing, SQUID frequency division multiplexing readout, microwave dynamic inductive detectors (MKID), and various cryogenic radio frequency systems. These applications often place higher demands on resonator performance, requiring higher quality factors, higher frequency accuracy, smaller size, and cryogenic stability. Traditional resonators mostly employ structures such as quarter-wavelength resonant cavities, interdigitated capacitors, and coplanar waveguide inductors. These resonators suffer from problems such as large structural size, insufficient quality factors, and poor performance in low-frequency, high-sensitivity applications, thus failing to meet the requirements of the aforementioned applications. Summary of the Invention

[0003] In view of this, this application provides a microresonator and a method for fabricating the microresonator.

[0004] According to a first aspect of this application, a microresonator is provided, the microresonator comprising:

[0005] A capacitor comprising a lower superconducting electrode on a substrate, an upper superconducting electrode parallel to the lower superconducting electrode, and a dielectric layer between the lower superconducting electrode and the upper superconducting electrode, wherein the dielectric layer is prepared by atomic layer deposition.

[0006] An inductor located on the substrate, wherein the inductor is a superconducting planar coil;

[0007] An insulating layer covering the capacitor and the inductor, and the insulating layer including vias for exposing at least a portion of the capacitor and at least a portion of the inductor;

[0008] A superconducting microstrip line, which covers the insulating layer and connects the capacitor and the inductor through the via.

[0009] According to a second aspect of this application, a method for fabricating a microresonator is provided, the method comprising:

[0010] Deposit a lower superconducting thin film on the substrate;

[0011] A dielectric layer film is deposited on the lower superconducting film to cover at least a portion of the lower superconducting film;

[0012] An upper superconducting film is deposited on the dielectric layer film to cover at least a portion of the dielectric layer film;

[0013] The upper superconducting thin film, the dielectric thin film, and the lower superconducting thin film are patterned layer by layer to form the capacitor and inductor of the microresonator. The upper superconducting thin film forms the upper electrode of the capacitor after patterning, the dielectric thin film forms the dielectric layer of the capacitor after patterning, and the lower superconducting thin film forms the lower electrode of the capacitor and the inductor after patterning.

[0014] An insulating layer is deposited on the capacitor and the inductor;

[0015] The insulating layer is etched to form vias in the insulating layer, the vias being used to expose at least a portion of the capacitor and at least a portion of the inductor;

[0016] A superconducting microstrip thin film is deposited on the insulating layer, the superconducting microstrip thin film being used to connect the capacitor and the inductor through the via.

[0017] Applying the solution provided in this application, this embodiment provides a microresonator, which can be obtained by connecting a MIM parallel plate capacitor and an inductor of a planar coil structure. The upper and lower electrodes of the MIM parallel plate capacitor, the inductor, and the microstrip line connecting the capacitor and the inductor can all be made of superconducting materials. The dielectric layer of the MIM parallel plate capacitor can be prepared by ALD (Atomic Layer Deposition) technology. The dielectric film grown by ALD technology has good density and thickness uniformity, and can achieve a high dielectric constant. Combined with the zero resistance characteristics of superconducting materials, it can significantly improve the quality factor of the microresonator and realize the miniaturization of the microresonator.

[0018] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not limit this application. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 and Figure 2 This is a schematic diagram of a microresonator according to an embodiment of this application.

[0021] Figure 3 This is a schematic diagram of the fabrication process of a microresonator according to an embodiment of this application.

[0022] Figure 4 This is a schematic diagram of the fabrication process of a microresonator according to another embodiment of this application.

[0023] Figure 5 This is a schematic diagram of a microresonator chip according to an embodiment of this application. Detailed Implementation

[0024] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0025] A resonator is a physical device capable of generating and maintaining oscillations at a specific frequency. It achieves periodic oscillations by storing and releasing energy and is an indispensable key component in many modern technologies. The core characteristic of a resonator is its resonant frequency (f0), which is the frequency at which the system can generate the maximum oscillation amplitude. When the system is subjected to external excitation (such as voltage, current, force, sound waves, etc.), if the excitation frequency is close to the system's resonant frequency, the system will enter a resonant state, at which point the oscillation amplitude will increase significantly.

[0026] Quality factor (Q factor) and sensitivity are key parameters for evaluating resonator performance. The Q factor reflects the ratio of stored energy to dissipated energy near the resonant frequency. A higher Q factor indicates lower energy loss, better frequency selectivity, and more stable performance.

[0027] Sensitivity refers to the degree to which a resonator responds to changes in the input signal. It is usually used to describe the resonator's ability to detect small changes in the signal. Sensitivity is generally positively correlated with the quality factor, that is, the higher the quality factor, the higher the sensitivity.

[0028] In applications such as quantum computing, superconducting quantum interference devices (SQUIDs), microwave dynamic inductive detectors (MKIDs), and various cryogenic radio frequency systems, the performance requirements for resonators are often higher. For example, resonators are required to have higher quality factors, higher frequency accuracy, higher sensitivity, and smaller size. Traditional resonators mostly employ structures such as quarter-wavelength resonant cavities, interdigitated capacitors, and coplanar waveguide inductors. These structures typically suffer from large size, insufficient quality factors, and poor performance in low-frequency, high-sensitivity applications, making them unsuitable for the demands of these applications.

[0029] To obtain a high-quality factor and miniaturized resonator for use in quantum computing, superconducting quantum interference devices (SQUID), microwave dynamic inductive detectors (MKID), and other applications, this application provides a microresonator. This microresonator can be obtained by connecting a MIM (Metal-Insulated Panel) capacitor and a planar coil structure with an inductor. The upper and lower electrodes of the MIM capacitor, the inductor, and the microstrip line connecting the capacitor and inductor can all be fabricated using superconducting materials. Furthermore, the dielectric layer of the MIM capacitor can be fabricated using ALD (Atomic Layer Deposition) technology. ALD-grown dielectric films exhibit excellent density and thickness uniformity, and can achieve a high dielectric constant. Combined with the zero-resistance characteristics of superconducting materials, this significantly improves the quality factor of the microresonator and enables miniaturization.

[0030] The following combination Figure 1 and Figure 2 The microresonator of the present application embodiment is described below. The microresonator provided in the present application embodiment is an LC microresonator. The microresonator includes a capacitor 10 and an inductor 20, an insulating layer 30 covering the surface of the capacitor 10 and the inductor 20, and a superconducting microstrip line 40 for realizing the electrical connection between the capacitor 10 and the inductor 20.

[0031] Capacitor 10 can be a MIM (Metal-Insulator-Metal) parallel-plate capacitor. Capacitor 10 includes a lower superconducting electrode 101 located on substrate 50, an upper superconducting electrode 102 parallel to the lower superconducting electrode 101, and a dielectric layer 103 located between the lower and upper superconducting electrodes 101 and 102. The substrate 50 can be made of an insulating material, and the upper and lower superconducting electrodes 101 can be thin films made of superconducting materials. Utilizing the zero-resistance characteristic of superconducting materials can improve the quality factor of the microresonator.

[0032] In related technologies, sputtering or chemical vapor deposition (CVD) processes are mostly used to prepare the dielectric layer 103 of the MIM capacitor 10. However, dielectric layers 103 prepared by these processes often suffer from poor thickness uniformity and high defect density, leading to significant leakage current. Especially in superconducting applications, when the upper and lower electrodes of the capacitor 10 are made of superconducting materials, interface problems arise between the superconducting material and the dielectric layer 103, and the performance of the dielectric layer 103 degrades, further exacerbating leakage current and severely impacting the quality factor and operational reliability of the microresonator. Furthermore, dielectric layers 103 grown using sputtering or CVD processes have low dielectric constants and low capacitance density. To achieve the desired capacitance value, a large area is often required, resulting in a large microresonator size and limiting the number of microresonators that can be integrated.

[0033] To obtain a microresonator with a small size and high quality factor, the dielectric layer 103 in this embodiment can be prepared using ALD (Alternating Discharge) technology. ALD is an advanced thin film fabrication technique that enables precise control of thin film growth at the nanoscale. ALD achieves atomic-level precision thin film deposition by alternately introducing gaseous precursors and reactants. Because ALD can achieve atomic-level precision thin film deposition, the prepared dielectric film exhibits good thickness uniformity and low defect density. This optimizes the interfacial contact between the superconducting electrode and the dielectric layer 103, significantly reducing leakage current and improving the quality factor. Furthermore, the atomic-level precision control of ALD ensures the uniformity of the dielectric layer 103's thickness, thereby reducing resonant frequency deviation and ensuring the microresonator's center frequency matches the design value. Moreover, for the same material, dielectric films prepared using ALD can achieve a higher dielectric constant, thus reducing the size of the microresonator.

[0034] The inductor 20 is located on the insulating substrate 50 and can be a planar coil structure. Similarly, to improve the quality factor of the microresonator, the inductor 20 can also be fabricated using superconducting materials.

[0035] An insulating layer 30 can cover the surfaces of capacitor 10 and inductor 20 to protect them. The insulating layer 30 can be made of insulating materials such as SiO2 or Si3N4. To achieve electrical connection between capacitor 10 and inductor 20, the insulating layer 30 includes vias 301. These vias expose at least a portion of capacitor 10 and at least a portion of inductor 20, allowing superconducting microstrip lines 40 to contact the exposed capacitor 10 and inductor 20, thereby achieving electrical connection. The vias 301 can be formed by etching the insulating layer 30. The number and location of the vias can be flexibly set based on actual needs. For example, the via 301 exposing capacitor 10 can be located on the upper electrode or the lower electrode of capacitor 10; this embodiment does not impose any limitations. The number of vias 301 exposing inductor 20 can be one or more; this embodiment also does not impose any limitations.

[0036] For example, in some embodiments, vias 1 for exposing at least a portion of the lower superconducting electrode 101 of capacitor 10, vias 2 for exposing at least a portion of the upper superconducting electrode 102 of capacitor 10, and vias 3 for exposing at least a portion of inductor 20 can be etched in the insulating layer. The connection between capacitor and inductor can be formed through vias 1 and 2, and the connection between microresonator and external device can be realized through vias 3.

[0037] The superconducting microstrip line 40 is used to realize the electrical connection between the capacitor 10 and the inductor 20. The superconducting microstrip line 40 covers the insulating layer 30 and contacts the capacitor 10 and the inductor 20 exposed from the via 301 so that the electrical connection between the capacitor 10 and the inductor 20 can be realized through the via 301.

[0038] The superconducting microstrip line 40 can be a thin film made of superconducting material. By utilizing the zero resistance characteristic of superconducting material, the quality factor of the microresonator can be improved.

[0039] In some scenarios, it is often necessary to connect multiple microresonators to achieve frequency division multiplexing. To achieve electrical connection between different microresonators, in some embodiments, the superconducting microstrip line 40 is also used to connect different microresonators through the via 301 to achieve frequency division multiplexing. In some embodiments, the upper superconducting electrode 102, the lower superconducting electrode 101, the inductor 20, and the superconducting microstrip line 40 can be fabricated using the same superconducting material, for example, all can be fabricated using Nb. The operating temperature of the microresonator can be lower than the critical temperature of the superconducting material, so that the upper and lower electrodes of the capacitor 10, the inductor 20, and the superconducting microstrip line 40 are all in a superconducting state.

[0040] In some embodiments, at least a portion of the upper superconducting electrode 102, lower superconducting electrode 101, inductor 20, and superconducting microstrip line 40 may be fabricated using different superconducting materials. For example, the upper and lower superconducting electrodes 101 of capacitor 10 may be fabricated using superconducting material A, inductor 20 may be fabricated using superconducting material B, and superconducting microstrip line 40 may be fabricated using superconducting material C. In this case, the operating temperature of the microresonator may be lower than the lowest critical temperature among the critical temperatures of the different superconducting materials, so that the electrodes of capacitor 10, inductor 20, and superconducting microstrip line 40 are all in a superconducting state.

[0041] In some embodiments, the superconducting materials used to fabricate the upper and lower electrodes of the capacitor 10, the inductor 20, and the superconducting microstrip line 40 may include one or more of the following: Nb, Al, Ta, NbN, YBCO, Ti, Pb, and Ni. Of course, the above are merely exemplary examples, and the solutions in this application embodiment can be applied to all superconducting materials, and are not limited to the superconducting materials listed above.

[0042] In practical applications, suitable superconducting materials can be flexibly selected based on the operating temperature of the microresonator and the critical temperature of the superconducting material.

[0043] In some embodiments, to simplify the process and improve fabrication efficiency, the lower superconducting electrode 101 and the inductor 20 can be prepared by etching the same superconducting thin film deposited on the substrate 50. For example, a superconducting thin film can be deposited on the substrate 50 and then etched to obtain the lower superconducting electrode 101 of the capacitor 10 and the inductor 20. This fabrication method not only simplifies the process and improves fabrication efficiency, but also enables higher integration density to reduce the size of the microresonator.

[0044] In some embodiments, the superconducting microstrip line 40 is a superconducting thin film deposited on the insulating layer 30. For example, after depositing the insulating layer 30 on the capacitor 10 and the inductor 20, the insulating layer 30 can be etched to form a via 301. Then, a superconducting thin film can be further deposited on the insulating layer 30. This superconducting thin film can serve as a conductor, contacting the capacitor and inductor through the formed via 301 to achieve electrical connection between the capacitor 10 and the inductor 20, or to connect the microresonator to external devices (e.g., electrically connect different microresonators).

[0045] The working principle of a MIM parallel-plate capacitor is based on the storage of an electric field in the dielectric layer. When a voltage is applied between the upper and lower electrodes, an electric field is formed in the dielectric layer, and charges accumulate on the surfaces of the electrodes, thus forming a capacitor. Its capacitance value C can be calculated using the following formula:

[0046] C = ε·A / d

[0047] in:

[0048] ε is the dielectric constant of the dielectric layer; A is the area of ​​the electrode; and d is the thickness of the dielectric layer.

[0049] It is evident that, given a fixed dielectric layer thickness, to obtain a higher capacitance value, either the electrode area must be increased or the dielectric constant of the dielectric layer must be increased. To reduce the size of the microresonator, the dielectric layer can be fabricated using materials with high dielectric constants that can be deposited using the ALD process.

[0050] In some embodiments, the material of the dielectric layer 103 may include one or more of the following: HfO2, Al2O3, TiO2, ZrO2, and Si3N4. Of course, the above are merely exemplary examples, and the material of the dielectric layer in this embodiment can be any material that can be processed using the ALD process, and is not limited to the materials listed above. In practical applications, a dielectric layer with a suitable dielectric constant can be selected based on the requirements for the microresonator size.

[0051] The microresonator provided in this application has a wide range of applicable frequency bands. In some embodiments, the operating frequency band of the microresonator is 0.1MHz to 1GHz. This microresonator can be used for frequency division multiplexing (FDM) readout in superconducting quantum interference devices (SQUIDs), and can also be used in quantum computing, high-sensitivity magnetic field detectors, microwave dynamic inductance detectors, Josephson parametric amplifiers, and various cryogenic radio frequency systems, and it exhibits good performance in all these application scenarios.

[0052] When fabricating MIM parallel plate capacitor 10, the traditional fabrication process is usually bottom-up "deposition-patterning-redeposition". The cyclical layer-by-layer patterning requires multiple exposures to the atmospheric environment, which introduces more pollution or damage. This may lead to the introduction of more impurities between the upper and lower electrodes of capacitor 10 and dielectric layer 103, or defects between the contact interfaces, which aggravates the leakage current problem of dielectric layer 103. For scenarios where the upper and lower electrodes of capacitor 10 use superconducting materials, the leakage problem is even more obvious.

[0053] To mitigate the aforementioned problems, in some embodiments, the fabrication process of the MIM parallel plate capacitor 10 can be optimized, for example, as follows: Figure 3As shown, in fabricating the capacitor 10 and inductor 20 of the microresonator, a lower superconducting thin film can be deposited on the substrate 50 first, followed by a dielectric thin film deposited on top of the lower superconducting thin film to cover at least a portion of the lower superconducting thin film, and then an upper superconducting thin film deposited on top of the dielectric thin film to cover at least a portion of the dielectric thin film. After depositing and forming the three-layer film of "lower superconducting thin film - dielectric thin film - upper superconducting thin film", the upper superconducting thin film, the dielectric thin film, and the upper superconducting thin film can be patterned layer by layer to form the capacitor 10 and inductor 20 of the microresonator. Specifically, the upper superconducting thin film, after patterning, forms the upper electrode of the capacitor 10; the dielectric thin film, after etching and patterning, forms the dielectric layer 103 of the capacitor 10; and the lower superconducting thin film, after patterning, forms the lower electrode of the capacitor 10 and the inductor 20. In this embodiment, by first depositing a three-layer thin film for preparing capacitor 10 and inductor 20, and then patterning the three-layer thin film layer by layer, the number of times each layer is exposed to the environment can be reduced, avoiding the introduction of too many impurities. This can optimize interlayer contact, reduce the risk of leakage, and the lower electrode of capacitor 10 and inductor 20 can be prepared by depositing the same superconducting thin film, which can simplify the process, improve the preparation efficiency, and make the microresonator have higher integration and facilitate miniaturization.

[0054] In some embodiments, after the capacitor 10 and inductor 20 are fabricated, an insulating layer 30 may be further deposited on the capacitor 10 and inductor 20, and the insulating layer 30 may be etched to form a via 301 on the insulating layer 30. The via 301 exposes at least a portion of the capacitor 10 and at least a portion of the inductor 20, so as to achieve an electrical connection between the capacitor 10 and the inductor 20 through the via 301. A superconducting thin film may then be deposited on the insulating layer 30. This superconducting thin film serves as a superconducting microstrip line 40, which can contact the capacitor 10 and inductor 20 exposed from the via 301, thereby achieving an electrical connection between the capacitor 10 and the inductor 20. Simultaneously, the superconducting thin film can also achieve an electrical connection with external devices through the via 301.

[0055] The capacitor and inductor can be connected in series or in parallel. The specific connection method can be flexibly set according to actual needs, and the embodiments of this application do not impose any restrictions.

[0056] In fabricating the MIM parallel plate capacitor 10, the traditional fabrication process is typically a bottom-up "deposition-patterning-redeposition" process. This cyclical layer-by-layer patterning requires repeated exposure to the atmospheric environment, introducing significant contamination or damage. This can lead to the introduction of numerous impurities between the upper and lower electrodes of the capacitor 10 and the dielectric layer 103, or defects at the contact interface, exacerbating leakage current issues in the dielectric layer 103. For scenarios where the upper and lower electrodes of the capacitor 10 use superconducting materials, the leakage problem is even more pronounced. Therefore, if the above-mentioned process is used to fabricate the capacitor 10 of the microresonator, it usually results in a poor quality factor for the microresonator, failing to meet the requirements of some scenarios with high quality factor requirements.

[0057] Based on this, this application embodiment also provides a method for fabricating a micro resonator. By optimizing the fabrication process of capacitor 10, impurities and defects at the contact interface between the upper and lower electrodes and the dielectric layer 103 are reduced. By optimizing the interlayer contact, leakage current problems are reduced, the quality factor of the micro resonator is improved, and the stability of the process is also improved.

[0058] like Figure 3 As shown, the method includes the following steps:

[0059] (1) Deposit a lower superconducting thin film on substrate 50;

[0060] For example, a superconducting thin film can be deposited on the insulating substrate 50 to form the lower electrode of the capacitor 10 and the inductor 20. The specific deposition method can be sputtering, CVD (Chemical Vapor Deposition), or ALD process, and the embodiments of this application are not limited thereto.

[0061] In some embodiments, the material of the superconducting thin film may include one or more of the following: Nb, Al, Ta, NbN, YBCO, Ti, Pb, and Ni. Of course, the above are merely exemplary examples, and the solutions of this application embodiment can be applied to all superconducting materials, and are not limited to the superconducting materials listed above.

[0062] (2) A dielectric layer film is deposited on the lower superconducting film to cover at least a portion of the lower superconducting film;

[0063] A dielectric film can then be deposited on top of the underlying superconducting film. To reduce the size of the microresonator, the dielectric layer 103 can be made of a material with a high dielectric constant. For example, in some embodiments, the material of the dielectric layer 103 may include one or more of the following: HfO2, Al2O3, TiO2, ZrO2, and Si3N4. Of course, the above are merely exemplary examples, and the dielectric layer in this application is not limited to the materials listed above.

[0064] (3) Deposit an upper superconducting film on the dielectric layer film to cover at least a portion of the dielectric layer film;

[0065] After the dielectric layer 103 is deposited, an upper superconducting thin film can be deposited on the dielectric layer to form the upper electrode of the capacitor 10. The specific deposition method can be sputtering, CVD, or ALD; this embodiment does not impose any limitations.

[0066] In some embodiments, the material of the superconducting thin film may include one or more of the following: Nb, Al, Ta, NbN, YBCO, Ti, Pb, and Ni. Of course, the above are merely exemplary examples, and the solutions of this application embodiment can be applied to all superconducting materials, and are not limited to the superconducting materials listed above.

[0067] (4) The upper superconducting thin film, the dielectric thin film, and the lower superconducting thin film are image-processed layer by layer to form the capacitor 10 and the inductor 20 of the micro-resonator. The upper superconducting thin film forms the upper electrode of the capacitor 10 after image processing, the dielectric thin film forms the dielectric layer 103 of the capacitor 10 after image processing, and the lower superconducting thin film forms the lower electrode of the capacitor 10 and the inductor 20 after image processing.

[0068] After depositing the three-layer film consisting of an upper superconducting film, a dielectric film, and a lower superconducting film, each layer can be patterned to obtain the desired shape and pattern. For example, the lower superconducting film can be processed by photolithography and etching to form the inductor 20 with a planar coil structure and the lower electrode of the capacitor 10.

[0069] (5) An insulating layer 30 is deposited on the capacitor 10 and the inductor 20;

[0070] After obtaining capacitor 10 and inductor 20, an insulating layer 30 can be deposited on capacitor 10 and inductor 20 to protect capacitor 10 and inductor 20 and avoid leakage risk. The insulating layer 30 can be made of insulating materials such as SiO2 and Si3N4, and the specific deposition method can be sputtering, CVD process, or ALD process. This application embodiment does not limit the method.

[0071] (6) The insulating layer 30 is etched to form a via 301 on the insulating layer 30, the via 301 being used to expose at least a portion of the capacitor 10 and at least a portion of the inductor 20;

[0072] To achieve an electrical connection between capacitor 10 and inductor 20, insulating layer 30 can be etched to form vias in insulating layer 30 to expose at least a portion of capacitor 10 and at least a portion of inductor 20.

[0073] (7) A superconducting microstrip line 40 thin film is deposited on the insulating layer 30, the superconducting microstrip line 40 thin film being used to connect the capacitor 10 and the inductor 20 through the via 301.

[0074] After forming vias on the insulating layer 30, a superconducting thin film can be further deposited on the insulating layer 30 as a conductor connecting the capacitor 10 and the inductor 20. This superconducting thin film can contact the capacitor 10 and the inductor 20 exposed from the via 301 to connect them. Simultaneously, the superconducting thin film can also be connected to external devices through the via 301.

[0075] The capacitors and inductors can be connected in series or in parallel, and the specific connection method can be flexibly set according to actual needs. This application embodiment does not impose any restrictions. The specific deposition method can be sputtering, CVD process, or ALD process. This application embodiment does not impose any restrictions.

[0076] In some embodiments, the material used to form the superconducting thin film of the microstrip line may include one or more of the following: Nb, Al, Ta, NbN, YBCO, Ti, Pb, and Ni. Of course, the above are merely exemplary examples, and the solutions of this application embodiment can be applied to all superconducting materials, and are not limited to the superconducting materials listed above. In some embodiments, in order to obtain a dielectric layer 103 with uniform thickness and low defect density to improve the quality factor of the microresonator, the dielectric layer 103 may be prepared using ALD technology.

[0077] In some embodiments, in order to achieve frequency division multiplexing by connecting different microresonators in series, the superconducting microstrip line 40 thin film is also used to connect different microresonators through the via 301.

[0078] In this embodiment, to avoid introducing excessive impurities between layers when fabricating capacitor 10 and inductor 20, a three-layer thin film (lower superconducting film, dielectric film, and upper superconducting film) is first deposited on substrate 50, and then patterned layer by layer. During the layer-by-layer patterning process, to avoid damaging the next layer during etching, an ICP etching process can be used to etch the upper superconducting film, dielectric film, and lower superconducting film layer by layer. When selecting the etching gas for each layer, the etching gas should meet the following characteristics: it should be able to etch the current layer but not the next layer. This ensures that the etching process of the current layer does not damage the next layer.

[0079] For example, the type of etching gas can be flexibly selected based on the material of the current layer. For instance, if the dielectric layer is made of HfO2 and AL2O3, the etching gas can be a mixture of Cl2 and BCl3. If the superconducting thin film is made of Nb, the etching gas can be SF6.

[0080] The microresonator and its fabrication method of this application are described below with reference to a specific embodiment.

[0081] To fabricate microresonators with high quality factors that can be used in low-temperature environments, this paper presents an on-chip LC microresonator with a high quality factor based on superconducting coils, superconducting electrodes, and atomic layer deposition (ALD) high-dielectric-constant dielectric, along with its fabrication method. Through innovations in structural design, material selection, and process optimization, the high quality factor, miniaturization, high integration, and stable low-temperature performance of the microresonator are achieved.

[0082] (1) Structural design of micro resonators

[0083] The microresonator is formed by connecting a MIM parallel-plate capacitor and a planar coil inductor 20 in series. The upper and lower electrodes of the capacitor 10 are made of Nb thin film, and the dielectric layer 103 is an HfO2 thin film grown using ALD technology with a thickness of 20 nm. The inductor 20 is also made of Nb. After the capacitor 10 and inductor 20 are patterned, a SiO2 protective layer is fabricated on the device surface. Vias 301, formed by etching, and Nb microstrip lines deposited on the protective layer are used to connect the capacitor 10 and inductor 20, forming a series microresonator. Furthermore, different microresonators can be connected in series through the etched vias 301 and Nb microstrip lines to construct a microresonator array.

[0084] This microresonator can be used to fabricate a microresonator chip including a microresonator array. The capacitor 10 in the microresonator array has a size ranging from 8μm to 1mm. This microresonator chip can be loaded into a dilution refrigerator and operates at a temperature of less than 8K.

[0085] (2) Fabrication process of micro resonators

[0086] This embodiment proposes an innovative fabrication process for microresonators, strictly controlling the process conditions of superconducting and dielectric thin films to reduce interlayer impurities. For example... Figure 4 As shown, the process flow consists of the following key steps:

[0087] First, an Nb superconducting thin film is sputtered and grown on an insulating substrate 50 to serve as the base material for capacitor 10 and also as the layer containing the coil structure of inductor 20. This step requires ensuring uniform film thickness and low roughness. Next, an HfO2 thin film is grown on the substrate using ALD technology. ALD technology offers atomically precise film growth capabilities; by strictly controlling the cleanliness and process parameters of the ALD equipment, a dielectric layer 103 with uniform thickness and few defects can be obtained. Then, an Nb superconducting thin film is grown on the dielectric layer 103 to serve as the top plate of capacitor 10. The sputtering power and gas pressure are controlled to manage the energy of the target atoms, forming a good interfacial contact with the dielectric layer 103 while avoiding damage to the dielectric layer 103.

[0088] After completing the thin film deposition of the capacitor 10 base plate layer (also the inductor 20 layer), dielectric layer 103, and capacitor 10 top plate layer, a photolithography-etching process was used for patterning. First, the upper electrode of capacitor 10 was patterned, then the dielectric layer 103 was patterned, and finally the base plate of capacitor 10 and the coil of inductor 20 were patterned. The etching process was ICP dry etching, and the gas used to etch dielectric layer 103 was a Cl-based gas. During the etching process, process parameters such as gas flow rate and RF power were adjusted to avoid damage to the underlying structure and the introduction of impurities. Next, a SiO2 protective layer was sputtered onto the completed capacitor 10 and inductor 20 structures, and photolithography-etching was used to form vias for electrical connections. Finally, an Nb conductive layer was sputtered, and the same photolithography-etching process was performed on this layer. The Nb conductive layer is used to connect capacitor 10 and inductor 20, and wiring was designed to form a micro-resonator array. Figure 5 Photograph of a microresonator chip used for SQUID frequency division multiplexing readout.

[0089] The microresonator in this embodiment has the following advantages:

[0090] (1) High dielectric constant dielectric is beneficial to reduce the size of the capacitor in the design, resulting in a compact structure. It can realize more micro resonators on a limited chip area, which can meet the needs of array applications.

[0091] (2) The film thickness of ALD growth is uniform and the resonant frequency deviation is small, which can ensure that the center frequency of the micro-resonator on the whole chip meets the design value.

[0092] (3) The microfabrication process proposed in this embodiment can optimize interlayer contact and reduce interlayer impurities, thereby reducing the risk of leakage of capacitor 10 and improving the quality factor.

[0093] (4) The structure of capacitor 10 and inductor 20 is prepared by an optimized photolithography-etching process, which can improve the yield and adapt to the on-chip integration of large-scale superconducting integrated circuits.

[0094] The solutions in the above embodiments can be freely combined to obtain new solutions when there is no conflict. Due to space limitations, they will not be listed one by one here.

[0095] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. The terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0096] The methods and apparatus provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand the methods and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this application should not be construed as a limitation of this application.

Claims

1. A microresonator, characterized in that, The microresonator includes: A capacitor comprising a lower superconducting electrode on a substrate, an upper superconducting electrode parallel to the lower superconducting electrode, and a dielectric layer between the lower superconducting electrode and the upper superconducting electrode, wherein the dielectric layer is prepared by atomic layer deposition. An inductor located on the substrate, wherein the inductor is a superconducting planar coil; An insulating layer covering the capacitor and the inductor, and the insulating layer including vias for exposing at least a portion of the capacitor and at least a portion of the inductor; A superconducting microstrip line, which covers the insulating layer and connects the capacitor and the inductor through the via.

2. The microresonator according to claim 1, characterized in that, The superconducting microstrip line is also used to connect different microresonators to each other through the vias to achieve frequency division multiplexing.

3. The microresonator according to claim 1, characterized in that, The upper superconducting electrode, the lower superconducting electrode, the inductor, and the superconducting microstrip line are all fabricated using the same superconducting material, and the operating temperature of the microresonator is lower than the critical temperature of this superconducting material; or At least a portion of the upper superconducting electrode, the lower superconducting electrode, the inductor, and the superconducting microstrip line are made of different superconducting materials, and the operating temperature of the microresonator is lower than the lowest critical temperature among the critical temperatures of the different superconducting materials.

4. The microresonator according to claim 3, characterized in that, The superconducting material includes one or more of the following: Nb, Al, Ta, NbN, YBCO, Ti, Pb, Ni.

5. The microresonator according to claim 1, characterized in that, The lower superconducting electrode and the inductor are prepared by etching the same superconducting thin film deposited on the substrate; and / or The superconducting microstrip line is a superconducting thin film deposited on the insulating layer.

6. The microresonator according to claim 1, characterized in that, The dielectric layer is made of one or more of the following materials: HfO2, Al2O3, TiO2, ZrO2, Si3N4; and / or The microresonator operates in the frequency range of 0.1MHz to 1GHz.

7. The microresonator according to claim 1, characterized in that, The microresonator is prepared by the following method: Deposit a lower superconducting thin film on the substrate; A dielectric layer film is deposited on the lower superconducting film to cover at least a portion of the lower superconducting film; An upper superconducting film is deposited on the dielectric layer film to cover at least a portion of the dielectric layer film; The upper superconducting thin film, the dielectric thin film, and the lower superconducting thin film are patterned layer by layer to form the capacitor and inductor of the microresonator. The upper superconducting thin film forms the upper electrode of the capacitor after patterning, the dielectric thin film forms the dielectric layer of the capacitor after patterning, and the lower superconducting thin film forms the lower electrode of the capacitor and the inductor after patterning. An insulating layer is deposited on the capacitor and the inductor; The insulating layer is etched to form vias in the insulating layer, the vias being used to expose at least a portion of the underlying electrode and at least a portion of the inductor; A superconducting microstrip thin film is deposited on the insulating layer, the superconducting microstrip thin film being used to connect the capacitor and the inductor through the via.

8. A method for fabricating a microresonator, characterized in that, The method includes: Deposit a lower superconducting thin film on the substrate; A dielectric layer film is deposited on the lower superconducting film to cover at least a portion of the lower superconducting film; An upper superconducting film is deposited on the dielectric layer film to cover at least a portion of the dielectric layer film; The upper superconducting thin film, the dielectric thin film, and the lower superconducting thin film are patterned layer by layer to form the capacitor and inductor of the microresonator. The upper superconducting thin film forms the upper electrode of the capacitor after patterning, the dielectric thin film forms the dielectric layer of the capacitor after patterning, and the lower superconducting thin film forms the lower electrode of the capacitor and the inductor after patterning. An insulating layer is deposited on the capacitor and the inductor; The insulating layer is etched to form vias in the insulating layer, the vias being used to expose at least a portion of the underlying electrode and at least a portion of the inductor; A superconducting microstrip thin film is deposited on the insulating layer, the superconducting microstrip thin film being used to connect the capacitor and the inductor through the via.

9. The preparation method according to claim 8, characterized in that, The superconducting microstrip thin film is also used to interconnect different microresonators through the vias; and / or The dielectric layer thin film is prepared by atomic layer deposition.

10. The preparation method according to claim 8, characterized in that, The etching process, which involves etching the upper superconducting thin film, the dielectric layer thin film, and the upper superconducting thin film layer by layer, includes: The upper superconducting thin film, the dielectric thin film, and the upper superconducting thin film are etched layer by layer using an ICP etching process. The etching gas used for each layer etching is capable of etching the current layer but cannot etch the layer below it.

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