Capacitor and core control circuit thereof

Abstract

The invention discloses a capacitor and a core control circuit thereof, and relates to the technical field of capacitors. According to the embodiment of the invention, different combinations of a second capacitor core and a first capacitor core can be realized by continuously monitoring and controlling the conduction or cut-off of a second switch, and stepping fine tuning is realized; the difference value between the actual capacitance value and the calibrated capacitance value of the first capacitor core is kept within the preset precision range, namely, the change of the capacitance value (namely the capacitance value of the capacitor) of the first capacitor core can be effectively compensated, so that the capacitor can still keep stable performance when facing factors such as temperature change, voltage fluctuation and aging, and the service life of the capacitor is prolonged. Stability and reliability of an application system where the capacitor is located are ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of capacitors, and in particular to a capacitor and a core control circuit thereof. Background Art

[0002] Capacitors are crucial components in electronic circuits and power systems, widely used in numerous circuit scenarios, including filtering, energy storage, and coupling. The stability of a capacitor's capacitance plays a key role in circuit performance and stability. However, in practical applications, the capacitance of a capacitor core often fluctuates due to a variety of factors.

[0003] When the capacitance value changes, it directly affects the normal operation of the circuit. In the filter circuit, the change in capacitance value will lead to a decrease in the filtering effect, making it impossible to effectively filter out the noise and interference in the circuit, thus affecting the stability and reliability of the entire system. In the energy storage circuit, the instability of the capacitance value will lead to the change of the energy storage capacity, which cannot meet the precise energy storage requirements of the system. Summary of the Invention

[0004] The present invention provides a capacitor and a core control circuit thereof, so as to solve the problem of reduced stability and reliability of an application system caused by unstable capacitance value of the current capacitor.

[0005] In order to solve the above problems, the present invention discloses, from a first aspect, a capacitor core control circuit, comprising: a first capacitor core connected between the positive power supply terminal and the negative power supply terminal of the capacitor; a plurality of second capacitor cores and a plurality of second switches, wherein the second switches have a one-to-one correspondence with the second capacitor cores and are connected in series with each other; A monitoring module, configured to monitor the parameters of the first capacitor core; A first storage module stores a correspondence between parameter sizes and capacitance values ​​of the first capacitor core, wherein different parameter sizes correspond to different capacitance values ​​of the first capacitor core; a second storage module storing a calibrated capacitance value of the first capacitor core, capacitance values ​​of each second capacitor core, and an address of a corresponding second switch; wherein the capacitance value of the first capacitor core is greater than the capacitance value of the second capacitor core; The control module controls the on and off of one or more second switches based on the parameter size, corresponding relationship, calibrated capacitance value of the first capacitor core, capacitance value of each second capacitor core and the address of the corresponding second switch sent by the monitoring module, so that the corresponding second capacitor core is connected in parallel with the first capacitor core, and the difference between the actual capacitance value and the calibrated capacitance value of the first capacitor core is maintained within a preset accuracy range.

[0006] In one embodiment of the present invention, the capacitance value of the capacitor decreases as the temperature increases; wherein the parameter is temperature, and the monitoring module is a temperature monitoring module for monitoring the temperature of the first capacitor core; the first storage module stores the correspondence between the temperature and the capacitance value of the first capacitor core, and different temperature sizes correspond to different capacitance values ​​of the first capacitor core; the control module controls the conduction and cutoff of one or more second switches based on the temperature size, the correspondence, the calibrated capacitance value of the first capacitor core, the capacitance values ​​of each second capacitor core and the address of the corresponding second switch, so that the corresponding second capacitor core is connected in parallel with the first capacitor core, and the difference between the actual capacitance value and the calibrated capacitance value of the first capacitor core is kept within a preset accuracy range.

[0007] In one embodiment of the present invention, a capacitor is applied to a high-frequency circuit, and the capacitance value of the capacitor decreases as the DC voltage increases; wherein the parameter is the DC voltage applied to the first capacitor core, and the monitoring module is a voltage monitoring module for monitoring the DC voltage of the first capacitor core; the first storage module stores the correspondence between the DC voltage and the capacitance value of the first capacitor core, and different DC voltages correspond to different capacitance values ​​of the first capacitor core; the control module controls the conduction and cutoff of one or more second switches based on the DC voltage, the correspondence, the calibrated capacitance value of the first capacitor core, the capacitance values ​​of each second capacitor core, and the address of the corresponding second switch, so that the corresponding second capacitor core is connected in parallel with the first capacitor core, and the difference between the actual capacitance value and the calibrated capacitance value of the first capacitor core is kept within a preset accuracy range.

[0008] In one embodiment of the present invention, a plurality of second capacitor cores and a plurality of second switches form a second capacitor group; the positive electrode of each second capacitor core is connected to the first access end through its corresponding second switch, and the positive and negative electrodes of adjacent second capacitor cores are connected to form a series circuit and then connected to the second access end; the second capacitor group is connected in parallel to the two ends of the first capacitor core through the first access end and the second access end.

[0009] In one embodiment of the present invention, there are n first capacitor cores, each first capacitor core is connected in series with a first switch to form a capacitor branch, and the n capacitor branches are connected in parallel between the positive power supply terminal and the negative power supply terminal to form a first capacitor group; n≥2; it also includes a selector, the selector includes n input terminals, an output terminal and a selection terminal, the n input terminals correspond one-to-one to the n capacitor branches, each input terminal is connected between the first capacitor core and the first switch in the capacitor branch corresponding to it, the output terminal is connected to the first access terminal of the second capacitor group, and the second access terminal of the second capacitor group is connected to the negative power supply terminal; the control module also controls the conduction and cutoff of the n first switches based on the trigger signal to make the n first capacitor cores work in turn, and controls the selection terminal of the selector to connect the second capacitor group in parallel to the two ends of the first capacitor core in working state.

[0010] In one embodiment of the present invention, the control circuit also includes a timing module; the timing module is used to time the working time of the first capacitor core that is currently in a working state; the control module is also used to generate a trigger signal when the working time of the first capacitor core exceeds a preset timing threshold, control the conduction and cutoff of n first switches to replace the first capacitor core that is currently in a working state with the target capacitor core that is in an idle state among the n first capacitor cores, and control the selection end of the selector to connect the second capacitor group in parallel to the two ends of the target first capacitor core that is in a working state.

[0011] In one embodiment of the present invention, the timing module includes n timing units, and the n timing units correspond one-to-one to n capacitor branches; the input end of each timing unit is used to access the controlled end signal of the first switch in the corresponding capacitor branch, and when the first switch is turned on, the timing unit starts timing.

[0012] In one embodiment of the present invention, the ratio of the capacitance value of the first capacitor core to the capacitance value of the second capacitor core is 100:1-100:16.

[0013] In one embodiment of the present invention, the capacitance values ​​of the plurality of second capacitor elements are all the same, partially the same, or completely different.

[0014] From a second aspect, the present invention discloses a capacitor comprising the capacitor core control circuit according to the first aspect of the present invention.

[0015] The embodiments of the present invention include the following advantages: The embodiment of the present invention can realize different combinations of the second capacitor core and the first capacitor core by continuously monitoring and controlling the conduction or cutoff of the second switch, and realize step-by-step fine-tuning, so as to keep the difference between the actual capacitance value and the calibrated capacitance value of the first capacitor core within a preset accuracy range. That is, the embodiment of the present invention can effectively compensate for the change in the capacitance value of the first capacitor core (that is, the capacitance value of the capacitor), so that the capacitor can still maintain stable performance when facing factors such as temperature changes, voltage fluctuations, and aging, thereby ensuring the stability and reliability of the application system in which the capacitor is located. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0017] Figure 1 1 is a schematic structural diagram of a capacitor core control circuit according to an embodiment of the present invention; Figure 2 This is a schematic diagram of the application structure of a capacitor core control circuit according to an embodiment of the present invention; Figure 3 1 is a schematic diagram of the application structure of a capacitor core control circuit according to another embodiment of the present invention; Figure 4 is a circuit diagram of a second capacitor group according to an embodiment of the present invention; Figure 5 1 is a circuit diagram of a first capacitor group and a second capacitor group according to an embodiment of the present invention. DETAILED DESCRIPTION

[0018] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0019] The inventors discovered that most existing capacitor control technologies lack real-time monitoring and effective compensation mechanisms for changes in the capacitance value of the capacitor core. When the capacitance value of the capacitor core changes, it is difficult to quickly adjust the capacitance value to restore it to the calibrated value. This causes the circuit to gradually degrade in performance during long-term operation and may even cause failure. In view of this, an embodiment of the present invention provides a capacitor core control circuit. This is a control circuit that can monitor the parameters of the capacitor core in real time and automatically adjust the capacitance value according to the parameter changes, thereby improving the stability and reliability of the capacitor and ensuring the normal operation of the circuit.

[0020] refer to Figure 1 , the capacitor core control circuit includes: The first capacitor core C1 is connected between the positive power terminal and the negative power terminal of the capacitor; as the main capacitor core, the first capacitor core C1 undertakes the main capacitance function, has a relatively large capacitance value, and is the core part of the capacitor in the circuit.

[0021] There are multiple second capacitor cores C2 and multiple second switches, and the second switches have a one-to-one correspondence with the second capacitor cores C2 and are connected in series with each other; the capacitance value of the second capacitor cores C2 is relatively small, and by controlling the conduction and cutoff of the corresponding second switches, they can be connected in parallel or disconnected with the first capacitor core C1.

[0022] The monitoring module is used to monitor the parameter size of the first capacitor core C1 in real time and send the monitored parameter size to the control module; the parameter can specifically be temperature, voltage or working time, etc.

[0023] The first storage module stores the correspondence between the parameter size and the capacitance value of the first capacitor core C1. Different parameter sizes correspond to different capacitance values ​​of the first capacitor core C1. Through this correspondence, the current actual capacitance value of the first capacitor core C1 can be determined according to the monitored parameter size.

[0024] The second storage module stores the calibrated capacitance value of the first capacitor core C1, the capacitance values ​​of each second capacitor core C2, and the address of the corresponding second switch; wherein, the capacitance value of the first capacitor core C1 is greater than the capacitance value of the second capacitor core C2; ​​the calibrated capacitance value, the capacitance values ​​of each second capacitor core C2, and the address of the corresponding second switch information provide the control module with basic data for adjusting the capacitance value.

[0025] The control module outputs a control signal based on the parameter size and corresponding relationship sent by the monitoring module, the calibrated capacitance value of the first capacitor core C1, the capacitance values ​​of each second capacitor core C2, and the address of the corresponding second switch, to control the conduction and cutoff of one or more second switches, so that the corresponding second capacitor core C2 is connected in parallel with the first capacitor core C1, and the difference between the actual capacitance value and the calibrated capacitance value of the first capacitor core C1 is maintained within a preset accuracy range. Specifically, based on the received parameter size, the control module searches the corresponding capacitance value of the first capacitor core C1 from the corresponding relationship in the first storage module to determine the actual capacitance value of the first capacitor core C1. The control module compares the actual capacitance value of the first capacitor core C1 with the calibrated capacitance value stored in the second storage module. If the actual capacitance value is less than the calibrated capacitance value, the control module selects the appropriate second switch to conduct based on the capacitance values ​​of each second capacitor element C2 stored in the second storage module and the address of the corresponding second switch, thereby connecting the corresponding second capacitor element C2 in parallel with the first capacitor element C1 and increasing the capacitance of the entire capacitor. If the actual capacitance value is greater than the calibrated capacitance value, the control module selects the appropriate second switch to turn off, reducing the number of second capacitor elements C2 connected in parallel with the first capacitor element C1 and reducing the capacitance of the entire capacitor. By continuously monitoring and controlling the conduction or cutoff of the second switch, different combinations of second capacitor elements C2 and first capacitor element C1 can be achieved, achieving step-by-step fine-tuning, and maintaining the difference between the actual capacitance value of the first capacitor element C1 and the calibrated capacitance value within a preset accuracy range.

[0026] The embodiments of the present invention can effectively compensate for changes in the capacitance value of the capacitor core, so that the capacitor can maintain stable performance when facing factors such as temperature changes, voltage fluctuations, and aging. In the filter circuit, a stable filtering effect can be guaranteed; in the energy storage circuit, stable energy storage capacity and charge and discharge characteristics can be ensured, thereby improving the performance and reliability of the entire circuit, so that it can play a better role in various application scenarios. Furthermore, by adjusting the capacitance value in real time, the damage to other components of the circuit caused by unstable capacitance value is reduced, the incidence of circuit failure is reduced, and the service life of the entire circuit system is extended. Among them, high-precision capacitance value control is achieved through automatic adjustment, which also greatly reduces the cost of the capacitor and reduces the maintenance workload and cost.

[0027] The preset accuracy range is less than ±1%. The embodiment of the present invention can basically maintain the actual capacitance value of the first capacitor core C1 at its calibrated capacitance value.

[0028] The capacitance of the first capacitor core C1 is much greater than the capacitance of the single second capacitor core C2. Optionally, the ratio of the capacitance of the first capacitor core C1 to the capacitance of the second capacitor core C2 is 100:1 to 100:16. For example, the capacitance of the first capacitor core C1 is 100uF, and the capacitance of the second capacitor core C2 is 1uF. For example, the capacitance of the first capacitor core C1 is 100uF, and the capacitance of the second capacitor core C2 is 4uF. For example, the capacitance of the first capacitor core C1 is 100uF, and the capacitance of the second capacitor core C2 is 16uF.

[0029] Furthermore, in actual applications, the capacitance values ​​of the plurality of second capacitor cores C2 in the capacitor are all the same, partially the same, or completely different. For example, there are a total of four second capacitor cores C2[0], C2[1], C2[2], and C2[3], and their capacitance values ​​are 1μF, 2μF, 4μF, and 8μF, respectively. For example, there are a total of four second capacitor cores C2, and their capacitance values ​​are 1μF, 1μF, 2μF, and 4μF, respectively. For example, there are a total of four second capacitor cores C2, and their capacitance values ​​are all 1uF.

[0030] For example: the first capacitor core C1 = 100μF (calibrated value), and the second capacitor cores C2[0], C2[1], C2[2], and C2[3] are 1μF, 2μF, 4μF, and 8μF respectively. If the capacitance of C1 is detected to drop to 95μF, the control module calculates that 5μF compensation is required, and then turns on the second switch corresponding to the second capacitor core C2[0] (1μF) and the second switch corresponding to the second capacitor core C2[2] (4μF), so that the capacitance of C1 is restored to 95+1+4=100μF, completing the accuracy compensation.

[0031] The temperature characteristics of a capacitor are primarily determined by the properties of its dielectric material. The dielectric constant of some dielectric materials decreases with increasing temperature, resulting in a decrease in capacitance. For example, the dielectric constant of Class II ceramic capacitors (such as n7R) can drop significantly at high temperatures, reducing capacitance accordingly. The dielectric constant of some polymer film capacitors is temperature-sensitive, resulting in a decrease in capacitance at high temperatures.

[0032] In one embodiment of the present invention, the parameter is temperature. This embodiment further considers the characteristic that the capacitance of the capacitor decreases as the temperature increases. Figure 2The monitoring module is a temperature monitoring module, used to monitor the temperature of the first capacitor core. The temperature monitoring module, which can optionally employ an NTC thermistor or a digital temperature chip, is directly attached to or adjacent to the surface of the first capacitor core C1 to monitor its temperature in real time. The first storage module stores a correspondence between temperature and capacitance of the first capacitor core. Different temperatures correspond to different capacitance values. These correspondences can be derived from manufacturer data or experimental calibration, reflecting the capacitance variation of capacitors at different temperatures. Therefore, the actual capacitance value of the first capacitor core can be determined based on the monitored temperature. This correspondence can be represented as a temperature-capacitance curve. For example, at 25°C, the capacitance of the first capacitor core C1 is 100uF; at 50°C, it is 92uF; and at 75°C, it is 85uF.

[0033] In this embodiment, the control module controls the conduction and cutoff of one or more second switches based on the temperature magnitude, the corresponding relationship, the calibrated capacitance value of the first capacitor core, the capacitance value of each second capacitor core, and the address of the corresponding second switch, so that the corresponding second capacitor core is connected in parallel with the first capacitor core, and the difference between the actual capacitance value and the calibrated capacitance value of the first capacitor core is maintained within a preset accuracy range. Specifically, the control module receives the temperature value sent by the temperature monitoring module and calculates the actual capacitance value of the first capacitor core at the current temperature based on the corresponding relationship between temperature and capacitance value stored in the first storage module. The actual capacitance value is then compared with the calibrated capacitance value of the first capacitor core, and based on the difference, it determines whether one or more second capacitor cores need to be connected in parallel with the first capacitor core. For example, if the actual capacitance value is lower than the calibrated capacitance value, the control module selects an appropriate second capacitor core and controls the corresponding second switch to conduct, so that these second capacitor cores are connected in parallel with the first capacitor core, thereby increasing the total capacitance value and keeping the difference between the actual capacitance value and the calibrated capacitance value within the preset accuracy range, ensuring stable performance of the capacitor.

[0034] This embodiment is suitable for temperature-sensitive capacitor applications, such as those in high-precision electronic devices, where capacitor performance can be significantly affected by temperature fluctuations. This control circuit effectively compensates for the effects of temperature fluctuations on capacitance, ensuring stable operation of the device across varying temperatures.

[0035] In one embodiment of the present invention, the capacitor is used in a high-frequency circuit. In the high-frequency circuit, the effect of DC voltage (such as DC bias voltage) on the capacitance value mainly comes from the nonlinearity of the dielectric material, especially Class II ceramic capacitors (such as X7R) such as ferroelectric ceramic dielectrics. The dielectric constant of the ferroelectric material changes with the electric field strength, which is reflected in the decrease as the DC bias voltage increases. The present invention further considers the effect of DC voltage on the capacitance value. Therefore, the parameter is the DC voltage applied to the first capacitor core, and the capacitance value of the capacitor decreases as the DC voltage increases. Wherein, reference Figure 3 The monitoring module is a voltage monitoring module, which is used to monitor the DC voltage of the first capacitor core. The voltage monitoring module can be implemented by some voltage sensors on the market, and this is not limited to this. The first storage module stores the correspondence between the DC voltage and the capacitance value of the first capacitor core. Different DC voltages correspond to different capacitance values ​​of the first capacitor core; for example, when the DC voltage increases, the capacitance value will decrease accordingly, and this change relationship is recorded in detail in the first storage module. These correspondences can be obtained through manufacturer data or experimental calibration, reflecting the change law of the capacitance value of the capacitor under different DC voltages. Through this correspondence, the current actual capacitance value of the first capacitor core can be determined based on the monitored DC voltage. Among them, the correspondence can be represented by a curve of DC voltage and capacitance value. For example, at 0V, the first capacitor core C1 = 100uF; at 50V, the first capacitor core C1 = 95uF; at 100V, the first capacitor core C1 = 84uF. In this embodiment, the control module controls the conduction and cutoff of one or more second switches based on the DC voltage size, the corresponding relationship, the calibrated capacitance value of the first capacitor core, the capacitance values ​​of each second capacitor core, and the address of the corresponding second switch, so that the corresponding second capacitor core is connected in parallel with the first capacitor core, and the difference between the actual capacitance value and the calibrated capacitance value of the first capacitor core is maintained within a preset accuracy range.

[0036] This embodiment is suitable for capacitor applications in high-frequency circuits, such as communications equipment and high-frequency filters, where capacitor performance can be significantly affected by DC voltage variations. This control circuit effectively compensates for the effects of DC voltage variations on capacitance, ensuring stable circuit operation across varying DC voltage environments.

[0037] In an embodiment of the present invention, a plurality of second capacitor cores and a plurality of second switches form a second capacitor group; the present invention further provides a preferred structure of the second capacitor group. The positive electrode of each second capacitor core is connected to the first access terminal through its corresponding second switch, and the positive and negative electrodes of adjacent second capacitor cores are connected to form a series circuit and then connected to the second access terminal; the second capacitor group is connected in parallel to the two ends of the first capacitor core through the first access terminal and the second access terminal. Figure 4 , the second capacitor cores C2[0], C2[1], and C2[2] are connected in series, wherein C2[0] is controlled by the second switch S[0], C2[1] is controlled by the second switch S[1], and C2[2] is controlled by the second switch S[2]. The capacitance values ​​of C2[0], C2[1], and C2[2] can be the same or different. When the capacitance value of the second capacitor core is required to be the minimum, the second switch S[0] is closed, and S[1] and S[2] are disconnected; when the capacitance value of the second capacitor core is required to be the maximum, the second switch S[2] is closed, and S[0] and S[1] are both disconnected. Based on this embodiment, each second capacitor core can also be designed to be larger. When the second capacitor group has multiple second capacitor cores connected in series, the voltage resistance of the capacitor can also be increased, making it suitable for high-voltage applications. The total capacitance value of the second capacitor group can be adjusted according to actual needs, which increases the flexibility of the circuit.

[0038] Furthermore, in one embodiment of the present invention, there are n first capacitor cores, each first capacitor core is connected in series with a first switch to form a capacitor branch, and the n capacitor branches are connected in parallel between the positive power supply terminal and the negative power supply terminal to form a first capacitor group; n≥2; the control circuit also includes a selector, the selector includes n input terminals, an output terminal and a selection terminal, the n input terminals correspond one-to-one to the n capacitor branches, each input terminal is connected between the first capacitor core and the first switch in the capacitor branch corresponding to it, the output terminal is connected to the first access terminal of the second capacitor group, and the second access terminal of the second capacitor group is connected to the negative power supply terminal; the control module also controls the conduction and cutoff of the n first switches based on the trigger signal to make the n first capacitor cores work in turn, and controls the selection terminal of the selector to connect the second capacitor group in parallel to the two ends of the first capacitor core in working state.

[0039] Among them, both the first switch and the second switch can be MOSFET switches, which have fast response speed and no mechanical wear. This embodiment is expanded to multiple first capacitor cores working in turn, which is suitable for circuit scenarios that require long-term stable operation and have high requirements on capacitor life. For example, in the filter circuit or energy storage circuit in the power system, by having multiple first capacitor cores working in turn, the load of a single capacitor can be effectively reduced and its service life can be extended. On this basis, combined with the selector, the compensation circuit composed of the second capacitor group can always follow the first capacitor core in working state, that is, dynamic switching compensation of the target first capacitor core is realized, maintaining system stability.

[0040] For example, n is 2, such as Figure 5As shown, after receiving the trigger signal, the control module first controls the two first switches. For example, the first switch K[0] in the current first capacitor branch is turned on, and the first capacitor core C1[0] is in a working state; when the control module receives the trigger signal, the control module turns off the first switch K[0] and turns on the first switch K[1] in the second capacitor branch, so that the first capacitor core C1[1] starts to work. While switching the first capacitor core C1[0], the control module controls the selection end sel of the selector MUX to switch the second capacitor group from the two ends of the original parallel first capacitor core C1[0] to the two ends of the first capacitor core C1[1], ensuring that the second capacitor group can always compensate the capacitance value of the first capacitor core in a working state.

[0041] Furthermore, in one embodiment of the present invention, the control circuit further includes: a timing module (not shown); the timing module includes n timing units, and the n timing units correspond one to one to the n capacitor branches; the input end of each timing unit is used to access the controlled end signal of the first switch in the capacitor branch corresponding to it, and when the first switch is turned on, the timing unit starts timing. Among them, the timing module is used to time the working time of the first capacitor core that is currently in the working state. For example, if the first capacitor core C1[0] is in the working state, the timing unit corresponding to the first capacitor core C1[0] will count according to the controlled end signal of the first switch K[1] connected to C1[0] (if the controlled end signal is high, the first switch K[1] is closed, and the timing unit counts based on the rising edge of the controlled end signal). The control module is also used to generate a trigger signal when the working time of the first capacitor core exceeds a preset timing threshold, control the on and off of the n first switches to replace the first capacitor core currently in the working state with the target capacitor core in the idle state among the n first capacitor cores, and control the selection end of the selector to connect the second capacitor group in parallel to the two ends of the target first capacitor core in the working state. The embodiment of the present invention introduces a timing module for timing the working time of the first capacitor core currently in the working state. This design allows the circuit to automatically switch the working capacitor core according to the preset time threshold, further improving the degree of automation and reliability of the circuit, and is suitable for unmanned equipment (such as energy storage systems). This solution is suitable for circuit scenarios that require long-term stable operation and have high requirements for the life of capacitors. By automatically switching the working capacitor core, it can effectively avoid accelerated aging of the capacitor due to long-term continuous operation, thereby extending its service life.

[0042] In the various drawings of the present invention, the first switch is represented by K. When there are n first switches, it is represented as K[0,n]; the second switch is represented by S. When there are m second switches, it is represented as S[0,m].

[0043] In the various drawings of the present invention, the control signal is represented by CTRL. The control signal for the first switch K is represented by CTRL_K, and the first switch K is turned on or off based on the level of CTRL_K. When there are n first switches, the control signals for the n first switches are represented by CTRL_K[0,n], i.e., CTRL_K[0] to CTRL_K[n], and each first switch K[0,n] is turned on or off based on the control signal CTRL_K[0,n].

[0044] The control signal for the second switch S is represented as CTRL_S, and the second switch S is turned on or off based on the level of CTRL_S. When there are m second switches, the control signals for the m second switches are represented as CTRL_S[0,m], i.e., CTRL_S[0] to CTRL_S[m], and each second switch S[0,m] is turned on or off based on the control signal CTRL_S[0,m].

[0045] An embodiment of the present invention further discloses a capacitor, comprising the capacitor core control circuit as described in the embodiment of the present invention.

[0046] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referenced to each other.

[0047] It should also be noted that, in this document, the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore should not be understood as limiting the present invention. In addition, relational terms such as "first" and "second" are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any actual relationship or order between these entities or operations, nor should they be understood as indicating or implying relative importance. Moreover, the terms "comprises", "includes" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article or terminal device. In the absence of further restrictions, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or terminal device comprising the element.

[0048] The technical solutions provided by this application are described in detail above. Specific examples are used herein to illustrate the principles and implementation methods of this application. The description of the above embodiments is only intended to help understand this application, and the contents of this specification should not be construed as limiting this application. At the same time, for those skilled in the art, according to this application, there may be various changes in the specific implementation methods and application scopes. It is not necessary and impossible to list all implementation methods here, and obvious changes or modifications derived therefrom are still within the scope of protection of this application.

Claims

1. A capacitor core control circuit, characterized in that: include: a first capacitor core connected between the positive power terminal and the negative power terminal of the capacitor; a plurality of second capacitor cores and a plurality of second switches, wherein the second switches have a one-to-one correspondence with the second capacitor cores and are connected in series with each other; A monitoring module, configured to monitor the parameters of the first capacitor core; A first storage module stores a correspondence between the parameter size and the capacitance value of the first capacitor core, wherein different parameter sizes correspond to different capacitance values ​​of the first capacitor core; a second storage module storing a calibrated capacitance value of the first capacitor core, capacitance values ​​of each second capacitor core, and an address of the corresponding second switch; wherein the capacitance value of the first capacitor core is greater than the capacitance value of the second capacitor core; The control module controls the conduction and cutoff of one or more second switches based on the parameter size sent by the monitoring module, the corresponding relationship, the calibrated capacitance value of the first capacitor core, the capacitance value of each second capacitor core and the address of the corresponding second switch, so that the corresponding second capacitor core is connected in parallel with the first capacitor core, and the difference between the actual capacitance value of the first capacitor core and the calibrated capacitance value is maintained within a preset accuracy range.

2. The capacitor core control circuit according to claim 1, characterized in that: The capacitance value of the capacitor decreases as the temperature increases; Wherein, the parameter is temperature, and the monitoring module is a temperature monitoring module for monitoring the temperature of the first capacitor core; The first storage module stores a correspondence between temperature and capacitance of the first capacitor core, and different temperature values ​​correspond to different capacitance values ​​of the first capacitor core; The control module controls the conduction and cutoff of one or more second switches based on the temperature magnitude, the corresponding relationship, the calibrated capacitance value of the first capacitor core, the capacitance value of each second capacitor core and the address of the corresponding second switch, so that the corresponding second capacitor core is connected in parallel with the first capacitor core, and the difference between the actual capacitance value of the first capacitor core and the calibrated capacitance value is maintained within a preset accuracy range.

3. The capacitor core control circuit according to claim 1, characterized in that: The capacitor is used in a high-frequency circuit, and the capacitance of the capacitor decreases as the DC voltage increases; Wherein, the parameter is a DC voltage applied to the first capacitor core, and the monitoring module is a voltage monitoring module for monitoring the DC voltage of the first capacitor core; The first storage module stores a correspondence between a DC voltage and a capacitance value of the first capacitor core, and different DC voltages correspond to different capacitance values ​​of the first capacitor core; The control module controls the conduction and cutoff of one or more second switches based on the DC voltage size, the corresponding relationship, the calibrated capacitance value of the first capacitor core, the capacitance value of each second capacitor core and the address of the corresponding second switch, so that the corresponding second capacitor core is connected in parallel with the first capacitor core, and the difference between the actual capacitance value of the first capacitor core and the calibrated capacitance value is maintained within a preset accuracy range.

4. The capacitor core control circuit according to any one of claims 1 to 3, characterized in that: The plurality of second capacitor cores and the plurality of second switches form a second capacitor group; The positive electrode of each second capacitor core is connected to the first access terminal through its corresponding second switch, and the positive and negative electrodes of adjacent second capacitor cores are connected to form a series circuit and then connected to the second access terminal; The second capacitor group is connected in parallel to both ends of the first capacitor core through the first access end and the second access end.

5. The capacitor core control circuit according to claim 4, characterized in that: There are n first capacitor cores, each of which is connected in series with a first switch to form a capacitor branch, and the n capacitor branches are connected in parallel between the positive power supply terminal and the negative power supply terminal to form a first capacitor group; n≥2; The device further includes a selector, the selector including n input terminals, an output terminal, and a selection terminal, the n input terminals corresponding one to the n capacitor branches, each input terminal connected between the first capacitor core and the first switch in the corresponding capacitor branch, the output terminal connected to the first access terminal of the second capacitor group, and the second access terminal of the second capacitor group connected to the negative power supply terminal; The control module also controls the on and off of n first switches based on the trigger signal to make the n first capacitor cores work in turn, and controls the selection end of the selector to connect the second capacitor group in parallel to the two ends of the first capacitor core in working state.

6. The capacitor core control circuit according to claim 5, characterized in that: Also includes: Timing module; The timing module is used to time the working time of the first capacitor core which is currently in a working state; The control module is also used to generate the trigger signal when the working time of the first capacitor core exceeds a preset timing threshold, control the conduction and cutoff of n first switches to replace the first capacitor core currently in the working state with the target capacitor core in the idle state among the n first capacitor cores, and control the selection end of the selector to connect the second capacitor group in parallel to the two ends of the target first capacitor core in the working state.

7. The capacitor core control circuit according to claim 6, characterized in that: The timing module includes n timing units, and the n timing units correspond one to one with n capacitor branches; The input end of each timing unit is used to access the controlled end signal of the first switch in the corresponding capacitor branch. When the first switch is turned on, the timing unit starts timing.

8. The capacitor core control circuit according to claim 1, characterized in that: The ratio of the capacitance value of the first capacitor core to the capacitance value of the second capacitor core is 100:1 to 100:

16.

9. The capacitor core control circuit according to claim 1 or 8, characterized in that: The capacitance values ​​of the plurality of second capacitor elements are all the same, partially the same, or completely different.

10. A capacitor, characterized in that: The device comprises a capacitor core control circuit according to any one of claims 1 to 9.

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