Method for manufacturing semiconductor device

By using buffer material to fill the gap between the electrode components and the mold in the SiC MOSFET module, the grinding process is avoided, the problem of dust and moisture intrusion is solved, and the reliable lead-out of the electrode components and cost control are achieved.

CN120600643APending Publication Date: 2025-09-05MITSUBISHI ELECTRIC CORP
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
CN202510766729.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2021-03-19
Filing Date
2022-03-14
Publication Date
2025-09-05

AI Technical Summary

Technical Problem

In existing SiC MOSFET modules, the grinding process generates dust and moisture intrusion, and the highly fluctuating electrode components lead to material waste and increased processing costs, making end-of-line detection difficult.

Method used

The gap between the electrode component and the mold is filled with a buffer material, and the grinding process is avoided through the transfer molding packaging method to ensure that the front end of the electrode component is exposed.

Benefits of technology

It effectively suppresses manufacturing costs, ensures reliable lead-out of electrode components, avoids material waste and processing costs caused by grinding, and improves packaging reliability.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120600643A_ABST
    Figure CN120600643A_ABST
Patent Text Reader

Abstract

Provided is a method for manufacturing a semiconductor device capable of reliably drawing out an electrode member from an upper surface of the device while suppressing manufacturing cost. A semiconductor chip having a main electrode and a control electrode is bonded to a substrate. A wiring chip having a first electrode, a second electrode, and a wiring connecting the first electrode and the second electrode is bonded to a substrate. The main electrode member is bonded to the main electrode via a first bonding material. The control electrode member is bonded to the second electrode via a second bonding material. The control electrode and the first electrode are connected by a connecting member. The semiconductor chip, the substrate, the wiring chip, the main electrode member, the control electrode member, and the connection member that have been bonded together are placed in a mold, and a sealing material is injected into the mold in a state in which the front end surfaces of the main electrode member and the control electrode member are pressed against a buffer material provided between the mold and the main electrode member and the control electrode member. The semiconductor chip, the substrate, the wiring chip, the main electrode member, the control electrode member, and the connection member are packaged by the packaging structure. And the packaging material is not ground.
Need to check novelty before this filing date? Find Prior Art

Description

[0001] This application is a divisional application based on the Chinese national application No. 202210246261.6 (method for manufacturing a semiconductor device) filed on March 14, 2022, and its contents are cited below. Technical Field

[0002] The present invention relates to a method for manufacturing a semiconductor device. Background Art

[0003] Because it's difficult to scale up SiC MOSFETs, modules using SiC MOSFETs require connecting multiple chips in parallel to increase current capacity. A semiconductor device has been proposed in which multiple semiconductor chips and wiring chips are bonded to a substrate, and the control electrodes of each semiconductor chip are connected in parallel via the circuit pattern of the wiring chip (for example, see Patent Document 1). The main electrode components are bonded to the main electrodes of the multiple semiconductor chips, and the control electrode components are bonded to the circuit pattern of the wiring chip, followed by resin encapsulation.

[0004] Patent Document 1: International Publication No. 2020 / 110170

[0005] In the prior art, the packaging material is ground to expose the electrode components. However, this process generates dust and, in wet grinding, moisture intrudes through the ground surface. Furthermore, fluctuations in the height of the electrode components can lead to excessive grinding, resulting in wasted material and processing time, and difficulty in detecting the end point. Furthermore, the grinding process itself incurs processing costs. Summary of the Invention

[0006] The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a method for manufacturing a semiconductor device that can reduce manufacturing costs and reliably lead out an electrode member from the upper surface of the device.

[0007] The manufacturing method of the semiconductor device involved in the present invention is characterized in that it has the following steps: joining a semiconductor chip having a main electrode and a control electrode to a substrate; joining a wiring chip having a first electrode, a second electrode and a wiring connecting the first electrode and the second electrode to the substrate; joining a main electrode component to the main electrode via a first bonding material; joining a control electrode component to the second electrode via a second bonding material; connecting the control electrode and the first electrode through a connecting component; and placing the joined semiconductor chip, the substrate, the wiring chip, the main electrode component, the control electrode component and the connecting component into a mold, while pressing the front end faces of the main electrode component and the control electrode component to a buffer material provided between the main electrode component and the control electrode component and the mold, injecting a packaging material into the mold, and packaging the semiconductor chip, the substrate, the wiring chip, the main electrode component, the control electrode component and the connecting component by the packaging material, without grinding the packaging material.

[0008] Effects of the Invention

[0009] In the present invention, even if the height of the control electrode component and the main electrode component fluctuates, creating gaps between the main and control electrode components and the mold, the buffer material fills these gaps. Therefore, during the packaging process, the front ends of the main and control electrode components are not covered by the packaging material but are exposed, eliminating the need for post-packaging grinding. This reduces manufacturing costs while reliably extracting the electrode components from the top surface of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 This is a cross-sectional view showing the semiconductor device according to the first embodiment.

[0011] Figure 2 It is a cross-sectional view showing a method for manufacturing the semiconductor device according to the first embodiment.

[0012] Figure 3 It is a cross-sectional view showing a method for manufacturing the semiconductor device according to the first embodiment.

[0013] Figure 4 It is a cross-sectional view showing a method for manufacturing the semiconductor device according to the first embodiment.

[0014] Figure 5 It is a cross-sectional view showing a method for manufacturing the semiconductor device according to the first embodiment.

[0015] Figure 6 It is a cross-sectional view showing a method for manufacturing the semiconductor device according to the first embodiment.

[0016] Figure 7 It is a cross-sectional view showing a method for manufacturing the semiconductor device according to the first embodiment.

[0017] Figure 8 It is a cross-sectional view showing a method for manufacturing a semiconductor device according to a comparative example.

[0018] Figure 9 It is a cross-sectional view showing a method for manufacturing a semiconductor device according to a comparative example.

[0019] Figure 10 It is a cross-sectional view showing a method for manufacturing a semiconductor device according to a comparative example.

[0020] Figure 11 It is a cross-sectional view showing the front end portion of the packaged main electrode member.

[0021] Figure 12 This is a cross-sectional view showing a modified example of the method for manufacturing the semiconductor device according to the first embodiment.

[0022] Figure 13 This is a cross-sectional view showing a semiconductor device according to a second embodiment.

[0023] Figure 14 It is a cross-sectional view showing a method for manufacturing a semiconductor device according to the second embodiment.

[0024] Figure 15 It is a cross-sectional view showing a method for manufacturing a semiconductor device according to the second embodiment.

[0025] Figure 16 It is a cross-sectional view showing a method for manufacturing a semiconductor device according to the second embodiment. DETAILED DESCRIPTION

[0026] A method for manufacturing a semiconductor device according to an embodiment will be described with reference to the accompanying drawings. Identical or corresponding components are denoted by the same reference numerals, and redundant description may be omitted.

[0027] Implementation Method 1

[0028] Figure 1 This is a cross-sectional view of a semiconductor device according to Embodiment 1. Multiple semiconductor chips 1 and a wiring chip 2 are bonded to a substrate 3. Semiconductor chip 1 has a back electrode 4 on its back side and a main electrode 5 and a control electrode 6 on its front side. Semiconductor chip 1 is, for example, a MOSFET. Control electrode 6 is, for example, a gate electrode or a Kelvin source electrode. If semiconductor chip 1 has a built-in temperature sensing element or current sensing element, it also has control electrodes corresponding to each temperature sensing element or current sensing element.

[0029] The back electrode 4 is, for example, a metal film formed by sputtering a silicide layer, a titanium layer, a nickel layer, a titanium layer, and a gold or silver layer. The main electrode 5 and the control electrode 6 are, for example, a metal film formed by sputtering an aluminum layer on the semiconductor chip 1, and then plating a nickel layer, a palladium layer, and a gold layer. Alternatively, the main electrode 5 and the control electrode 6 may be a metal film formed by sputtering a aluminum layer, a titanium layer, a nickel layer, a titanium layer, and a gold or silver layer. Alternatively, any other laminated film having similar functions may be selected.

[0030] The wiring chip 2 has a bonding layer 7 on the back side and a first electrode 8, a second electrode 9, and a wiring 10 connecting the first electrode 8 and the second electrode 9 on the front side. The wiring chip 2 is, for example, an element made of silicon, with an insulating film such as an oxide film formed on the Si surface, and the first electrode 8, the second electrode 9, and the wiring 10 formed on the insulating film. The first electrode 8, the second electrode 9, and the wiring 10 are, for example, a wiring pattern made of aluminum. A bondable metal layer is provided at least on the second electrode 9. The same metal layer may also be provided on the first electrode 8. The bondable metal layer is, for example, a laminated metal film similar to the main electrode 5 of the semiconductor chip 1. The bonding layer 7 is, for example, the same metal film as the back electrode 4 of the semiconductor chip. The back electrode 4 of the semiconductor chip 1 and the bonding layer 7 of the wiring chip 2 are each bonded to the substrate 3 via a bonding material 11.

[0031] The main electrode 5 of the semiconductor chip 1 is joined to the main electrode part 12 via the first bonding material 13. The main electrode part 12 is made of copper, for example. In the case where the main electrode part 12 spans the main electrodes 5 of multiple semiconductor chips 1, the portion joined to the main electrode 5 protrudes, and the portion connecting them is thinner than the portion joined to the main electrode 5. In this way, the main electrodes 5 of the multiple semiconductor chips 1 can be connected to the same potential, avoiding the peripheral voltage-resistant structure of the semiconductor chip 1. Alternatively, the main electrodes 5 of the multiple semiconductor chips 1 can be independent of each other and have the same potential when connected to an external electrode.

[0032] The control electrode member 14 is bonded to the second electrode 9 of the wiring chip 2 via a second bonding material 15. The control electrode member 14 is a plurality of blocks made of, for example, copper.

[0033] The control electrodes 6 of the plurality of semiconductor chips 1 are connected to the first electrodes 8 of the wiring chip 2 via a connecting member 16. The connecting member 16 is, for example, a wire made of gold, silver, or aluminum. Using a thin wire made of gold or silver can reduce the size of the control electrodes 6 of the semiconductor chip 1. This increases the effective area and reduces the manufacturing cost of the semiconductor chip 1.

[0034] Semiconductor chip 1, the upper surface of substrate 3, wiring chip 2, main electrode member 12, control electrode member 14, and connecting member 16 are encapsulated by encapsulating material 17. Encapsulating material 17 is, for example, epoxy resin mixed with filler. The leading ends of main electrode member 12 and control electrode member 14 protrude from the upper surface of encapsulating material 17, with their leading ends exposed.

[0035] Next, a method for manufacturing the semiconductor device according to this embodiment will be described. Figures 2 to 7 1 is a cross-sectional view showing a method for manufacturing a semiconductor device according to Embodiment 1. Figure 2 As shown, the semiconductor chip 1 is bonded to the substrate 3. Figure 3 As shown, the wiring chip 2 is bonded to the substrate 3. At this time, the back electrode 4 of the semiconductor chip 1 and the bonding layer 7 of the wiring chip 2 are bonded to the substrate 3 via the bonding material 11, respectively. The bonding material 11 may be, for example, solder, or may be bonded by sintering using a bonding material composed of silver or copper. Sintering bonding may be pressurized bonding in which the semiconductor chip 1 and the wiring chip 2 are pressed while applying pressure to the electrodes from the upper surface while the temperature is increased, or may be non-pressurized bonding in which no pressure is applied. Alternatively, the wiring chip 2 may be bonded using an adhesive that is thermomechanically stable by heating. However, when using a wiring chip 2 composed of silicon, the wiring chip 2 may sometimes break, and therefore a bonding method without applying pressure is preferred.

[0036] Next, if Figure 4 As shown in FIG. 1 , the main electrode member 12 is bonded to the main electrode 5 via the first bonding material 13. Next, as shown in FIG. Figure 5 As shown, the control electrode member 14 is bonded to the second electrode 9 via the second bonding material 15. The first bonding material 13 and the second bonding material 15 may be, for example, solder, or may be bonded by sintering using a bonding material composed of silver or copper. Sintering bonding may be pressurized bonding in which pressure is applied to the electrodes from the upper surface while the temperature is increased, but non-pressurized bonding in which no pressure is applied is preferred.

[0037] The main electrode member 12 and the control electrode member 14 each have varying thicknesses due to fluctuations in their own manufacturing tolerances. Furthermore, the thicknesses of the first bonding material 13 and the second bonding material 15 also fluctuate. Consequently, the front end faces of the main electrode member 12 and the control electrode member 14 differ in height after bonding.

[0038] Next, if Figure 6 As shown, the control electrode 6 and the first electrode 8 are connected via the connecting member 16. Figure 7As shown, the semi-finished product having the joined semiconductor chip 1, substrate 3, wiring chip 2, main electrode component 12, control electrode component 14 and connection component 16 is placed in a mold 18. At this time, a buffer material 19 is provided between the main electrode component 12 and the control electrode component 14 and the mold 18.

[0039] When the front ends of the main electrode member 12 and the control electrode member 14 are pressed against the cushioning material 19, the thickness of the cushioning material 19 in the areas in contact with the main electrode member 12 and the control electrode member 14 decreases due to the pressing force. If the front ends of the main electrode member 12 and the control electrode member 14 are at different heights, the thickness of the cushioning material 19 will differ between the areas in contact with the main electrode member 12 and the areas in contact with the control electrode member 14. In this state, a transfer molding method is used in which the encapsulating material 17 is injected into the mold 18, thereby encapsulating the semiconductor chip 1, the upper surface of the substrate 3, the wiring chip 2, the main electrode member 12, the control electrode member 14, and the connecting member 16 with the encapsulating material 17.

[0040] When the semiconductor device is removed from the mold 18 after packaging, the buffer material 19 is also removed from the upper surface of the semiconductor device. Through the above process, even if the packaging material 17 is not ground, a semiconductor device with the front end surfaces of the main electrode part 12 and the control electrode part 14 exposed from the packaging material 17 can be manufactured.

[0041] In addition, if a plurality of manufactured semiconductor devices are used, a higher-level semiconductor device such as a half-bridge circuit or a full-bridge circuit can be constructed. In this case, the substrate 3 is electrically and thermally connected to the drain circuit pattern by solder bonding or sintering bonding. The main electrode component 12 is electrically connected to the source circuit pattern by wire bonding, ribbon bonding or solder bonding of a lead frame. Then, the periphery and circuit pattern of the semiconductor device are coated with a secondary packaging material such as gel to manufacture a higher-level semiconductor device. In addition, when solder is used as a bonding material for the semiconductor chip 1, it is preferred to use a high-melting-point solder having a melting point higher than the bonding process temperature when assembling the upper-level semiconductor device.

[0042] Next, the effects of this embodiment will be described in comparison with a comparative example. Figures 8-10 1 is a cross-sectional view showing a method for manufacturing a semiconductor device according to a comparative example. Figure 8 As shown in FIG, the cushioning material 19 is not used in the resin encapsulation process. Therefore, a gap is generated between the mold 18 and the main electrode member 12 and the control electrode member 14, and the encapsulation material 17 is inserted. Figure 9 As shown in FIG. 1 , sometimes the main electrode part 12 or the control electrode part 14 cannot be exposed from the surface of the packaging material 17. Figure 10As shown, it is necessary to grind off a portion of the main electrode member 12 and the control electrode member 14 and the remaining packaging material 17 to expose the main electrode member 12 and the control electrode member 14 .

[0043] In contrast, in this embodiment, even if the heights of the control electrode component 14 and the main electrode component 12 fluctuate, creating gaps between the main electrode component 12, the control electrode component 14, and the mold 18, the cushioning material 19 fills these gaps. Therefore, during the encapsulation process, the front end surfaces of the main electrode component 12 and the control electrode component 14 are not covered by the encapsulation material 17 but are exposed. Therefore, the encapsulation material 17 is not ground after the encapsulation process. This reduces manufacturing costs and reliably allows the electrode components to be drawn out from the top surface of the device.

[0044] Figure 11 : This is a cross-sectional view showing the front end portion of the main electrode component after packaging. If the front end surfaces of the main electrode component 12 and the control electrode component 14 are pressed against the buffer material 19, the buffer material 19 in the portion in contact with the control electrode component 14 and the main electrode component 12 is thinner than the portion not in contact. The buffer material 19 gradually becomes thinner from the non-contact portion toward the contact portion. Since resin packaging is performed in this state, the shape of the packaging material 17 follows the shape of the buffer material 19. Therefore, the packaging material 17 provided on the side surface of the front end portion of the main electrode component 12 and the control electrode component 14 has a tapered shape in which the film thickness in the horizontal direction of the drawing becomes thinner as it approaches the front end surface of the main electrode component 12 and the control electrode component 14.

[0045] When there is a difference between the linear expansion coefficient of the main electrode component 12 and the control electrode component 14 and the linear expansion coefficient of the packaging material 17, stress is generated between the two due to hot and cold cycles, etc. If cracks are generated in the packaging material 17 or the packaging material 17 peels off due to stress, moisture will penetrate and reach the semiconductor chip 1 during a moisture resistance test, etc., reducing the life of the semiconductor device. In contrast, in this embodiment, as described above, the film thickness of the packaging material 17 gradually becomes thinner as it approaches the front end surface of the main electrode component 12 and the control electrode component 14. Therefore, the closer it approaches the end surface of the main electrode component 12 and the control electrode component 14, the smaller the stress is, and thus it is possible to prevent the packaging material 17 from peeling off from the control electrode component 14 and the main electrode component 12.

[0046] Furthermore, if the semiconductor chip 1 includes a temperature sensor or current sensor, these elements are often more susceptible to static electricity than the main components. Therefore, the surface of the buffer material 19, which contacts the front end surfaces of the main electrode component 12 and the control electrode component 14, is preferably conductive. This prevents a potential difference between the terminals from the package to the back end, thus preventing overvoltage damage to the semiconductor chip 1 caused by static electricity.

[0047] Figure 12 1 is a cross-sectional view showing a modified example of the method for manufacturing a semiconductor device according to Embodiment 1. The buffer material 19 includes a non-conductive packaging material 17 and a conductive film 20 such as a carbon sheet or a metal foil provided between the packaging material 17 and the main electrode component 12 and the control electrode component 14. The front end surfaces of the main electrode component 12 and the control electrode component 14 are in contact with the conductive film 20, and no potential difference is generated between the terminals. Therefore, it is possible to prevent the semiconductor chip 1 from being damaged by overvoltage caused by static electricity. In addition, by using the conductive film 20, it is possible to use an inexpensive packaging material 17 such as Teflon. Alternatively, the main component of the buffer material 19 may be carbon. Such a buffer material 19 is conductive, and therefore, the buffer material 19 can be formed of a single component without using the conductive film 20. Therefore, it is possible to suppress processing costs.

[0048] Implementation Method 2

[0049] Figure 13 This is a cross-sectional view showing a semiconductor device according to Embodiment 2. In this embodiment, there is no wiring chip 2 and connection member 16, and control electrode member 14 is bonded to control electrode 6 of semiconductor chip 1 via second bonding material 15. The remaining structure is the same as that of Embodiment 1.

[0050] Next, a method for manufacturing the semiconductor device according to this embodiment will be described. Figures 14-16 1 is a cross-sectional view showing a method for manufacturing a semiconductor device according to Embodiment 2. Figure 14 As shown, the semiconductor chip 1 is bonded to the substrate 3. Figure 15 As shown, the main electrode member 12 is bonded to the main electrode 5 via a first bonding material 13 . The control electrode member 14 is bonded to the control electrode 6 via a second bonding material 15 .

[0051] Next, if Figure 16 As shown, the semi-finished product having the joined semiconductor chip 1, substrate 3, main electrode component 12, and control electrode component 14 is placed in a mold 18. At this time, a buffer material 19 is provided between the main electrode component 12 and the control electrode component 14 and the mold 18. While the front end surfaces of the main electrode component 12 and the control electrode component 14 are pressed against the buffer material 19, an encapsulating material 17 is injected into the mold 18, and the semiconductor chip 1, substrate 3, main electrode component 12, and control electrode component 14 are encapsulated by the encapsulating material 17.

[0052] When the semiconductor device is removed from the mold 18 after packaging, the buffer material 19 is also removed from the upper surface of the semiconductor device. Through the above process, even if the packaging material 17 is not ground, a semiconductor device in which the front end faces of the main electrode component 12 and the control electrode component 14 are exposed from the packaging material 17 can be manufactured. Thus, as in embodiment 1, it is possible to suppress manufacturing costs and reliably lead out the electrode components from the upper surface of the device. In the case of small-capacity semiconductor products and the like where the number of semiconductor chips connected in parallel is small, this embodiment is sometimes preferred because it suppresses manufacturing costs. In this embodiment, the wiring chip 2 is not used, but electrodes are separately led out from the semiconductor chip 1 and connected to an external circuit.

[0053] Furthermore, the semiconductor chip 1 is not limited to being formed of silicon, but may also be formed of a wide bandgap semiconductor having a larger bandgap than silicon. Examples of wide bandgap semiconductors include silicon carbide, gallium nitride-based materials, or diamond. Semiconductor chips formed of such wide bandgap semiconductors can be miniaturized due to their high voltage resistance and allowable current density. By using such miniaturized semiconductor chips, semiconductor devices incorporating such semiconductor chips can also be miniaturized and highly integrated. In addition, since the semiconductor chips have high heat resistance, the heat dissipation fins of the radiator can be miniaturized, and the water-cooling part can be air-cooled, thereby further miniaturizing the semiconductor device. In addition, since the semiconductor chips have low power loss and high efficiency, the semiconductor device can be made more efficient.

[0054] Description of the label

[0055] 1 Semiconductor chip, 2 Wiring chip, 3 Substrate, 5 Main electrode, 6 Control electrode, 8 First electrode, 9 Second electrode, 10 Wiring, 13 First bonding material, 15 Second bonding material, 16 Connecting member, 17 Packaging material, 18 Mold, 19 Cushioning material, 20 Conductive film

Claims

1. A method for manufacturing a semiconductor device, characterized in that: Has the following processes: bonding a semiconductor chip having a main electrode and a control electrode to a substrate; bonding a wiring chip having a first electrode, a second electrode, and wiring connecting the first electrode and the second electrode to the substrate; joining a main electrode component to the main electrode via a joining material; connecting the control electrode and the first electrode via a connecting member; as well as The joined semiconductor chip, substrate, wiring chip, main electrode component, and connecting component are placed in a mold, and while the front end surface of the main electrode component is pressed against a buffer material provided between the main electrode component and the mold, a packaging material is injected into the mold to encapsulate the semiconductor chip, substrate, wiring chip, main electrode component, and connecting component with the packaging material. The front end portion of the main electrode member protrudes from the upper surface of the packaging material, The sealing material provided on the side surface of the front end portion has a tapered shape in which the film thickness becomes thinner toward the front end surface.

2. A method for manufacturing a semiconductor device, characterized in that: Has the following processes: bonding a semiconductor chip having a main electrode and a control electrode to a substrate; joining a main electrode component to the main electrode via a joining material; as well as The semiconductor chip, the substrate, and the main electrode component after bonding are placed in a mold, and a packaging material is injected into the mold while pressing the front end surface of the main electrode component to a buffer material provided between the main electrode component and the mold, so as to encapsulate the semiconductor chip, the substrate, and the main electrode component with the packaging material. The front end portion of the main electrode member protrudes from the upper surface of the packaging material, The sealing material provided on the side surface of the front end portion has a tapered shape in which the film thickness becomes thinner toward the front end surface.

3. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein: The encapsulation material is not ground.

Citation Information

Patent Citations

  • Semiconductor package and production method therefor, and semiconductor device

    WO2020110170A1