NFC controller

Abstract

The present disclosure provides an NFC controller. The NFC controller is configured to switch from active load modulation to passive load modulation in response to a received signal strength indicator (RSSI) becoming above a given RSSI threshold. The NFC controller includes at least one radio frequency driver. During passive load modulation, the radio frequency driver is configured to select between a first resistance value and a second resistance value based on a load modulation signal level.

Description

[0001] Priority Declaration

[0002] This application claims the benefit of priority to French Patent Application No. 2402153, filed on March 4, 2024, and U.S. Patent Application No. 19 / 068,365, filed on March 3, 2025, the contents of which are incorporated herein by reference in their entirety to the maximum extent permitted by law. Technical Field

[0003] The present disclosure generally relates to near field communication (NFC) controllers and related methods of operation. Background Art

[0004] NFC devices are used all over the world. As such, they must comply with different specifications and use cases.

[0005] There is a need to provide NFC devices that include NFC controllers that comply with the highest international standards and use cases.

[0006] There is a need to address all or some of the shortcomings of known NFC controllers. Summary of the Invention

[0007] One embodiment provides an NFC controller configured to switch from active load modulation to passive load modulation at least when a received signal strength indicator becomes above a first RSSI threshold.

[0008] One embodiment provides an NFC controller configured to switch from active load modulation to passive load modulation at least when a battery charge level is below a first charge threshold or when an NFC charging session begins.

[0009] One embodiment provides a method of operating an NFC controller, including the step of switching from active load modulation to passive load modulation at least when a battery charge level is below a first charge threshold or when an NFC charging session begins.

[0010] According to an embodiment, the controller switches from passive load modulation to active load modulation when the received signal strength indicator becomes above a first RSSI threshold.

[0011] According to an embodiment, the controller switches from active load modulation to passive load modulation when the received signal strength indicator becomes lower than a second RSSI threshold, the first RSSI threshold being higher than the second threshold.

[0012] According to an embodiment, the controller switches from passive load modulation to active load modulation when the battery charge level is above a second charge threshold.

[0013] According to an embodiment, the first RSSI threshold and the second RSSI threshold are based on the modulation type.

[0014] According to an embodiment, the switching is performed when the controller is in card emulation mode.

[0015] According to an embodiment, the received signal strength indicator is filtered or averaged.

[0016] According to an embodiment, the controller includes at least one resistance circuit, and during passive load modulation, the resistance circuit is configured to adopt a first resistance value or a second resistance value based on the load modulation signal level.

[0017] According to an embodiment, the controller includes at least one RF driver, and during passive load modulation, the RF driver is configured to adopt a third resistance value or a fourth resistance value based on a load modulation signal level.

[0018] According to an embodiment, the at least one resistive circuit has a plurality of first branches connected in parallel, each first branch coupling ground to the same first node, each of the first branches comprising a first switch and a resistor; and the at least one RF driver comprises a plurality of second branches coupling ground to a reference voltage rail, each of the second branches comprising: an NMOS transistor and a PMOS transistor connected in series, a conduction node of the NMOS transistor coupled to ground, a conduction node of the PMOS transistor coupled to the reference voltage rail, a conduction node common to the NMOS transistor and the PMOS transistor coupled to a second node; a second switch configured to couple a control node of the PMOS transistor to the reference voltage rail in a first state, and to couple the control nodes of the PMOS transistor and the NMOS transistor to the same third node in a second state; and a third switch configured to couple the control node of the NMOS transistor to ground in a first state, and to couple the control nodes of the PMOS transistor and the NMOS transistor to a third node in a second state, the first states of the second switch and the third switch occurring simultaneously, and the second states of the second switch and the third switch occurring simultaneously.

[0019] According to an embodiment, the first resistance value and the second resistance value correspond to a first number of first switches of the first branch in a conductive state and a second number of first switches of the first branch in a conductive state, respectively; the first switch of the resistance circuit is driven based on a load modulation signal level, the first load modulation signal level corresponds to the first number, and the second load modulation signal level corresponds to the second number.

[0020] According to an embodiment, the third resistance value and the fourth resistance value correspond to a third number and a fourth number of the second switch or the third switch of the second branch in the first state, respectively, the first load modulation signal level corresponds to the third number, and the second load modulation signal level corresponds to the fourth number.

[0021] According to an embodiment, during active load modulation, the resistance circuit is configured to select, based on the damping signal level,: a fifth resistance value configured to reduce a quality factor of an antenna coupled to the controller; and a sixth resistance value configured to increase the quality factor; the fifth resistance value and the sixth resistance value respectively corresponding to a fifth number and a sixth number of the first switches of the first branch that are in a conductive state.

[0022] According to an embodiment, the controller comprises a first logic unit configured to perform an AND logic function on the NFC carrier signal and the load modulation signal during active load modulation to generate a control signal on the third node.

[0023] According to an embodiment, the load modulated signal is a Manchester coded subcarrier of the NFC carrier signal.

[0024] According to an embodiment, the NMOS transistors or PMOS transistors of the second branches are binary weighted from one second branch to the other second branch, and the resistors of the first branches are binary weighted from one first branch to the other first branch.

[0025] According to an embodiment, the first number, the second number, the third number, the fourth number, the fifth number and the sixth number are encoded in one or several registers of a non-volatile memory.

[0026] According to an embodiment, the controller includes a first resistance circuit and a second resistance circuit in the at least one resistance circuit, and a first RF driver and a second RF driver in the at least one RF driver; the controller includes a second logic unit configured to perform an AND logic function on the inverted NFC carrier signal and the load modulation signal during active load modulation to generate an inverted control signal at a third node coupled to the second RF driver.

[0027] One embodiment provides an NFC device, comprising: the NFC controller described above; an antenna; and a matching circuit coupling the controller to the antenna.

[0028] According to an embodiment, the matching circuit includes: a first input node and a second input node of a first resistance circuit and a second resistance circuit coupled to a controller, respectively; a third input node and a fourth input node of a first RF driver and a second RF driver coupled to the controller, respectively; a first output node and a second output node coupled to the antenna; a first capacitor and a second capacitor coupling the first input node to the first output node and the second input node to the second output node, respectively; a third capacitor coupling the first output node to the second output node; a resistor coupling the first output node to the second output node; a first inductor and a second inductor coupling the first RF driver to the fourth node and the second RF driver to the fifth node, respectively; a fourth capacitor and a fifth capacitor coupling the fourth node and the fifth node to ground, respectively; a sixth capacitor and a seventh capacitor coupling the fourth node to the first output node and the fifth node to the second output node, respectively. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The foregoing features and advantages, as well as other features and advantages, will be described in detail in the following description of specific embodiments given by way of illustration and not limitation, with reference to the accompanying drawings, in which:

[0030] Figure 1 A schematic diagram showing a near field communication (NFC) system;

[0031] Figure 2 Schematic representation of the circuitry of the NFC system;

[0032] Figure 3 Schematic representation of the circuitry of the NFC system;

[0033] Figure 4 Schematically Figure 2 circuit;

[0034] Figure 5 Schematically Figure 3 circuit;

[0035] Figure 6 yes Figure 3 The operation timing diagram of the circuit;

[0036] Figure 7 yes Figure 3 Another operating timing diagram of the circuit; and

[0037] Figure 8 yes Figure 3 Another operating timing diagram of the circuit. DETAILED DESCRIPTION

[0038] The same features in the various figures are denoted by the same reference numerals. In particular, common structural and / or functional features in the various embodiments may have the same reference numerals and may have the same structure, dimensions, and material properties.

[0039] For clarity, only the operations and elements that are helpful for understanding the embodiments described herein are shown and described in detail.

[0040] Unless otherwise specified, when two elements are referred to as being connected together, this means being directly connected without any intervening elements other than conductors, and when two elements are referred to as being coupled together, this means the two elements may be connected or they may be coupled via one or more other elements.

[0041] In the following disclosure, unless otherwise stated, when reference is made to absolute position qualifiers, such as terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as terms "above", "below", "higher", "lower", etc., or orientation qualifiers, such as "horizontal", "vertical", etc., reference is made to the orientation shown in the figures.

[0042] Unless otherwise indicated, the expressions "about," "approximately," "substantially," and "approximately" all mean within 10%, preferably within 5%.

[0043] Figure 1 A schematic diagram illustrating a near field communication (NFC) system 100 is shown.

[0044] The NFC system 100 includes a first NFC device 110 that is capable of communicating with a second NFC device 160 .

[0045] NFC, or in other words, a near field communication system, uses a radio frequency electromagnetic field generated by a second device (terminal or reader) 160 to communicate with another device (card) 110. The same device (especially a mobile phone) can operate in reader mode by generating a field intended for the other device, or in card mode by capturing the field generated by the other device. This technology involves establishing communication between two devices at very short distances (less than ten centimeters).

[0046] The NFC technology also allows an NFC device to charge one or more other NFC devices placed nearby.

[0047] In this description, we consider the case where an NFC device is compatible with a system of NFC technology according to the NFC Forum.

[0048] exist Figure 1In the example of FIG. 1 , the NFC device 110 includes a matching circuit 130 (MATCHING CIRCUIT) coupling an antenna 120 (ANTENNA) to an NFC controller 140 (NFCCONTROLLER).

[0049] The NFC controller 140 is coupled to a memory 150 (MEM), such as a non-volatile memory, for example, via a communication bus 142. The memory includes, for example, registers to store the configuration of the NFC controller 140.

[0050] The NFC device 110 is, for example, a phone or smartphone emulated in card mode or a card having a battery 170 coupled to an NFC controller 140 .

[0051] In an example, the NFC device 110 is compatible with standards ISO 14443A / B and / or FeliCA (also known as JIS.X.6319-4).

[0052] This enables, for example, information to be exchanged between a contactless reader and a secure element located in the NFC device 110. This enables applications such as mobile ticketing for public transportation (the mobile phone acts as a transportation ticket) or mobile payment (the mobile phone acts as a payment card).

[0053] When transmitting information between the reader 160 and an object in card emulation mode or tag emulation mode, the reader generates a magnetic field via its antenna, which is typically a 13.56 MHz sine wave in a commonly used standard.

[0054] Two modes of operation are possible: passive modulation mode or active modulation mode. In passive mode, only the reader generates the magnetic field, and the object 110 in card (or tag) emulation mode is passive and acts as a target.

[0055] More specifically, the antenna 120 emulating a ticket or card modulates the field generated by the reader 160 .

[0056] This modulation is performed by modifying the load of the terminals connected to the antenna 120 of the first NFC device 110 .

[0057] By modifying the load at the terminals of antenna 120, the output impedance of the antenna of reader 160 changes due to the magnetic coupling between the two antennas. This causes the amplitude and / or phase of the voltages and currents present in the antennas of the reader and the object to change.

[0058] In this way, the information to be transmitted from the object to the reader is thus transferred into the antenna current of the reader by load modulation.

[0059] The load variation performed in load modulation is reflected in the amplitude modulation and / or phase modulation of the signal (voltage or current) at the reader's antenna. A replica of the antenna current is generated and injected into the reader's receive chain, where it is demodulated and processed to extract the transmitted information.

[0060] In the active modulation mode of operation, both the reader 160 and the first NFC device 110 in the card emulation mode generate an electromagnetic field. Generally speaking, this mode of operation is used when the NFC device 110 is equipped with its own power source (e.g., battery 170), as in the case of a cellular mobile phone, which is in the card emulation mode at this time.

[0061] Each of the NFC devices transmits data using a modulation scheme, for example, an On-Off Keying (OOK) amplitude modulation scheme.

[0062] In this case, the modulation is reflected by the load modification and reference is then made to the communication via active load modulation.

[0063] Compared to passive load modulation, a greater operating distance is achieved, which can reach a range of 10 cm depending on the protocol used.

[0064] Furthermore, the use of active load modulation enables the use of small antennas. However, this type of communication via active load modulation has other disadvantages.

[0065] When communicating via active load modulation, it is desirable to have the signal transmitted by the device in card emulation mode be in phase or anti-phase with the signal received from the reader in order to have the modulation amplitude at the reader, and therefore at the device in card emulation mode, as large as possible in absolute terms. During device development in a known environment, phase adjustment is often necessary on the device in card emulation mode, but this is not always possible.

[0066] Furthermore, in active load modulation, calibration is required to synchronize the card emulator’s local oscillator with the reader signal. This process can take several milliseconds to accurately meet the phase drift requirements of the ISO 144443 standard, for example.

[0067] However, in the transmission field, objects in card emulation mode must be able to operate with older readers with limited performance (such as readers with only an envelope detection reception architecture, as opposed to an architecture with two channels). In addition, many readers used for access control in several countries do not comply with all the specifications of the ISO 144443 standard, and in these cases, the startup time could be shortened to 30 μs, allowing the first command to be issued, for example, 177 μs after the activation of its radio frequency field.

[0068] An example of an envelope detector reader is one that implements the Felica protocol. It has been found that the distance between such an envelope detector reader and the object in card emulation mode affects the coupling effect, particularly when the distance is small, for example less than 50 mm. This can lead to a mismatch in the reader-object system, introducing a phase shift between the signal received by the reader and the signal transmitted by the object, and vice versa. Depending on the use case, this phase shift can be in either direction and can be significant enough to cause incompatibilities with some standards.

[0069] Therefore, a solution needs to be found to overcome this phase shift when the distance between the reader 160 and the emulated card mode device 110 becomes less than 50 mm.

[0070] Furthermore, active modulation requires power from the battery 170, which may cause operational problems if the battery is low.

[0071] The disclosed embodiments provide an NFC controller 140 configured to switch from active load modulation to passive load modulation at least when the battery charge level is below a first charge threshold or when an NFC charging session begins.

[0072] In an example, the NFC controller switches from passive load modulation to active load modulation when the battery charge level is above a second charge threshold.

[0073] These embodiments allow the basic operating state of the device 110 to be maintained even when the battery is low. In addition, it allows charging a depleted battery and initiating an NFC wireless charging session by forcing passive load modulation at low battery levels.

[0074] Other embodiments provide that the controller switches from passive load modulation to active load modulation when a received signal strength indicator (RSSI) becomes above a first RSSI threshold, or that the controller switches from active load modulation to passive load modulation when the received signal strength indicator becomes below a second RSSI threshold, the first RSSI threshold being higher than the second threshold.

[0075] The RSSI is used to approximate the distance between the reader and NFC device 110 and to determine when phase shifts may occur due to close coupling. Because passive load modulation has a much shorter response time than active load modulation, this improves interoperability and performance by shortening the response time and preventing phase degradation in close coupling. This also creates hysteresis to prevent parasitic switching between passive load modulation and active modulation modes due to changes in the RSSI near the first or second RSSI thresholds.

[0076] In an example, the first RSSI threshold and the second RSSI threshold are based on the modulation type.

[0077] In another example, the switching is performed while the controller is in card emulation mode.

[0078] In another embodiment, the RSSI is filtered or averaged. This helps prevent parasitic switching between passive load modulation and active modulation modes due to RSSI variations.

[0079] Figure 2 Schematically shows the circuit of the NFC system 100 according to an embodiment. More precisely, Figure 2 The NFC controller 140, the matching circuit 130 and the antenna 120 of the NFC device 110 are shown. The shown NFC controller 140 allows switching between passive load modulation and active load modulation.

[0080] In the antenna shown, antenna 120 couples node Ant1 to node Ant2.

[0081] In the illustrated example, matching circuit 130 includes two input nodes NRF01 and NRF02; a first capacitor Cp coupling a first output node Ant1 to a second output node Ant2; and a resistor Rp coupling the first output node Ant1 to the second output node Ant2. In the illustrated matching circuit 130, a first inductor Lemi1 and a second inductor Lemi2 couple node NRF01 to node Nm4 and node NRF02 to node Nm5, respectively. A second capacitor Cemi1 and a third capacitor Cemi2 couple nodes Nm4 and Nm5 to ground, respectively. Furthermore, a fourth capacitor Cs1 and a fifth capacitor Cs2 couple node Nm4 to the first output node Ant1 and node Nm5 to the second output node Ant2, respectively. Furthermore, a capacitor Crfi1 and a resistor Rrfi1 are connected in series between node RFI1 and the first output node Ant1. Another capacitor Crfi2 and another resistor Rrfi2 are connected in series between node RFI2 and the second output node Ant2. Nodes RFI1 and RFI2 are configured to receive signals sent by a reader via antenna 120 in card emulation mode and to receive load modulated signals generated by a contactless tag or card coupled to antenna 120 in reader mode.

[0082] The NFC controller 140 further includes two RF drivers 220 , 222 .

[0083] The load modulation signal is, for example, a Manchester coded subcarrier at a frequency of NFC 13.56 MHz.

[0084] In the example represented, RF driver 220 couples node NCTRL_SEL1 to node NRF01 of matching circuit 130 , and RF driver 222 couples node NCTRL_SEL2 to node NRF02 of matching circuit 130 .

[0085] In addition, the RF drivers 220 and 222 are further configured to receive n setup signals ENn, a load modulation signal, a select signal SEL, and a first control signal CTRL and a second control signal CTRL / , respectively. The first control signal CTRL and the second control signal CTRL / are configured to be transmitted on nodes NCTRL_SEL1 and NCTRL_SEL2, respectively. The select signal SEL is also configured to be transmitted on nodes NCTRL_SEL1 and NCTRL_SEL2. The select signal SEL and the n setup signals ENn are, for example, issued by the control unit 260 (control unit) of the NFC controller.

[0086] In the example represented, the NFC controller includes a first logic unit 250 and a second logic unit 252, which are configured to, during active load modulation, respectively: perform an AND logic function on the NFC carrier signal and the load modulation signal to generate a first control signal CTRL on the node NCTRL_SEL1; and perform an AND logic function on the inverted (i.e., phase-shifted by 180°) NFC carrier signal and the load modulation signal to generate a second control signal CTRL / on the node NCTRL_SEL2.

[0087] During passive load modulation, RF drivers 220 and 222 are configured to adopt a third resistance value or a fourth resistance value based on the load modulation signal level. The third and fourth resistance values ​​are set by n setting signals ENn and a select signal SEL. These n setting signals ENn and the select signal are based on, for example, instruction bits stored in a register in memory 150. When the load modulation signal corresponds to an unloaded state, RF drivers 220 and 222 are set to the third resistance value. When the load modulation signal corresponds to a loaded state, RF drivers 220 and 222 are set to the fourth resistance value. The fourth resistance value is, for example, less than one ohm, and the third resistance value is set to high impedance.

[0088] During active load modulation, RF drivers 220 and 222 exhibit an on-resistance value based on signal ENn. The signal on node NRF01 or NRF02 is alternately driven to reference voltage VDD (also known as VDDRF) and then pulled to ground according to the corresponding control signal CTRL or CTRL / .

[0089] Figure 3 The circuitry of the NFC system 100 is schematically represented.

[0090] Figure 3 Examples include Figure 2 The circuit was created and components were added.

[0091] In the example shown, the matching circuit 130 includes further input nodes CDMP1 and CDMP2, and first and second capacitors Ccdmp1 and Ccdmp2 that couple node CDMP1 to a first output node Ant1 and CDMP2 to a second output node Ant2, respectively. The NFC controller 140 also includes two resistive circuits 210 and 212 (RCDMP1 and RCDMP2) that couple ground to nodes CDMP1 and CDMP2, respectively.

[0092] Resistor circuits 210 and 212 are each configured to receive a resistor configuration signal (EN_CDMP), a load modulation signal (Load_modulation_signal), and a damping control signal (Damping_control). The first and second resistance values ​​of resistor circuits 210 and 212 are set, for example, by the resistor configuration signal (EN_CDMP). The first and second resistance values ​​are encoded and stored, for example, in memory 150 via a register.

[0093] In an example, during passive load modulation, the resistance values ​​of the resistor circuits 210 and 212 switch between a first resistance value and a second resistance value depending on the load modulation signal level. The second resistance value is, for example, less than one ohm, and the first resistance value is set to high impedance. In an example, when the load modulation signal corresponds to an unloaded state, the resistor circuits 210 and 212 are set to the first resistance value, and when the load modulation signal corresponds to a loaded state, the resistor circuits 210 and 212 are set to the second resistance value.

[0094] In another example, during active load modulation, the resistance values ​​of the resistor circuits 210 and 212 are switched between a fifth resistance value and a sixth resistance value (equal to or different from the first resistance value and the second resistance value) depending on the damping control signal. In this example, the fifth resistance value is set to be, for example, sufficiently high to reduce the quality factor of the antenna 120 and thereby damp the active load modulation signal so that the internal phase-locked loop can resynchronize with the reader 160 signal. The sixth resistance value is, for example, sufficiently low to ensure a high quality factor of the antenna 120 during resynchronization with the reader signal and active load modulation transmission.

[0095] Figure 3 The example is shown in Figure 2 Another way to implement passive load modulation is provided by switching between two predefined resistance values ​​of the drivers 220 , 222 shown in , and / or by switching between two predefined resistance values ​​of the resistive circuits 210 , 212 .

[0096] Figure 4 Schematically Figure 2 or Figure 3 More precisely, Figure 4 Examples of RF drivers 220, 222 are shown.

[0097] Figure 3 The RF drivers 220, 222 include, for example, N (N is an integer) branches 312, ..., 312n coupling the ground to the reference voltage rail VDD.

[0098] Each of the branches 312, ..., 312n includes NMOS transistors N1, ..., Nn and PMOS transistors P1, ..., Pn connected in series. The conduction nodes of the NMOS transistors are coupled to ground, and the conduction nodes of the PMOS transistors are coupled to the VDD voltage rail. Conductive nodes NC1, ..., NCn, common to the NMOS and PMOS transistors of the corresponding branches, are coupled to node NRFO1 (or NRF02 for the second RF driver 222). In this example, the PMOS and NMOS transistors have different sizes between the branches. For example, their on-resistance is binary-weighted (i.e., twice the value of the previous branch).

[0099] Each of the branches 312, ..., 312n further comprises a switch 302, ..., 302n and another switch 304, ..., 304n.

[0100] The switches 302, ..., 302n of each respective branch couple the control nodes of the PMOS transistors P1, ..., Pn to the VDD voltage rail in a first state, and couple the control nodes of the PMOS and NMOS N1, ..., Nn transistors to the node NCTRL_SEL1 (or NCTRL_SEL2 for the RF driver 222) in a second state.

[0101] Each corresponding branch switch 304, ..., 304n couples the control node of the NMOS transistor to ground in a first state, and couples the control nodes of the PMOS and NMOS transistors to node NCTRL_SEL1 (or NCTRL_SEL2, respectively) in a second state. In the example, the first states of switches 302, ..., 302n and switches 304, ..., 304n occur simultaneously, and the second states of switches 302, ..., 302n and another switch 304, ..., 304n occur simultaneously. The first and second states are controlled by corresponding signals EN1, ..., ENn.

[0102] During passive load modulation, select signal SEL is connected to the control nodes of the NMOS and PMOS transistors of all branches 312, ..., 312n. If signal SEL is similar to VDD (or VDDRF), the PMOS transistors have high impedance and the NMOS transistors are turned on (i.e., they are in a conductive state). Therefore, the NMOS transistors are selected. If signal SEL is similar to ground, the PMOS transistors are selected. In other words, the SEL signal selects either the NMOS line or the PMOS line. The SEL signal depends on, for example, a bit stored in memory 150. On the other hand, when signals En1, ..., ENn place switches 302, ..., 302n and 304, ..., 304n in their first state, they turn off transistors P1, ..., P1n and N1, ..., N1n (i.e., they turn off the corresponding branches that are non-conductive). Signals En1, ..., ENn select which branches 312, ..., 312n are selected. Depending on the number of selected branches, the resistance of RF drivers 220, 222 can be modified. Thus, the first and second resistors can be predefined and encoded on N bits (e.g., N=8 bits). In an example, code 0xFF means that the branches are on, which corresponds to a loaded state, and code 0x00 means that all branches are off, which places RF drivers 220, 222 in a high impedance state, which corresponds to an unloaded state. The configuration bits corresponding to a given resistance are stored, for example, in memory 150. Those skilled in the art may select other codes to implement other resistance values ​​for the loaded and unloaded states of the load modulation signal.

[0103] During active load modulation, the branches of drivers 220 and 222 include push-pull stages (e.g., eight stages if N=8). Each push-pull stage is a pair of PMOS and NMOS transistors P1, ..., Pn, N1, ..., N1n in the same branch that alternately push the output at node NRF01 (or NRF02, respectively) to VDD (VDDRF) and pull it to ground. Signals EN1, ..., Enn enable which of the push-pull stages can be controlled by signal CTRL (or CTRL / , respectively). The disabled push-pull stage is high impedance. The idle states of the CTRL and CTRL / signals can adopt three configurable configurations: both can be high, both can be low, or one can be high and the other low.

[0104] Figure 5 Schematically Figure 3 More precisely, Figure 5 An embodiment of a resistor circuit 210, 212 is shown.

[0105] In the example represented, the resistive circuits 210 , 212 have N branches 412 , . . . , 412 n connected in parallel, each branch coupling ground to the node CDMP1 (respectively CDMP2 ).

[0106] Each branch 412, ..., 412n comprises a switch 424, ..., 424n and a resistor 404, ..., 404n having a resistance value that is different and binary-weighted, for example, from one branch to another. The switches 424, ..., 424n are, for example, transistors.

[0107] In active modulation, switches 424, ..., 424n are selectively enabled according to a damping signal (Damping_control) to define at least two resistance values, for example, encoded on the Nth bit. Depending on which of switches 424, ..., 424n is in a conductive state (depending on the value of the Nth bit), the resistance of the resistive circuit is either a low impedance or, conversely, a high impedance. The resulting resistance is called a damping resistor and is used to reduce the quality factor of antenna 120 and, therefore, damp the active load modulation signal, enabling the internal phase-locked loop to resynchronize with the reader 160 signal.

[0108] During passive load modulation, at least two resistors are predefined, for example, by a resistor configuration signal EN_CDMP. The load modulation signal allows switching between at least two predefined resistance values ​​encoded on N bits. For example, if the code is 0x3FF, all branches 412, ..., 412n are in a conductive state, resulting in a resistance value of the resistor circuit as low as 0.3 ohms, for example, used during a loaded (in other words, modulated) state of the load modulation signal. If the code is 0x000, all branches 412, ..., 412n are in a non-conductive state, resulting in a high impedance used during an unloaded (in other words, unmodulated) state of the load modulation signal. One skilled in the art can select which switches to select to achieve different resistance values.

[0109] Figure 6 yes Figure 3 More precisely, Figure 6 It shows the variation of the load modulation signal over time when simulating a contactless card compliant with the ISO14443-A protocol at a basic rate of 106 kbps.

[0110] In the example shown, the load-modulated signal of the Manchester-coded subcarrier, serving as the NFC signal, exhibits four pulses between a low state and a high state twice between time t1 and time t2 and between time t3 and time t4. The high state corresponds to a loaded state (or a modulated state), and the low state corresponds to an unloaded state (or an unmodulated state). During the loaded state, a predefined resistance of the resistive circuit 210, 212 or the RF driver 220, 222 is set, and another predefined resistance value is set during the unloaded state. This allows passive load modulation to be performed using the same resistive circuit and RF driver as active load modulation.

[0111] Figure 7 yes Figure 3 Another operating timing diagram of the circuit. More precisely, Figure 7 represents the time variation of the load modulation signal and the signal CTRL.

[0112] In the example shown, the load modulation signal is similar to Figure 6 During the pulses of the load modulation signal, the signal CTRL pulses at the carrier frequency 13.56 MHz (indicated by the shaded area) and is off otherwise. The push-pull stages of the RF drivers 220, 222 are driven during the high state of the CTRL signal to implement active load modulation.

[0113] Figure 8 yes Figure 3 Another operating timing diagram of the circuit. More precisely, Figure 8 The example shows the reader 160 signal (line 1), the envelope of the reader signal of line 1 (line 2), the signal between nodes NRF01 and NRF02 (line 3), the signal between nodes Ant1 and Ant2 (line 4), the damping signal (line 5) and the phase-locked loop signal during active load modulation.

[0114] Before time t'1, the reader signal starts to be detected, and the signals of lines 3, 4, and 5 are at a low level, and only the phase-locked loop signal is at a high level.

[0115] At time t'1, the signal between nodes NRF01 and NRF02 oscillates at the carrier frequency during the load modulation signal pulse duration to modulate the reader signal until time t'2. This modulated signal exists at antenna output nodes Ant1 and Ant2 with increasing amplitude until time t'2.

[0116] When the signal between nodes NRF01 and NRF02 stops at time t'2, the damping control signal pulse is enabled, which allows to increase the decay speed of the output signal at the antenna output. If the damping control signal is not used, then the decay will take longer, as shown by the dotted line.

[0117] Once the damping control signal pulse ends, the phase-locked loop signal returns to a high state level until the modulation signal is enabled again at a high level at time t'3. The process described from time t'1 to time t'3 is then repeated for each modulation. In the example shown, seven subcarrier modulation cycles are applied.

[0118] Other aspects of the disclosure are summarized below.

[0119] According to example 1 of the first aspect, the NFC controller 140 is configured to switch from active load modulation to passive load modulation when the battery charge level is below a first charge threshold or when an NFC charging session starts.

[0120] According to example 2 of the first aspect, a method of operating an NFC controller (140) includes the step of switching from active load modulation to passive load modulation at least when a battery charge level is below a first charge threshold or when an NFC charging session starts.

[0121] Example 3: The NFC controller of Example 1, or the method of Example 2, wherein the controller (140) switches from passive load modulation to active load modulation when a received signal strength indicator (RSSI) becomes above a first RSSI threshold.

[0122] Example 4: The NFC controller or method of Example 3, wherein the controller switches from active load modulation to passive load modulation when the received signal strength indicator becomes below a second RSSI threshold, the first RSSI threshold being higher than the second threshold.

[0123] Example 5: The NFC controller of any of Examples 1, 3, or 4, or the method of any of Examples 2 to 4, wherein the controller switches from passive load modulation to active load modulation when the battery charge level is above a second charge threshold.

[0124] Example 6: The NFC controller or method of Example 4 or 5, wherein the first RSSI threshold and the second RSSI threshold are based on a modulation type.

[0125] Example 7: The NFC controller of any of Examples 1, 3 to 6, or the method of any of Examples 2 to 6, wherein the switching is performed when the controller is in a card emulation mode.

[0126] Example 8: The controller or method of Example 3 or any one of 4 to 7 depending upon Example 3, wherein the received signal strength indicator is filtered or averaged.

[0127] Example 9: The controller of any one of Examples 1, 3 to 8, or the method of any one of Examples 2 to 8, wherein the controller (140) includes at least one RF driver (220, 222), and during passive load modulation, the RF driver is configured to adopt a third resistance value or a fourth resistance value based on the load modulation signal level.

[0128] Example 10: The controller or method of Example 9, wherein the controller (140) includes at least one resistance circuit (210, 212), and during passive load modulation, the resistance circuit is configured to adopt a first resistance value or a second resistance value based on a load modulation signal (Load_modulation_signal) level.

[0129] Example 11: The controller or method of Example 10, wherein the at least one resistive circuit (210) has a plurality of first branches (412, ..., 412n) connected in parallel, each first branch coupling ground (GND) to the same first node (CDMP1), each of the first branches comprising a first switch (424, ..., 424n) and a resistor (404, ..., 404n); and the at least one RF driver (220, 222) comprises a plurality of second branches (312, ..., 312n) coupling ground to a reference voltage rail (VDD, VDDRF), each of the second branches comprising: NMOS and PMOS transistors (P1, ..., Pn, N1, ..., Nn) connected in series, a conductive node of the NMOS transistor coupled to ground and a conductive node of the PMOS transistor coupled to the reference voltage rail, A conduction node common to the NMOS transistor and the PMOS transistor is coupled to a second node (NRF01, NRF02); a second switch (302, ..., 302n) configured to couple the control node of the PMOS transistor to a reference voltage rail (VDD) in a first state and to couple the control nodes of the PMOS and NMOS transistors to the same third node (NCTRL_SEL1) in a second state; and a third switch (304, ..., 304n) configured to couple the control node of the NMOS transistor to ground in a first state and to couple the control nodes of the PMOS and NMOS transistors to a third node (NCTRL_SEL1) in a second state, the first states of the second switch and the third switch occurring simultaneously, and the second states of the second switch and the third switch occurring simultaneously.

[0130] Example 12: A controller or method as described in Example 11, wherein the first resistance value and the second resistance value correspond to a first number of first switches (424, ..., 424n) of the first branch (412, ..., 412n) in a conductive state and a second number of first switches of the first branch in a conductive state, respectively; the first switch of the resistance circuit is driven based on a load modulation signal level, the first load modulation signal level corresponds to the first number, and the second load modulation signal level corresponds to the second number.

[0131] Example 13: A controller or method as described in any one of Examples 10 to 12, wherein the third resistance value and the fourth resistance value correspond to a third quantity and a fourth quantity of the second switch or the third switch of the second branch in the first state, respectively, the first load modulation signal level corresponds to the third quantity, and the second load modulation signal level corresponds to the fourth quantity.

[0132] Example 14: The controller or method of any of Examples 9 to 13, wherein during active load modulation, the resistance circuit is configured to adopt, based on a damping signal (Damping_control) level: a fifth resistance value suitable for reducing a quality factor of an antenna (120) coupled to the controller; and a sixth resistance value suitable for increasing the quality factor; the fifth resistance value and the sixth resistance value respectively corresponding to a fifth number and a sixth number of first switches (424, ..., 424n) of the first branch that are in a conductive state.

[0133] Example 15: The controller or method of any of Examples 10 to 14, wherein the controller includes a first logic unit (250) configured to perform an AND logic function on the NFC carrier signal and the load modulation signal during active load modulation to generate a control signal (CTRL) on the third node (NCTRL_SEL1).

[0134] Example 16: The controller or method of Example 15, wherein the load modulation signal (Load_modulation_signal) is a Manchester coded subcarrier of the NFC carrier signal.

[0135] Example 17: The controller or method of any of Examples 10 to 16, wherein the NMOS or PMOS transistors of the second branch are binary weighted from one second branch to the other second branch, and wherein the resistors (404, ..., 404n) of the first branch are binary weighted from one first branch (412, ..., 412n) to the other first branch.

[0136] Example 18: The controller or method of any of Examples 14 to 17, wherein the first, second, third, fourth, fifth, and sixth quantities are encoded in one or more registers of the non-volatile memory (150).

[0137] Example 19: The controller or method of any of Examples 10 to 18, wherein the controller includes a first resistor circuit and a second resistor circuit (RCDMP1, RCDMP2) of the at least one resistor circuit, and a first RF driver and a second RF driver (220, 222) of the at least one RF driver; and the controller includes a second logic unit (252) configured to perform an AND logic function on the inverted NFC carrier signal and the load modulation signal during active load modulation to generate an inverted control signal (CTRL / ) on a third node (NCTRL_SEL2) coupled to the second RF driver.

[0138] According to Example 20, an NFC device (100) includes: the NFC controller (140) of any one of Examples 1 or 3 to 19; an antenna (120); and a matching circuit (130) coupling the controller (140) to the antenna (120).

[0139] Example 21: The apparatus of Example 20, wherein the matching circuit comprises: first and second input nodes (CDMP1, CDMP2) coupled to first and second resistive circuits (210, 212) of the controller, respectively; third and fourth input nodes (NRF01, NRF02) coupled to first and second RF drivers (220, 222) of the controller, respectively; first and second output nodes (Ant1, Ant2) coupled to the antenna (120); first and second capacitors coupling the first input node (CDMP1) to the first output node (Ant1) and the second input node (CDMP2) to the second output node (Ant2), respectively; and a first output node (Ant1, Ant2) coupled to the antenna (120). a third capacitor (Cp) coupling the node to the second output node; a resistor (Rp) coupling the first output node (Ant1) to the second output node (Ant2); a first inductor and a second inductor (Lemi1, Lemi2) coupling the first RF driver (220) to the fourth node (Nm4) and the second RF driver (222) to the fifth node (Nm5), respectively; a fourth capacitor and a fifth capacitor (Cemi1, Cemi2) coupling the fourth node (Nm4) and the fifth node (Nm5) to ground, respectively; a sixth capacitor and a seventh capacitor (Cs1, Cs2) coupling the fourth node (Nm4) to the first output node (Ant1) and the fifth node (Nm5) to the second output node (Ant2), respectively.

[0140] According to Example 22 of the second aspect, an NFC device (100) includes: an NFC controller (140) including a first resistance circuit and a second resistance circuit (210, 212); and a matching circuit (130) coupling the controller (140) to an antenna (120) and including: first and second input nodes (CDMP1, CDMP2) coupled to the first and second resistance circuits (210, 212) of the controller, respectively; first and second output nodes (Ant1, Ant2) configured to be coupled to the antenna; and first and second capacitors (Ccdmp1, Ccdmp2) coupling the first input node (CDMP1) to the first output node (Ant1) and the second input node (CDMP2) to the second output node (Ant2), respectively.

[0141] Example 23: The NFC device of Example 22, wherein the NFC controller (140) is configured to switch from active load modulation to passive load modulation at least when the battery charge level is below a first charge threshold or when an NFC charging session begins.

[0142] Example 24: The NFC device of Example 22 or 23, wherein the controller (140) switches from passive load modulation to active load modulation when a received signal strength indicator (RSSI) becomes above a first RSSI threshold.

[0143] Example 25: The NFC device of Example 23 or 24, wherein the controller switches from active load modulation to passive load modulation when the received signal strength indicator becomes below a second RSSI threshold, the first RSSI threshold being higher than the second threshold.

[0144] Example 26: The NFC device of Example 23 or any one of 24 or 25 depending on 23, wherein the controller switches from passive load modulation to active load modulation when the battery charge level is above a second charge threshold.

[0145] Example 26: The NFC device of Example 25, wherein the first RSSI threshold and the second RSSI threshold are based on a modulation type.

[0146] Example 27: The NFC device of any of Examples 23 to 26, wherein the switching is performed when the controller is in a card emulation mode.

[0147] Example 28: The NFC device of Example 24 or any one of 25 to 27 depending upon Example 24, wherein the received signal strength indicator is filtered or averaged.

[0148] Example 29: The NFC device of any of Examples 23 to 28, wherein during passive load modulation, the resistance circuit is configured to adopt a first resistance value or a second resistance value based on a load modulation signal (Load_modulation_signal) level.

[0149] Example 30: The NFC device of any of Examples 23 to 29, wherein the controller (140) includes at least one RF driver (220, 222), and during passive load modulation, the RF driver is configured to adopt a third resistance value or a fourth resistance value based on the load modulation signal level.

[0150] Example 31: The NFC device of Example 30 dependent upon Example 29, wherein the resistive circuit (210) has a plurality of first branches (412, ..., 412n) connected in parallel, each first branch coupling ground (GND) to the same first node (CDMP1), each first branch comprising a first switch (424, ..., 424n) and a resistor (404, ..., 404n); and the at least one RF driver (220, 222) comprises a plurality of second branches (312, ..., 312n) coupling ground to a reference voltage rail (VDD, VDDRF), each of the second branches comprising: NMOS and PMOS transistors (P1, ..., Pn, N1, ..., Nn) connected in series, a conductive node of the NMOS transistor coupled to ground and a conductive node of the PMOS transistor coupled to a reference voltage rail rail, a conduction node common to the NMOS transistor and the PMOS transistor is coupled to a second node (NRF01, NRF02); a second switch (302, . . . , 302n) configured to couple the control node of the PMOS transistor to a reference voltage rail (VDD) in a first state and to couple the control nodes of the PMOS and NMOS transistors to the same third node (NCTRL_SEL1) in a second state; and a third switch (304, . . . , 304n) configured to couple the control node of the NMOS transistor to ground in a first state and to couple the control nodes of the PMOS and NMOS transistors to a third node (NCTRL_SEL1) in a second state, the first states of the second switch and the third switch occurring simultaneously, and the second states of the second switch and the third switch occurring simultaneously.

[0151] Example 32: The NFC device of any of Examples 29 to 31, wherein the first resistance value and the second resistance value correspond to a first number of first switches (424, ..., 424n) of the first branch (412, ..., 412n) in a conductive state and a second number of first switches of the first branch in a conductive state, respectively; the first switch of the resistance circuit is driven based on a load modulation signal level, the first load modulation signal level corresponds to the first number, and the second load modulation signal level corresponds to the second number.

[0152] Example 33: The NFC device of any of Examples 29 to 32, wherein the third resistance value and the fourth resistance value correspond to a third number and a fourth number, respectively, of the second switch or the third switch of the second branch in the first state, the first load modulation signal level corresponds to the third number, and the second load modulation signal level corresponds to the fourth number.

[0153] Example 34: The NFC device of any of Examples 29 to 33, wherein during active load modulation, the resistance circuit is configured to adopt, based on a damping signal (Damping_control) level: a fifth resistance value suitable for reducing a quality factor of an antenna (120) coupled to a controller; and a sixth resistance value suitable for increasing the quality factor; the fifth resistance value and the sixth resistance value respectively corresponding to a fifth number and a sixth number of first switches (424, ..., 424n) of the first branch in a conductive state.

[0154] Example 35: The NFC device of any of Examples 29 to 34, wherein the controller includes a first logic unit (250) configured to perform an AND logic function on the NFC carrier signal and the load modulation signal during active load modulation to generate a control signal (CTRL) on the third node (NCTRL_SEL1).

[0155] Example 36: The NFC device of Example 35, wherein the load modulation signal (Load_modulation_signal) is a Manchester coded subcarrier of the NFC carrier signal.

[0156] Example 37: The NFC device of any of Examples 29 to 36, wherein the NMOS or PMOS transistors of the second branch are binary-weighted from one second branch to the other second branch, and wherein the resistors (404, . . . , 404n) of the first branch are binary-weighted from one first branch (412, . . . , 412n) to the other first branch.

[0157] Example 38: The NFC device of any of Examples 33 to 37, wherein the first, second, third, fourth, fifth, and sixth quantities are encoded in one or more registers of the non-volatile memory (150).

[0158] Example 39: The NFC device of any of Examples 29 to 38, wherein the controller (140) includes a first RF driver and a second RF driver (220, 222), and the matching circuit includes: a third input node and a fourth input node (NRF01, NRF02) coupled to the first RF driver and the second RF driver (220, 222) of the controller, respectively; a third capacitor (Cp) coupling the first output node to the second output node; a resistor (Rp) coupling the first output node (Ant1) to the second output node (Ant2); a first capacitor (Cp) coupling the first output node to the second output node; and a resistor (Rp) coupling the first output node to the second output node. a first inductor and a second inductor (Lemi1, Lemi2), which couple the first RF driver (220) to the fourth node (Nm4) and the second RF driver (222) to the fifth node (Nm5), respectively; a fourth capacitor and a fifth capacitor (Cemi1, Cemi2), which couple the fourth node (Nm4) and the fifth node (Nm5) to ground, respectively; and a sixth capacitor and a seventh capacitor (Cs1, Cs2), which couple the fourth node (Nm4) to the first output node (Ant1) and the fifth node (Nm5) to the second output node (Ant2), respectively.

[0159] Various embodiments and variations have been described. Those skilled in the art will appreciate that certain features of these embodiments may be combined, and those skilled in the art will readily conceive of other variations. In particular, even if Figure 2 The example of FIG10 depicts two resistor circuits and two RF drivers, but a controller 140 having one resistor circuit and one RF driver can also be envisioned. In this case, nodes NRF01 and NRF02 can be connected together and in phase.

[0160] Finally, based on the functional description provided above, actual implementation of the embodiments and variations described herein is within the capabilities of those skilled in the art. In particular, with respect to the number of resistor values, those skilled in the art can use their knowledge to predefine more than two different resistor values ​​for a resistor circuit or RF driver, depending on passive or active load modulation requirements.

Claims

1. An NFC controller configured to switch from active load modulation to passive load modulation at least when a received signal strength indicator (RSSI) becomes above a first RSSI threshold, wherein the NFC controller includes at least one RF driver, and during passive load modulation, the RF driver is configured to select between a first resistance value and a second resistance value based on a load modulation signal level.

2. The controller of claim 1 , further comprising at least one resistive circuit, and wherein during passive load modulation, the at least one resistive circuit is configured to select between a third resistance value and a fourth resistance value based on a load modulation signal level.

3. The controller of claim 2, wherein: The at least one resistive circuit has a plurality of first branches connected in parallel, each first branch coupling the ground to the same first node, each first branch including a first switch and a resistor; and The at least one RF driver includes a plurality of second branches coupling ground to a reference voltage rail, each of the second branches including: an NMOS transistor and a PMOS transistor connected in series, a conduction node of the NMOS transistor coupled to ground and a conduction node of the PMOS transistor coupled to a reference voltage rail, a common conduction node of the NMOS transistor and the PMOS transistor coupled to a second node; a second switch configured to couple a control node of the PMOS transistor to a reference voltage rail in a first state and to couple control nodes of the PMOS transistor and the NMOS transistor to a same third node in a second state; and a third switch configured to couple a control node of the NMOS transistor to ground in a first state and to couple the control nodes of the PMOS transistor and the NMOS transistor to a third node in a second state, the first states of the second switch and the third switch occurring simultaneously, and the second states of the second switch and the third switch occurring simultaneously.

4. The controller of claim 3 , wherein the first resistance value and the second resistance value correspond to a first number of first switches of the first branch in a conductive state and a second number of first switches of the first branch in a conductive state, respectively; and the first switches of the resistance circuit are driven based on a load modulation signal level, the first load modulation signal level corresponds to the first number, and the second load modulation signal level corresponds to the second number.

5. The controller of claim 3 , wherein the third resistance value and the fourth resistance value correspond to a third number and a fourth number of the second switch or the third switch of the second branch in the first state, respectively, the first load modulation signal level corresponds to the third number, and the second load modulation signal level corresponds to the fourth number.

6. The controller of claim 3 , wherein during active load modulation, the resistor circuit is configured to employ, based on the damping signal level: a fifth resistance value adapted to reduce a quality factor of an antenna coupled to the controller; and a sixth resistance value suitable for increasing the quality factor; The fifth resistance value and the sixth resistance value respectively correspond to a fifth number and a sixth number of the first switches of the first branch that are in a conductive state.

7. The controller of claim 6, wherein the first number, the second number, the third number, the fourth number, the fifth number, and the sixth number are encoded in one or more registers of the non-volatile memory. 8 . The controller of claim 3 , wherein the controller comprises a first logic unit configured to perform an AND logic function on the NFC carrier signal and the load modulation signal during active load modulation to generate the control signal on the third node.

9. The controller of claim 8, wherein the load modulation signal is a Manchester coded subcarrier of the NFC carrier signal.

10. The controller of claim 3, wherein the NMOS transistors or PMOS transistors of the second branch are binary weighted from one second branch to the other second branch, and wherein the resistors of the first branch are binary weighted from one first branch to the other first branch.

11. The controller of claim 3 , wherein the controller comprises first and second resistor circuits of the at least one resistor circuit, and first and second RF drivers of the at least one RF driver; and the controller comprises a second logic unit configured to perform an AND logic function on the inverted NFC carrier signal and the load modulation signal during active load modulation to generate an inverted control signal at a third node coupled to the second RF driver.

12. The controller of claim 1, wherein the controller switches from passive load modulation to active load modulation when the battery charge level is below a first charge threshold or when an NFC charging session begins.

13. The controller of claim 12, wherein the controller switches from passive load modulation to active load modulation when the battery charge level is above a second charge threshold.

14. The controller of claim 1, wherein the controller switches from active load modulation to passive load modulation when the received signal strength indicator becomes below a second RSSI threshold, the first RSSI threshold being higher than the second threshold.

15. The controller of claim 14, wherein the first RSSI threshold and the second RSSI threshold are based on a modulation type.

16. The controller of claim 1, wherein the switching is performed when the controller is in a card emulation mode.

17. The controller of claim 1, wherein the received signal strength indicator is filtered or averaged.

18. An NFC device, comprising: The NFC controller according to claim 1; antenna; and a matching circuit coupling the controller to the antenna.

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