A low-UV-degradation crystalline silicon heterojunction solar cell and its fabrication method

Abstract

This invention provides a low-UV-attenuation crystalline silicon heterojunction solar cell and its fabrication method. The solar cell includes a light-receiving surface layer, a wide-bandgap semiconductor film layer, an amorphous silicon layer, and a silicon substrate, sequentially arranged. The wide-bandgap semiconductor film layer and the amorphous silicon layer form a heterojunction. The wide-bandgap semiconductor film layer has a bandgap greater than 3 eV and a thickness of 5 nm-20 nm. This wide-bandgap semiconductor film layer possesses UV light absorption capability and can generate photogenerated carriers in the UV band. These photogenerated carriers can be transported to the silicon substrate via the heterojunction and participate in photoelectric conversion. This invention improves the UV stability and conversion efficiency of the crystalline silicon heterojunction solar cell.

Description

Technical Field

[0001] This invention relates to the field of solar cell technology, and in particular to a low-UV-attenuation crystalline silicon heterojunction solar cell and its fabrication method. Background Technology

[0002] Heterojunction with Intrinsic Thin-layer (HJT) solar cells are a type of high-efficiency solar cell structure that combines the excellent electrical properties of crystalline silicon with the good passivation performance of amorphous silicon. In recent years, they have been widely used in the high-end photovoltaic market. These cells typically employ an amorphous silicon layer and a crystalline silicon substrate to form a heterojunction structure. The passivation effect of amorphous silicon is utilized to reduce interfacial recombination, thereby achieving high open-circuit voltage and high conversion efficiency.

[0003] However, in practical applications, HJT cells face a long-standing and unresolved problem: UV-induced degradation (UVID) in the ultraviolet band. Because amorphous silicon itself has weak absorption of short-wavelength ultraviolet light, and its heterojunction structure with the crystalline silicon substrate is prone to inducing interface defects under high-energy photon irradiation, leading to increased carrier recombination rate and consequently a decrease in photoelectric conversion efficiency.

[0004] To address the UVID problem of HJT solar cell modules under ultraviolet irradiation, existing technologies have proposed introducing light-converting films into the encapsulation layer. For example, organic down-conversion materials are doped into conventional ethylene-vinyl acetate (EVA) encapsulation films to construct a light-converting film structure with UV-Vis light conversion capabilities, aiming to convert ultraviolet photons into visible light usable by silicon cells and improve the spectral response range of the device. However, due to the poor photostability of organic down-conversion materials, they are prone to structural damage and even decomposition after long-term ultraviolet irradiation, leading to a decline or even failure of their down-conversion function. Furthermore, their degradation products may induce yellowing and uncontrolled cross-linking of the EVA film, resulting in a decrease in module transmittance and power generation. Some studies have also attempted to use inorganic down-conversion materials, such as rare-earth ion-doped phosphors and quantum dots, in combination with encapsulation glass or EVA films to improve the system's ultraviolet stability. However, inorganic downconversion materials generally suffer from problems such as low quantum yield, strong parasitic absorption, and poor dispersion compatibility with matrix materials. Their efficiency and reliability bottlenecks in component-level applications have not yet been resolved, thus preventing large-scale industrial applications. Summary of the Invention

[0005] To address the above problems, according to a first aspect of the present invention, a low-UV-attenuation crystalline silicon heterojunction solar cell is provided, comprising a light-receiving surface layer, a wide bandgap semiconductor film layer, an amorphous silicon layer, and a silicon substrate arranged sequentially, wherein the wide bandgap semiconductor film layer and the amorphous silicon layer form a heterojunction;

[0006] The wide bandgap semiconductor film has a bandgap width greater than 3eV and a thickness of 5nm-20nm. The wide bandgap semiconductor film has light absorption capability in the ultraviolet band and can generate photogenerated carriers in the ultraviolet band. The photogenerated carriers can be transported to the silicon substrate through the heterojunction and participate in photoelectric conversion.

[0007] Optionally, the amorphous silicon layer is an intrinsic amorphous silicon layer or a doped amorphous silicon layer.

[0008] Optionally, the amorphous silicon layer comprises:

[0009] A buffer transition sublayer, in contact with the wide bandgap semiconductor film layer, is an intrinsic amorphous silicon layer or a micro-doped amorphous silicon layer, used to achieve a gradual bandgap connection;

[0010] A doped amorphous silicon sublayer is in contact with the silicon substrate to enable selective carrier transport.

[0011] Optionally, the slope of the band edge change between the buffer transition sublayer and the adjacent film layer is less than 0.1 eV / nm;

[0012] The thickness of the buffer transition sublayer is 2nm-5nm;

[0013] The thickness of the doped amorphous silicon sublayer is 3nm-30nm.

[0014] Optionally, the doped amorphous silicon sublayer is a P-type amorphous silicon layer, and the dopant is boron with a boron doping concentration of 1×10⁻⁶. 19 cm -3 -1×10 20 cm -3 ;

[0015] Optionally, the doped amorphous silicon sublayer is an N-type amorphous silicon layer, and the dopant is phosphorus with a phosphorus doping concentration of 1×10⁻⁶. 19 cm -3 -5×10 20 cm -3 .

[0016] Optionally, oxygen vacancies or rare earth metal ions are introduced into the wide bandgap semiconductor film to form a controllable trap state structure;

[0017] The amorphous silicon layer has a microstructure that forms a directional migration path for charge carriers. The microstructure consists of an asymmetric doping distribution, a nanocrystalline-amorphous impurity phase region, or a band gap gradient region.

[0018] According to a second aspect of the present invention, a method for fabricating a low-UV-degradation crystalline silicon heterojunction solar cell as described above is provided, comprising the following steps:

[0019] Provide silicon substrate;

[0020] An amorphous silicon layer is formed on the surface of the silicon substrate;

[0021] A wide bandgap semiconductor film with a bandgap width greater than 3eV and a thickness of 5nm-20nm is deposited on the surface of the amorphous silicon layer to form a heterojunction with the amorphous silicon layer;

[0022] A light-receiving surface layer is formed on the surface of the wide bandgap semiconductor film to obtain a low-UV-attenuation crystalline silicon heterojunction solar cell.

[0023] Optionally, forming an amorphous silicon layer on the surface of the silicon substrate includes the following steps:

[0024] A doped amorphous silicon sublayer is formed on the surface of the silicon substrate;

[0025] A buffer transition sublayer is formed on the surface of the doped amorphous silicon sublayer, wherein the buffer transition sublayer is an intrinsic amorphous silicon layer or a micro-doped amorphous silicon layer.

[0026] Optionally, the amorphous silicon layer is formed by plasma-enhanced chemical vapor deposition, with an H2 dilution ratio greater than 80% during the deposition process;

[0027] The wide bandgap semiconductor film is deposited using a reactive magnetron sputtering process, with an oxygen to argon volume ratio of 1:50 to 1:10.

[0028] The low-UV attenuation crystalline silicon heterojunction solar cell of this invention achieves synergistic optimization of efficient UV light absorption and directional carrier transport by sequentially assembling a light-receiving surface layer, a wide-bandgap semiconductor film layer, an amorphous silicon layer, and a silicon substrate, forming a heterojunction structure between the wide-bandgap semiconductor film layer and the amorphous silicon layer. This completely solves the UV attenuation problem. Specifically, firstly, the wide-bandgap semiconductor film layer has a bandgap width greater than 3 eV, effectively absorbing UV photons with wavelengths less than 400 nm and generating photogenerated carriers in the UV band, thus enhancing UV light utilization efficiency. Secondly, the conduction band step, valence band step, and Fermi level difference of the heterojunction are strictly controlled within specific ranges, achieving selective carrier transport, reducing interfacial recombination, and improving the collection efficiency of photogenerated carriers and the overall photoelectric conversion efficiency of the cell. Thirdly, the interface defect state density is effectively reduced, decreasing the formation of carrier recombination centers, ensuring high-quality heterojunction interfaces, and enhancing the stability and durability of the device. Therefore, this invention significantly improves the ultraviolet stability and conversion efficiency of crystalline silicon heterojunction solar cells through multi-dimensional synergistic design, including high-efficiency ultraviolet absorption of wide bandgap semiconductor films, precise band matching at heterojunction interfaces, and low-defect interface quality. It effectively solves the problem of ultraviolet degradation (UVID) and significantly improves the photoelectric conversion performance of the device.

[0029] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, the preferred embodiments of the present invention are described in detail below. Attached Figure Description

[0030] Figure 1 A schematic partial structural diagram of a low-UV-degradation crystalline silicon heterojunction solar cell according to an embodiment of the present invention is shown;

[0031] Figure 2 A schematic flowchart of a method for fabricating a low-UV-degradation crystalline silicon heterojunction solar cell according to an embodiment of the present invention is shown.

[0032] Figure 3 A schematic structural diagram of a low-UV-degradation crystalline silicon heterojunction solar cell according to Embodiment 1 of the present invention is shown.

[0033] Figure 4 A schematic diagram of the energy band and carrier transport of a TiO2 / i-aSi:H heterojunction according to Embodiment 1 of the present invention is shown.

[0034] Figure 5 An XRD pattern of a TiO2 layer according to Embodiment 1 of the present invention is shown;

[0035] Figure 6 A scanning electron microscope image of a TiO2 layer according to Embodiment 1 of the present invention is shown;

[0036] Figure 7 An EDX image of the TiO2 layer according to Embodiment 1 of the present invention is shown;

[0037] Figure 8 A schematic structural diagram of a crystalline silicon heterojunction solar cell in Comparative Example 1 is shown.

[0038] Figure 9 The UV-VIS transmittance spectra of the TiO2 layers in Embodiments 1 to 3 of the present invention are shown.

[0039] Figure 10 The UV-VIS transmission absorption spectra of the TiO2 layers according to Embodiments 1 to 3 of the present invention are shown.

[0040] Figure 11 The UV-VIS transmission reflectance spectra of the TiO2 layers according to Embodiments 1 to 3 of the present invention are shown. Detailed Implementation

[0041] The technical solution of the present invention will be further described below with reference to specific embodiments.

[0042] Figure 1 A schematic partial structural diagram of a low-UV-degradation crystalline silicon heterojunction solar cell according to an embodiment of the present invention is shown. Figure 1 As shown, this low-UV-attenuation crystalline silicon heterojunction solar cell includes a light-receiving surface layer, a wide-bandgap semiconductor film layer, an amorphous silicon layer, and a silicon substrate arranged sequentially. The wide-bandgap semiconductor film layer and the amorphous silicon layer form a heterojunction. The wide-bandgap semiconductor film layer has a bandgap width greater than 3 eV and a thickness of 5 nm-20 nm. The wide-bandgap semiconductor film layer has light absorption capability in the ultraviolet band and can generate photogenerated carriers in the ultraviolet band. The photogenerated carriers can be transported to the silicon substrate through the heterojunction and participate in photoelectric conversion.

[0043] The thickness of the wide bandgap semiconductor film can be 5 nm, 10 nm, or 20 nm, or any other value within the 5 nm-20 nm range. When the film thickness is less than 5 nm, the absorption capacity for ultraviolet light is significantly insufficient, resulting in a limited number of photogenerated carriers and making it difficult to effectively utilize ultraviolet light energy. While when the film thickness is greater than 20 nm, although ultraviolet absorption is enhanced, the excessively thick film exacerbates recombination losses of photogenerated carriers. Furthermore, the increased carrier migration distance introduces additional series resistance, affecting the overall fill factor and output efficiency of the battery. Therefore, controlling the thickness of the wide bandgap semiconductor film within the aforementioned range helps ensure efficient ultraviolet light absorption and low-loss carrier transport, thereby improving the photoelectric conversion performance of the device and suppressing ultraviolet degradation effects.

[0044] The bandgap width of this wide bandgap semiconductor film can be, for example, 3 eV, 3.5 eV, 4 eV, 4.5 eV, or 5 eV, or any other value between 3 eV and 5 eV. Controlling the bandgap width within this range helps to achieve effective absorption in the ultraviolet band (wavelength less than 400 nm), thereby exciting a sufficient number of photogenerated carriers. Compared to conventional bandgap semiconductor materials, materials with a bandgap width greater than 3 eV exhibit lower parasitic absorption in the visible light band, which is beneficial for improving the overall visible light transmittance of the device, thereby increasing the number of photons reaching the silicon substrate and improving the short-circuit current density (J). SC Furthermore, the bandgap widths within the aforementioned range provide a deeper conduction band well compared to smaller bandgap widths, making it easier for high-energy electrons formed under ultraviolet light excitation to cross the heterojunction and be injected into the silicon substrate under the drive of the band slope, thereby enhancing the directional migration and effective separation efficiency of charge carriers. Moreover, a well-designed bandgap width can effectively suppress carrier recombination at the heterojunction interface caused by energy level mismatches or defect states, reducing the interface recombination rate and contributing to an increase in open-circuit voltage (V). OC And device stability.

[0045] This wide-bandgap semiconductor film possesses the ability to effectively absorb photons in the ultraviolet band (λ < 400 nm), and its absorption coefficient α is greater than 10 in the ultraviolet band. 4 cm -1 This ensures sufficient ultraviolet light energy is absorbed and incident, and that electron transitions are excited to form photogenerated carriers. In some embodiments, the photogenerated carriers generated by this wide-bandgap semiconductor film after ultraviolet excitation have a charge density higher than 10. -7 The wide bandgap semiconductor film has a long lifetime, allowing charge carriers sufficient time to migrate to the heterojunction interface and be injected into the silicon substrate before recombination, thus participating in the photoelectric conversion process. Therefore, the wide bandgap semiconductor film not only possesses ultraviolet absorption capabilities but also photoelectric response capabilities, which helps to suppress ultraviolet-induced interface performance degradation and improve the overall photoelectric conversion efficiency and long-term stability of the solar cell.

[0046] The formation of the heterojunction between the wide-bandgap semiconductor film and the amorphous silicon layer is the key foundation for achieving the technical effects of the embodiments of the present invention. The absence of a heterojunction would lead to a significant decrease in carrier transport efficiency, severe interfacial recombination, and an inability to effectively solve the ultraviolet degradation problem, thus failing to achieve the expected effect of the high-efficiency, low-UV-degradation crystalline silicon heterojunction solar cell claimed in this application. It should be noted that, unlike existing wide-bandgap heterojunctions used only for passivation or blocking, the heterojunction structure proposed in the embodiments of the present invention not only serves for passivation and selective transport but also possesses carrier generation and response capabilities in the ultraviolet band, enabling ultraviolet photogenerated carriers to participate in the main channel transport, rather than merely undergoing local recombination or conversion into heat.

[0047] In summary, the low-UV attenuation crystalline silicon heterojunction solar cell of this invention achieves synergistic optimization of efficient UV light absorption and directional carrier transport by sequentially configuring a light-receiving surface layer, a wide bandgap semiconductor film layer, an amorphous silicon layer, and a silicon substrate to form a heterojunction structure between the wide bandgap semiconductor film layer and the amorphous silicon layer, thus completely solving the UV attenuation problem. Specifically, the wide bandgap semiconductor film layer has a bandgap width greater than 3 eV, which can effectively absorb UV photons with wavelengths less than 400 nm and generate photogenerated carriers in the UV band, enhancing the utilization efficiency of UV light. Therefore, the solution of this invention significantly improves the UV stability and conversion efficiency of crystalline silicon heterojunction solar cells, effectively solves the UV attenuation (UVID) problem, and significantly improves the photoelectric conversion performance of the device.

[0048] In some preferred embodiments, the conduction band step of the heterojunction can be, for example, 0.2 eV, 0.3 eV, or 0.4 eV, or any other value within the range of 0.2 eV to 0.4 eV. An excessively large conduction band step reduces the efficiency of electron injection from the wide-bandgap semiconductor film to the amorphous silicon layer or silicon substrate, thereby suppressing photocurrent and increasing the probability of interfacial recombination. Conversely, an excessively small conduction band step causes electrons to flow away in the opposite direction, reducing the collection efficiency of photogenerated carriers. By controlling the conduction band step within the aforementioned range, it is beneficial to achieve synergistic optimization of electron selective transport and interfacial recombination suppression, thereby improving photoelectric conversion efficiency.

[0049] The valence band step of this heterojunction can be, for example, 0.1 eV, 0.2 eV, 0.3 eV, 0.4 eV, or 0.5 eV, or any other value within the range of 0.1 eV to 0.5 eV. If the valence band step is too large, it will create a barrier to hole transport, leading to a decrease in hole injection efficiency, thereby increasing the carrier recombination rate at the interface and reducing the overall photoelectric conversion efficiency of the device. Conversely, if the valence band step is too small, it will weaken band selectivity, making it difficult to effectively suppress reverse carrier injection, thus causing asymmetry in the carrier injection direction, reducing the selective extraction capability of holes, and also hindering device efficiency improvement. Therefore, by controlling the valence band step within the aforementioned range, hole transport capability can be effectively improved and interface recombination reduced.

[0050] The Fermi level difference of the heterojunction can be, for example, 0.05 eV, 0.1 eV, 0.2 eV, 0.3 eV, 0.4 eV, or 0.5 eV, or any other value within the range of 0.05 eV-0.5 eV. If the Fermi level difference is too large, it will increase the interface barrier, hindering the effective injection and transport of charge carriers and increasing the interface recombination rate. Conversely, if the Fermi level difference is too small, the selective transport capability of charge carriers may be insufficient due to a lack of driving force for band alignment. Therefore, controlling the Fermi level difference within the aforementioned range helps optimize the band alignment state at the heterojunction interface, reduces the probability of interface recombination, and improves the collection efficiency of photogenerated carriers and the overall device performance.

[0051] The interface defect state density of this heterojunction can be, for example, 1 × 10⁻⁶. 10 cm -2 ·eV -1 1×10 11 cm -2 ·eV -1 Or 1×10 12 cm -2 ·eV -1 It can also be 1×10 10 cm -2 ·eV -1 -1×10 12 cm -2 ·eV -1 Any other value within the range is acceptable. If the interface defect state density is too high, a large number of recombination centers are easily formed at the heterojunction interface, thereby increasing carrier recombination losses and reducing battery performance. If the interface defect state density is too low, although the interface quality can be further optimized, it is difficult to achieve under the current material system and deposition process conditions, and the benefits tend to saturate. Therefore, by controlling the interface defect state density within the above range, a good balance can be achieved between technical feasibility and performance improvement.

[0052] In the embodiments of this invention, the conduction band step, valence band step, and Fermi level difference of the heterojunction are strictly controlled within a specific range, achieving selective carrier transport, reducing interfacial recombination, and improving the collection efficiency of photogenerated carriers and the overall photoelectric conversion efficiency of the battery. The interface defect state density is effectively reduced, decreasing the formation of carrier recombination centers, ensuring the high quality of the heterojunction interface, and enhancing the stability and durability of the device.

[0053] In one embodiment, the amorphous silicon layer is an intrinsic amorphous silicon layer or a doped amorphous silicon layer.

[0054] In another embodiment, the amorphous silicon layer includes a buffer transition layer and a doped amorphous silicon sublayer. The buffer transition layer is disposed between the wide bandgap semiconductor film and the doped amorphous silicon sublayer, and is in direct contact with the wide bandgap semiconductor film. This buffer transition layer is an intrinsic amorphous silicon layer or a micro-doped amorphous silicon layer, possessing a low carrier concentration and band gradient, enabling a gradual bandgap connection between the two materials, thereby effectively mitigating bandgap abrupt changes at the interface and suppressing interfacial recombination caused by energy level mismatch. The doped amorphous silicon sublayer is in direct contact with the silicon substrate, possessing n-type or p-type doping characteristics, enabling selective transport of photogenerated carriers of corresponding polarities, improving carrier injection efficiency, and reducing back diffusion losses. This structural design enables the establishment of a multi-level functional layer synergy mechanism between the wide bandgap semiconductor film and the silicon substrate, effectively reducing the scattering and recombination probability of charge carriers at the interface, constructing a stable cross-layer transport channel, and realizing the relay injection and efficient transport of photogenerated charge carriers under ultraviolet excitation conditions. This improves the photoelectric conversion efficiency of crystalline silicon heterojunction solar cells and enhances their stability under ultraviolet irradiation.

[0055] In one embodiment, the band edge transition slope between the buffer transition sublayer and the adjacent film layer is less than 0.1 eV / nm, preferably 0.01 eV / nm-0.1 eV / nm. Here, "band edge transition slope" refers to the rate of change of band energy at the band edge or valence band edge in the direction perpendicular to the film layer, reflecting the smoothness of band alignment at the heterojunction interface. An excessively small band edge transition slope leads to insufficient band drive, affecting effective carrier injection. Conversely, an excessively large band edge transition slope causes strong energy level bending and barrier abrupt changes, inducing interface trap state aggregation and increasing the probability of carrier recombination. Therefore, by setting a reasonable range for the band edge transition slope, it is helpful to achieve a gradual band transition between adjacent layers, thereby effectively suppressing interface state formation and nonradiative recombination caused by abrupt energy level changes. A good balance can be achieved between band edge smoothness and transport drive force, thereby optimizing the band structure of the heterojunction interface, reducing interface recombination losses, and improving the photoelectric conversion efficiency and operational stability of the device.

[0056] In some embodiments, the thickness of the buffer transition layer is 2nm-5nm, for example, it can be 2nm, 3nm, 4nm, or 5nm, or any other value within the 2nm-5nm range. When the thickness of the buffer transition layer is less than 2nm, the bandgap tuning region is insufficient, making it difficult to fully realize bandgap modulation, resulting in the continued existence of interfacial bandgap abrupt changes, which in turn leads to a higher carrier recombination rate. When the thickness is greater than 5nm, although the band edge transition is smoother, it leads to an increase in the overall device thickness, requiring carriers to travel a longer distance to inject into the main absorption region, thereby increasing the recombination probability and series resistance, and reducing device efficiency. Therefore, by limiting the thickness of the buffer transition layer within the above range, it is helpful to achieve a gradual connection of band-edge energy levels between material interfaces, thereby effectively reducing the risk of barrier abrupt changes and trap state formation caused by energy level mismatch at the interface. It can also achieve effective synergy between suppressing interface state density, optimizing band structure, and balancing carrier transport paths, thereby improving the injection efficiency of photogenerated carriers and the overall photoelectric conversion performance of the device, and enhancing its long-term stability.

[0057] In some embodiments, the thickness of the doped amorphous silicon sublayer is 3nm-30nm, for example, it can be 3nm, 10nm, 20nm, or 30nm, or any other value within the 3nm-30nm range. When the thickness of the doped amorphous silicon sublayer is less than 3nm, the excessively thin doped region will lead to insufficient barrier formation, limiting the electric field modulation capability, hindering effective carrier injection and collection, and easily causing problems such as leakage current or insufficient interface passivation. When the thickness of the doped amorphous silicon sublayer is greater than 30nm, although it can provide a strong carrier blocking capability, the carrier migration path is lengthened, the series resistance increases, and the accumulation of doping defects also increases, which may exacerbate recombination losses and reduce device performance. Therefore, by limiting the thickness of the doped amorphous silicon sublayer within the above range, the carrier injection efficiency and interface stability can be optimized while ensuring the selective transport capability of holes or electrons, thereby improving the open-circuit voltage, short-circuit current density, and overall photoelectric conversion efficiency of the device. This thickness range is also conducive to the collaborative construction of a low-composite, highly selective heterojunction interface structure with the buffer transition sublayer, which helps to improve the long-term operational stability and UV degradation resistance of the device.

[0058] In some embodiments, the doped amorphous silicon sublayer is a P-type amorphous silicon layer, the dopant is boron, and the boron doping concentration is 1×10⁻⁶. 19 cm -3 -1×10 20 cm -3 For example, it can be 1×10 19 cm -3 5×10 19 cm -3 Or 1×10 20 cm -3Moderate boron doping can create an effective built-in electric field, enhancing the selective collection of holes and thus helping to suppress electron back diffusion and improve carrier separation efficiency. Furthermore, this doping concentration range allows the P-type amorphous silicon layer to possess good conductivity while maintaining stable band edge positions, ensuring a well-matched bandgap structure with adjacent layers, which helps reduce the interface barrier and improve charge injection efficiency. If the boron doping concentration is too high, it easily forms bandgap states or defect aggregation, which can increase the interface recombination rate and affect device lifetime and performance stability. Conversely, if the doping concentration is too low, the P-type characteristics are not obvious, and the hole collection ability is weakened. In addition, within the above doping range, it can synergize with the buffer transition layer to effectively suppress interface recombination while maintaining sufficient conductivity, thereby improving the device's open-circuit voltage and fill factor (FF). Therefore, controlling the boron doping concentration of the P-type amorphous silicon layer within the above range helps to achieve an optimized balance between conductivity, carrier selectivity, interface compatibility, and stability.

[0059] In other embodiments, the doped amorphous silicon sublayer is an N-type amorphous silicon layer, and the dopant is phosphorus with a phosphorus doping concentration of 1×10⁻⁶. 19 cm -3 -5×10 20 cm -3 For example, it can be 1×10 19 cm -3 1×10 20 cm -3 Or 5×10 20 cm -3 Moderate phosphorus doping helps to create a reasonable built-in electric field between the amorphous silicon layer and the silicon substrate, enhancing the spatial separation of electrons and holes, thereby reducing the interfacial recombination rate and increasing the open-circuit voltage. Furthermore, an appropriate doping concentration ensures good conductivity in the amorphous silicon layer, reducing series resistance and improving the device's fill factor. Excessive phosphorus doping can introduce excessive defect states or induce bandgap contraction in the amorphous silicon network, increasing the density of interfacial recombination centers and hindering long-term stable operation. Conversely, insufficient doping concentration results in weak N-type characteristics, leading to decreased electron extraction capability and affecting device output performance. Therefore, limiting the phosphorus doping concentration within the aforementioned range can effectively control the electron carrier concentration of amorphous silicon, enhancing its selective electron collection capability, thereby achieving efficient electron injection and transport in heterojunction structures and improving the device's photocurrent density and overall conversion efficiency.

[0060] In some embodiments, oxygen vacancies or rare-earth metal ions are introduced into the wide-bandgap semiconductor film to form a controllable trap state structure. The amorphous silicon layer has a microstructure that forms a directional migration path for charge carriers, and this microstructure consists of asymmetric doping distribution, a nanocrystalline-amorphous impurity phase region, or a bandgap gradient region. This structural design further enhances the bandgap control capability and charge carrier transport efficiency at the heterojunction interface, thereby improving the overall device performance. Specifically, oxygen vacancies (V0.05) are introduced into the wide-bandgap semiconductor film. o Doping with rare earth metal ions such as cerium, neodymium, and lanthanum helps introduce shallow or neutral trap states into the energy band. These trap states can temporarily trap high-energy photogenerated carriers under ultraviolet light, reducing their nonradiative recombination rate and enabling controlled release under the drive of band matching mechanisms, thus playing a buffering and guiding role and effectively improving the utilization rate and interface migration efficiency of photogenerated carriers. Furthermore, the special coordination structure of rare earth ions in the crystal lattice helps suppress interface stress concentration and the accumulation of structural defects, enhancing the thermal stability and radiation resistance of the film. On the other hand, the microstructure constructed in the amorphous silicon layer can guide carriers to migrate directionally along specific paths. For example, asymmetric doping distribution can form a built-in electric field, enabling selective acceleration and separation of electrons or holes. The nanocrystalline-amorphous hybrid phase region modulates the carrier transport path through the heterogeneous interface barrier, extending its lifetime and reducing the probability of interface recombination. The bandgap gradient region provides a continuous band slope, which is beneficial for barrier-free injection and efficient cross-layer migration of photogenerated carriers under gradient-driven conditions. Therefore, by introducing controllable trap state structures and micro-guiding structures into the wide bandgap film and the amorphous silicon layer, respectively, not only can the band alignment and interface quality be optimized in a synergistic manner, but the carrier generation rate, migration efficiency and recombination suppression capability under ultraviolet excitation conditions can also be improved, thereby significantly enhancing the photoelectric conversion efficiency and anti-ultraviolet degradation performance of crystalline silicon heterojunction solar cells.

[0061] In some embodiments, the low UV decay crystalline silicon heterojunction solar cell has a symmetrical or asymmetrical structure, preferably an asymmetrical structure. "Asymmetrical structure" refers to differences in the type of functional film, band structure, doping type, or film thickness used on the light-receiving side and the back side of the device. Specifically, compared to the consistent film stacking on both sides of a symmetrical structure, an asymmetrical structure can be differentiated and optimized according to the illumination conditions, carrier types, and migration directions of different regions of the device. For example, on the light-receiving side facing sunlight, a combination of the aforementioned wide bandgap semiconductor film and amorphous silicon layer is preferably used to effectively absorb ultraviolet light, mitigate the UVID effect, and improve the selective collection of charge on the front surface and the interface passivation effect. On the back side, a p-type microcrystalline silicon layer (p-μc-Si:H) with low series resistance, high hole selectivity, and excellent conductivity, or other carrier extraction optimized layers can be used to improve the back charge extraction efficiency and the overall device fill factor. Furthermore, the asymmetrical structure allows for better manufacturing compatibility in terms of material consumption, deposition time, and thermal budget. For example, for UV protection, a wide bandgap semiconductor film and an amorphous silicon layer can be applied only to the light-receiving side, eliminating the need to apply them on the back side, thus reducing material costs and process complexity.

[0062] Figure 2 A schematic flowchart illustrating a method for fabricating a low-UV-degradation crystalline silicon heterojunction solar cell according to an embodiment of the present invention is shown. This low-UV-degradation crystalline silicon heterojunction solar cell is the aforementioned solar cell. Figure 2 As shown, the preparation method includes:

[0063] Step S100: Provide a silicon substrate;

[0064] Step S200: An amorphous silicon layer is formed on the surface of a silicon substrate;

[0065] Step S300: Deposit a wide bandgap semiconductor film with a bandgap width greater than 3eV and a thickness of 5nm-20nm on the surface of the amorphous silicon layer to form a heterojunction with the amorphous silicon layer.

[0066] In step S400, a light-receiving surface layer is formed on the surface of a wide bandgap semiconductor film to obtain a low-UV-attenuation crystalline silicon heterojunction solar cell.

[0067] In step S100, the silicon substrate can be, for example, a monocrystalline silicon substrate, a polycrystalline silicon substrate, or a non-monocrystalline silicon substrate, and is preferably a monocrystalline silicon wafer with a (100) crystal orientation to facilitate the subsequent formation of a high-quality heterojunction interface. Furthermore, the silicon substrate can be N-type or P-type doped, with a doping concentration typically between 1 × 10⁻⁶. 15 cm -3 Up to 1×10 18 cm -3Within this range, the specific selection can be made based on the required battery performance. The silicon substrate can also undergo pretreatment processes, such as surface cleaning, etching, and oxidation removal, to ensure a clean and contamination-free substrate surface, promoting uniform deposition of the amorphous silicon layer and high-quality formation of the heterojunction interface.

[0068] In step S200, the amorphous silicon layer can be, for example, an intrinsic amorphous silicon layer or a doped amorphous silicon layer, or it can be composed of a buffer transition sublayer and a doped amorphous silicon sublayer. The amorphous silicon layer is formed, for example, using plasma-enhanced chemical vapor deposition (PECVD), with the deposition temperature controlled within the range of 150°C to 300°C to ensure the quality of the amorphous silicon layer and the interface passivation effect. The deposition process parameters of the buffer transition sublayer can be adjusted by regulating the flow rate ratio of silane (SiH4) to hydrogen (H2) gas and the RF power to achieve a smooth bandgap thin film deposition. The doped amorphous silicon sublayer is doped by introducing borane (B2H6) or phosphine (PH3) into the gas. The doping concentration can be precisely controlled by adjusting the dopant gas flow rate and deposition time to ensure that its electrical performance meets the carrier selective transport requirements. Furthermore, maintaining a high vacuum environment and stable plasma parameters during deposition helps reduce the film defect density, improve interface quality, thereby effectively reducing interface recombination and improving the photoelectric conversion efficiency and stability of the device.

[0069] In one specific embodiment, the amorphous silicon layer consists of a buffer transition sublayer and a doped amorphous silicon sublayer. The fabrication method of this amorphous silicon layer may include, for example, the following steps: Using a PECVD process, a borane or phosphine dopant gas is introduced into a reaction atmosphere of silane and hydrogen to form a doped amorphous silicon sublayer on the surface of a silicon substrate. The PECVD process conditions are controlled as follows: temperature 150℃-250℃, pressure 20Pa-100Pa, hydrogen dilution ratio greater than 80%, and RF power 20W-80W. While maintaining the above PECVD parameters unchanged or with appropriate fine-tuning, the dopant gas is removed, leaving only silane and hydrogen as the reaction gases to deposit a buffer transition sublayer on the surface of the doped amorphous silicon sublayer. The hydrogen dilution ratio refers to the ratio of hydrogen flow rate to the total flow rate of silane and hydrogen.

[0070] Step S300 specifically includes the pretreatment step, target selection and process chamber preparation step, reactive magnetron sputtering process parameter setting step, band step and interface barrier control step, and post-treatment step.

[0071] In the pretreatment step of deposition, the formed amorphous silicon layer is subjected to plasma surface cleaning or low-temperature pretreatment with inert gas such as argon to remove surface impurities and adsorbates, improve the cleanliness of the film interface, and help reduce the density of interface defect states in the subsequent deposition process.

[0072] In the target selection and process chamber preparation steps, wide-bandgap semiconductor targets such as oxides, nitrides, or fluorides with a bandgap greater than 3 eV, such as TiO2, ZnO, SiC, or GaN, are selected. Depending on the required band structure, a single target or a composite target can be selected, and the corresponding target power, bias voltage, and atmosphere ratio are configured.

[0073] In the reactive magnetron sputtering process parameter setting steps, an initial vacuum level better than 5 × 10⁻⁶ is established in the vacuum chamber. -3 The working gas is then introduced at 0.1 Pa and argon (or nitrogen, fluorine, etc.), with the volume ratio of oxygen to argon controlled at 1:50 to 1:10 to ensure the stoichiometry of the sputtered product and the film density. In the magnetron sputtering process, the sputtering power is set to 50W-200W (adjusted according to the target type), the working pressure is 0.1Pa-1Pa, the target-substrate distance is 5cm-10cm, the substrate temperature is room temperature to 150℃, and the deposition time needs to be adjusted according to the target thickness.

[0074] In the band structure and interface barrier control steps, the band structure and defect state density of the film are controlled by adjusting the sputtering atmosphere, target power, and substrate bias. A moderate power density and low-temperature deposition are preferred to slow down particle growth and reduce interface roughness, thereby ensuring the formation of a heterojunction structure with a conduction band step of 0.2 eV-0.4 eV, a valence band step of 0.1 eV-0.3 eV, and a Fermi level difference of less than 0.3 eV.

[0075] In the post-processing steps, low-temperature rapid annealing or remote plasma surface passivation is performed at 150℃-200℃ to further reduce the interface defect state density, making the interface defect state density of the heterojunction structure less than 1×10⁻⁶. 11 cm -2 ·eV -1 .

[0076] In step S400, forming a light-receiving surface layer on the surface of the wide bandgap semiconductor film layer specifically includes a pretreatment step, an anti-reflection film deposition step, and a light-receiving surface layer deposition step, wherein the pretreatment step and the anti-reflection film deposition step are optional steps.

[0077] In the surface pretreatment step, in order to ensure the adhesion and interface quality between the light-receiving surface layer and the underlying wide bandgap semiconductor film layer, it is preferable to perform plasma cleaning or low-energy ion beam treatment on the surface of the wide bandgap semiconductor film layer to remove surface impurities and adsorbed water, improve the interface bonding state, and reduce interface reflection and defect state density.

[0078] If the target structure requires further improvement in incident light coupling efficiency, it is preferable to deposit a single-layer or multi-layer antireflective film on the surface of a wide-bandgap semiconductor film. Materials used include, for example, silicon oxide (SiO2), titanium oxide (TiO2), and silicon nitride (SiN). x Antireflective coatings are deposited using physical vapor deposition, chemical vapor deposition, or sol-gel methods. The thickness of the antireflective coating is controlled between 60 nm and 120 nm to meet the minimum reflection interference conditions in the target wavelength range.

[0079] In the photosensitive layer deposition step, the photosensitive layer is the transparent conductive film (TCO) layer, which is deposited using magnetron sputtering or physical vapor deposition processes. The materials used are, for example, indium tin oxide (ITO), zinc aluminum oxide (AZO), and indium zinc oxide (IZO). In the magnetron sputtering or physical vapor deposition process, the substrate temperature for which the photosensitive layer is deposited is controlled between room temperature and 200°C.

[0080] The technical effects of this application will be described in detail below with specific embodiments and comparative examples.

[0081] Example 1:

[0082] This invention provides a method for fabricating a low-UV-attenuation crystalline silicon heterojunction solar cell, comprising the following steps:

[0083] 1) An alkaline cleaning texturing process was used to prepare a pyramidal textured surface on both sides of an n-type silicon substrate;

[0084] 2) An alkaline polishing process is used on the back of the silicon substrate to prepare a polished surface or a micro-textured surface;

[0085] 3) A 5nm thick amorphous silicon layer is deposited on the front and back of the solar cell using PECVD. This amorphous silicon layer is a hydrogenated intrinsic amorphous silicon (i-aSi:H) layer.

[0086] 4) A 20 nm thick P-type hydrogenated microcrystalline silicon (p-μSi:H) layer is grown on the back side of the solar cell using PECVD on the surface of the i-aSi:H layer;

[0087] 5) A wide bandgap semiconductor film with a thickness of 10 nm is deposited on the surface of the i-aSi:H layer using a reactive magnetron sputtering process. This wide bandgap semiconductor film is a TiO2 layer.

[0088] 6) A light-receiving layer with a thickness of 100 nm is deposited on the surface of the p-μSi:H layer and the TiO2 layer using a PVD process. This light-receiving layer is an ITO layer.

[0089] 7) A low-temperature conductive paste is screen-printed onto a double-sided ITO layer and cured at 200°C to form a gate electrode. This significantly enhances its long-term stability under ultraviolet irradiation.

[0090] Figure 3 A schematic structural diagram of a low-UV-degradation crystalline silicon heterojunction solar cell according to Embodiment 1 of the present invention is shown. This low-UV-degradation crystalline silicon heterojunction solar cell is prepared by the above-described preparation method. Figure 4 A schematic diagram of the band structure and carrier transport of a TiO2 / i-aSi:H heterojunction according to Embodiment 1 of the present invention is shown. Figure 4 As shown, the TiO2 / i-aSi:H heterojunction forms a built-in electric field E pointing from TiO2 to i-aSi:H. bi Therefore, under the influence of the built-in electric field, the electrons generated by ultraviolet light in the TiO2 film are collected by the front ITO layer and transported to the negative electrode, while the holes are collected by the back ITO layer through the HJT cell body and transported to the positive electrode, thereby improving the photoelectric conversion efficiency of the cell.

[0091] Figure 5 An XRD pattern of a TiO2 layer according to Embodiment 1 of the present invention is shown. Figure 5 It can be seen that the characteristic peak 2θ of the TiO2 (101) surface is located at 25.3°. Figure 6 A scanning electron microscope image of a TiO2 layer according to Embodiment 1 of the present invention is shown. Figure 6 It can be seen that the TiO2 film is dense and flat. Figure 7 An EDX image of a TiO2 layer according to Embodiment 1 of the present invention is shown. Figure 7 The Ti:O atomic ratio is 32.84:67.16. These results indicate that reactive magnetron sputtering can grow high-quality TiO2 layers.

[0092] Example 2:

[0093] The only difference between this second embodiment and the first embodiment is the thickness of the TiO2 layer. In this second embodiment, the thickness of the TiO2 layer is 5 nm.

[0094] Example 3:

[0095] The only difference between this third embodiment and the first embodiment is the thickness of the TiO2 layer. In this second embodiment, the thickness of the TiO2 layer is 20 nm.

[0096] Example 4:

[0097] The difference between this embodiment four and embodiment one is that step 3) is different. In this embodiment four, step 3) involves depositing a 3nm thick doped amorphous silicon sublayer on the front and back of the solar cell using PECVD. This doped amorphous silicon sublayer is a boron-doped amorphous silicon sublayer. Then, a 2nm thick buffer transition sublayer is deposited on the surface of the boron-doped amorphous silicon sublayer. This buffer transition sublayer is an intrinsic amorphous silicon layer.

[0098] Comparative Example 1:

[0099] The only difference between this comparative example and Example 1 is that the i-aSi:H layer and TiO2 layer on the front side in Example 1 are replaced with an intrinsically amorphous silicon (i-aSi) layer and an n-type hydrogenated microcrystalline silicon (n-μSi:H) layer, respectively. The preparation method is the same. Figure 8 A schematic structural diagram of a crystalline silicon heterojunction solar cell in Comparative Example 1 is shown.

[0100] Comparative Example 2:

[0101] The only difference between Comparative Example 2 and Example 1 is the thickness of the TiO2 layer. In Example 2, the thickness of the TiO2 layer is 2nm.

[0102] Figure 9 The UV-VIS transmission transmittance spectra of the TiO2 layers in Embodiments 1 to 3 of the present invention are shown. Figure 10 The UV-VIS transmission absorption spectrum of the TiO2 layer according to Embodiments 1 to 3 of the present invention is shown. Figure 11 The UV-VIS transmission reflectance spectra of the TiO2 layers according to Embodiments 1 to 3 of the present invention are shown. Figures 9 to 11 It can be seen that in the 200nm-300nm wavelength range, the ultraviolet light transmittance of the TiO2 film gradually decreases with increasing film thickness, while the absorptivity increases accordingly. This indicates that this thickness can effectively absorb ultraviolet light, thereby avoiding the influence of high-energy ultraviolet photons on the battery body. Films of all three thicknesses exhibit high transmittance in the visible light region (400nm-800nm), but the 20nm film has relatively low transmittance. This suggests that while increasing thickness can improve ultraviolet shielding performance, excessively increasing the thickness may affect the transmittance efficiency of visible light.

[0103] Table 1 lists the comparison results of the main electrical parameters of the crystalline silicon heterojunction solar cells in the various embodiments and comparative examples of the present invention. Table 1 is as follows:

[0104]

[0105] As shown in Table 1, the thickness of the TiO2 layer affects the initial photoelectric performance and ultraviolet stability of crystalline silicon heterojunction solar cells. Example 1, using a 10nm thick TiO2 layer, exhibited high initial PCE and good resistance to ultraviolet degradation, indicating that this thickness ensured excellent interface passivation and ultraviolet shielding without significantly negatively impacting light transmittance and carrier transport. Examples 2 and 3 represent the extreme cases of thinner and thicker TiO2 layers, respectively. While they also showed good performance, they both involved trade-offs in initial efficiency or long-term stability, suggesting the existence of an optimal thickness window.

[0106] Furthermore, compared to Example 1, Comparative Example 1 only changed the amorphous silicon / titanium oxide combination in the heterojunction structure, and the initial PCE was significantly reduced to 17.55%, and it decayed rapidly to 11.80% under ultraviolet irradiation, indicating that the device performance is limited by band mismatch and severe interface recombination. In Comparative Example 2, the TiO2 layer thickness was only 2 nm, and it also showed a strong decay trend, verifying that excessively thin films cannot provide effective interface passivation and UV protection. Comprehensive analysis shows that the embodiments of the present invention can effectively improve the V... OC J SC FF and PCE, and significantly enhance its long-term stability under ultraviolet irradiation.

[0107] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0108] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A low-UV-degradation crystalline silicon heterojunction solar cell, characterized in that, It includes a light-receiving surface layer, a wide bandgap semiconductor film layer, an amorphous silicon layer and a silicon substrate arranged sequentially, wherein the wide bandgap semiconductor film layer and the amorphous silicon layer form a heterojunction; The wide bandgap semiconductor film has a bandgap width greater than 3eV and a thickness of 5nm-20nm. The wide bandgap semiconductor film has light absorption capability in the ultraviolet band and can generate photogenerated carriers in the ultraviolet band. The photogenerated carriers can be transported to the silicon substrate through the heterojunction and participate in photoelectric conversion. The amorphous silicon layer includes: A buffer transition sublayer, in contact with the wide bandgap semiconductor film layer, is an intrinsic amorphous silicon layer or a micro-doped amorphous silicon layer, used to achieve a gradual bandgap connection; A doped amorphous silicon sublayer is in contact with the silicon substrate to enable selective carrier transport.

2. The low UV decay crystalline silicon heterojunction solar cell according to claim 1, characterized in that, The slope of the band edge change between the buffer transition sublayer and the adjacent film layer is less than 0.1 eV / nm; The thickness of the buffer transition sublayer is 2nm-5nm; The thickness of the doped amorphous silicon sublayer is 3nm-30nm.

3. The low UV decay crystalline silicon heterojunction solar cell according to claim 2, characterized in that, The doped amorphous silicon sublayer is a P-type amorphous silicon layer, and the dopant is boron with a boron doping concentration of 1×10⁻⁶. 19 cm -3 -1×10 20 cm -3 .

4. The low-UV-degradation crystalline silicon heterojunction solar cell according to claim 3, characterized in that, The doped amorphous silicon sublayer is an N-type amorphous silicon layer, and the dopant is phosphorus with a phosphorus doping concentration of 1×10⁻⁶. 19 cm -3 -5×10 20 cm -3 .

5. The low-UV-degradation crystalline silicon heterojunction solar cell according to any one of claims 1-4, characterized in that, Oxygen vacancies or rare earth metal ions are introduced into the wide bandgap semiconductor film to form a controllable trap state structure. The amorphous silicon layer has a microstructure that forms a directional migration path for charge carriers. The microstructure consists of an asymmetric doping distribution, a nanocrystalline-amorphous impurity phase region, or a band gap gradient region.

6. A method for fabricating a low-UV-degradation crystalline silicon heterojunction solar cell as described in any one of claims 1-5, characterized in that, Includes the following steps: Provide silicon substrate; An amorphous silicon layer is formed on the surface of the silicon substrate; A wide bandgap semiconductor film with a bandgap width greater than 3eV and a thickness of 5nm-20nm is deposited on the surface of the amorphous silicon layer to form a heterojunction with the amorphous silicon layer; A light-receiving surface layer is formed on the surface of the wide bandgap semiconductor film to obtain a low-UV-attenuation crystalline silicon heterojunction solar cell.

7. The preparation method according to claim 6, characterized in that, The process of forming an amorphous silicon layer on the surface of the silicon substrate includes the following steps: A doped amorphous silicon sublayer is formed on the surface of the silicon substrate; A buffer transition sublayer is formed on the surface of the doped amorphous silicon sublayer, wherein the buffer transition sublayer is an intrinsic amorphous silicon layer or a micro-doped amorphous silicon layer.

8. The preparation method according to claim 7, characterized in that, The amorphous silicon layer is formed by plasma-enhanced chemical vapor deposition, with an H2 dilution ratio greater than 80% during the deposition process. The wide bandgap semiconductor film is deposited using a reactive magnetron sputtering process, with an oxygen to argon volume ratio of 1:50 to 1:10.

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