Display system

Abstract

A display system with low power consumption is provided. Provided is a display system capable of reducing the amount of data transmission. The display module of the display system comprises a circuit part and a display part which is divided into a plurality of blocks. The line-of-sight detection unit captures an image of an eye of a user and the vicinity thereof, and the coordinate detection unit generates coordinate information of a gaze point. The posture detection unit detects a head orientation of a user. The image generation unit generates first image data on the basis of the attitude information, and generates resolution information for each block on the basis of the coordinate information. The data generation unit performs value extraction processing on the first image data for each block according to the resolution information to generate second image data and transmits the second image data to the display module. The circuit unit generates third data by performing interpolation processing for inserting missing data of the block subjected to the value extraction processing on the second data, and the display unit displays an image on the basis of the third data.

Description

Technical Field

[0001] One embodiment of the present invention relates to a display device. Another embodiment of the present invention relates to a system including a display device. Another embodiment of the present invention relates to an electronic device including a display device.

[0002] Note that one embodiment of the present invention is not limited to the aforementioned technical fields. Examples of the technical fields of one embodiment of the present invention disclosed in this specification and other related disclosures include semiconductor devices, display devices, light-emitting devices, power storage devices, memory devices, electronic devices, lighting devices, input devices, input / output devices, and methods for driving or manufacturing these devices. A semiconductor device refers to any device that can operate by utilizing semiconductor characteristics. Background Art

[0003] In recent years, electronic devices including display devices have become increasingly popular. In particular, electronic devices such as HMDs (Head Mounted Displays) suitable for XR (Extended Reality or Cross Reality) applications, such as Virtual Reality (VR) and Augmented Reality (AR), have attracted much attention. HMDs can display images 360 degrees around the user based on the user's head movements, line of sight, and user operations, providing users with a high sense of immersion and presence.

[0004] Furthermore, HMDs have a structure in which an image displayed on a display device is magnified using optical components, and the user views this magnified image. However, the inclusion of optical components can lead to a larger housing, or the user may experience a strong graininess due to the ease with which pixels are visible. Therefore, high-definition and compact display devices are required. For example, an HMD with fine pixels, achieved by using high-speed drive transistors, has been disclosed (see Patent Document 1).

[0005] [Prior technical literature]

[0006] [Patent Document]

[0007] [Patent Document 1] Japanese Patent Application Publication No. 2000-2856 Summary of the Invention

[0008] Technical problem to be solved by the invention

[0009] As display devices become higher in definition and resolution, problems such as increased power consumption, increased data volume, and increased computational complexity may arise.

[0010] One object of one embodiment of the present invention is to provide a semiconductor device, display device, electronic device, or display system with low power consumption. Another object of one embodiment of the present invention is to provide a semiconductor device, display device, electronic device, or display system capable of reducing the amount of data transmission. Another object of one embodiment of the present invention is to provide a semiconductor device, display device, electronic device, or display system with excellent graphics processing capabilities.

[0011] Another object of one embodiment of the present invention is to provide a novel semiconductor device, display device, electronic device, or display system.Another object of one embodiment of the present invention is to at least improve at least one of the problems of the conventional technology.

[0012] Note that the description of these objectives does not preclude the existence of other objectives. Note that one embodiment of the present invention does not necessarily achieve all of the above objectives. Note that objectives other than the above can be extracted from the description of the specification, drawings, claims, etc.

[0013] Means of solving technical problems

[0014] One embodiment of the present invention is a display system comprising a display module, a gaze detection unit, a posture detection unit, a coordinate detection unit, an image generation unit, and a data generation unit. The display module includes a display unit divided into multiple blocks and a circuit unit. The gaze detection unit has the function of capturing a user's eyes and their surroundings and outputting the image information to the coordinate detection unit. The coordinate detection unit has the function of generating coordinate information of a gaze point based on the image information and outputting it to the image generation unit. The posture detection unit has the function of detecting the user's head orientation and outputting it as posture information to the image generation unit. The image generation unit has the function of generating first image data based on the posture information, generating resolution information for each block based on the coordinate information, and outputting the first image data and the resolution information to the data generation unit. The data generation unit has the function of performing a decimation process on the first image data for each block based on the resolution information to generate second image data and outputting it to the display module. The circuit unit has the function of performing an interpolation process on the second image data to interpolate missing data in the decimated blocks to generate third image data and output it to the display unit. The display unit has the function of displaying an image based on the third image data.

[0015] Furthermore, the display system preferably further includes an optical system located between the display module and the user. In this case, the optical system preferably includes a pancake lens.

[0016] Alternatively, in the above display system, the optical system preferably includes one or more lenses and two or more reflection plates.

[0017] In the display system, the sight line detection unit preferably includes a light source that emits infrared light and a camera that is sensitive to infrared light. In this case, the camera is preferably located so as to be able to capture the user's eyes from obliquely below.

[0018] Furthermore, in the above-described display system, the display portion preferably includes a pixel circuit, and the pixel circuit preferably includes a transistor including an oxide semiconductor in a semiconductor layer forming a channel.

[0019] Furthermore, in the above display system, the display module preferably further includes a plurality of drive circuits, the drive circuits preferably including a gate drive circuit and a source drive circuit. Furthermore, the display unit and the drive circuits are preferably provided on the same substrate and are provided in an overlapping manner.

[0020] Furthermore, in the above-described display system, the source driver circuit preferably includes a transistor including silicon in a semiconductor layer forming a channel.

[0021] Effects of the Invention

[0022] According to one embodiment of the present invention, a semiconductor device, display device, electronic device, or display system with low power consumption can be provided. Furthermore, a semiconductor device, display device, electronic device, or display system capable of reducing the amount of data transmitted can be provided. Furthermore, a semiconductor device, display device, electronic device, or display system with excellent graphics processing capabilities can be provided.

[0023] Furthermore, according to one embodiment of the present invention, a novel semiconductor device, display device, electronic device, or display system can be provided. Furthermore, according to one embodiment of the present invention, at least one of the problems of the conventional technology can be improved.

[0024] Note that the description of these effects does not preclude the existence of other effects. Note that one embodiment of the present invention does not necessarily have all of the above effects. Note that effects other than the above can be extracted from the description of the specification, drawings, claims, etc. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1A and Figure 1B It is a diagram illustrating a configuration example of a display system.

[0026] Figures 2A to 2C It is a diagram illustrating a configuration example of a display system.

[0027] Figure 3 This is a diagram illustrating an example of how the display system operates.

[0028] Figure 4A and Figure 4B A diagram illustrating a configuration example of a display device.

[0029] Figure 5 A diagram illustrating a configuration example of a display device.

[0030] Figure 6A and Figure 6B A diagram illustrating a configuration example of a display device.

[0031] 7A to 7D A diagram illustrating a configuration example of a display device.

[0032] Figures 8A to 8C A diagram illustrating a configuration example of a display device.

[0033] Figures 9A to 9C A diagram illustrating a configuration example of a display device.

[0034] Figure 10A and Figure 10B A diagram illustrating an example of operation of the display device.

[0035] Figures 11A to 11C is a three-dimensional diagram of the display module.

[0036] Figure 12A and Figure 12B A diagram illustrating a configuration example of a display device.

[0037] 13A to 13D A diagram illustrating a configuration example of a pixel circuit.

[0038] 14A to 14D A diagram illustrating a configuration example of a pixel circuit.

[0039] Figure 15 This is a timing chart illustrating a method for driving a display device.

[0040] Figure 16A and Figure 16B It is a diagram illustrating a configuration example of an electronic device.

[0041] Figure 17A and Figure 17B It is a diagram illustrating a configuration example of an electronic device.

[0042] Figure 18 It is a diagram illustrating an example of operation of an electronic device.

[0043] Figure 19A and Figure 19B It is a schematic diagram illustrating a structural example of an electronic device.

[0044] Figure 20A and Figure 20B It is a schematic diagram illustrating a structural example of an electronic device.

[0045] Figure 21A and Figure 21BIt is a schematic diagram illustrating a structural example of an electronic device.

[0046] Figure 22A A diagram illustrating a sub-display portion. Figures 22B1 to 22B7 A diagram illustrating an example of the structure of a pixel.

[0047] 23A to 23D A diagram illustrating a structural example of a light-emitting element.

[0048] 24A to 24D A diagram illustrating a structural example of a light-emitting element.

[0049] 25A to 25D A diagram illustrating a structural example of a light-emitting element.

[0050] Figure 26A and Figure 26B A diagram illustrating a structural example of a light-emitting element.

[0051] Figure 27 is a diagram showing a structural example of a display device.

[0052] Figure 28 is a diagram showing a structural example of a display device.

[0053] Figures 29A to 29C is a diagram showing a structural example of a semiconductor device.

[0054] 30A to 30D is a diagram showing a structural example of a semiconductor device.

[0055] Figure 31A is a schematic diagram of an electronic device according to an embodiment, Figure 31B It is a photo of an electronic device. DETAILED DESCRIPTION

[0056] The following describes the embodiments with reference to the accompanying drawings. However, those skilled in the art will readily appreciate that the embodiments may be implemented in a variety of different forms, and their methods and details may be modified in various ways without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the embodiments described below.

[0057] Note that in the structure of the invention described below, the same symbols are used in common between different drawings to represent the same parts or parts with the same function, and their repeated descriptions are omitted. In addition, when representing parts with the same function, the same hatching is sometimes used without adding a special symbol.

[0058] Note that in the drawings described in this specification, the sizes of components, layer thicknesses, and regions may be exaggerated for clarity, and therefore, the present invention is not limited to the sizes shown in the drawings.

[0059] The ordinal numbers such as “first” and “second” used in this specification and the like are provided to avoid confusion among constituent elements and are not intended to limit the number of constituent elements.

[0060] (Implementation 1)

[0061] In this embodiment, a display system which is one embodiment of the present invention is described.

[0062] A display system according to one embodiment of the present invention can be used in a wearable display device that can be worn on a user's head. The display system detects the portion of an image the user is gazing at and displays a high-resolution image near the gaze point, while displaying a low-resolution image in areas farther from the gaze point. This reduces the amount of image data and, therefore, the power consumption required for data transmission.

[0063] The display unit that displays images is preferably divided into multiple blocks, and the resolution and frame rate can be set separately for each block. In this case, the number of blocks is smaller than the number of pixels included in the display unit. As a result, only a number of setting data for setting the resolution and frame rate is required, corresponding to the number of blocks, allowing for high-speed and efficient changes in resolution and frame rate.

[0064] Next, a more specific configuration example will be described with reference to the drawings.

[0065] Figure 1A A schematic diagram illustrating a display system 500 according to one embodiment of the present invention includes a gaze detection unit 501 , a posture detection unit 502 , a coordinate detection unit 503 , an image generation unit 504 , a data generation unit 505 , a display module 506 , and an optical system 507 .

[0066] Although not shown here, it is preferred that at least the gaze detection unit 501, posture detection unit 502, display module 506, and optical system 507 be housed within a housing including a mounting fixture that can be secured to the user's head. Furthermore, the coordinate detection unit 503, image generation unit 504, and data generation unit may be housed within the housing or provided separately.

[0067] The display module 506 includes a display portion 515 and a circuit portion 516 .

[0068] Figure 1B Schematic diagram showing the display module 506. The display portion 515 includes a plurality of pixels arranged in a matrix. Figure 1BAn enlarged view of the display portion 515 is shown. In the display portion 515, pixels 520R emitting red light, pixels 520G emitting green light, and pixels 520B emitting blue light are periodically arranged.

[0069] In addition, the display unit 515 is divided into a plurality of blocks 521. Each block (also referred to as a partition) is independently provided with a driving circuit (for example, a source driving circuit and a gate driving circuit) so that they can be driven separately. Specifically, a different frame rate can be set for each block. Thus, the frame rate of the block 521 close to the user's gaze point can be increased to improve the sense of presence, and the frame rate of the block 521 far from the user's gaze point can be reduced to reduce the power consumption of the driver. Thus, a display system with both low power consumption and high sense of presence can be realized.

[0070] Furthermore, the display resolution can be set for each block. For example, an image can be displayed at a display resolution equal to the pixel resolution in block 521 near the gaze point, while an image can be displayed at a display resolution lower than the pixel resolution in block 521 farther from the gaze point. This reduces the amount of image data transmitted, thereby reducing the power consumption required for data transmission.

[0071] Here, in this specification, etc., pixel resolution refers to the total number of pixels included in the display unit, and display resolution refers to the resolution of the image (image data) displayed by the display unit. The display unit cannot display an image whose display resolution is higher than the pixel resolution. On the other hand, the display unit can display an image whose display resolution is lower than the pixel resolution. Note that pixel resolution or display resolution is sometimes simply referred to as resolution.

[0072] The sight line detection unit 501 has the function of capturing an image of the user's eye 551 and its surroundings and outputting the captured data as image information to the coordinate detection unit 503. The sight line detection unit 501 includes a camera 511 and a light source 512. Using a light-emitting element that emits infrared light as the light source 512 is preferred because it allows for capturing images without the user being able to see them. Alternatively, a camera sensitive to infrared light can be used for the camera 511.

[0073] Here, if Figure 1A As shown, the camera unit 511 is preferably positioned so that it can capture the user's eyes 551 from an oblique angle below. For example, when capturing the user's eyes 551 from above, sometimes a portion of the eyes 551 is obscured by eyebrows, eyelashes, upper eyelids, hair, etc., making it impossible to clearly capture the pupil. However, by capturing from an oblique angle below, the frequency of this problem can be reduced. Note that the position of the camera unit 511 is not limited to this and can be appropriately changed according to the specifications of the frame, etc.

[0074] The posture detection unit 502 has a function of detecting the user's head orientation and outputting it as posture information to the image generation unit 504. For example, a motion sensor using an acceleration sensor is preferably used as the posture detection unit 502, as this facilitates miniaturization.

[0075] The coordinate detection unit 503 has the following functions: estimating the user's line of sight based on the image information input from the line of sight detection unit 501, calculating the coordinates of the gaze point on the display unit of the display module 506 based on the direction of the line of sight, and outputting it as coordinate information to the image generation unit 504.

[0076] Image generation unit 504 has a function of generating first image data corresponding to the user's head movement based on the posture information input from posture detection unit 502 and outputting it to data generation unit 505. For example, the first image data can be generated using image data captured by an omnidirectional camera or image data generated by computer graphics. Here, the first image data is an image whose resolution matches the pixel resolution of display unit 515.

[0077] Furthermore, the image generation unit 504 has a function of generating resolution information including display resolution information of each block 521 of the display unit 515 based on the coordinate information input from the coordinate detection unit 503 and outputting the resolution information to the data generation unit 505 .

[0078] For example, the display resolution of the block 521 including the gaze point and its surrounding blocks 521 can be set to be equal to the pixel resolution, while the display resolution of the blocks 521 outside the gaze point can be set to 1 / n (n is an integer greater than or equal to 2) of the pixel resolution. Preferably, the user can set the ratio of display resolution reduction, the range of blocks for which the display resolution is reduced, etc. For example, according to the user's settings, the display resolution of all blocks can be set to be equal to the pixel resolution regardless of the gaze point.

[0079] The data generation unit 505 performs decimation processing (also called down-conversion) on the first image data input from the image generation unit 504 for each block based on the resolution information to generate second image data, and outputs the second image data to the circuit unit 516 of the display module 506. For example, the amount of information (data volume) of the second image data, which has also been decimated within a block, is smaller than that of the first image data. This reduces the amount of data transmitted from the data generation unit 505 to the display module 506, thereby reducing power consumption.

[0080] Here, one or more of the coordinate detection unit 503, the image generation unit 504, and the data generation unit 505 may be configured using a computer and a program executable by the computer. In other words, a computing device such as a general-purpose CPU and a program executed thereby may be used. Alternatively, a specially designed SoC (System on Chip), typified by an application processor, may be used. Alternatively, a customizable system may be implemented using an FPGA.

[0081] The second image data may be transmitted from the data generating section 505 to the display module 506 in a wired or wireless manner.

[0082] The circuit unit 516 has the following function: performing interpolation processing (also called up-conversion) on the second image data input from the data generation unit 505 to insert missing data of the block 521 subjected to the decimation processing to generate third image data, and output it to the display unit 515.

[0083] The display unit 515 has a function of displaying an image based on the third image data input from the circuit unit 516. Thus, the display unit 515 can display a higher-resolution image closer to the gaze point and a lower-resolution image farther from the gaze point.

[0084] Optical system 507 is located between the user's eye 551 and display unit 515 and has functions such as magnifying the image displayed on display unit 515, expanding the field of view (FOV), and adjusting the focus. Optical system 507 may include at least one lens, a reflector, a light guide plate, a polarizer, or a diffuser.

[0085] Figures 2A to 2C A more specific structural example of the optical system 507 is shown.

[0086] Figure 2A The illustrated optical system 507A includes a pair of lens groups 531. Lens group 531 is positioned between display module 506 and the user's eye 551. Lens group 531 can employ a structure combining convex lenses, concave lenses, Fresnel lenses, and the like. In particular, using a catadioptric optical system (also known as a pancake lens) using a reflective polarizer or the like for lens group 531 is particularly preferred because it allows for a thinner and lighter lens group 531.

[0087] Figure 2BThe optical system 507B shown includes a pair of lens groups 532, a pair of lenses 533, a pair of reflectors 534, and a pair of reflectors 535. Light from the image displayed on the display portion of the display module 506 is reflected by the reflectors 535, passes through the lenses 533, is reflected by the reflectors 534, and reaches the eye 551 through the lens group 532. By utilizing the reflections from the two reflectors (reflectors 534 and 535), it is no longer necessary to position the display module 506 on an extension of the optical axis of the lens group 532, thereby increasing the degree of design freedom. Furthermore, by arranging the lens 533, which serves as a relay lens, between the two reflectors (reflectors 534 and 535), the degree of design freedom can be further increased.

[0088] Here, the display module 506 is arranged in front of the eye 551. However, the display module can be arranged in various positions by changing the direction of the reflective plates and the number of reflective plates.

[0089] Figure 2C The optical system 507C shown includes a light guide plate 537, a pair of lenses 536, a pair of reflection plates 538, and a pair of reflection plates 539. Note that although a single light guide plate 537 is provided here, a separate light guide plate 537 may be provided for each eye.

[0090] Light emitted by the display module 506 passes through the lens 536, is reflected by the reflector 538, is guided inside the light guide plate 537, and is then reflected by the reflector 539 to reach the eye 551. By adopting this structure, there is no need to provide a lens in front of the eye 551, so a thin and light device can be realized.

[0091] When a half mirror is used as the reflector 539 , a real image transmitted through the reflector 539 and an image reflected by the reflector 539 can be seen superimposed on each other.

[0092] Next, refer to Figure 3 An example of the operation method of the display system 500 will be described. Here, the relevant flow of the operation during one frame period will be described. In practice, a moving image can be displayed by repeatedly performing the flow described below while an image is being displayed.

[0093] In step S01 , the sight line detection unit 501 captures an image of the user's eye 551 and its vicinity, and outputs the image as image information to the coordinate detection unit 503 .

[0094] Next, in step S02 , the coordinate detection unit 503 calculates viewpoint coordinates based on the image information and outputs the calculated viewpoint coordinates to the image generation unit 504 as coordinate information.

[0095] Furthermore, step S03 is performed in parallel with steps S01 and S02 . In step S03 , the posture detection unit 502 detects the direction of the user's head and outputs the detected direction as posture information to the image generation unit 504 .

[0096] Next, in step S04 , the image generation unit 504 generates first image data based on the posture information and generates resolution data for each block 521 based on the coordinate data. Furthermore, the first image data and the resolution data are output to the data generation unit 505 .

[0097] Next, in step S05, the data generator 505 performs a decimation process on the first data for each block based on the resolution information to generate second image data, and outputs the second image data to the display module 506. In this case, in addition to the second image data, the resolution information can also be output to the display module 506. In this case, by transmitting the resolution information during the blank period between frames, data transmission delays can be prevented.

[0098] Next, in step S06, the circuit unit 516 performs interpolation processing on the second image data to insert the missing data of the decimated block to generate third image data, and outputs the generated data to the display unit 515. In this case, the interpolation processing may also be performed based on the resolution information input from the data generation unit 505.

[0099] Next, in step S07 , the display unit 515 displays an image based on the third image data.

[0100] The above is an example of how the display system operates during a single frame period. By repeatedly performing these steps, the amount of data transmitted can be reduced, enabling the display of high-quality dynamic images with low power consumption. Furthermore, this reduction in data transmission allows for a higher frame rate and smoother dynamic images.

[0101] At least a part of this embodiment mode can be implemented in combination with other embodiments described in this specification as appropriate.

[0102] (Implementation Method 2)

[0103] In this embodiment, a display device that can be used in a display system according to one embodiment of the present invention is described. The display device described below can be used in the display module described in Embodiment 1, for example.

[0104] <Display Device 10A>

[0105] Figure 4AThis is a perspective view of a semiconductor device 10A according to one embodiment of the present invention. Display device 10A includes substrates 11 and 12. Display device 10A includes a display portion 13 disposed between substrates 11 and 12. Display portion 13 includes a plurality of pixels 230. Pixel 230 includes a pixel circuit 51 and a light-emitting element 61. Display portion 13 is a region within display device 10A that displays an image.

[0106] When the pixels 230 are arranged in a matrix of 1920×1080 pixels, a display unit 13 capable of displaying at a resolution of so-called full high definition (also referred to as "2K resolution," "2K1K," or "2K") can be realized. Furthermore, for example, when the pixels 230 are arranged in a matrix of 3840×2160 pixels, a display unit 13 capable of displaying at a resolution of so-called ultra-high definition (also referred to as "4K resolution," "4K2K," or "4K") can be realized. Furthermore, for example, when the pixels 230 are arranged in a matrix of 7680×4320 pixels, a display unit 13 capable of displaying at a resolution of so-called ultra-high definition (also referred to as "8K resolution," "8K4K," or "8K") can be realized. By increasing the number of pixels 230, a display unit 13 capable of displaying at a resolution of 16K or even 32K can also be realized.

[0107] The pixel density (resolution) of the display unit 13 is preferably 1000 ppi or higher and 10000 ppi or lower. For example, it may be 2000 ppi or higher and 6000 ppi or lower, or 3000 ppi or higher and 5000 ppi or lower.

[0108] Note that there is no particular limitation on the screen ratio (aspect ratio) of the display unit 13. The display unit 13 can correspond to various screen ratios such as 1:1 (square), 4:3, 16:9, or 16:10.

[0109] In this specification, an “element” may be referred to as a “device.” For example, a display element, a light-emitting element, and a liquid crystal element may be referred to as a display device, a light-emitting device, and a liquid crystal device, respectively.

[0110] The display device 10A receives various signals and power supply potentials from the outside via the terminal portion 14 and displays images using the display element provided in the display portion 13. Various elements can be used as the display element. Typically, light-emitting elements capable of emitting light, such as organic EL elements and LED elements, liquid crystal elements, or MEMS (Micro Electro Mechanical Systems) elements can be used.

[0111] Multiple layers are provided between substrates 11 and 12. Each layer includes transistors for circuit operation or light-emitting display elements. Pixel circuits for controlling the operation of the display elements, driver circuits for controlling the pixel circuits, and functional circuits for controlling the driver circuits are also provided in the multiple layers.

[0112] The functional circuit corresponds to the circuit portion described in Embodiment Mode 1.

[0113] Figure 4B 10A is a perspective view schematically showing the structure of each layer provided between the substrate 11 and the substrate 12 of the display device 10A.

[0114] A layer 20 is provided on the substrate 11. The layer 20 includes a driving circuit 30, a functional circuit 40, and an input-output circuit 80. The layer 20 includes a transistor 21 (also referred to as a "Si transistor" or "SiFET") containing silicon in a channel formation region 22. The substrate 11 is, for example, a silicon substrate. Silicon substrates are preferred because they have higher thermal conductivity than glass substrates. By providing the driving circuit 30, the functional circuit 40, and the input-output circuit 80 in the same layer, the wiring electrically connecting the driving circuit 30, the functional circuit 40, and the input-output circuit 80 can be shortened. As a result, the charging and discharging time of the control signal used by the functional circuit 40 to control the driving circuit 30 is shortened, thereby reducing power consumption. In addition, the charging and discharging time required for the input-output circuit 80 to supply signals to the functional circuit 40 and the driving circuit 30 is shortened, thereby reducing power consumption.

[0115] The transistor 21 may be, for example, a transistor comprising single crystal silicon in its channel formation region (also referred to as a "c-Si transistor"). In particular, when a transistor comprising single crystal silicon in its channel formation region is used as the transistor provided in the layer 20, the on-state current of the transistor can be increased. This is preferred because the circuit included in the layer 20 can be driven at high speed. Furthermore, because Si transistors can be formed by microfabrication with a channel length of 3 nm or more and 10 nm or less, a display device 10A can be realized in which a display portion is integrated with an accelerator such as a CPU or GPU, an application processor, and the like.

[0116] Layer 20 may also include a transistor containing polysilicon in its channel formation region (also referred to as a "Poly-Si transistor"). Low-temperature polysilicon (LTPS) may also be used as the polysilicon. A transistor containing LTPS in its channel formation region is also referred to as an "LTPS transistor." Furthermore, an OS transistor may be provided in layer 20 as needed.

[0117] As the driving circuit 30, various circuits such as a shift register, a level converter, an inverter, a latch, an analog switch, and a logic circuit can be used. The driving circuit 30 includes, for example, a gate driving circuit (also called a "scanning line driving circuit"), a source driving circuit (also called a "video signal line driving circuit"), and the like. In addition, it may also include an operation circuit, a storage circuit, a power supply circuit, and the like. Since the gate driving circuit, the source driving circuit, and the other circuits can be arranged in a manner overlapping with the display unit 13, the width of the non-display area (also called a frame) outside the display unit 13 of the display device 10A can be made extremely small compared to the case where the above-mentioned circuits and the display unit 13 are arranged in an array, thereby miniaturizing the display device 10A.

[0118] The functional circuit 40 functions as, for example, an application processor that controls the various circuits in the display device 10A and generates signals for controlling the various circuits. Furthermore, the functional circuit 40 may include circuits for correcting image data, such as an accelerator such as a CPU or GPU. Furthermore, the functional circuit 40 may include an LVDS (Low Voltage Differential Signaling) circuit, a MIPI (Mobile Industry Processor Interface) circuit, and a D / A (Digital to Analog) conversion circuit, which function as an interface for receiving image data from outside the display device 10A. Furthermore, the functional circuit 40 may include circuits for compressing and stretching image data and a power supply circuit. Note that the functional circuit 40 may be omitted from the display device 10A and replaced with an external computing device. Furthermore, a portion of the functions of the functional circuit 40 may be provided on the layer 50 side.

[0119] Layer 50 is provided on layer 20. Layer 50 includes a pixel circuit group 55 having a plurality of pixel circuits 51. Layer 50 may also include an OS transistor. Pixel circuit 51 may also be configured to include an OS transistor. Layer 50 may be provided in a stacked manner on layer 20.

[0120] Layer 50 may also be provided with a Si transistor. For example, pixel circuit 51 may also be configured to include a transistor containing single-crystal silicon or polycrystalline silicon in the channel formation region. LTPS may also be used as polycrystalline silicon. For example, layer 50 may be formed on another substrate and bonded to layer 20. Alternatively, layer 50 may be formed on another substrate and transferred from the substrate to layer 20. Alternatively, layer 50 may be formed on another substrate, peeled from the substrate, and provided on a flexible substrate.

[0121] For example, the pixel circuit 51 may be composed of a plurality of transistors using different semiconductor materials. In the case where the pixel circuit 51 is composed of a plurality of transistors using different semiconductor materials, the transistors may be arranged in different layers according to the type of each transistor. For example, in the case where the pixel circuit 51 is composed of Si transistors and OS transistors, the Si transistors and OS transistors may be arranged in an overlapping manner. By arranging the transistors in an overlapping manner, the area occupied by the pixel circuit 51 is reduced. Therefore, the clarity of the display device 10A can be improved. Note that a structure combining LTPS transistors and OS transistors is sometimes referred to as LTPO.

[0122] As the OS transistor, transistor 52 preferably includes an oxide containing at least one of indium and zinc in its channel formation region 54. This OS transistor has extremely low off-state current. Therefore, when used as a transistor in a pixel circuit, the OS transistor is particularly preferred because it can retain analog data written to the pixel circuit for a long period of time.

[0123] Furthermore, when the functional circuit 40 is used as a CPU and the OS transistor is used for the CPU, a normally-off CPU (also known as a "NoffCPU" (registered trademark)) can be provided. In an NoffCPU, power to circuits within the NoffCPU that are not required for operation can be stopped, placing these circuits in a standby state. When power is stopped and the circuits are in a standby state, no power is consumed. Therefore, the NoffCPU can minimize power consumption.

[0124] A layer 60 is provided on the layer 50. A substrate 12 is provided on the layer 60. The substrate 12 is preferably a layer composed of a light-transmitting substrate or a light-transmitting material. The layer 60 is provided with a plurality of light-emitting elements 61. In addition, the layer 60 can be provided in a manner stacked on the layer 50. As the light-emitting element 61, for example, an organic electroluminescent element (also referred to as an "organic EL element") can be used. However, the light-emitting element 61 is not limited thereto, and for example, an inorganic EL element composed of an inorganic material can also be used. Note that sometimes "organic EL element" and "inorganic EL element" are collectively referred to as "EL element". The light-emitting element 61 may also include inorganic compounds such as quantum dots. For example, by using quantum dots for the light-emitting layer, the quantum dots can be used as light-emitting materials.

[0125] like Figure 4BAs shown, a display device 10A according to one embodiment of the present invention may have a structure in which a light-emitting element 61, a pixel circuit 51, a driving circuit 30, and a functional circuit 40 are stacked, so that the aperture ratio (effective display area ratio) of the pixel can be greatly improved. For example, the aperture ratio of the pixel can be made greater than 40% and less than 100%, preferably greater than 50% and less than 95%, and more preferably greater than 60% and less than 95%. In addition, the pixel circuit 51 can be arranged at an extremely high density, thereby making the pixel have an extremely high definition. For example, the display portion 13 of the display device 10A can configure the pixel 230 with a definition of less than 20,000 ppi or less than 30,000 ppi and greater than 2,000 ppi, preferably greater than 3,000 ppi, more preferably greater than 5,000 ppi, and further preferably greater than 6,000 ppi.

[0126] This display device 10A has extremely high definition and is therefore suitable for use in head-mounted displays, eyeglass-type VR devices, AR devices, and the like. For example, because the display device 10A has an extremely high-definition display portion, in a configuration where the display portion of the display device 10A is viewed through an optical member such as a lens, the user cannot see pixels even when the display portion is magnified using the lens, thereby achieving a highly immersive display.

[0127] When the display device 10A is used as a wearable display device such as a head-mounted display or a glasses-type display, the diagonal size of the display portion 13 can be set to be greater than 0.1 inches and less than 5.0 inches, preferably greater than 0.5 inches and less than 2.0 inches, and more preferably greater than 1 inch and less than 1.7 inches. For example, the diagonal size of the display portion 13 can also be set to 1.5 inches or approximately 1.5 inches. By setting the diagonal size of the display portion 13 to less than 2.0 inches, it can be processed with a single exposure process of an exposure device (typically a scanning device), so the productivity of the display device can be improved.

[0128] In addition, the display device 10A according to one embodiment of the present invention can also be applied to devices other than wearable electronic devices. In this case, the diagonal size of the display unit 13 can also be greater than 2.0 inches. In addition, the structure of the transistor used for the pixel circuit 51 can also be appropriately selected according to the diagonal size of the display unit 13. For example, when a single-crystal Si transistor is used for the pixel circuit 51, the diagonal size of the display unit 13 is preferably greater than 0.1 inches and less than 3 inches. In addition, when an LTPS transistor is used for the pixel circuit 51, the diagonal size of the display unit 13 is preferably greater than 0.1 inches and less than 30 inches, and more preferably greater than 1 inch and less than 30 inches. In addition, when LTPO is used for the pixel circuit 51, the diagonal size of the display unit 13 is preferably greater than 0.1 inches and less than 50 inches, and more preferably greater than 1 inch and less than 50 inches. In addition, when an OS transistor is used for the pixel circuit 51, the diagonal size of the display unit 13 is preferably greater than 0.1 inches and less than 200 inches, and more preferably greater than 50 inches and less than 100 inches.

[0129] It is very difficult to scale up a single-crystal Si substrate, so it is very difficult to scale up a display device using a single-crystal Si transistor. In addition, when an LTPS transistor is used in a display device, a laser crystallization device is used in the manufacturing process, so it is difficult to correspond to a large-scale (typically a screen size with a diagonal size of more than 30 inches). On the other hand, OS transistors are not restricted by the use of laser crystallization devices, etc. in the manufacturing process, or can be manufactured at a lower process temperature (typically below 450°C), so they can also correspond to display devices with a larger area (typically a diagonal size of more than 50 inches and less than 100 inches). In addition, LTPO can correspond to the diagonal size of the display portion in the range between when an LTPS transistor is used and when an OS transistor is used (typically more than 1 inch and less than 50 inches).

[0130] Reference Figure 5 Specific configuration examples of the driving circuit 30 and the functional circuit 40 will be described. Figure 5 This is a block diagram showing a plurality of wirings connecting the pixel circuit 51 , the driving circuit 30 , and the functional circuit 40 in the display device 10A, as well as a bus line within the display device 10A.

[0131] exist Figure 5 In the display device 10A shown, a plurality of pixel circuits 51 are arranged in a matrix in a layer 50 .

[0132] In addition, Figure 5In the illustrated display device 10A, layer 20 is provided with a driver circuit 30, a functional circuit 40, and an input / output circuit 80. Driver circuit 30 includes, for example, a source driver circuit 31, a digital-to-analog converter (DAC) 32, a gate driver circuit 33, a level shifter 34, an amplifier circuit 35, a detection circuit 36, a video generation circuit 37, and a video distribution circuit 38. Functional circuit 40 includes, for example, a memory circuit (also referred to as a "storage device") 41, a GPU (also referred to as an "AI accelerator") 42, an EL correction circuit 43, a timing generation circuit 44, a CPU 45, a sensor controller 46, a power supply circuit 47, a temperature sensor 48, and a brightness correction circuit 49. Functional circuit 40 functions as an application processor.

[0133] The input / output circuit 80 supports a transmission method such as LVDS (Low Voltage Differential Signaling), and has the function of distributing control signals and image data input through the terminal portion 14 to the driver circuit 30 and the functional circuit 40. Furthermore, the input / output circuit 80 has the function of outputting information from the display device 10A to the outside through the terminal portion 14.

[0134] In addition, Figure 5 3 shows a structure in which the circuits included in the driving circuit 30 , the circuits included in the functional circuit 40 , and the input / output circuit 80 are all electrically connected to the bus line BSL.

[0135] The source driver circuit 31 has a function of transmitting image data to the pixel circuit 51 included in the pixel 230, for example. Therefore, the source driver circuit 31 is electrically connected to the pixel circuit 51 via the wiring SL (also called "video signal line"). Note that a plurality of source driver circuits 31 may also be provided.

[0136] The digital-to-analog conversion circuit 32 has the function of converting image data that has been digitally processed by, for example, a GPU, correction circuit, etc., which will be described later, into analog data. The image data converted into analog data is amplified by an amplifier circuit 35, such as an operational amplifier, and is transmitted to the pixel circuit 51 via the source driver circuit 31. Note that the image data may be transmitted sequentially to the source driver circuit 31, the digital-to-analog conversion circuit 32, and the pixel circuit 51. Furthermore, the digital-to-analog conversion circuit 32 and the amplifier circuit 35 may also be included in the source driver circuit 31.

[0137] The gate driver circuit 33 has a function of selecting a pixel circuit to which image data is to be transmitted in the display circuit 51. Therefore, the gate driver circuit 33 is electrically connected to the pixel circuit 51 via a wiring GL (also referred to as a "scanning line"). Note that a plurality of gate driver circuits 33 may be provided so as to correspond to the source driver circuit 31.

[0138] The level shifter 34 has a function of converting signals input to the source driver circuit 31 , the digital-to-analog converter circuit 32 , the gate driver circuit 33 , and the like into appropriate levels, for example.

[0139] The memory circuit 41 has, for example, a function of storing image data displayed on the pixel circuit 51. Note that the memory circuit 41 may have a configuration for storing image data as digital data or analog data.

[0140] When storing image data in the memory circuit 41, it is preferable to use a nonvolatile memory as the memory circuit 41. In this case, as the memory circuit 41, for example, a NAND memory or the like can be used.

[0141] When temporary data generated by the GPU 42, EL correction circuit 43, CPU 45, etc. is stored in the memory circuit 41, it is preferable to use a volatile memory as the memory circuit 41. In this case, the memory circuit 41 can use, for example, SRAM or DRAM.

[0142] The GPU 42 has a function for, for example, processing image data read from the memory circuit 41 to be output to the pixel circuit 51. In particular, since the GPU 42 has a structure that performs parallel pipeline processing, it is capable of high-speed processing of image data output to the pixel circuit 51. Furthermore, the GPU 42 can also be used as a decoder for restoring encoded images.

[0143] Furthermore, the functional circuit 40 may include multiple circuits capable of improving the display quality of the display device 10A. For example, a correction circuit (color adjustment, dimming) may be provided as one of these circuits. This circuit detects color unevenness in the image displayed by the display device 10A and corrects this unevenness to achieve an optimal image. For example, when a light-emitting device using organic EL is used as a display element, an EL correction circuit may be provided within the functional circuit 40 to correct image data based on the characteristics of the light-emitting device. For example, the functional circuit 40 includes an EL correction circuit 43.

[0144] Furthermore, the image correction described above can also utilize artificial intelligence. For example, the current flowing through the pixel circuit (or the voltage applied to the pixel circuit) can be monitored and acquired, and the displayed image can be obtained by an image sensor, etc. The current (or voltage) and image can be used as input data for artificial intelligence calculations (e.g., artificial neural networks), and the output can be used to determine whether the image needs correction.

[0145] Furthermore, AI calculations can be applied not only to image correction but also to up-conversion processing to increase the resolution of image data. As an example, in Figure 5 The GPU 42 shown in FIG. 4 includes blocks for performing various correction operations (color unevenness correction 42 a , up-conversion 42 b , etc.).

[0146] The algorithm used for up-conversion processing of image data can be selected from the nearest neighbor method, bilinear method, bicubic method, RAISR (Rapid and Accurate Image Super-Resolution) method, ANR (Anchored Neighborhood Regression) method, A+ method, SRCNN (Super-Resolution Convolutional Neural Network) method, etc.

[0147] The up-conversion algorithm can also be modified for each specific area of ​​display unit 13. For example, the user's gaze point on display unit 13 can be detected, and the up-conversion process can be performed on the gaze point and the area surrounding the gaze point using a slow but highly accurate algorithm. The up-conversion process can be performed on areas outside of the gaze point using a fast but less accurate algorithm. This configuration can shorten the time required for the up-conversion process and reduce the power consumption required for the up-conversion process.

[0148] In addition to up-conversion, down-conversion can also be performed to reduce the resolution of image data. When the resolution of image data is higher than the resolution of display unit 13, part of the image data may not be displayed on display unit 13. In such cases, down-conversion can be performed to display the entire image data on display unit 13.

[0149] The timing generation circuit 44 has the function of controlling the drive frequency (sometimes referred to as "frame frequency," "frame rate," or "refresh frequency") of the displayed image. For example, when displaying a still image on the display device 10A, the power consumption of the display device 10A can be reduced by lowering the drive frequency using the timing generation circuit 44. This method of reducing the power consumption of the display device by lowering the drive frequency is also referred to as idle stop (IDS) driving.

[0150] The CPU 45 has the function of performing general processing such as executing an operating system, controlling data, and executing various calculations and programs. For example, the CPU 45 has the function of issuing instructions for writing or reading image data from the storage circuit 41, correcting image data, and operating sensors described later. Furthermore, for example, the CPU 45 may also have the function of sending control signals to at least one of the circuits included in the functional circuit 40.

[0151] The sensor controller 46 has a function of controlling the sensor, for example. Figure 5 In FIG, wiring SNCL is shown as wiring for electrically connecting to the sensor.

[0152] This sensor may be, for example, a touch sensor that can be provided in the display unit 13. Alternatively, this sensor may be, for example, an illuminance sensor.

[0153] The power supply circuit 47 has a function of generating voltages to be supplied to, for example, the pixel circuit 51, the driver circuit 30, and the functional circuit 40. Note that the power supply circuit 47 may also have a function of selecting the circuits to which voltages are supplied. For example, by stopping the power supply circuit 47 from supplying voltages to the CPU 45, GPU 42, and the like while a still image is being displayed, the overall power consumption of the display device 10A can be reduced.

[0154] As described above, a display device according to one embodiment of the present invention may have a structure in which a display element, a pixel circuit, a driving circuit, and a functional circuit 40 are stacked. Since the driving circuit and the functional circuit as peripheral circuits can be arranged in a manner overlapping with the pixel circuit and the width of the frame can be made extremely small, miniaturization of the display device can be achieved. In addition, the display device according to one embodiment of the present invention can shorten the wiring connecting the circuits by adopting a structure in which the circuits are stacked, thereby achieving lightweighting of the display device. In addition, a display device according to one embodiment of the present invention can include a display portion in which the clarity of the pixels is improved, thereby achieving a display device with excellent display quality.

[0155] <Display Device 10B>

[0156] Figure 6A and Figure 6B It is a perspective view of a display device 10B which is a modified example of the display device 10A. Figure 6B This is a perspective view for explaining the structure of each layer included in the display device 10B. To avoid duplication of description, the differences from the display device 10A will be mainly described.

[0157] The display device 10B includes a plurality of pixel circuits 51 ( Figure 6A and Figure 6B In the display device 10B, the pixel circuit group 55 is divided into a plurality of sections 59, and the driving circuit 30 is divided into a plurality of sections 39. Each of the plurality of sections 39 includes a source driving circuit 31 and a gate driving circuit 33 ( Figure 6A and Figure 6B (not shown in the figure).

[0158] Figure 7A A configuration example of the pixel circuit group 55 included in the display device 10B is shown. Figure 7B The following shows an example of the structure of the drive circuit 30 included in the display device 10B. Both the partitions 59 and the partitions 39 are arranged in a matrix with m rows and n columns (m and n are both integers greater than or equal to 2). In this specification, etc., the 1st row and 1st column partition 59 is represented as partition 59[1, 1], and the mth row and nth column partition 59 is represented as partition 59[m, n]. Similarly, the 1st row and 1st column partition 39 is represented as partition 39[1, 1], and the mth row and nth column partition 39 is represented as partition 39[m, n]. Similarly, the 1st row and 1st column sub-display unit 19 is sometimes represented as sub-display unit 19[1, 1]. Sub-display unit 19[1, 1] includes partition 59[1, 1] and partition 39[1, 1]. Figure 7A and Figure 7B The case where m and n are 4 and 8, respectively, is shown. That is, the pixel circuit group 55 and the driver circuit 30 are each divided into 32. Therefore, the display unit 13 is divided into 32 pieces.

[0159] Each of the sections 59 includes a plurality of pixel circuits 51, a plurality of wires SL, and a plurality of wires GL. In each of the sections 59, one of the pixel circuits 51 is electrically connected to at least one of the wires SL and at least one of the wires GL.

[0160] One of the sections 59 is provided so as to overlap with one of the sections 39 (see Figure 7C ). For example, partition 59[i, j] (i is an integer greater than 1 and less than m, and j is an integer greater than 1 and less than n) is arranged in a manner overlapping with partition 39[i, j]. The source driver circuit 31[i, j] included in partition 39[i, j] is electrically connected to the wiring SL included in partition 59[i, j]. The gate driver circuit 33[i, j] included in partition 39[i, j] is electrically connected to the wiring GL included in partition 59[i, j]. The source driver circuit 31[i, j] and the gate driver circuit 33[i, j] have the function of controlling the multiple pixel circuits 51 included in partition 59[i, j].

[0161] By arranging the partitions 59[i, j] and the partitions 39[i, j] in an overlapping manner, the connection distance (wiring length) between the pixel circuit 51 included in the partition 59[i, j] and the source driver circuit 31 and gate driver circuit 33 included in the partition 39[i, j] can be extremely short. As a result, the wiring resistance and parasitic capacitance are reduced, and thus the time required for charging and discharging is reduced, thereby enabling high-speed driving. In addition, power consumption can be reduced. In addition, miniaturization and lightweighting can be achieved.

[0162] In addition, a timing generation circuit (timing generation circuit 441), an input / output circuit (input / output circuit 442), and a storage circuit (storage circuit 443) may be provided in each section 39 (see Figure 7D ). As the input / output circuit 442, for example, I 2 C (Inter-Integrated Circuit: integrated circuit bus) interface, etc.

[0163] Note that the timing generation circuit 441, the input / output circuit 442, and the memory circuit 443 are sometimes collectively referred to as a "local controller." Furthermore, the local controller may include circuits other than the timing generation circuit 441, the input / output circuit 442, and the memory circuit 443. Furthermore, the local controller may not include one or more of the timing generation circuit 441, the input / output circuit 442, and the memory circuit 443.

[0164] exist Figure 7C and Figure 7D In FIG3 , the timing generation circuit 441 included in the partition 39[i, j] is represented as the timing generation circuit 441[i, j]. Furthermore, the input / output circuit 442 included in the partition 39[i, j] is represented as the input / output circuit 442[i, j]. Furthermore, the storage circuit 443 included in the partition 39[i, j] is represented as the storage circuit 443[i, j].

[0165] For example, the functional circuit 40 supplies the input / output circuit 442[i, j] with setting signals for the scanning direction and driving frequency of the gate drive circuit 33[i, j], as well as operating parameters such as the number of pixels extracted from the image data when reducing the resolution (the number of pixels not rewritten when rewriting the image data). The timing generation circuit 441[i, j] has the function of determining the driving frequency of the partition 39[i, j] based on these operating parameters. In other words, the timing generation circuit 441[i, j] has the function of determining the driving frequency of the auxiliary display unit 19 in the i-th row and j-th column based on these operating parameters. The operations of the source drive circuit 31[i, j] and the gate drive circuit 33[i, j] are controlled by the timing generation circuit 441[i, j].

[0166] Memory circuit 443[i, j] stores operating parameters such as resolution and drive frequency supplied to segment 39[i, j]. Memory circuit 443[i, j] also stores image data for the image displayed on sub-display unit 19[1, 1]. In other words, memory circuit 443[i, j] functions as a frame memory.

[0167] Flash memory, MRAM, PRAM, ReRAM, FeRAM, DRAM, or SRAM can be used as the storage circuit 443. Furthermore, DOSRAM (registered trademark) and NOSRAM (registered trademark) can also be used as the storage circuit 443. By providing a storage circuit 443 serving as a frame memory for each sub-display portion 19 (each segment 39), even if the transmission of image data to the sub-display portion 19 is stopped while a still image is being displayed, the image data stored in the storage circuit 443 can continue to be displayed.

[0168] Furthermore, by providing a storage circuit 443 in each sub-display unit 19, image data can be rewritten in each sub-display unit 19. For example, if a portion of the image data changes, only the image data in the sub-display unit 19 corresponding to the changed area can be rewritten. This eliminates the need to transmit image data for the entire display unit 13, reducing the amount of image data transmitted. This also allows for power savings during data transmission.

[0169] Furthermore, when the sub-display portion 19 includes a light-receiving element, the input / output circuit 442 has a function of outputting information photoelectrically converted by the light-receiving element to the functional circuit 40. Note that an external device capable of functioning as the functional circuit 40 may be connected to the display device 10B without incorporating the functional circuit 40 within the display device 10B. Signals can be input and output between the external device and the display device 10B via the terminal portion 14.

[0170] Furthermore, circuits other than the timing generation circuit 441 , the input / output circuit 442 , and the storage circuit 443 may be provided in each section 39 .

[0171] Furthermore, the display device 10B has a configuration in which each section 39 includes a source driver circuit 31 and a gate driver circuit 33. Therefore, the display unit 13 can be divided into sections 59 corresponding to the sections 39, and image data can be rewritten. For example, in the display unit 13, only the image data of the section where the image has changed can be rewritten, while the image data of the section where the image has not changed can be maintained, thereby reducing power consumption.

[0172] In this specification, one of the display units 13 divided into each section 59 is sometimes referred to as a sub-display unit 19. In addition, since one section 59 is controlled by one section 39, it can be said that the sub-display unit 19 is a part of the display unit 13 divided into each section 39. The display unit 13 is composed of a plurality of sub-display units 19. Therefore, it can also be said that the display unit 13 includes a plurality of sub-display units 19. Figure 6A 、 Figure 6B and 7A to 7C In the display device 10B described above, the display portion 13 is divided into 32 sub-display portions 19 in 4 rows and 8 columns. Note that the number of sub-display portions 19 included in the display portion 13 is not limited to this.

[0173] Like the display unit 13, the sub-display unit 19 also includes a plurality of pixels 230. Furthermore, the sub-display unit 19 is controlled for each segment 59, with each segment 59 being controlled by a corresponding segment 39. In other words, image display in one sub-display unit 19 is performed by integrating the plurality of light-emitting elements 61, one segment 59, and one segment 39. Therefore, in this specification and other documents, unless otherwise specified, the "sub-display unit 19" may include the plurality of light-emitting elements 61, one segment 59, and one segment 39.

[0174] In addition, Figure 6A In the embodiment, when the display unit 13 is viewed from the Z direction, one sub-display unit 19 is a vertically long rectangle, but the planar shape of the sub-display unit 19 is not limited thereto. The planar shape of one sub-display unit 19 may differ depending on the shape of the display unit 13 and the number of divisions. For example, Figure 8A As shown in FIG. 1 , the planar shape of the auxiliary display portion 19 may also be a horizontally long rectangle. Figure 8B As shown in FIG. 1 , the planar shape of the auxiliary display portion 19 may also be a square. Figure 8C As shown, the display portion 13 may have a structure in which a vertically long sub-display portion 19, a horizontally long sub-display portion 19, and a square sub-display portion 19 are combined.

[0175] Furthermore, in the display device 10B, the timing generation circuit 44 included in the functional circuit 40 can arbitrarily set the drive frequency for each sub-display unit 19 when displaying an image. The functional circuit 40 has the function of controlling the operation of each of the multiple sections 39 and the multiple sections 59. In other words, the functional circuit 40 has the function of controlling the drive frequency and operation timing of each of the multiple sub-display units 19 arranged in a matrix. The functional circuit 40 also has the function of performing synchronization adjustment between the sub-display units.

[0176] For example, by detecting the user's gaze point on the display unit 13 and varying the drive frequency of each sub-display unit 19 according to the movement of the gaze point (according to the user's line of sight), power consumption can be reduced.

[0177] Figure 9A The display unit 13 is shown to include sub-display units 19 arranged in 4 rows and 8 columns. Figure 9A The first area S1 to the third area S3 centered on the gaze point G on the display unit 13 are shown. Each of the plurality of sub-display units 19 is allocated to either the first area 29A overlapping the first area S1 or the second area S2 or the second area 29B overlapping the third area S3. In other words, each of the plurality of partitions 39 is allocated to the first area 29A or the second area 29B. The first area 29A includes an area overlapping the gaze point G. In addition, the second area 29B includes the sub-display unit 19 located outside the first area 29A (see FIG. 2 ). Figure 9B ).

[0178] Each of the above-mentioned sections corresponds to the blocks described in the first embodiment.

[0179] The operation of the driving circuit (source driving circuit 31 and gate driving circuit 33) included in each of the multiple divisions 39 is controlled by the functional circuit 40. For example, the second area 29B is an area that overlaps with the third area S3 that includes the stable gaze field of view, the guide field of view, and the auxiliary field of view described later, that is, an area where the user's recognition ability is low. Therefore, even if the number of times the second area 29B rewrites the image data per unit time (hereinafter also referred to as the "number of image rewrites") is less than that of the first area 29A when displaying an image, the actual display quality perceived by the user (hereinafter also referred to as the "actual display quality") is hardly reduced. In other words, even if the driving frequency of the sub-display unit 19 included in the second area 29B (also referred to as the "second driving frequency") is lower than the driving frequency of the sub-display unit 19 included in the first area 29A (also referred to as the "first driving frequency"), the actual display quality is hardly reduced.

[0180] Reducing the drive frequency can reduce the power consumption of the display device. On the other hand, this also reduces display quality. In particular, the display quality decreases when displaying dynamic images. According to one embodiment of the present invention, by setting the second drive frequency lower than the first drive frequency, it is possible to reduce power consumption in areas with low user visibility while suppressing a substantial decrease in display quality. According to one embodiment of the present invention, it is possible to simultaneously maintain display quality and reduce power consumption.

[0181] The first drive frequency is 30 Hz to 500 Hz, preferably 60 Hz to 500 Hz. The second drive frequency is preferably less than the first drive frequency, more preferably less than 1 / 2 of the first drive frequency, and even more preferably less than 1 / 5 of the first drive frequency. Note that "fps" is sometimes used instead of "Hz" as the unit of drive frequency (frame rate).

[0182] Alternatively, in the sub-display portion 19 overlapping the third area S3, an area further from the first area 29A may be set as the third area 29C (see FIG. Figure 9C ), and the drive frequency of the sub-display unit 19 included in the third area 29C (also referred to as the "third drive frequency") can also be lower than that of the second area 29B. The third drive frequency is preferably lower than the second drive frequency, more preferably lower than 1 / 2 of the second drive frequency, and even more preferably lower than 1 / 5 of the second drive frequency. By minimizing the number of image rewrites, power consumption can be further reduced. In addition, image data rewriting can be stopped as needed. By stopping image data rewriting, power consumption can be further reduced.

[0183] When using this driving method, it is preferable to use a transistor with an extremely low off-state current as the transistor constituting the pixel circuit 51. For example, an OS transistor is preferably used as the transistor constituting the pixel circuit 51. Since the off-state current of the OS transistor is extremely low, the OS transistor can retain image data supplied to the pixel circuit 51 for a long period of time. In particular, an OS transistor is preferably used as the transistor 52A.

[0184] Furthermore, sometimes an image with significantly different brightness, contrast, or hue from the previous image is displayed on display unit 13, such as a scene change in a video displayed on display unit 13. In such cases, the timing of image transitions may deviate between first region 29A and a region driven at a lower frequency than first region 29A, resulting in a significant difference in brightness, contrast, or hue between the two regions, potentially degrading the actual display quality. In such cases, such as a scene change in a video, image data in regions other than first region 29A may be rewritten at the same drive frequency as first region 29A, and then the drive frequency in regions other than first region 29A may be reduced.

[0185] Furthermore, when it is determined that the amount of change in the gaze point G exceeds a certain amount, the image data of the area outside the first area 29A may be rewritten at the same drive frequency as the first area 29A. Furthermore, when it is determined that the amount of change in the gaze point G is below a certain amount, the drive frequency of the area outside the first area 29A may be reduced. Furthermore, when it is determined that the amount of change in the gaze point G is small, the drive frequency of the area outside the first area 29A may be further reduced.

[0186] When the display device 10B does not include a frame memory for storing image data or includes one frame memory corresponding to the entire display unit 13 , both the second driving frequency and the third driving frequency need to be set to an integer fraction of the first driving frequency.

[0187] By providing a frame memory corresponding to each of the plurality of sub-display units 19, the second and third drive frequencies can be set to arbitrary values, not limited to integer fractions of the first drive frequency. By setting the second and third drive frequencies to arbitrary values, the degree of freedom in setting the drive frequencies can be increased. Consequently, substantial degradation in display quality can be minimized.

[0188] Note that the areas set for the display unit 13 are not limited to the first area 29A, the second area 29B, and the third area 29C. Four or more areas may be set for the display unit 13. By setting multiple areas for the display unit 13 and gradually reducing the driving frequency, the actual degradation of display quality can be further reduced.

[0189] Furthermore, the above-described upconversion processing can also be performed on the image displayed in the first region 29A. Displaying the upconverted image in the first region 29A can improve display quality. Furthermore, the above-described upconversion processing can also be performed on images displayed in areas other than the first region 29A. Displaying the upconverted image in areas other than the first region 29A can further reduce the actual degradation in display quality caused by reducing the drive frequency in areas other than the first region 29A.

[0190] Alternatively, the image displayed in first region 29A may be up-converted using a high-precision algorithm, while the image displayed in areas other than first region 29A may be up-converted using a low-precision algorithm. In this case, the actual degradation in display quality caused by reducing the drive frequency in areas other than first region 29A can be further reduced.

[0191] Furthermore, the image displayed in an area other than the first area 29A may be down-converted, for example, if the resolution of the image data is higher than the resolution of the display unit 13 or if high-speed rewriting and reduced power consumption are prioritized. For example, by rewriting the image displayed in an area other than the first area 29A every few rows, columns, or pixels, high-speed rewriting and reduced power consumption can be achieved.

[0192] Furthermore, by lowering the resolution of the image displayed in areas outside of first region 29A compared to the image displayed in first region 29A, including the foveated point (reducing the amount of information), the load associated with generating the video signal (rendering) is reduced. This process is also known as "foveated rendering." By combining a reduction in the drive frequency in areas outside of first region 29A with foveated rendering, power consumption can be further reduced while suppressing degradation in display quality.

[0193] Reference Figure 10A and Figure 10BAn example of foveated rendering will be described. As an example, a case where the first area 29A displays an image at a normal resolution and the second area 29B displays an image at half the normal resolution will be described.

[0194] The up-conversion, down-conversion, and foveated rendering processes required for the display method described here correspond to the interpolation process used to insert missing data described in Embodiment 1. In particular, this process can be used as a method for restoring image data for each region (block) of extracted data.

[0195] Figure 10A A portion of the plurality of pixel circuits 51 in the first region 29A is shown. Figure 10A 36 pixel circuits 51 are arranged in a matrix of 6 rows and 6 columns. One piece of image data is written into one pixel circuit 51 . Figure 10A The 36 pixel circuits 51 shown are written with 36 image data shown as image data A1 to image data A6, image data B1 to image data B6, image data C1 to image data C6, image data D1 to image data D6, image data E1 to image data E6 and image data F1 to image data F6.

[0196] Figure 10B FIG. 2 shows a portion of the plurality of pixel circuits 51 in the second region 29B. In the second region 29B, four adjacent pixel circuits 51 are used as one pixel circuit. Figure 10B In FIG. 5 , four pixel circuits 51 serving as one pixel circuit are represented as a pixel circuit 51 a . The same image data may be written to the four pixel circuits 51 included in the pixel circuit 51 a .

[0197] For example, image data A1 can be written to the four pixel circuits 51 included in the pixel circuit 51a. In this case, image data A2, image data B1, and image data B2 are not used, so the amount of image data sent to the sub-display unit 19 (area 39) can be reduced.

[0198] Similarly, when writing image data C1 to the four pixel circuits 51 included in the pixel circuit 51a, image data C2, image data D1, and image data D2 are not used. Therefore, the amount of image data sent to the sub-display portion 19 (area 39) can be reduced.

[0199] For example, if the resolution of the sub-display unit 19 in the first area 29A is 480×720 pixels, the resolution of the sub-display unit 19 in the second area 29B can be considered to be 240×360 pixels. Therefore, the amount of image data sent to the sub-display unit 19 (division 39) in the second area 29B is 1 / 4 of that in the first area 29A.

[0200] Furthermore, by using nine adjacent pixel circuits 51 as one pixel circuit, the resolution can be considered to be 160 x 240 pixels. In this case, the amount of image data sent to the sub-display portion 19 (division 39) in the second region 29B is 1 / 9 of that in the first region 29A.

[0201] As described above, by reducing the apparent resolution of the sub-display portion 19, the amount of image data transmitted to the sub-display portion 19 can be reduced. Reducing the amount of image data used for image display can reduce the burden on circuits included in the area 39, such as the input / output circuit 442, the memory circuit 443, and the driver circuit.

[0202] Furthermore, high-speed rewriting can be achieved by simultaneously rewriting the image data of all the sub-display portions 19 when rewriting the image data of each sub-display portion 19. In other words, high-speed rewriting can be achieved by simultaneously rewriting the image data of all the sections 39 when rewriting the image data of each section 39.

[0203] Generally speaking, when line sequential driving is adopted, the source driver circuit writes image data to all pixels in a row at the same time when the gate driver circuit selects a row of pixels. For example, when the display unit 13 is not divided into multiple sub-display units 19 and has a resolution of 4000×2000 pixels, the source driver circuit needs to write image data to 4000 pixels when the gate driver circuit selects a row of pixels. When the frame rate is 120Hz, one frame time is about 8.3msec. Therefore, the gate driver circuit needs to select 2000 rows of pixels in about 8.3msec, and the time to select a row of pixels, that is, the time to write image data to each pixel, is about 4.17μsec. In other words, the higher the resolution of the display unit or the higher the frame rate, the more difficult it is to ensure sufficient time to rewrite the image data.

[0204] In the display device 10B shown in this embodiment, the display unit 13 is divided into four sections in the row direction. Consequently, the time required to write image data to each pixel in one sub-display unit 19 can be four times longer than when the display unit 13 is not divided. According to one embodiment of the present invention, time for rewriting image data can be easily secured even at a frame rate of 240 Hz or even 360 Hz, thereby achieving a display device with high display quality.

[0205] Furthermore, in the display device 10B shown in this embodiment, since the display unit 13 is divided into four in the row direction, the length of the wiring SL electrically connecting the source driver circuit and the pixel circuit is reduced to one-fourth. Consequently, the resistance and parasitic capacitance of the wiring SL are both reduced to one-fourth, shortening the time required to write (or rewrite) image data.

[0206] Furthermore, in the display device 10B shown in this embodiment, because the display unit 13 is divided into eight columns in the column direction, the length of the wiring GL electrically connecting the gate driver circuit and the pixel circuit is reduced to one-eighth. Consequently, the resistance and parasitic capacitance of the wiring GL are both reduced to one-eighth, reducing signal degradation and delay, making it easier to ensure sufficient time to rewrite image data.

[0207] The display device 10B according to one embodiment of the present invention easily secures sufficient time to write image data, enabling high-speed rewriting of displayed images. Consequently, a display device with high display quality can be realized. In particular, a display device that excels at displaying moving images can be realized.

[0208] <Structure example of display module>

[0209] Next, a configuration example of a display module including the display device 10 (display device 10A or display device 10B) will be described.

[0210] Figures 11A to 11C This is a perspective view of a display module 300. In display module 300, the terminal portion 14 of display device 10A includes an FPC 304 (Flexible Printed Circuit). FPC 304 has a structure in which wiring is contained within a thin film made of an insulator. Furthermore, FPC 304 is flexible. FPC 304 serves as wiring for externally supplying video signals, control signals, power supply potential, and the like to display device 10A. Furthermore, an IC can also be mounted on FPC 304.

[0211] Figure 11B The display module 300 shown has a structure including the display device 10A on a printed circuit board 301. The printed circuit board 301 has a structure including wiring inside or on the surface, or both inside and on the surface, of a substrate made of an insulator.

[0212] exist Figure 11B In the display module 300 shown, the terminal portion 14 of the display device 10A is electrically connected to the terminal portion 302 of the printed circuit board 301 via a wire 303. The wire 303 can be formed by wire bonding. Alternatively, the wire bonding can be ball bonding or wedge bonding.

[0213] Alternatively, the leads 303 may be covered with a resin material or the like after they are formed. Note that the display device 10A and the printed circuit board 301 may be electrically connected using methods other than wire bonding. For example, the display device 10A and the printed circuit board 301 may be electrically connected using an anisotropic conductive adhesive or bumps.

[0214] In addition, Figure 11B In the display module 300 shown, the terminal portion 302 of the printed circuit board 301 is electrically connected to the FPC 304. For example, even if the spacing between the electrodes included in the terminal portion 14 of the display device 10A is different from the spacing between the electrodes included in the FPC 304, the terminal portion 14 and the FPC 304 can be electrically connected via the printed circuit board 301. Specifically, the spacing (pitch) between the multiple electrodes included in the terminal portion 14 can be changed to the spacing between the multiple electrodes included in the terminal portion 302 using wiring formed in the printed circuit board 301. In other words, even if the spacing between the electrodes included in the terminal portion 14 is different from the spacing between the electrodes included in the FPC 304, electrical connection between the electrodes of the two can be achieved.

[0215] Furthermore, various elements such as resistors, capacitors, and semiconductor elements may be provided on the printed circuit board 301 .

[0216] In addition, if Figure 11C As shown in the display module 300, the terminal portion 302 can also be electrically connected to a connection portion 305 provided on the bottom surface (the surface on the side where the display device 10A is not provided) of the printed circuit board 301. For example, by using a socket type connection portion as the connection portion 305, the display module 300 can be easily attached and detached from other devices.

[0217] <Structural Example of Pixel Circuit>

[0218] Figure 12A and Figure 12B An example of the structure of the pixel circuit 51 and the light-emitting element 61 connected to the pixel circuit 51 are shown. Figure 12A is a diagram showing the connection of each element, Figure 12B 1 is a diagram schematically showing the vertical relationship among a layer 20 including a driver circuit, a layer 50 including a plurality of transistors included in a pixel circuit, and a layer 60 including a light-emitting element.

[0219] exist Figure 12A and Figure 12B Pixel circuit 51 shown as an example in FIG includes transistor 52A, transistor 52B, transistor 52C, and capacitor 53. Transistor 52A, transistor 52B, and transistor 52C can be formed using OS transistors. Each OS transistor of transistor 52A, transistor 52B, and transistor 52C preferably includes a back-gate electrode. In this case, a configuration can be adopted in which the same signal as the gate electrode is supplied to the back-gate electrode, or a configuration can be adopted in which a signal different from the gate electrode is supplied to the back-gate electrode.

[0220] The transistor 52B includes a gate electrode electrically connected to the transistor 52A, a first electrode electrically connected to the light emitting element 61, and a second electrode electrically connected to the wiring ANO. The wiring ANO is a wiring for supplying a potential for supplying a current to the light emitting element 61.

[0221] The transistor 52A includes a first terminal electrically connected to the gate electrode of the transistor 52B, a second terminal electrically connected to the wiring SL used as a source line, and a gate electrode having a function of controlling a conductive state or a non-conductive state according to the potential of the wiring GL1 used as a gate line.

[0222] Transistor 52C includes a first terminal electrically connected to wiring V0, a ​​second terminal electrically connected to light-emitting element 61, and a gate electrode having a function of controlling a conductive state or a non-conductive state according to the potential of wiring GL2 serving as a gate line. Wiring V0 is a wiring for supplying a reference potential and is a wiring for outputting the current flowing through pixel circuit 51 to driver circuit 30 or functional circuit 40.

[0223] The capacitor 53 includes a conductive film electrically connected to the gate electrode of the transistor 52B and a conductive film electrically connected to the second electrode of the transistor 52C.

[0224] The light emitting element 61 includes a first electrode electrically connected to the first electrode of the transistor 52B and a second electrode electrically connected to a wiring VCOM. The wiring VCOM is a wiring for supplying a potential for supplying a current to the light emitting element 61.

[0225] Thus, the intensity of light emitted by light emitting element 61 can be controlled according to the image signal supplied to the gate electrode of transistor 52B. Furthermore, the reference potential of wiring V0 supplied via transistor 52C can suppress variations in gate-source voltage of transistor 52B.

[0226] Furthermore, a current value can be output from wiring V0 for use in setting pixel parameters. More specifically, wiring V0 can be used as a monitoring line for externally outputting the current flowing through transistor 52B or the current flowing through light-emitting element 61. The current output to wiring V0 is converted to a voltage by a source follower circuit or the like and output externally. Alternatively, it can be converted to a digital signal by an A / D converter or the like and output to functional circuit 40 or the like.

[0227] The light-emitting element described in one embodiment of the present invention is a self-luminous display element such as an organic EL element (also known as an OLED (Organic Light Emitting Diode)). In addition, the light-emitting element electrically connected to the pixel circuit may be a self-luminous light-emitting element such as an LED (Light Emitting Diode), a micro LED, a QLED (Quantum-dot Light Emitting Diode), or a semiconductor laser.

[0228] exist Figure 12B In the structure shown, the wiring electrically connecting the pixel circuit 51 and the driving circuit 30 can be shortened, so the wiring resistance of the wiring can be reduced. Therefore, data writing can be performed at high speed, so the display device 10A can be driven at high speed. Thus, even if the pixel circuit 51 in the display device 10A is increased, sufficient frame period can be ensured, and the pixel density of the display device 10A can be improved. In addition, by increasing the pixel density of the display device 10A, the clarity of the image displayed on the display device 10A can be improved. For example, the pixel density of the display device 10A can be made greater than 1000ppi, greater than 5000ppi, or greater than 7000ppi. Therefore, the display device 10A can be, for example, a display device for AR or VR, and can be appropriately used in electronic devices such as HMD in which the display portion is close to the user.

[0229] Notice, Figure 12A and Figure 12B Although the example of the pixel circuit 51 including three transistors is shown, one embodiment of the present invention is not limited thereto. Hereinafter, an example of a configuration of a pixel circuit and an example of a driving method that can be used for the pixel circuit 51 will be described.

[0230] Figure 13A The pixel circuit 51A shown includes a transistor 52A, a transistor 52B, and a capacitor 53. Figure 13A FIG2 shows a light emitting element 61 connected to the pixel circuit 51A. In addition, the pixel circuit 51A is electrically connected to the wiring SL, the wiring GL, the wiring ANO, and the wiring VCOM. The pixel circuit 51A has a Figure 12A In the pixel circuit 51 shown, the transistor 52C is removed and the wiring GL1 and the wiring GL2 are replaced with the wiring GL.

[0231] In transistor 52A, the gate is electrically connected to wiring GL, one of the source and drain is electrically connected to wiring SL, and the other is electrically connected to the gate of transistor 52B and one electrode of capacitor C1. In transistor 52B, one of the source and drain is electrically connected to wiring ANO, and the other is electrically connected to the anode of light-emitting element 61. The other electrode of capacitor C1 is electrically connected to the anode of light-emitting element 61. The cathode of light-emitting element 61 is electrically connected to wiring VCOM.

[0232] Figure 13B The pixel circuit 51B shown has a configuration in which a transistor 52C is added to the pixel circuit 51A. The pixel circuit 51B is electrically connected to the wiring V0.

[0233] Figure 13C The pixel circuit 51C shown is an example in which the transistor 52A and the transistor 52B of the pixel circuit 51A are transistors with a pair of gates electrically connected to each other. Figure 13D Pixel circuit 51D shown is an example of using this transistor in pixel circuit 51B. Therefore, the current that can flow through the transistor can be increased. Note that all transistors shown here use a pair of electrically connected gates, but this is not limited to this. Alternatively, a transistor may be used that includes a pair of gates electrically connected to different wirings. For example, by using a transistor in which one gate is electrically connected to the source, reliability can be improved.

[0234] Figure 14A The pixel circuit 51E shown has a structure similar to the pixel circuit 51B described above, with the addition of a transistor 52D. Furthermore, the pixel circuit 51E is electrically connected to the wiring GL1, wiring GL2, and wiring GL3, which serve as gate lines. Note that in this embodiment and other embodiments, the wiring GL1, wiring GL2, and wiring GL3 are sometimes collectively referred to as wiring GL. Therefore, there is not limited to one wiring GL; there may be multiple wiring GLs.

[0235] The gate of transistor 52D is electrically connected to wiring GL3, one of its source and drain is electrically connected to the gate of transistor 52B, and the other is electrically connected to wiring V0. The gate of transistor 52A is electrically connected to wiring GL1, and the gate of transistor 52C is electrically connected to wiring GL2.

[0236] By simultaneously turning on transistors 52C and 52D, the source and gate of transistor 52B reach the same potential, rendering transistor 52B non-conductive. This forcibly shuts off the current flowing through light-emitting element 61. This pixel circuit is suitable for display methods that alternate between on and off periods.

[0237] Figure 14BThe pixel circuit 51F shown is an example in which a capacitor 53A is added to the pixel circuit 51E described above. The capacitor 53A is used as a holding capacitor.

[0238] Figure 14C The pixel circuit 51G and Figure 14D Pixel circuit 51H is an example of a case where pixel circuit 51E or pixel circuit 51F uses transistors with a pair of gates. Transistors 52A, 52C, and 52D use transistors with a pair of gates electrically connected to each other, while transistor 52B uses a transistor with one gate electrically connected to the source.

[0239] Next, an example of a driving method for a display device using the pixel circuit 51E will be described. Note that the same driving method can also be used for display devices using the pixel circuits 51F, 51G, and 51H.

[0240] Figure 15 : This is a timing diagram of a method for driving a display device using the pixel circuit 51E. It shows the potential transitions of the wiring GL1[k], wiring GL2[k], and wiring GL3[k] of the k-th gate line, and the wiring GL1[k+1], wiring GL2[k+1], and wiring GL3[k+1] of the k+1-th gate line. Figure 15 The timing of supplying a signal to the wiring SL used as a source line is shown.

[0241] Here, an example of a driving method for displaying by dividing one horizontal period into a lighting period and a light-off period is shown. In addition, the k-th row horizontal period is shifted from the k+1-th row horizontal period by a gate line selection period.

[0242] During the kth row lighting period, a high-level potential is first supplied to wirings GL1[k] and GL2[k], and a source signal is supplied to wiring SL. This turns on transistors 52A and 52C, and a potential corresponding to the source signal is written from wiring SL to the gate of transistor 52B. Subsequently, a low-level potential is supplied to wirings GL1[k] and GL2[k], turning off transistors 52A and 52C, maintaining the gate potential of transistor 52B.

[0243] Next, during the lighting period of the k+1th row, data is written by the same operation as above.

[0244] Next, let's describe the off period. During the off period in row k, a high potential is supplied to wirings GL2[k] and GL3[k]. This turns on transistors 52C and 52D. Therefore, when the same potential is supplied to the source and gate of transistor 52B, almost no current flows through transistor 52B. As a result, light-emitting element 61 turns off. All sub-pixels in row k are off. The sub-pixels in row k remain off until the next on period.

[0245] Next, in the light-off period of the k+1th row, all the sub-pixels in the k+1th row are turned off in the same manner as described above.

[0246] In this way, the following driving method can also be called duty drive. This means that instead of keeping the light on continuously during a horizontal period, the light is turned off for a set period during the horizontal period. By utilizing duty drive, afterimages during the display of moving images can be reduced, thereby realizing a display device with high dynamic image display performance. In particular, in VR devices, reducing afterimages can alleviate so-called VR sickness.

[0247] The ratio of the on-time period to the horizontal period in duty drive can be called the duty ratio. For example, a "50% duty ratio" means that the on-time period and the off-time period are equal in length. Note that the duty ratio can be freely set, for example, and can be adjusted appropriately within a range of greater than 0% and less than 100%.

[0248] At least a part of the structural examples described in this embodiment mode and the drawings corresponding to the structural examples can be combined with other structural examples, drawings, etc. as appropriate.

[0249] (Implementation 3)

[0250] In this embodiment, an example of an electronic device to which a display device according to one embodiment of the present invention can be applied is described. The display device according to one embodiment of the present invention is suitable for use in wearable electronic devices for VR or AR applications, for example.

[0251] <Structure Example of Electronic Equipment>

[0252] As an example of wearable electronic devices, Figure 16A FIG. 1 shows a perspective view of a glasses-type (goggle-type) electronic device 100. Figure 16A In the illustrated electronic device 100, a pair of display devices 10 (display device 10_L and display device 10_R), a motion detection unit 101, a gaze detection unit 102, a computing unit 103, and a communication unit 104 are included in a housing 105. As the display device 10 included in the electronic device 100, the display device 10A or the display device 10B described in the above embodiment can be used.

[0253] Here, the calculation unit 103 may have the functions of the image generation unit and the data generation unit described in Embodiment 1. Furthermore, the sight line detection unit 102 or the calculation unit 103 may have the functions of the coordinate detection unit described in Embodiment 1.

[0254] Figure 16B yes Figure 16A A block diagram of an electronic device 100 is shown. Figure 16A Similarly, the electronic device 100 includes a display device 10_L, a display device 10_R, a motion detection unit 101, a line of sight detection unit 102, a computing unit 103, and a communication unit 104, which transmit or receive various signals to or from each other via a bus BW. The display device 10_L and the display device 10_R each include a plurality of pixels 230, a driving circuit 30, and a functional circuit 40. Note that the functional circuit 40 may be omitted in one or both of the display device 10_L and the display device 10_R and the computing unit 103 may be used as the functional circuit 40. One pixel 230 includes one light-emitting element 61 and one pixel circuit 51. Therefore, the display device 10_L and the display device 10_R each include a plurality of light-emitting elements 61 and a plurality of pixel circuits 51.

[0255] The motion detection unit 101 has the function of detecting the motion of the housing 105, that is, the head motion of the user wearing the electronic device 100. A motion sensor utilizing MEMS technology, for example, can be used as the motion detection unit 101. A three-axis motion sensor or a six-axis motion sensor can be used as the motion sensor. In this specification, etc., the information regarding the motion of the housing 105 detected by the motion detection unit 101 is sometimes referred to as "first information" or "motion information."

[0256] The gaze detection unit 102 has the function of obtaining information about the user's gaze. Specifically, it has the function of detecting the user's gaze. For example, it can detect the user's gaze using gaze measurement (eye tracking) methods such as pupil center corneal reflection or bright / dark pupil effect. Alternatively, the user's gaze can be obtained using gaze measurement methods using laser or ultrasonic waves.

[0257] The calculation unit 103 has a function to calculate the user's gaze point using the gaze detection results of the gaze detection unit 102. In other words, it can determine which object the user is gazing at in the images displayed on the display devices 10_L and 10_R. Furthermore, it can determine whether the user is gazing at anything other than the screen. Note that in this manual, etc., the information regarding the user's gaze (gaze detection results) obtained by the gaze detection unit 102 is sometimes referred to as "second information" or "gaze information."

[0258] The calculation unit 103 has the function of performing drawing processing (calculation processing of image data) based on the operation of the frame 105. The calculation unit 103 uses the first information and image data input from the outside via the communication unit 104 to perform drawing processing based on the operation of the frame 105. As this image data, for example, 360-degree image data can be used. The 360-degree image data can be, for example, image data captured by a spherical camera (omnidirectional camera, 360° camera) or image data generated using computer graphics, etc. The calculation unit 103 has the function of converting the 360-degree image data into image data that can be displayed on the display device 10_L and the display device 10_R based on the first information.

[0259] Furthermore, the calculation unit 103 uses the second information to determine the sizes and shapes of multiple regions set on the display units of each of the display devices 10_L and 10_R. Specifically, the calculation unit 103 calculates the gaze point on the display unit based on the second information and sets the first region S1 to the third region S3, etc., on the display unit based on the gaze point.

[0260] A microprocessor such as a central processing unit (CPU), a digital signal processor (DSP), or a graphics processing unit (GPU) can be used alone or in combination as the computing unit 103. Furthermore, these microprocessors can also be implemented using a programmable logic device (PLD) such as an FPGA (Field Programmable Gate Array) or an FPAA (Field Programmable Analog Array).

[0261] The arithmetic unit 103 performs various data processing and program control by interpreting and executing instructions from various programs via the processor. Programs executable by the processor may be stored in a memory area within the processor or in a separate storage unit. The storage unit may include, for example, a non-volatile storage device such as flash memory, MRAM (Magnetoresistive Random Access Memory), PRAM (Phase Change RAM), ReRAM (Resistive RAM), or FeRAM (Ferroelectric RAM), or a volatile storage device such as DRAM (Dynamic RAM) or SRAM (Static RAM).

[0262] The communication unit 104 has the function of communicating with external devices wirelessly or by wire to obtain various data such as image data. For example, a high-frequency circuit (RF circuit) can be provided in the communication unit 104 to transmit and receive RF signals. A high-frequency circuit converts electromagnetic signals within the frequency band specified by national laws into electrical signals and vice versa, and uses these electromagnetic signals to communicate wirelessly with other communication devices. When wireless communication is performed, communication protocols or technologies that can be used include communication standards such as LTE (Long Term Evolution), GSM (Global System for Mobile Communication: registered trademark), EDGE (Enhanced Data Rates for GSM Evolution), CDMA2000 (Code Division Multiple Access 2000), and WCDMA (Wideband Code Division Multiple Access); or standards standardized by the IEEE (Institute of Electrical and Electronics Engineers) such as Wi-Fi (Wireless Fidelity: registered trademark), Bluetooth (registered trademark), and ZigBee (registered trademark). Furthermore, third-generation mobile communication systems (3G), fourth-generation mobile communication systems (4G), and fifth-generation mobile communication systems (5G) determined by the International Telecommunication Union (ITU) can be used.

[0263] Furthermore, the communication unit 104 may include external ports such as a LAN (Local Area Network) connection terminal, a digital broadcast reception terminal, and a terminal for connecting an AC adapter.

[0264] Each of the display devices 10_L and 10_R includes a plurality of light-emitting elements 61, a plurality of pixel circuits 51, a driver circuit 30, and a functional circuit 40. The pixel circuit 51 controls the light emission of the light-emitting element 61. The driver circuit 30 controls the pixel circuit 51. Note that the functional circuit 40 may be omitted from one or both of the display devices 10_L and 10_R, and the calculation unit 103 may be used as the functional circuit 40.

[0265] The information about the multiple regions of the display unit determined by the calculation unit 103 is used for driving the display unit to set different resolutions for each region. Functional circuit 40 controls the drive circuit 30 to display images at high resolution in regions close to the gaze point, and controls the drive circuit 30 to display images at low resolution in regions farther from the gaze point.

[0266] For example, by rewriting image data every other pixel or every other pixel, a low-resolution display can be achieved. By reducing the number of pixels for which image data is rewritten, the power consumption of the display device can be reduced. Furthermore, pixels that are not rewritten can emit light, but preferably do not. By stopping the light emission of pixels that are not rewritten, the power consumption of the display device can be reduced.

[0267] As in one embodiment of the present invention, the functional circuit 40 and the operation unit 103 may be provided separately. When the operation unit 103 is included, the operation unit 103 can be made to perform drawing processing according to the movement of the frame 105 and operation processing with a large load, such as determining the following multiple areas (first area S1 to third area S3) according to the gaze point. On the other hand, by making the functional circuit 40 perform processing to control the drive circuit 30, the circuit can be miniaturized and the power consumption can be reduced. In particular, in wearable electronic devices, it is necessary to detect the user's head movement, line of sight movement, etc. in a short period of time, so high-speed operation processing is required, which increases the power consumption of the operation. On the other hand, in one embodiment of the present invention, the function of outputting the control signal of the drive circuit 30 can be separated from the operation unit 103 and the output can be performed by the functional circuit 40. Therefore, the load of the operation unit can be suppressed without concentrating the load on one operation unit. In this way, overall low power consumption can be achieved.

[0268] Furthermore, electronic device 100 may also include a sensor 125. Sensor 125 may be configured to obtain information from one or more of the user's senses of sight, hearing, touch, taste, and smell. More specifically, sensor 125 may be configured to detect or measure one or more of force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, magnetism, temperature, sound, time, electric field, current, voltage, power, radiation, humidity, tilt, vibration, odor, and infrared light. Electronic device 100 may also include one or more sensors 125.

[0269] Sensors 125 may also be used to measure ambient temperature, humidity, illumination, odor, and the like. Sensors 125 may also be used to obtain information for personal identification using, for example, fingerprints, palm prints, irises, retinas, pulse patterns (including vein patterns and arterial patterns), or faces. Sensors 125 may also be used to measure the user's blink frequency, eyelid movement, pupil size, body temperature, pulse rate, or blood oxygen saturation to detect the user's fatigue and health status. Electronic device 100 may also detect the user's fatigue and health status and display a warning on display device 10.

[0270] In addition, the user's line of sight and eyelid movement can be detected to control the operation of the electronic device 100. The user does not need to touch the electronic device 100 to operate, so input operations can be performed in a hands-free state (with both hands free).

[0271] Furthermore, the electronic device 100 may be provided with a camera 129 for capturing the surroundings. The surroundings may be captured by the camera 129 and displayed on the display device 10. Other information may be superimposed on the video captured by the camera 129 and displayed on the display device 10.

[0272] also, Figure 17A 1 is a perspective view showing the electronic device 100. Figure 17A In the embodiment, housing 105 of electronic device 100 includes, in addition to a pair of display devices 10_L and 10_R and computing unit 103, a mounting portion 106, a buffer member 107, a pair of lenses 108, and the like. Display devices 10_L and 10_R are each located within housing 105 so as to be visible through lenses 108.

[0273] also, Figure 17AThe housing 105 shown is provided with an input terminal 109 and an output terminal 110. A cable for supplying image signals (image data) from a video output device or the like, or power for charging a battery (not shown) provided in the housing 105, can be connected to the input terminal 109. The output terminal 110 is used as an audio output terminal, for example, and can be connected to earphones or headphones.

[0274] Furthermore, the housing 105 preferably includes a mechanism that allows the left and right positions of the lens 108 and the display devices 10_L and 10_R to be adjusted so that the lens 108, the display devices 10_L and 10_R are positioned optimally according to the position of the user's eyes. Furthermore, the housing 105 preferably includes a mechanism that adjusts the focus by changing the distance between the lens 108 and the display devices 10_L and 10_R.

[0275] The cushioning member 107 is the part that comes into contact with the user's face (forehead or cheek, etc.). By making the cushioning member 107 in close contact with the user's face, it is possible to prevent external light from entering (light leakage), thereby further improving the sense of immersion. The cushioning member 107 is preferably made of a soft material so as to be in close contact with the user's face when the user installs the electronic device 100. When such a material is used, it not only makes the user feel skin-friendly, but also does not make the user feel cold when installed in colder seasons, etc., so it is preferred. When the cushioning member 107 or the mounting portion 106 and other components that come into contact with the user's skin adopt a detachable structure, it is easy to clean and replace, so it is preferred.

[0276] The electronic device according to one embodiment of the present invention may further include earphones 106A. Earphones 106A include a communication unit (not shown) and have wireless communication capabilities. Earphones 106A can output audio data using the wireless communication capabilities. Earphones 106A may also include a vibration mechanism to function as bone conduction earphones.

[0277] In addition, if Figure 17B Like the earphone 106B shown in FIG. 1 , earphone 106A can be connected directly to mounting portion 106 or connected via a wire. Alternatively, earphone 106B and mounting portion 106 can include magnets. This allows earphone 106B to be magnetically secured to mounting portion 106, making storage easier and therefore preferred.

[0278] <Working Example of Electronic Equipment>

[0279] An example of the operation of the electronic device 100 will be described using the drawings. Figure 18 1 is a flowchart illustrating an example of the operation of the electronic device 100 .

[0280] The motion detection unit 101 acquires first information (information on the motion of the housing 105 ) (step E11 ).

[0281] The eye gaze detection unit 102 acquires the second information (information on the user's eye gaze) (step E12 ).

[0282] The computing unit 103 performs a drawing process of the 360-degree image data based on the first information (step E13 ).

[0283] Let's take a specific example to explain step E13. Figure 19A The schematic diagram of FIG. 1 shows a user 112 located at the center of the 360-degree image data 111 . The user can see an image 114A in a direction 113A displayed on the display device 10 of the electronic device 100 .

[0284] Figure 19B The schematic diagram shows Figure 19A In the diagram of FIG, user 112 turns his head to see image 114B in direction 113B. As the frame of electronic device 100 moves, image 114A changes to image 114B, allowing user 112 to recognize the space represented by 360-degree image data 111.

[0285] like Figure 19A and Figure 19B As shown, the housing of electronic device 100 shakes according to the head movement of user 112. Regarding the image obtained from 360-degree image data 111, the higher the graphics processing capability according to the movement of electronic device 100, the more realistic the virtual space that user 112 can perceive.

[0286] The calculation unit 103 determines a plurality of areas corresponding to the gaze point G in the area on the display unit of the display device based on the second information (step E14). Figure 20A As shown, a first area S1 including the gaze point G and a second area S2 adjacent to the first area S1 are determined. The outer side of the second area is set as a third area S3.

[0287] Step E14 will be described with a specific example.

[0288] Although there are individual differences, in general, the human field of vision is roughly divided into the following five areas. The first is the discrimination field of vision, which is the area where visual functions such as vision and color recognition are most excellent; it is within approximately 5° of the center of the field of vision (including the gaze point). The second is the effective field of vision, which is the area where specified information can be instantly recognized as long as the eye moves; it is within approximately 30° parallel to and within approximately 20° perpendicular to the center of the field of vision (the gaze point); and it is adjacent to the outside of the discrimination field of vision. The third is the stable gaze field of vision, which is the area where specified information can be recognized without effort through head movement; it is within approximately 90° parallel to and within approximately 70° perpendicular to the center of the field of vision; and it is adjacent to the outside of the effective field of vision. The fourth is the guidance field of vision, which is the area where the presence of the specified object can be sensed but the recognition ability is low; it is within approximately 100° parallel to and within approximately 85° perpendicular to the center of the field of vision; and it is adjacent to the outside of the stable gaze field of vision. The fifth is the auxiliary visual field, which is the following area: the ability to recognize the specified object is extremely low to the extent that only the existence of the stimulus can be felt; it is parallel to the center of the visual field within about 100° to 200° and perpendicular to the center of the visual field within about 85° to 130°; and it is adjacent to the outside of the guiding visual field.

[0289] As described above, it can be seen that the image quality of distinguishing the field of view to the effective field of view is important in the image 114. The image quality of distinguishing the field of view is particularly important.

[0290] Figure 20A 1 is a schematic diagram showing a state in which a user 112 observes an image 114 displayed on the display unit of the display device 10 included in the electronic device 100 from the front (image display surface). Figure 20A The image 114 shown also corresponds to the display unit. Furthermore, the gaze point G, to which the user 112's line of sight 113 is directed, is shown on the image 114. In this specification, the area on the image 114 that includes the discrimination field of view is referred to as the "first area S1," and the area that includes the effective field of view is referred to as the "second area S2." Furthermore, the area that includes the stable gaze field of view, the guidance field of view, or the auxiliary field of view is referred to as the "third area S3."

[0291] Note that in Figure 20A In the figure, the boundary (contour) between the first area S1 and the second area S2 is represented by a curve, but the present invention is not limited thereto. Figure 20B As shown, the boundary (outline) between the first area S1 and the second area S2 can be a rectangle or a polygon. Alternatively, a shape combining straight lines and curves is also possible. Alternatively, the display portion of the display device 10 can be divided into two areas, with the area including the discriminable field of view and the effective field of view being designated as the first area S1 and the remaining area being designated as the second area S2. In this case, the third area S3 is not formed.

[0292] Figure 21AThis is a diagram showing an image 114 displayed on the display unit of the display device 10 of the electronic device 100 as viewed from above. Figure 21B This is a diagram showing an image 114 displayed on the display unit 10 of the electronic device 100 as viewed from the horizontal direction. In this specification, the horizontal angle of the first area S1 is expressed as "angle θx1", and the horizontal angle of the second area S2 is expressed as "angle θx2" (see Figure 21A ). In addition, in this specification, the angle in the vertical direction of the first region S1 is expressed as "angle θy1", and the angle in the vertical direction of the second region S2 is expressed as "angle θy2" (see Figure 21B ).

[0293] For example, by setting both angles θx1 and θy1 to 10°, the area of ​​first region S1 can be increased. In this case, first region S1 includes a portion of the effective visual field. Furthermore, by setting angles θx2 and θy2 to 45° and 35°, respectively, the area of ​​second region S2 can be increased. In this case, second region S2 includes a portion of the stable visual field.

[0294] Note that the position of the gaze point G fluctuates slightly depending on the line of sight 113. Therefore, the angle θx1 and the angle θy1 are each preferably greater than 5° and less than 20°. By setting the area of ​​the first region S1 to be wider than the visual field, the operation of the display device 10 is stabilized, and image visibility is improved.

[0295] When user 112's line of sight 113 shifts, gaze point G also shifts. Consequently, the first and second areas S1 and S2 also shift. For example, if the amount of change in line of sight 113 exceeds a certain amount, it is determined that line of sight 113 has shifted. In other words, if the amount of change in gaze point G exceeds a certain amount, it is determined that gaze point G has shifted. Furthermore, if the amount of change in line of sight 113 falls below a certain amount, it is determined that the shift in line of sight 113 has ceased, and the first to third areas S1 and S3 are determined. In other words, if the amount of change in gaze point G falls below a certain amount, it is determined that the shift in gaze point G has ceased, and the first to third areas S1 and S3 are determined.

[0296] In the functional circuit 40 , the driving circuit 30 is controlled according to the plurality of regions (the first region S1 to the third region S3 ) (step E15 ), for example, the driving frequency is adjusted according to the plurality of regions.

[0297] The above is the description of the operation example of the electronic device.

[0298] At least a part of the structural examples described in this embodiment mode and the drawings corresponding to the structural examples can be combined with other structural examples, drawings, etc. as appropriate.

[0299] (Implementation 4)

[0300] In this embodiment, a configuration example of the sub-display portion 19 including a plurality of pixels 230 arranged in a matrix of p rows and q columns (p and q are both integers greater than or equal to 2) will be described. Figure 22A It is a block diagram illustrating the sub-display unit 19.

[0301] exist Figure 22A , the pixel 230 in the p-th row and 1-th column is represented as pixel 230[p,1], the pixel 230 in the 1-th row and q-th column is represented as pixel 230[1,q], and the pixel 230 in the p-th row and q-th column is represented as pixel 230[p,q].

[0302] The circuits in the gate driver circuit 33 are used as, for example, a scanning line driver circuit, and the circuits in the source driver circuit 31 are used as, for example, a signal line driver circuit.

[0303] For example, an OS transistor may be used as a transistor constituting the pixel 230 and an Si transistor may be used as a transistor constituting the drive circuit. The off-state current of the OS transistor is low, so power consumption can be reduced. In addition, the operating speed of the Si transistor is faster than that of the OS transistor, so it is suitable for use in the drive circuit. In addition, depending on the mode of the display device, an OS transistor may be used as a transistor constituting the pixel 230 and a transistor constituting the drive circuit. In addition, depending on the mode of the display device, an Si transistor may be used as both a transistor constituting the pixel 230 and a transistor constituting the drive circuit. In addition, depending on the mode of the display device, an Si transistor may be used as a transistor constituting the pixel 230 and an OS transistor may be used as a transistor constituting the drive circuit.

[0304] Alternatively, both Si transistors and OS transistors may be used as transistors constituting the pixel 230. Alternatively, both Si transistors and OS transistors may be used as transistors constituting the driver circuit.

[0305] In addition, Figure 22A There are shown p wirings GL arranged in a manner substantially parallel to each other and whose potentials are controlled by the gate drive circuit 33, and q wirings SL arranged in a manner substantially parallel to each other and whose potentials are controlled by the source drive circuit 31. For example, the pixel 230 arranged on the rth row (r represents an arbitrary number, which is an integer greater than 1 and less than p in the present embodiment, etc.) is electrically connected to the gate drive circuit 33 via the rth row wiring GL. In addition, the pixel 230 arranged on the sth column (s represents an arbitrary number, which is an integer greater than 1 and less than q in the present embodiment, etc.) is electrically connected to the source drive circuit 31 via the sth column wiring SL. Figure 22A In FIG, the pixel 230 in the rth row and sth column is represented as pixel 230[r, s].

[0306] Note that the number of wirings GL electrically connected to the pixels 230 in a row is not limited to one. Furthermore, the number of wirings SL electrically connected to the pixels 230 in a column is not limited to one. Furthermore, the wirings GL and SL are merely examples, and the wirings electrically connected to the pixels 230 are not limited to the wirings GL and SL.

[0307] By configuring the pixel 230 for controlling red light, the pixel 230 for controlling green light, and the pixel 230 for controlling blue light in a strip shape and using them collectively as a pixel 240, and controlling the amount of light emitted (luminous brightness) of each pixel 230, a full-color display can be achieved. In other words, the three pixels 230 are used as sub-pixels. That is, the three sub-pixels control the amount of light emitted by red light, green light, or blue light, etc. (see Figure 22B1 ). In addition, the color of light controlled by the three sub-pixels is not limited to the combination of red (R), green (G), and blue (B), but can also be a combination of cyan (C), magenta (M), and yellow (Y) (see Figure 22B2 ).

[0308] When the pixels 240 are arranged in a 1920×1080 matrix, a display unit 13 capable of full-color display at a so-called 2K resolution can be realized. Furthermore, when the pixels 240 are arranged in a 3840×2160 matrix, for example, a display unit 13 capable of full-color display at a so-called 4K resolution can be realized. Furthermore, when the pixels 240 are arranged in a 7680×4320 matrix, for example, a display unit 13 capable of full-color display at an 8K resolution can be realized. By increasing the number of pixels 240, a display unit 13 capable of full-color display at a resolution of 16K or 32K can also be realized.

[0309] In addition, as an arrangement method of the three pixels 230 constituting one pixel 240, a delta arrangement may also be adopted (see Figure 22B3 Specifically, the pixels 230 may be arranged so that the lines connecting the center points of the three pixels 230 constituting one pixel 240 form a triangle. In addition, as an arrangement method of the three pixels 230 constituting one pixel 240, an S-striped arrangement may also be adopted (see Figure 22B4 Note that the arrangement of the pixels 230 is not limited to the stripe arrangement, the delta arrangement, and the S-stripe arrangement. A zigzag arrangement, a Bayer arrangement, or a Pentile arrangement may also be used as an arrangement of the pixels 230.

[0310] In addition, the areas of the three sub-pixels (pixel 230) may also be different. When the luminous efficiency and reliability are different depending on the luminous color, the area of ​​the sub-pixel may be changed according to the luminous color (see Figure 22B4 ).

[0311] Alternatively, four sub-pixels may be used as one pixel. For example, a sub-pixel for controlling white light may be added to the three sub-pixels for controlling red light, green light, and blue light (see FIG. Figure 22B5 By adding a sub-pixel that controls white light, the brightness of the display area can be increased. In addition, a sub-pixel that controls yellow light can be added to the three sub-pixels that control red light, green light, and blue light respectively (see Figure 22B6 ). In addition, a sub-pixel that controls white light may be added to the three sub-pixels that control cyan light, magenta light, and yellow light respectively (see Figure 22B7 ).

[0312] By increasing the number of sub-pixels used for one pixel, it is possible to appropriately combine and use sub-pixels that control light of red, green, blue, cyan, magenta, and yellow, thereby improving halftone reproducibility and, therefore, enhancing display quality.

[0313] A display device according to one embodiment of the present invention can reproduce color gamuts of various standards. For example, the color gamuts of the following specifications can be reproduced: the PAL (Phase Alternating Line) specification and the NTSC (National Television System Committee) specification used in television broadcasting; the sRGB (standard RGB) specification and the Adobe RGB specification widely used in display devices for electronic devices such as personal computers, digital cameras, and printers; the ITU-R BT.709 (International Telecommunication Union Radiocommunication Sector Broadcasting Service (Television) 709) specification used in HDTV (High Definition Television, also known as high definition); the DCI-P3 (Digital Cinema Initiatives P3) specification used in digital cinema projection; and the ITU-R BT.2020 (REC.2020 (Recommendation 2020)) specification used in UHDTV (Ultra High Definition Television, also known as ultra high definition).

[0314] <Structural Example of Light-Emitting Element>

[0315] A light-emitting element 61 that can be used in a display device according to one embodiment of the present invention will be described.

[0316] like Figure 23A As shown, light-emitting element 61 includes an EL layer 172 between a pair of electrodes (conductor 171 and conductor 173). EL layer 172 can be composed of multiple layers, such as layer 4420, light-emitting layer 4411, and layer 4430. Layer 4420 can include, for example, a layer containing a substance with a high electron-injecting property (electron-injection layer) and a layer containing a substance with a high electron-transporting property (electron-transport layer). Light-emitting layer 4411 can include, for example, a light-emitting compound. Layer 4430 can include, for example, a layer containing a substance with a high hole-injecting property (hole-injection layer) and a layer containing a substance with a high hole-transporting property (hole-transport layer).

[0317] The structure including the layer 4420 provided between a pair of electrodes, the light-emitting layer 4411, and the layer 4430 can be used as a single light-emitting unit. Figure 23A The structure is called a simple structure.

[0318] also, Figure 23B yes Figure 23A The EL layer 172 of the light-emitting element 61 shown in FIG. Figure 23B The illustrated light-emitting element 61 includes a layer 4430-1 on a conductor 171, a layer 4430-2 on layer 4430-1, a light-emitting layer 4411 on layer 4430-2, a layer 4420-1 on light-emitting layer 4411, a layer 4420-2 on layer 4420-1, and a conductor 173 on layer 4420-2. For example, when the conductor 171 and the conductor 173 function as an anode and a cathode, respectively, the layer 4430-1 functions as a hole-injection layer, the layer 4430-2 functions as a hole-transport layer, the layer 4420-1 functions as an electron-transport layer, and the layer 4420-2 functions as an electron-injection layer. Alternatively, when conductors 171 and 173 serve as the cathode and anode, respectively, layer 4430-1 serves as the electron injection layer, layer 4430-2 serves as the electron transport layer, layer 4420-1 serves as the hole transport layer, and layer 4420-2 serves as the hole injection layer. This layer structure allows for efficient injection of carriers into the light-emitting layer 4411, thereby improving the efficiency of carrier recombination within the light-emitting layer 4411.

[0319] In addition, if Figure 23C As shown, a structure in which a plurality of light-emitting layers (the light-emitting layer 4411 , the light-emitting layer 4412 , and the light-emitting layer 4413 ) are provided between the layer 4420 and the layer 4430 is also a modified example of a single structure.

[0320] like Figure 23DAs shown, a structure in which multiple light-emitting units (EL layer 172a, EL layer 172b) are connected in series via an intermediate layer (charge generation layer) 4440 is referred to as a tandem structure or a stacked structure in this specification. By adopting a tandem structure, a light-emitting element capable of emitting high brightness can be realized.

[0321] In addition, when the light emitting element 61 has Figure 23D In the case of the tandem structure shown, the EL layer 172a and the EL layer 172b can emit the same color. For example, the EL layer 172a and the EL layer 172b can both emit green.

[0322] In addition, by using a light-emitting element 61 that emits red light (R), a light-emitting element 61 that emits green light (G), and a light-emitting element 61 that emits blue light (B) as sub-pixels and constituting a pixel with these three sub-pixels, full-color display can be achieved. When a pixel includes three sub-pixels of R, G, and B, each light-emitting element 61 can also have a series structure. Specifically, the EL layer 172a and the EL layer 172b of the R sub-pixel both contain a material capable of emitting red light, the EL layer 172a and the EL layer 172b of the G sub-pixel both contain a material capable of emitting green light, and the EL layer 172a and the EL layer 172b of the B sub-pixel both contain a material capable of emitting blue light. In other words, the materials of the light-emitting layer 4411 and the light-emitting layer 4412 can also be the same. By making the EL layer 172a and the EL layer 172b have the same luminous color, the current density per unit luminous brightness can be reduced. Therefore, the reliability of the light-emitting element 61 can be improved.

[0323] The light emitting element can emit red, green, blue, cyan, magenta, yellow, or white light, depending on the material constituting the EL layer 172. In addition, by providing the light emitting element with a microcavity structure, color purity can be further improved.

[0324] The light-emitting layer may also include two or more light-emitting substances each emitting R (red), G (green), B (blue), Y (yellow), O (orange), etc. The white light-emitting element preferably has a structure in which the light-emitting layer includes two or more light-emitting substances. In order to obtain white light, two or more light-emitting substances whose light-emitting substances are in a complementary color relationship may be selected. For example, by making the light-emitting color of the first light-emitting layer and the light-emitting color of the second light-emitting layer in a complementary color relationship, a light-emitting element that emits white light as a whole can be obtained. In addition, the same is true for a light-emitting element including three or more light-emitting layers.

[0325] The light-emitting layer preferably contains two or more light-emitting substances each emitting light in R (red), G (green), B (blue), Y (yellow), or O (orange). Alternatively, it preferably contains two or more light-emitting substances each emitting light containing spectral components of two or more of R, G, and B. Furthermore, substances emitting near-infrared light may also be used as the light-emitting substance.

[0326] Examples of luminescent substances include substances that emit fluorescence (fluorescent materials), substances that emit phosphorescence (phosphorescent materials), and substances that exhibit thermally activated delayed fluorescence (TADF materials). In addition to organic compounds, inorganic compounds (such as quantum dot materials) can also be used as luminescent substances included in EL elements.

[0327] <Method for Forming Light-Emitting Element>

[0328] An example of a method for forming the light emitting element 61 will be described below.

[0329] Figure 24A : is a schematic top view of a portion of a display unit including a plurality of light emitting elements 61. The display unit includes a plurality of light emitting elements 61R that emit red light, a plurality of light emitting elements 61G that emit green light, and a plurality of light emitting elements 61B that emit blue light. Figure 24A In order to distinguish the light emitting elements, the symbols "R", "G", and "B" are attached to the light emitting areas of the light emitting elements. Figure 24A Although a structure having three luminous colors of red (R), green (G), and blue (B) is shown as an example, the present invention is not limited thereto and a structure having four or more colors may be used.

[0330] The light emitting elements 61R, the light emitting elements 61G, and the light emitting elements 61B are all arranged in a matrix. Figure 24A Although a so-called stripe arrangement is shown, that is, an arrangement in which light-emitting elements of the same color are arranged in one direction, the arrangement method of the light-emitting elements is not limited to this.

[0331] As the light-emitting elements 61R, 61G, and 61B, organic EL devices such as OLEDs (Organic Light Emitting Diodes) or QOLEDs (Quantum-dot Organic Light Emitting Diodes) are preferably used. Examples of the luminescent material contained in the EL element include substances that emit fluorescence (fluorescent materials) and substances that exhibit thermally activated delayed fluorescence (TADF materials). In addition to organic compounds, inorganic compounds (such as quantum dot materials) can also be used as the luminescent material contained in the EL element.

[0332] Figure 24B To correspond to Figure 24A Schematic cross-sectional view of the dot-dash line A1-A2 in FIG. Figure 24B Cross-sections of light-emitting element 61R, light-emitting element 61G, and light-emitting element 61B are shown. Light-emitting element 61R, light-emitting element 61G, and light-emitting element 61B are all provided on insulator 363 and include conductor 171 serving as a pixel electrode and conductor 173 serving as a common electrode. Insulator 363 can be formed using either an inorganic insulating film or an organic insulating film, or both. Insulator 363 is preferably formed using an inorganic insulating film. Examples of the inorganic insulating film include oxide insulating films and nitride insulating films such as silicon oxide film, silicon oxynitride film, silicon nitride oxide film, silicon nitride film, aluminum oxide film, aluminum oxynitride film, and hafnium oxide film.

[0333] Light-emitting element 61R includes an EL layer 172R between conductor 171, which serves as a pixel electrode, and conductor 173, which serves as a common electrode. EL layer 172R contains a light-emitting organic compound that emits light with a peak at least in the red wavelength region. EL layer 172G in light-emitting element 61G contains a light-emitting organic compound that emits light with a peak at least in the green wavelength region. EL layer 172B in light-emitting element 61B contains a light-emitting organic compound that emits light with a peak at least in the blue wavelength region.

[0334] Each of the EL layer 172R, the EL layer 172G, and the EL layer 172B may include one or more of an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer in addition to the layer containing the light-emitting compound (the light-emitting layer).

[0335] Each light-emitting element is provided with a conductor 171 serving as a pixel electrode. Furthermore, a conductor 173 serving as a common electrode is a continuous layer shared by all light-emitting elements. A conductive film transmissive to visible light is used for either the conductor 171 serving as the pixel electrode or the conductor 173 serving as the common electrode, while a reflective conductive film is used for the other. By making the conductor 171 serving as the pixel electrode transmissive and the conductor 173 serving as the common electrode reflective, a bottom-emission type (bottom-emission structure) display device can be manufactured. Conversely, by making the conductor 171 serving as the pixel electrode reflective and the conductor 173 serving as the common electrode transmissive, a top-emission type (top-emission structure) display device can be manufactured. Note that by making both the conductor 171 serving as the pixel electrode and the conductor 173 serving as the common electrode transmissive, a double-emission type (double-emission structure) display device can also be manufactured.

[0336] For example, when light emitting element 61R has a top emission structure, light 175R from light emitting element 61R is emitted toward conductor 173. When light emitting element 61R has a top emission structure, light 175G from light emitting element 61G is emitted toward conductor 173. When light emitting element 61B has a top emission structure, light 175B from light emitting element 61B is emitted toward conductor 173.

[0337] The insulator 272 is provided so as to cover the end of the conductor 171 serving as the pixel electrode. The end of the insulator 272 is preferably tapered. The insulator 272 can be made of the same material as that used for the insulator 363.

[0338] The insulator 272 is provided to prevent unintentional electrical short circuits between adjacent light-emitting elements 61 and unintentional emission of light from the light-emitting elements 61. The insulator 272 also has a function of preventing the metal mask from coming into contact with the conductor 171 when the EL layer 172 is formed using the metal mask.

[0339] Each of the EL layer 172R, the EL layer 172G, and the EL layer 172B includes a region in contact with the top surface of the conductor 171 serving as a pixel electrode and a region in contact with the surface of the insulator 272. Furthermore, end portions of the EL layer 172R, the EL layer 172G, and the EL layer 172B are located on the insulator 272.

[0340] like Figure 24BAs shown, a gap is provided between the two EL layers between light-emitting elements of different colors. Thus, EL layer 172R, EL layer 172G, and EL layer 172B are preferably provided so as not to contact each other. This prevents current from flowing through adjacent EL layers and causing unintended light emission (also known as crosstalk). Consequently, a display device with improved contrast and high display quality can be realized.

[0341] The EL layer 172R, the EL layer 172G, and the EL layer 172B can be formed separately by vacuum deposition or the like using a shadow mask such as a metal mask. Alternatively, the EL layers can be formed separately by photolithography. Photolithography enables the realization of a high-definition display device, which is difficult to achieve using a metal mask.

[0342] Note that in this specification and other documents, devices manufactured using a metal mask or FMM (Fine Metal Mask) are sometimes referred to as MM (Metal Mask) devices. Furthermore, in this specification and other documents, devices manufactured without using a metal mask or FMM are sometimes referred to as MML (Metal Mask Less) devices. MML display devices are manufactured without using a metal mask, and therefore offer greater design freedom in terms of pixel configuration and shape than MM display devices.

[0343] Furthermore, a protective layer 271 is provided on the conductor 173 serving as a common electrode to cover the light emitting elements 61R, 61G, and 61B. The protective layer 271 has a function of preventing impurities such as water from diffusing from above to the light emitting elements.

[0344] The protective layer 271 can, for example, have a single-layer structure or a stacked-layer structure including at least an inorganic insulating film. As the inorganic insulating film, for example, oxide films or nitride films such as silicon oxide film, silicon oxynitride film, silicon nitride oxide film, silicon nitride film, aluminum oxide film, aluminum oxynitride film, and hafnium oxide film can be cited. In addition, semiconductor materials such as indium gallium oxide and indium gallium zinc oxide (IGZO) can also be used as the protective layer 271. In addition, the protective layer 271 can be formed using ALD (Atomic Layer Deposition) method, CVD (Chemical Vapor Deposition) method and sputtering method. Note that although the protective layer 271 is shown to have a structure including an inorganic insulating film, it is not limited to this. For example, the protective layer 271 can also have a stacked-layer structure of an inorganic insulating film and an organic insulating film.

[0345] In this specification, nitrogen oxides refer to compounds in which the nitrogen content is greater than the oxygen content. Furthermore, oxynitrides refer to compounds in which the oxygen content is greater than the nitrogen content. The content of each element can be measured using, for example, Rutherford Backscattering Spectrometry (RBS).

[0346] When indium gallium zinc oxide is used for the protective layer 271, wet etching or dry etching can be used. For example, when IGZO is used for the protective layer 271, oxalic acid, phosphoric acid, or a mixed solution (e.g., a mixed solution of phosphoric acid, acetic acid, nitric acid, and water (also known as a mixed acid aluminum etchant)) can be used. The mixed acid aluminum etchant can be prepared with a volume ratio of phosphoric acid: acetic acid: nitric acid: water = 53.3:6.7:3.3:36.7 or a similar ratio.

[0347] In addition, you can also Figure 24B The structure shown is called an SBS structure described later.

[0348] Figure 24C An example different from the above structure is shown. Specifically, Figure 24C The light-emitting element 61W that emits white light is included. The light-emitting element 61W includes an EL layer 172W that emits white light between a conductor 171 that functions as a pixel electrode and a conductor 173 that functions as a common electrode.

[0349] The EL layer 172W may be a stacked structure of two or more light-emitting layers selected so that their respective luminescent colors are complementary to each other. Alternatively, a stacked EL layer may be used in which a charge generation layer is sandwiched between light-emitting layers.

[0350] Figure 24C Three light-emitting elements 61W are shown side by side. A colored layer 264R is provided on the top of the left light-emitting element 61W. Colored layer 264R functions as a bandpass filter that transmits red light. Similarly, a colored layer 264G that transmits green light is provided on the top of the center light-emitting element 61W, and a colored layer 264B that transmits blue light is provided on the top of the right light-emitting element 61W. This allows the display device to display color images.

[0351] Here, the EL layer 172W and the conductor 173, serving as a common electrode, are separated between two adjacent light-emitting elements 61W. This prevents current from flowing through the EL layer 172W between the two adjacent light-emitting elements 61W, potentially causing unintended light emission. In particular, when a stacked EL layer with a charge generation layer between two light-emitting layers is used as the EL layer 172W, the effect of crosstalk becomes more pronounced, resulting in reduced contrast as the resolution increases, that is, as the distance between adjacent pixels decreases. Therefore, adopting this structure enables a display device that achieves both high resolution and high contrast.

[0352] The EL layer 172 and the conductor 173 serving as a common electrode are preferably separated by photolithography. This can reduce the gap between light-emitting elements, and can achieve a display device with a higher aperture ratio than when a shadow mask such as a metal mask is used.

[0353] Note that in a light-emitting element having a bottom emission structure, a colored layer may be provided between the conductor 171 serving as a pixel electrode and the insulator 363 .

[0354] Figure 24D An example different from the above structure is shown. Specifically, Figure 24D In the embodiment, no insulator 272 is provided between light-emitting element 61R, light-emitting element 61G, and light-emitting element 61B. This structure enables a display device with a high aperture ratio. Furthermore, the absence of insulator 272 reduces the unevenness of light-emitting element 61, thereby improving the viewing angle of the display device. Specifically, the viewing angle can be set to 150 degrees or more and less than 180 degrees, preferably 160 degrees or more and less than 180 degrees.

[0355] Furthermore, protective layer 271 covers the side surfaces of EL layer 172R, EL layer 172G, and EL layer 172B. This structure suppresses the entry of impurities (typically, water, etc.) from the side surfaces of EL layer 172R, EL layer 172G, and EL layer 172B. Furthermore, leakage current between adjacent light-emitting elements 61 is reduced, thereby improving color saturation and contrast while reducing power consumption.

[0356] In addition, Figure 24D In the structure shown, the shapes of conductor 171, EL layer 172R, and conductor 173 are substantially identical when viewed from above. This structure can be formed simultaneously after conductor 171, EL layer 172R, and conductor 173 are formed using a resist mask or the like. This process is also called self-aligned patterning because conductor 173 is used as a mask to pattern EL layer 172R and conductor 173. Note that while the EL layer 172R is described here, the EL layer 172G and EL layer 172B can also employ the same structure.

[0357] In addition, Figure 24D In the embodiment, a protective layer 273 is further provided on the protective layer 271. For example, by forming the protective layer 271 using an apparatus capable of depositing a film with high coverage (typically, an ALD apparatus or the like) and forming the protective layer 273 using an apparatus capable of depositing a film with lower coverage than the protective layer 271 (typically, a sputtering apparatus), a region 275 can be provided between the protective layer 271 and the protective layer 273. In other words, the region 275 is located between the EL layer 172R and the EL layer 172G, and between the EL layer 172G and the EL layer 172B.

[0358] Region 275, for example, contains one or more selected from air, nitrogen, oxygen, carbon dioxide, and Group 18 elements (typically helium, neon, argon, krypton, xenon, etc.). In addition, region 275 sometimes contains, for example, a gas used when depositing protective layer 273. For example, when protective layer 273 is deposited by sputtering, region 275 sometimes contains one or more of the above-mentioned Group 18 elements. Note that when region 275 contains a gas, gas chromatography or the like can be used to identify the gas. Alternatively, when protective layer 273 is deposited by sputtering, the film of protective layer 273 sometimes contains the gas used when sputtering is performed. In this case, when protective layer 273 is analyzed by energy dispersive X-ray analysis (EDX analysis (Energy Dispersive X-ray spectroscopy)) or the like, elements such as argon are sometimes detected.

[0359] Furthermore, when the refractive index of region 275 is lower than that of protective layer 271, light emitted by EL layer 172R, EL layer 172G, or EL layer 172B is reflected at the interface between protective layer 271 and region 275. This can sometimes prevent light emitted by EL layer 172R, EL layer 172G, or EL layer 172B from entering adjacent pixels. This can prevent the mixing of different emission colors from adjacent pixels, thereby improving the display quality of the display device.

[0360] In addition, in adopting Figure 24DWhen the structure shown is used, the region between light-emitting element 61R and light-emitting element 61G or the region between light-emitting element 61G and light-emitting element 61B (hereinafter simply referred to as the distance between light-emitting elements) can be narrowed. Specifically, the distance between light-emitting elements can be set to 1 μm or less, preferably 500 nm or less, more preferably 200 nm or less, 100 nm or less, 90 nm or less, 70 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm or less. In other words, the region having the distance between the side surface of EL layer 172R and the side surface of EL layer 172G or the distance between the side surface of EL layer 172G and the side surface of EL layer 172B is 1 μm or less, preferably 0.5 μm (500 nm) or less, and more preferably 100 nm or less.

[0361] Furthermore, for example, when the region 275 contains a gas, it is possible to suppress mixing and crosstalk of light from the respective light-emitting elements while performing element isolation between the light-emitting elements.

[0362] Furthermore, region 275 may be a space or filled with a filler. Examples of fillers include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, and EVA (ethylene vinyl acetate) resins. Furthermore, a photoresist may be used as a filler. The photoresist used as a filler may be either a positive photoresist or a negative photoresist.

[0363] Figure 25A An example different from the above structure is shown. Specifically, Figure 25A The structure shown is Figure 24D The difference in the structure shown is the structure of the insulator 363. When the light-emitting element 61R, the light-emitting element 61G and the light-emitting element 61B are processed, a portion of the top surface of the insulator 363 is cut off and has a recess. A protective layer 271 is formed in the recess. In other words, the bottom surface of the protective layer 271 is located below the bottom surface of the conductor 171 when viewed from a cross section. By having this area, impurities (typically water, etc.) that can enter the light-emitting element 61R, the light-emitting element 61G and the light-emitting element 61B from below can be appropriately suppressed. In addition, the above-mentioned recess can be formed when impurities (also called residues) that can adhere to the side surfaces of each light-emitting element during the processing of the light-emitting element 61R, the light-emitting element 61G and the light-emitting element 61B are removed by wet etching or the like. By covering the side surfaces of each light-emitting element with the protective layer 271 after removing the above-mentioned residues, a display device with high reliability can be achieved.

[0364] also, Figure 25B An example different from the above structure is shown. Specifically, Figure 25B The structure shown is Figure 25A In addition to the structure shown, the structure also includes an insulator 276 and a microlens array 277. Insulator 276 serves as an adhesive layer. Furthermore, when the refractive index of insulator 276 is lower than that of microlens array 277, microlens array 277 can collect light emitted by light-emitting elements 61R, 61G, and 61B. This improves the light extraction efficiency of the display device. This is particularly advantageous because a bright image can be seen when a user views the display surface of the display device from the front. Various curable adhesives, such as UV-curable adhesives, reaction-curable adhesives, thermosetting adhesives, and anaerobic adhesives, can be used as insulator 276. Examples of these adhesives include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, and EVA (ethylene vinyl acetate) resins. In particular, materials with low moisture permeability, such as epoxy resins, are preferred. Alternatively, two-liquid mixed resins can be used. Alternatively, an adhesive sheet or the like may be used.

[0365] also, Figure 25C An example different from the above structure is shown. Specifically, Figure 25C The structure shown includes three light emitting elements 61W instead of Figure 25A The structure shown includes light-emitting elements 61R, 61G, and 61B. Furthermore, an insulator 276 is provided above the three light-emitting elements 61W, and colored layers 264R, 264G, and 264B are provided above the insulator 276. Specifically, a colored layer 264R that transmits red light is provided at a position overlapping the left light-emitting element 61W, a colored layer 264G that transmits green light is provided at a position overlapping the center light-emitting element 61W, and a colored layer 264B that transmits blue light is provided at a position overlapping the right light-emitting element 61W. This enables the semiconductor device to display color images. Figure 25C The structure shown is also Figure 24C A modified example of the structure shown.

[0366] also, Figure 25D An example different from the above structure is shown. Specifically, Figure 25D In the structure shown, the protective layer 271 is provided adjacent to the side surfaces of the conductor 171 and the EL layer 172. In addition, the conductor 173 is provided as a continuous layer shared by each light-emitting element. Figure 25D In the illustrated configuration, region 275 is preferably filled with a filler.

[0367] By configuring light-emitting element 61 with an optical microcavity resonator (microcavity) structure, the color purity of the emitted light can be improved. When configuring light-emitting element 61 with a microcavity structure, the product of the distance d between conductors 171 and 173 and the refractive index n of EL layer 172 (optical distance) can be set to m times (where m is an integer greater than or equal to 1) half the wavelength λ. Distance d can be calculated using Equation 1.

[0368] d=m×λ / (2×n)···Formula 1.

[0369] According to Formula 1, in the microcavity structure light-emitting element 61, the distance d is determined based on the wavelength (luminescence color) of the emitted light. The distance d corresponds to the thickness of the EL layer 172. Therefore, the EL layer 172G may be thicker than the EL layer 172B, and the EL layer 172R may be thicker than the EL layer 172G.

[0370] Note that strictly speaking, distance d is the distance between the reflective region of conductor 171, which functions as a reflective electrode, and the reflective region of conductor 173, which functions as an electrode having both transmissive and reflective properties for emitted light (a semi-transmissive / semi-reflective electrode). For example, if conductor 171 is a stack of silver and a transparent conductive film of indium tin oxide (ITO), and the ITO is located on the EL layer 172 side, the distance d can be set to suit the color of emitted light by adjusting the thickness of the ITO. In other words, even if the thicknesses of EL layers 172R, 172G, and 172B are all the same, the distance d can be adjusted to suit the color of emitted light by varying the thickness of the ITO.

[0371] However, it is sometimes difficult to strictly determine the positions of the reflective regions in the conductors 171 and 173. In this case, it is assumed that the microcavity effect can be sufficiently obtained by assuming any positions in the conductors 171 and 173 as the reflective regions.

[0372] The light-emitting element 61 is composed of a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer. Detailed structural examples of the light-emitting element 61 will be described in other embodiments. To improve the light extraction efficiency of the microcavity structure, the optical distance from the conductor 171, which serves as a reflective electrode, to the light-emitting layer is preferably set to an odd multiple of λ / 4. To achieve this optical distance, the thickness of each layer constituting the light-emitting element 61 is preferably adjusted.

[0373] Furthermore, when light is emitted from the conductor 173 side, the reflectivity of the conductor 173 is preferably higher than its transmittance. The light transmittance of the conductor 173 is preferably 2% or higher and 50% or lower, more preferably 2% or higher and 30% or lower, and even more preferably 2% or higher and 10% or lower. By reducing the transmittance of the conductor 173 (increasing its reflectivity), the microcavity effect can be enhanced.

[0374] Figure 26A An example different from the above structure is shown. Specifically, Figure 26A In the illustrated structure, the EL layer 172 in each of light-emitting element 61R, light-emitting element 61G, and light-emitting element 61B extends beyond the end of the conductor 171. For example, in light-emitting element 61R, the EL layer 172R extends beyond the end of the conductor 171. Furthermore, in light-emitting element 61G, the EL layer 172G extends beyond the end of the conductor 171. Furthermore, in light-emitting element 61B, the EL layer 172B extends beyond the end of the conductor 171.

[0375] In each of the light-emitting elements 61R, 61G, and 61B, the EL layer 172 and the protective layer 271 have overlapping regions with the insulator 270 interposed therebetween. Furthermore, the insulator 278 is provided on the protective layer 271 in regions between adjacent light-emitting elements 61 .

[0376] Examples of insulator 278 include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. Alternatively, photoresist may be used as insulator 278. The photoresist used for insulator 278 may be either positive or negative.

[0377] Furthermore, a common layer 174 is provided over the light-emitting elements 61R, 61G, and 61B, and the insulator 278. The conductor 173 is provided over the common layer 174. Common layer 174 includes a region in contact with the EL layer 172R, a region in contact with the EL layer 172G, and a region in contact with the EL layer 172B. The light-emitting elements 61R, 61G, and 61B share the common layer 174.

[0378] The common layer 174 may be one or more of a hole injection layer, a hole transport layer, a hole blocking layer, an electron blocking layer, an electron transport layer, and an electron injection layer. For example, the common layer 174 may be a carrier injection layer (a hole injection layer or an electron injection layer). In addition, the common layer 174 may be said to be a part of the EL layer 172. In addition, the common layer 174 may be provided as needed. When the common layer 174 is provided, a layer having the same function as the common layer 174 may not be provided as a layer included in the EL layer 172.

[0379] Furthermore, a protective layer 273 is provided on the conductor 173 , and an insulator 276 is provided on the protective layer 273 .

[0380] also, Figure 26B An example different from the above structure is shown. Specifically, Figure 26B The structure shown includes three light emitting elements 61W instead of Figure 26A The structure shown includes light-emitting elements 61R, 61G, and 61B. Furthermore, an insulator 276 is provided above the three light-emitting elements 61W, and colored layers 264R, 264G, and 264B are provided above the insulator 276. Specifically, a colored layer 264R that transmits red light is provided at a position overlapping the left light-emitting element 61W, a colored layer 264G that transmits green light is provided at a position overlapping the center light-emitting element 61W, and a colored layer 264B that transmits blue light is provided at a position overlapping the right light-emitting element 61W. This enables the semiconductor device to display color images. Figure 26B The structure shown is also Figure 25C A modified example of the structure shown.

[0381] At least a part of the structural examples described in this embodiment mode and the drawings corresponding to the structural examples can be combined with other structural examples, drawings, etc. as appropriate.

[0382] (Implementation 5)

[0383] In this embodiment, a display device according to one embodiment of the present invention is described. The display device described below can be used as a display device included in the electronic device described in the above embodiment.

[0384] [Configuration Example 1 of Display Device]

[0385] Figure 27 FIG2 shows a cross-sectional view of a display device 600A. The display device 600A is an example of a display device using an MML (Metal Mask Less) structure. In other words, the display device 600A includes a light-emitting device that is manufactured without using a high-definition metal mask.

[0386] The island-shaped light-emitting layers in the light-emitting devices included in a display device using an MML structure are formed by depositing the light-emitting layer over the entire surface and then processing it using photolithography. This makes it possible to realize high-definition displays or displays with high aperture ratios, which have been difficult to achieve until now. Furthermore, since the light-emitting layers for each color can be formed separately, a display device with extremely vivid colors, high contrast, and high display quality can be achieved. For example, if a display device is composed of three light-emitting devices: one emitting blue light, one emitting green light, and one emitting red light, three island-shaped light-emitting layers can be formed by repeating the deposition of the light-emitting layer and the photolithography process three times.

[0387] Because devices with an MML structure can be manufactured without the use of a metal mask, the upper limit of resolution due to the alignment accuracy of the metal mask can be exceeded. Furthermore, when manufacturing devices without a metal mask, the equipment associated with metal mask manufacturing and the metal mask cleaning process are no longer necessary. Furthermore, in photolithography processing, the same or identical equipment as that used in transistor manufacturing can be used, eliminating the need for specialized equipment specifically designed for manufacturing devices with an MML structure. Thus, the MML structure can reduce manufacturing costs, making it suitable for mass production of devices.

[0388] In a display device using an MML structure, for example, there is no need to use a special pixel arrangement such as a Pentile arrangement to simulate the improvement of clarity, so a display device can be realized in which the R, G, and B sub-pixels are arranged in one direction respectively in a so-called stripe arrangement and high definition (for example, above 500ppi, above 1000ppi, above 2000ppi, above 3000ppi or above 5000ppi).

[0389] In addition, by providing a sacrificial layer on the light-emitting layer, damage to the light-emitting layer during the manufacturing process of the display device can be reduced, thereby improving the reliability of the light-emitting device. Note that the sacrificial layer can remain in the completed display device or be removed during the manufacturing process. For example, Figure 27 and Figure 28 The illustrated sacrificial layer 618a is a portion of a sacrificial layer disposed on the light emitting layer.

[0390] Furthermore, by adopting a deposition process using a range mask and a processing process using a resist mask, a light-emitting device can be manufactured with a relatively simple process.

[0391] Figure 27 The display device 600A shown is a schematic cross-sectional view of a display device (semiconductor device) according to one embodiment of the present invention. The display device 600A has a structure in which a pixel circuit, a driver circuit, etc. are provided on a substrate 410. Note that Figure 27In the display device 600A, a wiring layer 670 is shown in addition to the element layer 620, the element layer 630, and the element layer 660. The wiring layer 670 is a layer provided with wiring.

[0392] The element layer 630 is preferably provided with a pixel circuit of the display device. The element layer 620 is preferably provided with a driving circuit of the display device (one or both of a gate driver and a source driver). In addition, the element layer 620 may also be provided with one or more of various circuits such as an arithmetic circuit and a storage circuit.

[0393] As an example, the element layer 620 includes a substrate 410 on which a transistor 400d is formed. In addition, a wiring layer 670 is provided above the transistor 400d, and the wiring layer 670 is provided with a conductive layer or transistor provided in the element layer 630 ( Figure 27 Furthermore, the wiring layer 670 is provided with a component layer 630 and a component layer 660. The component layer 630 includes, for example, a transistor MTCK. The component layer 660 includes a light emitting device 650 ( Figure 27 The light-emitting device 650R, the light-emitting device 650G and the light-emitting device 650B) and the like.

[0394] The transistor 400d is an example of a transistor included in the element layer 620. The transistor MTCK is an example of a transistor included in the element layer 630. The light-emitting devices (the light-emitting device 650R, the light-emitting device 650G, and the light-emitting device 650B) are examples of light-emitting devices included in the element layer 660.

[0395] As the substrate 410, for example, a semiconductor substrate (for example, a single crystal substrate made of silicon or germanium) can be used. Furthermore, as the substrate 410, in addition to semiconductor substrates, for example, an SOI (Silicon On Insulator) substrate, a glass substrate, a quartz substrate, a plastic substrate, a sapphire glass substrate, a metal substrate, a stainless steel substrate, a substrate including stainless steel foil, a tungsten substrate, a substrate including tungsten foil, a flexible substrate, a laminated film, or paper or a base film including a fibrous material can be used. In this embodiment, the case where the substrate 410 is a semiconductor substrate made of silicon is described. Therefore, the transistors in the element layer 620 can be Si transistors.

[0396] The transistor 400d includes an element isolation layer 412, a conductor 416, an insulator 415, an insulator 417, a semiconductor region 413 formed of a portion of the substrate 410, and a low resistance region 414a and a low resistance region 414b serving as a source region or a drain region. Therefore, the transistor 400d is a Si transistor. Note that although Figure 27 4 shows a structure in which one of the source and drain of the transistor 400d is electrically connected to the conductor 514 provided in the element layer 630 through the conductor 428, the conductor 430, and the conductor 456. However, the electrical connection structure of the display device of one embodiment of the present invention is not limited to this.

[0397] For example, by adopting a structure in which the top surface of the semiconductor region 413 and the side surfaces in the channel width direction are covered with the conductor 416 via an insulator 415 serving as a gate insulator, the transistor 400d can be made into a Fin type. By making the transistor 400d have a Fin type structure, the effective channel width can be increased, thereby improving the on-state characteristics of the transistor 400d. In addition, since the influence of the electric field of the gate electrode can be increased, the off-state characteristics of the transistor 400d can be improved. In addition, the transistor 400d can also be a planar transistor instead of a Fin type transistor.

[0398] The transistor 400d may be a p-channel transistor or an n-channel transistor. Alternatively, a plurality of transistors 400d may be provided, and both p-channel transistors and n-channel transistors may be used.

[0399] The channel formation region of the semiconductor region 413, the region adjacent thereto, and the low-resistance regions 414a and 414b serving as source or drain regions preferably comprise silicon, specifically, preferably single-crystal silicon. Alternatively, each of the aforementioned regions may be formed using, for example, germanium, silicon germanium, gallium arsenide, aluminum gallium arsenide, or gallium nitride. Silicon in which effective mass is controlled by applying stress to the crystal lattice to change the interplanar spacing may be used. Alternatively, the transistor 400d may be a HEMT (High Electron Mobility Transistor) using, for example, gallium arsenide or aluminum gallium arsenide.

[0400] The conductor 416 serving as the gate electrode can be made of a semiconductor material such as silicon containing an element imparting n-type conductivity, such as arsenic or phosphorus, or an element imparting p-type conductivity, such as boron or aluminum. Alternatively, the conductor 416 can be made of a conductive material such as a metal material, an alloy material, or a metal oxide material.

[0401] Furthermore, since the material of the conductor determines the work function, the threshold voltage of the transistor can be adjusted by selecting the conductor material. Specifically, titanium nitride or tantalum nitride, or both, is preferably used as the conductor. To achieve both conductivity and embeddability, a laminate of one or both tungsten and aluminum is preferably used as the conductor, with tungsten being particularly preferred for its heat resistance.

[0402] An element isolation layer 412 is provided to isolate a plurality of transistors formed on the substrate 410. The element isolation layer can be formed using, for example, a LOCOS (Local Oxidation of Silicon) method, an STI (Shallow Trench Isolation) method, or a mesa isolation method.

[0403] exist Figure 27 In the transistor 400 d shown, an insulator 420 and an insulator 422 are stacked in this order from the substrate 410 side.

[0404] As the insulator 420 and the insulator 422 , for example, one or more selected from silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, and aluminum nitride may be used.

[0405] The insulator 422 can also be used as a planarization film for planarizing steps generated by the transistor 400d and the like covered by the insulator 420 and the insulator 422. For example, to improve the flatness of the top surface of the insulator 422, planarization can be achieved by a planarization process using a chemical mechanical polishing (CMP) method.

[0406] A conductor 428 connected to the transistor MTCK and the like provided above the insulator 422 is embedded in the insulator 420 and the insulator 422. The conductor 428 functions as a plug or a wiring.

[0407] In the display device 600A, a wiring layer 670 is provided over the transistor 400d. The wiring layer 670 includes, for example, the insulator 424, the insulator 426, the conductor 430, the insulator 450, the insulator 452, the insulator 454, and the conductor 456.

[0408] Insulator 424 and insulator 426 are sequentially stacked on insulator 422 and conductor 428. Insulator 424 and insulator 426 have openings in the regions overlapping conductor 428. Conductor 430 is embedded in these openings.

[0409] Insulator 450, insulator 452, and insulator 454 are stacked in this order on insulator 426 and conductor 430. Insulator 450, insulator 452, and insulator 454 have openings in the regions overlapping conductor 430. Conductor 456 is embedded in these openings.

[0410] The conductor 430 and the conductor 456 function as plugs or wiring connected to the transistor 400 d .

[0411] In addition, similar to insulator 592 described later, insulators 424 and 450 are preferably made of an insulator that has a barrier property to at least one selected from hydrogen, oxygen, and water. Similarly to insulator 594 described later, insulators 426, 452, and 454 are preferably made of an insulator with a low relative dielectric constant to reduce parasitic capacitance generated between wirings. Furthermore, insulators 426, 452, and 454 function as interlayer insulating films and planarizing films. Furthermore, insulators 426, 452, and 454 are preferably made of an insulator that has a barrier property to at least one selected from hydrogen, oxygen, and water.

[0412] Tantalum nitride, for example, is preferably used as a hydrogen-barrier conductor. Furthermore, by stacking tantalum nitride and highly conductive tungsten, the electrical conductivity of the wiring can be maintained while also suppressing hydrogen diffusion from transistor 400d. In this case, the hydrogen-barrier tantalum nitride layer is preferably in contact with insulator 450, which has hydrogen-barrier properties.

[0413] An insulator 513 is formed over the insulator 454 and the conductor 456. Furthermore, an insulator IS1 is provided over the insulator 513. Furthermore, a conductor serving as a plug or wiring is embedded in the insulator IS1 and the insulator 513. This allows the transistor 400d to be electrically connected to the conductor 514 provided in the element layer 630. Alternatively, one of the source and drain of the transistor MTCK can be electrically connected to one of the source and drain of the transistor 400d.

[0414] A transistor MTCK is provided on an insulator IS1. Furthermore, an insulator IS3, an insulator 574, and an insulator 581 are stacked in this order on the transistor MTCK. Furthermore, a conductor MPG serving as a plug or wiring is embedded in the insulator IS3, the insulator 574, and the insulator 581. Note that the transistor MTCK and its surrounding insulators, conductors, and semiconductors will be described in this embodiment.

[0415] The insulator 574 preferably has a function of inhibiting the diffusion of impurities such as water and hydrogen (e.g., one or both of hydrogen atoms and hydrogen molecules). In other words, the insulator 574 is preferably used as a blocking insulating film to inhibit the infiltration of these impurities into the transistor MTCK. Furthermore, the insulator 574 preferably has a function of inhibiting the diffusion of oxygen (e.g., one or both of oxygen atoms and oxygen molecules). For example, the oxygen permeability of the insulator 574 is preferably lower than that of the insulator IS2 and the insulator IS3.

[0416] Therefore, the insulator 574 is preferably used as a barrier insulating film that suppresses the diffusion of impurities such as water and hydrogen. Therefore, an insulating material that suppresses the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (e.g., NO, NO, and NO), and copper atoms (preferably preventing these impurities from penetrating) is preferably used as the insulator 574. Alternatively, an insulating material that suppresses the diffusion of oxygen (e.g., one or both of oxygen atoms and oxygen molecules) is preferably used (preferably preventing these oxygen atoms from penetrating).

[0417] As an insulator having the function of inhibiting the permeation of impurities such as water and hydrogen, and oxygen, for example, a single layer or a stack of insulators containing one or more selected from boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, and tantalum can be used. Specifically, as an insulator having the function of inhibiting the permeation of impurities such as water and hydrogen, and oxygen, for example, metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide can be mentioned. In addition, as an insulator having the function of inhibiting the permeation of impurities such as water and hydrogen, and oxygen, for example, an oxide containing aluminum and hafnium (hafnium aluminate) can be mentioned. In addition, as an insulator having the function of inhibiting the permeation of impurities such as water and hydrogen, and oxygen, for example, metal nitrides such as aluminum nitride, aluminum titanium nitride, titanium nitride, silicon oxynitride, and silicon nitride can be mentioned.

[0418] In particular, aluminum oxide or silicon nitride is preferably used for the insulator 574. This can suppress diffusion of impurities such as water and hydrogen from above the insulator 574 into the transistor MTCK. Alternatively, diffusion of oxygen contained in the insulator IS3 or the like into the insulator 574 can be suppressed.

[0419] Insulator 581 is a film used as an interlayer film, and its dielectric constant is preferably lower than that of insulator 574. By using a material with a low dielectric constant for the interlayer film, parasitic capacitance generated between wirings can be reduced. For example, the relative dielectric constant of insulator 581 is preferably less than 4, and more preferably less than 3. For example, the relative dielectric constant of insulator 581 is preferably 0.7 times or less, and more preferably 0.6 times or less, the relative dielectric constant of insulator 574. When insulator 581 is an interlayer film using a material with a low dielectric constant, parasitic capacitance generated between wirings can be reduced.

[0420] In addition, it is preferable to reduce the concentration of impurities such as water and hydrogen in the insulator 581. In this case, the insulator 581 can use silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon nitride, for example. In addition, the insulator 581 can use silicon oxide added with fluorine, silicon oxide added with carbon, silicon oxide added with carbon and nitrogen, or silicon oxide with pores, for example. In particular, silicon oxide and silicon oxynitride are thermally stable and therefore preferred. In particular, materials such as silicon oxide, silicon oxynitride, and silicon oxide with pores are preferred because they easily form regions containing oxygen that is released by heating. In addition, a resin can be used for the insulator 581. In addition, as materials that can be used for the insulator 581, the above materials can be appropriately combined.

[0421] An insulator 592 and an insulator 594 are sequentially stacked on the insulator 574 and the insulator 581 .

[0422] As the insulator 592, it is preferred to use an insulating film (also referred to as a blocking insulating film) having barrier properties that can prevent impurities such as water and hydrogen from diffusing from the substrate 410 and the transistor MTCK to the area above the insulator 592 (for example, the area where the light-emitting device 650R, the light-emitting device 650G, and the light-emitting device 650B are provided). Therefore, the insulator 592 preferably uses an insulating material that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, and water molecules (it is not easy for the above impurities to pass through). In addition, depending on the circumstances, it is preferred to use an insulating material that has the function of suppressing the diffusion of impurities such as nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (for example, N2O, NO, and NO2) and copper atoms (it is not easy for the above oxygen to pass through) as the insulator 592. Alternatively, it is preferred to have the function of suppressing the diffusion of oxygen (for example, one or both of oxygen atoms and oxygen molecules).

[0423] As the film having hydrogen barrier properties, for example, silicon nitride formed by a CVD method can be used.

[0424] The amount of hydrogen released can be analyzed using, for example, thermal desorption spectroscopy (TDS). For example, when the amount of hydrogen released is converted to the amount per unit area of ​​the insulator 424 when the film surface temperature is within the range of 50°C to 500°C in TDS, the amount of hydrogen released from the insulator 424 is 10×10 15 atoms / cm 2 Below, preferably 5×10 15 atoms / cm 2 The following is enough.

[0425] The insulator 594 is preferably an interlayer film having a low dielectric constant, similarly to the insulator 581. Therefore, the insulator 594 can use a material that can be used for the insulator 581.

[0426] Note that the dielectric constant of the insulator 594 is preferably lower than that of the insulator 592. For example, the relative dielectric constant of the insulator 594 is preferably lower than 4, more preferably lower than 3. For example, the relative dielectric constant of the insulator 594 is preferably 0.7 times or less, more preferably 0.6 times or less, that of the insulator 592. When the insulator 594 is an interlayer film made of a material with a low dielectric constant, parasitic capacitance generated between wirings can be reduced.

[0427] Furthermore, conductors MPG, which function as plugs or wiring, are embedded in insulators GI1 and IS3, and conductors 596, which function as plugs or wiring, are embedded in insulators 592 and 594. In particular, conductors MPG and 596 are electrically connected to light-emitting devices, etc., disposed above insulator 594. Note that the same symbol may sometimes be used to represent multiple conductors that function as plugs or wiring. Furthermore, in this specification and other documents, a wiring and a plug connected to the wiring may be considered a single component. In other words, a portion of a conductor may function as wiring, and a portion of a conductor may function as a plug.

[0428] As the material for each plug and wiring (for example, conductor MPG, conductor 428, conductor 430, conductor 456, conductor 514, and conductor 596), a single layer or a stack of one or more conductive materials selected from metal materials, alloy materials, metal nitride materials, and metal oxide materials can be used. Preferably, a high melting point material such as tungsten or molybdenum that has both heat resistance and conductivity is used, with tungsten being preferred. In addition, it is preferably formed using a low-resistance conductive material such as aluminum or copper. By using a low-resistance conductive material, the wiring resistance can be reduced.

[0429] An insulator 598 and an insulator 599 are sequentially formed on the insulator 594 and the conductor 596 .

[0430] As with insulator 592, insulator 598 preferably uses an insulator having a barrier property against at least one selected from the group consisting of hydrogen, oxygen, and water. Furthermore, as with insulator 594, insulator 599 preferably uses an insulator having a low relative dielectric constant to reduce parasitic capacitance generated between wirings. Insulator 599 also functions as an interlayer insulating film and a planarizing film.

[0431] A light-emitting device 650 and a connection portion 640 are formed over the insulator 599. Note that a detailed structure of the light-emitting device will be described in detail in Embodiment 5.

[0432] The connection portion 640 is sometimes referred to as a cathode contact portion and is electrically connected to the cathode electrodes of the light emitting device 650R, the light emitting device 650G, and the light emitting device 650B. Figure 27The connecting portion 640 shown is electrically connected to the common electrode 615 described later using a conductor formed in the same process and the same material as the conductors 611a to 611c. Figure 27 Although an example is shown in which the conductor is electrically connected to the common electrode 615 via a common layer 614 described later, the conductor and the common electrode 615 may be in direct contact with each other.

[0433] Note that the connection portion 640 may be provided so as to surround the four sides of the display portion in a plane, or may be provided within the display portion (for example, between adjacent light-emitting devices 650 ) (not shown).

[0434] The light emitting device 650R includes a conductor 611a as a pixel electrode. Similarly, the light emitting device 650G includes a conductor 611b as a pixel electrode, and the light emitting device 650B includes a conductor 611c as a pixel electrode.

[0435] The conductor 611 a , the conductor 611 b , and the conductor 611 c are connected to the conductor 596 embedded in the insulator 594 via the conductors (plugs) embedded in the insulator 599 .

[0436] The light emitting device 650R includes a layer 613a, a common layer 614 on the layer 613a, and a common electrode 615 on the common layer 614. In addition, the light emitting device 650G includes a layer 613b, a common layer 614 on the layer 613b, and a common electrode 615 on the common layer 614. In addition, the light emitting device 650B includes a layer 613c, a common layer 614 on the layer 613c, and a common electrode 615 on the common layer 614.

[0437] The display device 600A adopts an SBS structure. The SBS structure allows for optimization of materials and structures for each light-emitting device, thus increasing the freedom of material and structure selection and making it easier to improve brightness and reliability.

[0438] Furthermore, the display device 600A adopts a top emission type. In a top emission type, transistors and the like can be arranged so as to overlap with the light-emitting region of a light-emitting device, thereby further improving the pixel aperture ratio compared to a bottom emission type.

[0439] Layer 613a is formed to cover the top and side surfaces of conductor 611a. Similarly, layer 613b is formed to cover the top and side surfaces of conductor 611b. Similarly, layer 613c is formed to cover the top and side surfaces of conductor 611c. Therefore, the entire region where conductors 611a, 611b, and 611c are provided can be used as the light-emitting region of light-emitting devices 650R, 650G, and 650B, thereby increasing the pixel aperture ratio.

[0440] In the light-emitting device 650R, the layer 613a and the common layer 614 can be collectively referred to as the EL layer. Similarly, in the light-emitting device 650G, the layer 613b and the common layer 614 can be collectively referred to as the EL layer. Similarly, in the light-emitting device 650B, the layer 613c and the common layer 614 can be collectively referred to as the EL layer.

[0441] There is no particular limitation on the structure of the light-emitting device of this embodiment, and a single structure or a tandem structure may be employed.

[0442] Layers 613a, 613b, and 613c are processed into island shapes using photolithography. Consequently, the angles formed between the top and side surfaces of layers 613a, 613b, and 613c at their respective ends are close to 90 degrees. On the other hand, for example, the thickness of organic films formed using FMM (Fine Metal Mask) tends to decrease toward the ends. For example, their top surfaces slope from 1 μm to 10 μm toward the ends, making it difficult to distinguish between the top and side surfaces.

[0443] Layers 613a, 613b, and 613c clearly distinguish between top and side surfaces. Therefore, in adjacent layers 613a and 613b, one side surface of layer 613a and one side surface of layer 613b face each other. This applies to any combination of layers 613a, 613b, and 613c.

[0444] Layer 613a, layer 613b, and layer 613c include at least one light-emitting layer. For example, preferably, layer 613a, layer 613b, and layer 613c each include a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light. Furthermore, each light-emitting layer may have a color other than those described above, such as cyan, magenta, yellow, or white.

[0445] Layers 613a, 613b, and 613c preferably include a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer) on the light-emitting layer. The surfaces of layers 613a, 613b, and 613c are sometimes exposed during the manufacturing process of the display device. Therefore, by providing a carrier transport layer on the light-emitting layer, the light-emitting layer can be prevented from being exposed to the outermost surface, thereby reducing damage to the light-emitting layer. This can improve the reliability of the light-emitting device.

[0446] Common layer 614 may include, for example, an electron injection layer or a hole injection layer. Alternatively, common layer 614 may include a stack of an electron transport layer and an electron injection layer, or a stack of a hole transport layer and a hole injection layer. Light-emitting devices 650R, 650G, and 650B share common layer 614. Note that common layer 614 may not be provided, and the entire EL layer included in the light-emitting device may be arranged in an island shape, as in layers 613a, 613b, and 613c.

[0447] In addition, the light emitting device 650R, the light emitting device 650G, and the light emitting device 650B share a common electrode 615. Figure 27 As shown, the common electrode 615 commonly included in the plurality of light emitting devices is electrically connected to the conductor included in the connection portion 640 .

[0448] The insulator 625 is preferably used as a blocking insulating layer for one or both of water and oxygen. In addition, the insulator 625 preferably has a function of suppressing the diffusion of one or both of water and oxygen. In addition, the insulator 625 preferably has a function of capturing or fixing (also called doping) one or both of water and oxygen. By giving the insulator 625 the function of a blocking insulating layer or a doping function, the entry of impurities (typically, one or both of water and oxygen) that may diffuse from the outside to each light-emitting device can be suppressed. By adopting this structure, a light-emitting device with high reliability can be provided, and a display device with high reliability can be provided.

[0449] Furthermore, the impurity concentration of the insulator 625 is preferably low. This can prevent impurities from entering the EL layer from the insulator 625 and causing degradation of the EL layer. Furthermore, by reducing the impurity concentration in the insulator 625, the barrier properties against one or both of water and oxygen can be improved. For example, it is preferable that either the hydrogen concentration or the carbon concentration in the insulator 625 be sufficiently low, and preferably both the hydrogen concentration and the carbon concentration be sufficiently low.

[0450] An insulating layer composed of an organic material can be suitably used as the insulator 627. A photosensitive organic resin is preferably used as the organic material. For example, a photosensitive resin composition containing an acrylic resin can be used. Note that in this specification, etc., the term "acrylic resin" does not refer only to polymethacrylate or methacrylic resin but may also refer to acrylic polymers in a broad sense.

[0451] The organic materials that can be used for the insulator 627 are not limited to the above-mentioned materials. For example, the insulator 627 may sometimes use an acrylic resin, a polyimide resin, an epoxy resin, an imide resin, a polyamide resin, a polyimideamide resin, a silicone resin, a siloxane resin, a benzocyclobutene resin, a phenolic resin, or a precursor of these resins. In addition, as the insulator 627, organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral (PVB), polyvinyl pyrrolidone, polyethylene glycol, polyglycerol, pullulan, water-soluble cellulose, or a polyamide resin soluble in alcohol may sometimes be used. In addition, as the photosensitive resin, the insulator 627 may sometimes use a photoresist. As the photosensitive resin, positive or negative materials may be cited.

[0452] Insulator 627 can also be made of a material that absorbs visible light. By absorbing the light emitted by the light-emitting device, insulator 627 can suppress light leakage from the light-emitting device through insulator 627 to adjacent light-emitting devices (stray light). This can improve the display quality of the display device. Furthermore, even without using a polarizing plate in the display device, display quality can be improved, thereby achieving a lighter and thinner display device.

[0453] Examples of materials that absorb visible light include materials containing pigments such as black, materials containing dyes, light-absorbing resin materials (e.g., polyimide), and resin materials that can be used for color filters (color filter materials). In particular, the use of resin materials formed by mixing or laminating two or more color filter materials is preferred because it can enhance the visible light shielding effect. In particular, by mixing three or more color filter materials, a black or nearly black resin layer can be achieved.

[0454] The insulator 627 can be formed by a wet deposition method such as spin coating, dipping, spray coating, inkjet coating, dispenser coating, screen printing, offset printing, doctor knife coating, slit coating, roll coating, curtain coating, or blade coating. In particular, the organic insulating film to be the insulator 627 is preferably formed by spin coating.

[0455] The insulator 627 is formed at a temperature lower than the heat resistance temperature of the EL layer. The substrate temperature during formation of the insulator 627 is typically 200° C. or lower, preferably 180° C. or lower, more preferably 160° C. or lower, further preferably 150° C. or lower, and even more preferably 140° C. or lower.

[0456] The side surfaces of the insulator 627 preferably have a tapered shape. By making the side ends of the insulator 627 have a positive tapered shape (less than 90°, preferably less than 60°, and more preferably less than 45°), the common layer 614 and the common electrode 615 provided on the side ends of the insulator 627 can be deposited with high coverage without causing disconnections or localized thinning. This improves the in-plane uniformity of the common layer 614 and the common electrode 615, thereby enhancing the display quality of the display device.

[0457] Furthermore, when viewing the display device in cross-section, the top surface of the insulator 627 preferably has a convex curved surface. The convex curved surface of the top surface of the insulator 627 preferably expands gently toward the center. Furthermore, the top surface of the insulator 627 preferably has a convex curved portion in the center smoothly connected to the tapered portion at the side end. By having the insulator 627 have this shape, the common layer 614 and the common electrode 615 can be deposited with high coverage over the entire insulator 627.

[0458] Furthermore, the insulator 627 is formed in a region between two EL layers (for example, a region between the layer 613a and the layer 613b). In this case, a portion of the insulator 627 is positioned between a side edge of one EL layer (for example, the layer 613a) and a side edge of the other EL layer (for example, the layer 613b).

[0459] Furthermore, it is preferable that one end of the insulator 627 overlaps with the conductor 611a serving as the pixel electrode, and the other end of the insulator 627 overlaps with the conductor 611b serving as the pixel electrode. This structure allows the end of the insulator 627 to be formed on a flat or substantially flat area of ​​the layer 613a (layer 613b). Therefore, it is relatively easy to process the tapered shape of the insulator 627 as described above.

[0460] As described above, by providing the insulator 627 and the like, it is possible to prevent the occurrence of disconnected portions and locally thinned portions in the common layer 614 and the common electrode 615 from the flat or substantially flat region of the layer 613a to the flat or substantially flat region of the layer 613b. Therefore, it is possible to suppress the occurrence of poor connection due to disconnected portions and increased resistance due to locally thinned portions in the common layer 614 and the common electrode 615 between the light-emitting devices.

[0461] In the display device of this embodiment, the distance between light-emitting devices can be reduced. Specifically, the distance between light-emitting devices, the distance between EL layers, or the distance between pixel electrodes can be reduced to less than 10 μm, 8 μm or less, 5 μm or less, 3 μm or less, 2 μm or less, 1 μm or less, 500 nm or less, 200 nm or less, 100 nm or less, 90 nm or less, 70 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm or less. In other words, the display device of this embodiment has a region where the spacing between two adjacent island-shaped EL layers is less than 1 μm, preferably has a region of less than 0.5 μm (500 nm), and more preferably has a region of less than 100 nm. In this way, by reducing the distance between each light-emitting device, a display device with high definition and high aperture ratio can be provided.

[0462] A protective layer 631 is provided on the light-emitting device 650. The protective layer 631 serves as a passivation film to protect the light-emitting device 650. Providing the protective layer 631 covering the light-emitting device prevents impurities such as water and oxygen from entering the light-emitting device, thereby improving the reliability of the light-emitting device 650. For example, aluminum oxide, silicon nitride, or silicon oxynitride can be used for the protective layer 631.

[0463] The protective layer 631 and the substrate 610 are bonded by the adhesive layer 607. The sealing of the light emitting device can adopt a solid sealing structure or a hollow sealing structure. Figure 27 In the embodiment, the space between substrate 410 and substrate 610 is filled with adhesive layer 607, i.e., a solid sealing structure is adopted. Alternatively, a hollow sealing structure can be adopted in which the space is filled with an inert gas (such as nitrogen or argon). In this case, adhesive layer 607 can also be provided so as not to overlap with the light-emitting device. In addition, a resin different from the adhesive layer 607 provided in the frame shape can also be used to fill the space.

[0464] As the adhesive layer 607, various curing adhesives such as light-curing adhesives such as ultraviolet curing adhesives, reaction-curing adhesives, heat-curing adhesives, or anaerobic adhesives can be used. Examples of these adhesives include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, and EVA (ethylene vinyl acetate) resins. In particular, epoxy resins with low moisture permeability are preferably used. Alternatively, two-liquid mixed resins can be used. Alternatively, an adhesive sheet can be used.

[0465] Display device 600A employs a top-emission type. The light-emitting device emits light toward the substrate 610 side. Therefore, substrate 610 is preferably made of a material with high visible light transmittance. For example, substrate 610 can be selected from substrates that have high visible light transmittance, such as those used in substrate 410. The pixel electrode is made of a material that reflects visible light, while the counter electrode (common electrode 615) is made of a material that transmits visible light.

[0466] Note that the display device of one embodiment of the present invention may employ a bottom emission structure, in which light emitted by the light-emitting device is emitted toward the substrate 410, rather than a top emission structure. In this case, the substrate 410 may be a substrate having high visible light transmittance.

[0467] also, Figure 27 The element layer 630 of the display device 600A includes a transistor MTCK, but is not limited thereto. There is no particular limitation on the structure of the transistor included in the display device of one embodiment of the present invention. In addition, one or more transistors can be used in the display device of one embodiment of the present invention. For example, one or more of the transistor MTCK shown in FIG. 29 and the transistor 800 shown in FIG. 30 can be used. In addition, one or both of an OS transistor and a Si transistor can be used in the display device of one embodiment of the present invention.

[0468] [Configuration Example 2 of Display Device]

[0469] Figure 28 A cross-sectional view of the display device 600B is shown.

[0470] By using flexible substrates for the substrate 541 and the substrate 610, the display device 600B can be a flexible display device (also called a flexible display). The substrate 541 is bonded to the insulating layer 545 via an adhesive layer 543. The substrate 610 is bonded to the protective layer 631 via an adhesive layer 607. Note that an example of a method for manufacturing a flexible device will be described later in this embodiment.

[0471] The main difference between the element layer 660 of the display device 600B and the element layer 660 of the display device 600A is that the layers 613a, 613b, and 613c have the same structure and include a colored layer 628R, a colored layer 628G, and a colored layer 628B.

[0472] Layers 613a, 613b, and 613c are formed using the same process and the same materials. Furthermore, layers 613a, 613b, and 613c are separated from one another. Providing island-shaped EL layers in each light-emitting device suppresses leakage current (sometimes referred to as lateral leakage current, horizontal leakage current, or transverse leakage current) between adjacent light-emitting devices. This prevents unintended light emission caused by crosstalk and suppresses color mixing between adjacent light-emitting devices, enabling the realization of a display device with extremely high contrast.

[0473] For example, Figure 28 The light emitting devices 650R, 650G, and 650B shown emit white light. The white light emitted by the light emitting devices 650R, 650G, and 650B passes through the colored layers 628R, 628G, and 628B, thereby obtaining light of a desired color.

[0474] Furthermore, a light-emitting device having a structure for emitting white light may emit light with a specific wavelength, such as red, green, or blue, enhanced by employing a microcavity structure.

[0475] Light emitted from light-emitting device 650R is extracted as red light through colored layer 628R to the outside of display device 600B. Similarly, light emitted from light-emitting device 650G is extracted as green light through colored layer 628G to the outside of display device 600B. Light emitted from light-emitting device 650B is extracted as blue light through colored layer 628B to the outside of display device 600B.

[0476] A light-emitting device that emits white light preferably adopts a tandem structure. In Embodiment 5, a structural example of a light-emitting device having a tandem structure is described in detail.

[0477] Or, for example, Figure 28 Light-emitting devices 650R, 650G, and 650B shown emit blue light. In this case, layers 613a, 613b, and 613c include one or more light-emitting layers that emit blue light. For sub-pixels that emit blue light, the blue light emitted by light-emitting device 650B can be extracted. For sub-pixels that emit red light and sub-pixels that emit green light, color conversion layers are provided between light-emitting device 650R and colored layer 628R, and between light-emitting device 650G and colored layer 628G, respectively. This allows the blue light emitted by light-emitting device 650R or 650G to be converted into light with a longer wavelength and extracted as red or green light. By extracting light that has passed through the color conversion layers through the colored layers, the colored layers absorb light other than the desired color, thereby improving the color purity of the light emitted by the sub-pixels.

[0478] Colored layers selectively transmit light of specific wavelengths while absorbing light of other wavelengths. For example, a red (R) filter that transmits light in the red wavelength range, a green (G) filter that transmits light in the green wavelength range, and a blue (B) filter that transmits light in the blue wavelength range can be used. Each colored layer can be made of one or more of a metal material, a resin material, a pigment, or a dye. The colored layers are formed in the desired locations using methods such as printing, inkjet printing, and etching using photolithography.

[0479] The element layer 630 of the display device 600B has the same structure as the element layer 630 of the display device 600A, and therefore detailed description thereof will be omitted.

[0480] The display device 600B differs from the display device 600A in that the display device 600B includes an element layer 635 instead of the element layer 620 . The element layer 635 has the same structure as the element layer 630 .

[0481] At least some of the transistors included in the device layer 635 are electrically connected to the conductive layer or transistors included in the device layer 630 through plugs, wiring, etc. A wiring layer 670 may be provided between the device layer 630 and the device layer 635 .

[0482] The element layer 635 is preferably provided with one or both of a pixel circuit and a driver circuit of the display device.

[0483] Figure 28 An example of stacking two element layers including OS transistors (element layer 630 and element layer 635) is shown, but the number of element layers is not limited to this and may be three or more. For example, when stacking three or more element layers including OS transistors, it is preferred that the bottom layer be used for a display device driver circuit (one or both of a gate driver and a source driver), the top layer be used for a display device pixel circuit, and the layers between them be used for pixel circuits or driver circuits, respectively.

[0484] Note that Si transistors are typically formed on single-crystal Si wafers, so it is difficult to adopt a flexible structure. Figure 28 As shown, when a display device is constructed using only OS transistors without using Si transistors, a flexible structure can be realized through a relatively simple manufacturing process.

[0485] [Transistor Structure Example 1]

[0486] Figures 29A to 29C An example of a semiconductor device (eg, a pixel circuit or a driver circuit) including a transistor MTCK is shown. In particular, Figure 29A FIG. 1 shows a schematic plan view of transistor MTCK. Figure 29B corresponds to Figure 29A The cross-sectional schematic diagram of the portion along the dashed line A1 - A2 is also a cross-sectional schematic diagram of the transistor MTCK. Figure 29C corresponds to Figure 29A The cross-sectional schematic diagram of the portion along the dashed line A3 - A4 is also a cross-sectional schematic diagram of the transistor MTCK.

[0487] exist Figures 29A to 29C In FIG, the direction of the dot-dash line A1-A2 is regarded as the X direction, and the direction of the dot-dash line A3-A4 is regarded as the Y direction. In addition, the direction perpendicular to the X direction and the Y direction is the Z direction. In addition, the X direction and the Y direction may be directions perpendicular to each other. In addition, the definitions of the X direction, the Y direction, and the Z direction may be the same or different in the following drawings. In addition, Figure 29A In the description of the planar schematic diagrams, etc., the right side is sometimes referred to as the X direction, the left side is sometimes referred to as the -X direction, the upper side is sometimes referred to as the Y direction, and the lower side is sometimes referred to as the -Y direction. Figure 29B In the description of the cross-sectional schematic diagrams, etc., the right side is sometimes referred to as the X direction, the left side is sometimes referred to as the -X direction, the upper side is sometimes referred to as the Z direction, and the lower side is sometimes referred to as the -Z direction. Figure 29C In the description of the isometric cross-sectional schematic diagram, the right side may be referred to as the -Y direction, the left side may be referred to as the Y direction, the upper side may be referred to as the Z direction, and the lower side may be referred to as the -Z direction.

[0488] Figures 29A to 29C The transistor MTCK shown includes insulators IS1 to IS3 , an insulator GI1 , electrical conductors ME1 to ME3 , and a semiconductor SC1 .

[0489] As an example, the insulator IS1 is used as a base film over which the source, drain, and channel formation regions of the transistor MTCK are provided. Silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon nitride can be used as the insulator IS1, for example. Furthermore, as the insulator IS1, for example, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, or silicon oxide with pores can be used. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable. Silicon oxide, silicon oxynitride, and silicon oxide with pores are particularly preferred because they easily form regions containing oxygen that is released by heating. Furthermore, a resin can be used as the insulator IS1, for example. As the material used for the insulator IS1, the above-mentioned insulating materials can be appropriately combined.

[0490] The conductor ME1 is a conductor used as one of the source and drain in the transistor MTCK (sometimes referred to as a terminal, wiring, etc.). In addition, the conductor ME2 is a conductor used as the other of the source and drain in the transistor MTCK (sometimes referred to as a terminal, wiring, etc.).

[0491] Note that in Figures 29A to 29C In the embodiment, the conductor ME1 is extended in the Y direction as a wiring as an example. Also, the conductor ME2 is extended in the X direction as an example as a wiring.

[0492] As the conductors ME1, ME2, and ME3, for example, preferably used are metal elements selected from the group consisting of aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, alloys containing two or more of these metal elements, or alloys combining two or more of these metal elements. Furthermore, as the conductive film ME1, ME2, and ME3, for example, preferably used are tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel. Tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are conductive materials that are not easily oxidized or materials that maintain conductivity even when absorbing oxygen, and are therefore preferred. In addition, as the conductor, for example, a highly conductive semiconductor such as polycrystalline silicon containing an impurity element (e.g., phosphorus or arsenic) or a silicide (e.g., nickel silicide) can also be used.

[0493] Alternatively, oxide conductors may be used for the conductors ME1, ME2, and ME3. Examples of oxide conductors include indium oxide, zinc oxide, In-Sn oxide (ITO), In-Zn oxide (also referred to as IZO (registered trademark)), In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn-Si oxide (ITO containing silicon, also referred to as ITSO), zinc oxide doped with gallium, and In-Ga-Zn oxide. Conductive oxides containing indium are particularly preferred due to their high conductivity.

[0494] In addition, a plurality of conductive films formed from the above-mentioned materials may be stacked. For example, a laminated structure may be formed by combining a material containing the above-mentioned metal element and a conductive material containing oxygen. Specific laminated structures of the conductive film include, for example, a laminated structure of indium oxide and a metal film containing ruthenium. In addition, a laminated structure may be formed by combining a material containing the above-mentioned metal element and a conductive material containing nitrogen. In addition, a laminated structure may be formed by combining a material containing the above-mentioned metal element, a conductive material containing oxygen, and a conductive material containing nitrogen.

[0495] In addition, the insulator IS2 is used, for example, as an interlayer film that separates the source and drain in the transistor MTCK. The insulating film IS2 can use, for example, a material that can be used for the insulator IS1. When the semiconductor SC1 is a metal oxide used as an oxide semiconductor, silicon oxide, silicon oxynitride, or silicon oxide with vacancies is preferably used. These materials can easily form a region containing oxygen that is released by heating, and the released oxygen can be supplied to the metal oxide. As a result, the carrier concentration of the metal oxide at the interface of the semiconductor SC1 in contact with the insulator IS2 and near the interface is reduced, and the interface of the semiconductor SC1 and near the interface become i-type or substantially i-type. Therefore, the interface of the semiconductor SC1 and the vicinity of the interface can be used as a channel formation region in the transistor MTCK.

[0496] The semiconductor SC1 can be, for example, a metal oxide used as an oxide semiconductor. In this case, the transistor MTCK is an OS transistor. As an example of the metal oxide, it is preferred to contain at least indium or zinc. In particular, it is preferred to contain indium and zinc. In addition, it is preferred to further contain element M. As element M, one or more selected from aluminum, gallium, silicon, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt and antimony can be used. In particular, element M is preferably one or more of aluminum, gallium, yttrium and tin. In addition, element M more preferably contains one or both of gallium and tin.

[0497] More specifically, examples of metal oxides include indium oxide, gallium oxide, zinc oxide, indium zinc oxide (also known as IZO (registered trademark)), indium tin oxide, indium titanium oxide, indium gallium oxide, indium gallium aluminum oxide, indium gallium tin oxide, gallium zinc oxide (also known as GZO), aluminum zinc oxide (also known as AZO), indium aluminum zinc oxide (also known as IAZO), indium tin zinc oxide (also known as ITZO (registered trademark)), indium titanium zinc oxide, indium gallium zinc oxide (also known as IGZO), indium gallium tin zinc oxide (also known as IGZTO), and indium gallium aluminum zinc oxide. Alternatively, examples include indium tin oxide, gallium tin oxide, and aluminum tin oxide containing silicon. Using a material that does not contain Zn, such as indium oxide, is preferred because it improves compatibility with the LSI manufacturing process. On the other hand, using a material containing Zn is preferred because it facilitates improved crystallinity.

[0498] Note that when the semiconductor SC1 is a metal oxide serving as an oxide semiconductor, it is preferably formed using an ALD (Atomic Layer Deposition) method. Figure 29B and Figure 29C As shown, when the semiconductor SC1 is formed in a region having a step, it can be formed with high coverage by using the ALD method.

[0499] Furthermore, when a metal oxide used as an oxide semiconductor is used as the semiconductor SC1, it is preferable to perform microwave treatment in an oxygen-containing atmosphere during or after the deposition of the metal oxide to reduce the concentration of impurities in the metal oxide. Examples of impurities include hydrogen and carbon. Furthermore, microwave treatment can sometimes improve the crystallinity of the metal oxide. Here, microwave treatment refers to, for example, treatment using an apparatus including a power source for generating high-density plasma using microwaves.

[0500] Furthermore, a crystalline metal oxide layer is preferably used as the semiconductor SC1. For example, a metal oxide layer having a CAAC (c-axis aligned crystal) structure, a polycrystalline structure, or a nanocrystalline (nc) structure, as described later, can be used. Using a crystalline metal oxide layer in the semiconductor SC1 reduces the defect state density in the semiconductor SC1, thereby achieving a highly reliable semiconductor device.

[0501] As an example, semiconductor SC1 preferably uses an In-Ga-Zn oxide. In particular, a metal oxide with an atomic ratio of In:Ga:Zn = 1:1:1 or a composition close thereto, a composition close thereto of 4:2:3 or a composition close thereto of 3:1:2 is more preferably used as the In-Ga-Zn oxide. Furthermore, as another example, semiconductor film SC1A preferably uses an In-Zn oxide. In particular, a metal oxide with an atomic ratio of In:Zn = 4:1 or a composition close thereto is more preferably used as the In-Zn oxide.

[0502] For example, the semiconductor SC1 preferably has a stacked structure of multiple oxide layers having different atomic ratios of metal atoms. For example, the metal oxides include a first metal oxide and a second metal oxide formed on the first metal oxide. When each metal oxide contains at least indium (In) and element M, the atomic ratio of element M to all constituent elements in the first metal oxide is preferably greater than the atomic ratio of element M to all constituent elements in the second metal oxide. Furthermore, the atomic ratio of element M to In in the first metal oxide is preferably greater than the atomic ratio of element M to In in the second metal oxide.

[0503] Specifically, the first metal oxide may have a composition of In:Ga:Zn = 1:3:4 [atomic ratio], 1:3:2 [atomic ratio], 1:1:0.5 [atomic ratio], or a composition approximately therefrom. Furthermore, the second metal oxide may have a composition of In:Ga:Zn = 1:1:1 [atomic ratio], 4:2:3 [atomic ratio], 3:1:2 [atomic ratio], or a composition approximately therefrom. The composition approximately therefrom falls within a range of ±30% of the desired atomic ratio.

[0504] At this point, the second metal oxide becomes the primary carrier path. By adopting this structure for the first metal oxide, the defect state density at the interface between the first and second metal oxides can be reduced. Consequently, the impact of interface scattering on carrier conduction is reduced, enabling the transistor to achieve high on-state current and high frequency characteristics.

[0505] Furthermore, an opening KK1 is formed in the region of insulator IS2 where transistor MTCK is provided, the side surfaces of which are substantially perpendicular to the XY plane (with a taper angle of not less than 70° and not more than 110°). Furthermore, semiconductor SC1, including the channel formation region of transistor MTCK, is provided in contact with conductors ME1 and ME2 through opening KK1.

[0506] Furthermore, in the transistor MTCK, an insulator GI1 is provided on the semiconductor SC1. Specifically, when viewed from above, the insulator GI1 overlaps with and is located above the channel formation region in the semiconductor SC1. The insulator GI1 serves as a gate insulating film in the transistor MTCK.

[0507] As the insulator GI1, for example, a single layer or stack of insulators containing so-called high-k materials such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba, Sr)TiO3 (BST) is preferably used. Alternatively, as an insulator with a relatively high dielectric constant, an oxide or oxynitride containing aluminum and hafnium, or an oxide, oxynitride, or nitride containing silicon and hafnium may be used as the insulator GI1. Furthermore, the insulator GI1 may use materials that can be used for the insulator IS1. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon nitride may be used as the insulator GI1.

[0508] Furthermore, in the transistor MTCK, the conductor ME3 is provided on the insulator GI1 so as to fill the opening KK1. The conductor ME3 is a conductor (sometimes referred to as a terminal, wiring, etc.) serving as a gate in the transistor MTCK.

[0509] In addition, Figures 29A to 29CIn FIG. 1 , as an example, the conductor ME3 extends in the Y direction as a wiring.

[0510] The insulator IS3 is, for example, a film used as an interlayer film. Therefore, the insulator IS3 preferably includes an insulating material with a low relative dielectric constant. Using an insulating material with a low relative dielectric constant for the interlayer film can reduce parasitic capacitance generated between wirings.

[0511] As the insulator IS3 , for example, a material that can be used for the insulator IS1 can be used.

[0512] As mentioned above, in Figures 29A to 29C In the transistor MTCK shown, a conductive body ME1, which serves as one of the source and drain electrodes, is located below an insulator IS2, which serves as an interlayer film. A conductive body ME2, which serves as the other of the source and drain electrodes, is located above the insulator IS2. Therefore, in the transistor MTCK, the channel formation region is provided along the opening of the insulator IS2.

[0513] The source and drain of the MTCK transistor are located at different heights, and the current flowing through the semiconductor layer flows in the height direction. In other words, the channel length direction can be said to have a height (vertical) component, so the MTCK transistor can also be called a VFET (Vertical Field Effect Transistor), a vertical transistor, a vertical channel transistor, or a vertical channel transistor.

[0514] like Figures 29A to 29C As shown in FIG. , by arranging the transistor channel formation region along the side of the opening of the insulator serving as the interlayer film, the area occupied by the transistor can be reduced compared to the case where the transistor channel formation region is arranged along the XY plane. Therefore, by forming a circuit using one or both of the transistors MTCK, the area of ​​the circuit can be reduced. Furthermore, as a result, the semiconductor device or display device including the circuit can be miniaturized.

[0515] [Transistor Structure Example 2]

[0516] Figure 30A A top view of transistor 800 is shown. Figure 30B Shown along Figure 30A A cross-sectional view along the dot-dash line A1-A2 in FIG. Figure 30B It is also a cross-sectional view of the transistor 800 along the channel length direction. Figure 30C Shown along Figure 30A A cross-sectional view along the dot-dash line A3-A4 in FIG. Figure 30C It is also a cross-sectional view of the transistor 800 in the channel width direction. Figure 30D Shown along Figure 30A A cross-sectional view along the dot-dash line A5-A6 in FIG. Figure 30D It is also a cross-sectional view of the channel width direction of the transistor 800. Note that Figure 30A In the top view, some components are omitted for clarity.

[0517] The transistor 800 includes a conductor 805 (conductor 805a and conductor 805b) arranged in a manner of embedding an insulator 816, an insulator 821 on the insulator 816 and the conductor 805, an insulator 822 on the insulator 821, an insulator 824 on the insulator 822, an oxide 820 (oxide 820a and oxide 820b) on the insulator 824, a conductor 842a (conductor 842a1 and conductor 842a2) and a conductor 842b (conductor 842b1 and conductor 842b2) on the oxide 820, an insulator 871a on the conductor 842a, an insulator 871b on the conductor 842b, an insulator 850 on the oxide 820, and a conductor 860 (conductor 860a and conductor 860b) on the insulator 850.

[0518] Insulator 875 is provided on insulators 871a and 871b, and insulator 885 is provided on insulator 875. Insulator 855, insulator 850, and conductor 860 are arranged inside openings provided in insulators 885 and 875. Furthermore, insulator 882 is provided on insulator 885 and conductor 860. Furthermore, insulator 883 is provided on insulator 882. Furthermore, insulator 815 is provided under insulator 816 and conductor 805. Furthermore, insulator 855 is provided between conductor 842a2, conductor 842b2, insulator 871a, insulator 871b, insulator 875, insulator 885, and insulator 850.

[0519] Insulator 815, insulator 816, conductor 805, insulator 821, insulator 822, insulator 824, oxide 820, conductor 842a, conductor 842b, insulator 871a, insulator 871b, insulator 875, insulator 885, insulator 855, insulator 850, conductor 860, insulator 882 and insulator 883 can all have a single-layer structure or a stacked-layer structure.

[0520] Oxide 820 includes a region serving as a channel formation region. Furthermore, conductor 860 includes a region serving as a first gate electrode (upper gate electrode). Insulator 850 includes a region serving as a first gate insulator. Furthermore, conductor 805 includes a region serving as a second gate electrode (lower gate electrode). Insulator 824, insulator 822, and insulator 821 all include regions serving as a second gate insulator.

[0521] The conductor 842a has a region that functions as one of a source electrode and a drain electrode, and the conductor 842b has a region that functions as the other of the source electrode and the drain electrode.

[0522] Oxide 820 preferably includes oxide 820a on insulator 824 and oxide 820b on oxide 820a. Including oxide 820a below oxide 820b can suppress diffusion of impurities from structures formed below oxide 820a into oxide 820b. Oxide 820 may have, for example, a single-layer structure consisting of oxide 820b or a stacked structure of three or more layers.

[0523] Oxide 820b includes a channel formation region and source and drain regions sandwiching the channel formation region. At least a portion of the channel formation region overlaps with conductor 860. The source region overlaps with conductor 842a, and the drain region overlaps with conductor 842b. Note that the source and drain regions may be swapped.

[0524] Since the channel formation region has fewer oxygen vacancies or a lower impurity concentration than the source and drain regions, it is a high-resistance region with a low carrier concentration. Therefore, the channel formation region can be said to be an i-type (intrinsic) or substantially i-type region.

[0525] Furthermore, due to the abundance of oxygen vacancies or high concentrations of impurities such as hydrogen, nitrogen, and metal elements, the source and drain regions are low-resistance regions with high carrier concentrations. In other words, the source and drain regions are n-type regions (low-resistance regions) with higher carrier concentrations than the channel formation region.

[0526] Note that a channel formation region, a source region, and a drain region can be formed in the oxide 820 b and the oxide 820 a , respectively.

[0527] In oxide 820, it is sometimes difficult to clearly detect the boundaries between regions. The concentrations of metal elements and impurity elements such as hydrogen and nitrogen detected in each region are not limited to varying in stages for each region; they can also vary gradually within each region. In other words, the concentrations of metal elements and impurity elements such as hydrogen and nitrogen can decrease as they approach the channel formation region.

[0528] An oxide semiconductor is preferably used for the oxide 820 (the oxide 820 a and the oxide 820 b ).

[0529] Oxide 820 preferably has a stacked structure of multiple oxide layers with different chemical compositions. For example, the atomic ratio of element M to the metal element serving as the main component in oxide 820a is preferably greater than that in oxide 820b. Furthermore, the atomic ratio of element M to In in oxide 820a is preferably greater than that in oxide 820b. This structure can suppress the diffusion of impurities and oxygen from structures formed beneath oxide 820a into oxide 820b.

[0530] In addition, the ratio of the number of atoms of In to the element M in the oxide 820b is preferably larger than that in the oxide 820a. By adopting this structure, the transistor 800 can obtain a large on-state current and high frequency characteristics.

[0531] Furthermore, since oxide 820a and oxide 820b contain a common element as a main component in addition to oxygen, the defect state density at the interface between oxide 820a and oxide 820b can be reduced. Consequently, the effect of interface scattering on carrier conduction is reduced, and transistor 800 can achieve high on-state current and high frequency characteristics.

[0532] Specifically, oxide 820a can be made of metal oxides having an atomic ratio of In:M:Zn = 1:3:2, In:M:Zn = 1:3:4, In:M:Zn = 1:1:0.5, or compositions thereof. Furthermore, oxide 820b can be made of metal oxides having an atomic ratio of In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 1:1:2, In:M:Zn = 4:2:3, or compositions thereof. The composition range should be within ±30% of the desired atomic ratio. Gallium is preferably used as element M. When oxide 820 is a single layer of oxide 820b, the metal oxides used for oxide 820a can also be used as oxide 820b. Note that the compositions of the metal oxides that can be used for oxide 820a and oxide 820b are not limited to those described above. For example, the composition of the metal oxide that can be used for oxide 820a can also be used for oxide 820b. Similarly, the composition of the metal oxide that can be used for oxide 820b can also be used for oxide 820a.

[0533] Furthermore, when depositing a metal oxide by sputtering, the atomic ratio is not limited to the atomic ratio of the deposited metal oxide, but may also be the atomic ratio of a sputtering target used for depositing the metal oxide.

[0534] The oxide 820b is preferably crystalline. In particular, CAAC-OS is preferably used as the oxide 820b. This can suppress oxygen extraction from the source or drain electrode through the oxide 820b. Furthermore, even after heat treatment, oxygen extraction from the oxide 820b is reduced, making the transistor 800 stable against the high temperatures (so-called thermal budget) experienced during the manufacturing process.

[0535] Examples of materials that can be used for the conductors, insulators, and oxide semiconductors included in the transistor 800 include the various materials that can be used for the conductors ME1 to ME3 described above.

[0536] Conductor 842a has a stacked structure of conductors 842a1 and 842a2, while conductor 842b has a stacked structure of conductors 842b1 and 842b2. Conductors 842a1 and 842b1, which are in contact with oxide 820b, are preferably made of a conductor that is not easily oxidized, such as a metal nitride. This prevents oxygen contained in oxide 820b from excessively oxidizing conductors 842a and 842b. Furthermore, conductors 842a2 and 842b2 are preferably made of a metal layer or other conductor with higher conductivity than conductors 842a1 and 842b1. This allows conductors 842a and 842b to be used as highly conductive wiring or electrodes.

[0537] For example, tantalum nitride or titanium nitride can be used as the conductor 842a1 and the conductor 842b1, and tungsten can be used as the conductor 842a2 and the conductor 842b2.

[0538] The openings provided in insulators 885 and 875 overlap the area between conductors 842a2 and 842b2. When viewed from above, the side surfaces of the opening in insulator 885 coincide with or substantially coincide with the side surfaces of conductors 842a2 and 842b2. Furthermore, portions of conductors 842a1 and 842b1 are formed so as to protrude into the aforementioned openings. Here, a portion of the top surface of conductor 842a1 contacts conductor 842a2, and a portion of the top surface of conductor 842b1 contacts conductor 842b2. Therefore, insulator 855 contacts, within the aforementioned openings, another portion of the top surface of conductor 842a1, another portion of the top surface of conductor 842b1, and the side surfaces of conductor 842a2 and 842b2. Furthermore, the insulator 850 is in contact with the top surface of the oxide 820 , the side surface of the conductor 842 a 1 , the side surface of the conductor 842 b 1 , and the side surface of the insulator 855 .

[0539] The insulator 855 is preferably an insulator that is not easily oxidized, such as a nitride. The insulator 855 is formed by anisotropic etching in a manner that contacts the side walls of the opening provided in the insulator 885 or the like (here, the side walls of the opening correspond to, for example, the side surfaces of the insulator 885 or the like). The insulator 855 is formed in a manner that contacts the side surfaces of the conductor 842a2 and the side surfaces of the conductor 842b2 and has the function of protecting the conductors 842a2 and 842b2. In order to supply oxygen to the oxide 820b, it is preferable to perform a heat treatment in an oxygen-containing atmosphere after separating the conductors 842a1 and 842b1 and before depositing the insulator 850. At this time, by forming the insulator 855 in a manner that contacts the side surfaces of the conductor 842a2 and the side surfaces of the conductor 842b2, the conductors 842a2 and 842b2 can be prevented from being excessively oxidized. For example, silicon nitride can be used as the insulator 855.

[0540] The insulator 850 preferably has the function of trapping or fixing hydrogen. Thus, the hydrogen concentration in the channel formation region of the oxide 820b can be reduced. Therefore, the V O H makes the channel formation region i-type or substantially i-type.

[0541] Insulator 850 serves as a gate insulator. Insulator 850, along with insulator 855 and conductor 860, is disposed in an opening formed in insulator 885. To achieve miniaturization of transistor 800, the thickness of insulator 850 is preferably small. The thickness of the layer constituting insulator 850 is preferably 0.1 nm or greater and 10 nm or less, more preferably 0.1 nm or greater and 5.0 nm or less, further preferably 0.5 nm or greater and 5.0 nm or less, further preferably 1.0 nm or greater and less than 5.0 nm, and even further preferably 1.0 nm or greater and 3.0 nm or less. Furthermore, at least a portion of each layer constituting insulator 850 may be a region having the aforementioned thickness.

[0542] The insulator 850 is preferably deposited using an ALD method. ALD methods include thermal ALD (using only thermal energy to react precursors and reactants) and plasma-enhanced ALD (PEALD) using plasma-excited reactants. PEALD is sometimes preferred because it allows deposition at a lower temperature by utilizing plasma.

[0543] The thickness of the insulator 855 is preferably 0.5 nm to 20 nm, more preferably 0.5 nm to 10 nm, and even more preferably 0.5 nm to 3 nm. By making the insulator 855 have this thickness, excessive oxidation of the conductors 842a2 and 842b2 can be suppressed. It suffices that at least a portion of the insulator 855 be a region having the above thickness. If the thickness of the insulator 855 is too great, the deposition time of the insulator 855 using the ALD method becomes longer, resulting in reduced productivity. Therefore, the thickness of the insulator 855 is preferably within the above range.

[0544] Insulators 815, 821, 822, 882, and 883 preferably all include insulators that have the function of inhibiting the diffusion of impurities such as water and hydrogen, and oxygen. For example, aluminum oxide, magnesium oxide, hafnium oxide, zirconium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), an oxide containing hafnium and zirconium (hafnium zirconium oxide), gallium oxide, silicon nitride, or silicon oxynitride can be used. For example, silicon nitride, which has a higher hydrogen barrier property, is preferably used for insulators 883 and 821. In addition, for example, aluminum oxide, which has a high ability to capture or fix hydrogen, is preferably used for insulator 882. In addition, for example, hafnium oxide, which has a high ability to capture or fix hydrogen and is a high dielectric constant (high-k) material, is preferably used for insulator 822.

[0545] The conductor 805 is arranged so as to overlap with the oxide 820 and the conductor 860. Here, the conductor 805 is preferably provided so as to be embedded in the opening formed in the insulator 816. Figure 30A and Figure 30C As shown in FIG. 1 , the conductor 805 is preferably provided so as to extend in the channel width direction. By adopting such a structure, the conductor 805 can be used as wiring when a plurality of transistors are provided.

[0546] like Figure 30B and Figure 30C As shown, conductor 805 preferably includes conductor 805a and conductor 805b. Conductor 805a is disposed so as to contact the bottom surface and sidewalls of the opening. Conductor 805b is disposed so as to fit into a recess formed along the opening in conductor 805a. The top surface of conductor 805 is aligned or substantially aligned with the top surface of insulator 816.

[0547] By using a conductive material that inhibits hydrogen diffusion as conductor 805a, impurities such as hydrogen contained in conductor 805b can be prevented from diffusing into oxide 820 through insulator 816 and the like. Furthermore, by using a conductive material that inhibits oxygen diffusion as conductor 805a, oxidation of conductor 805b and a decrease in conductivity can be prevented. Examples of conductive materials that inhibit oxygen diffusion include titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, and ruthenium oxide. Conductor 805a can have a single-layer structure or a stacked-layer structure of the above-mentioned conductive materials. For example, conductor 805a preferably comprises titanium nitride.

[0548] Furthermore, the conductor 805b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. For example, the conductor 805b preferably contains tungsten.

[0549] Conductor 805 can be used as a second gate electrode. In this case, by independently changing the potential supplied to conductor 805 without interlocking it with the potential supplied to conductor 860, the threshold voltage (Vth) of transistor 800 can be controlled. In particular, by supplying a negative potential to conductor 805, the Vth of transistor 800 can be increased and the off-state current can be reduced. Therefore, when a negative potential is applied to conductor 805, the drain current when the potential supplied to conductor 860 is 0V can be reduced compared to when no negative potential is applied to conductor 805.

[0550] The insulator 824 in contact with the oxide 820 preferably includes, for example, silicon oxide or silicon oxynitride. This allows oxygen to be supplied from the insulator 824 to the oxide 820, thereby reducing oxygen vacancies.

[0551] Similar to oxide 820, insulator 824 is preferably processed into an island shape. Thus, when multiple transistors 800 are provided, each transistor 800 includes an insulator 824 of substantially the same size. As a result, the amount of oxygen supplied from insulator 824 to oxide 820 is substantially the same in each transistor 800. Consequently, variations in the electrical characteristics of transistors 800 within the substrate surface can be suppressed. However, this is not limiting, and a structure may also be employed in which the insulator 824 is not patterned, similar to insulator 822.

[0552] Conductors 842a, 842b, and 860 are preferably made of a conductive material that is not easily oxidized or that has the function of inhibiting oxygen diffusion. Examples of such conductive materials include nitrogen-containing materials and oxygen-containing materials. This can suppress a decrease in the conductivity of conductors 842a, 842b, and 860.

[0553] Insulators 871a and 871b are inorganic insulators that serve as etching stop layers during processing of conductors 842a2 and 842b2, protecting conductors 842a2 and 842b2. Since insulators 871a and 871b are in contact with conductors 842a2 and 842b2, they are preferably inorganic insulators that are less likely to oxidize conductors 842a and 842b. Insulators 871a and 871b preferably have a stacked structure of, for example, a nitride insulator and an oxide insulator.

[0554] Conductor 860 preferably includes conductor 860a and conductor 860b disposed on conductor 860a. For example, conductor 860a is preferably disposed so as to surround the bottom and side surfaces of conductor 860b. In this case, conductor 860a is preferably made of a conductive material that is not easily oxidized or a conductive material that has the function of inhibiting the diffusion of oxygen. When conductor 860a has the function of inhibiting the diffusion of oxygen, it can prevent oxygen contained in insulator 885, etc., from oxidizing conductor 860b and causing a decrease in conductivity. Examples of conductive materials that have the function of inhibiting the diffusion of oxygen include titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, and ruthenium oxide.

[0555] The conductor 860b is preferably a highly conductive conductor. For example, the conductor 860b can be made of a conductive material primarily composed of tungsten, copper, or aluminum. Furthermore, the conductor 860b can have a laminated structure, for example, a laminated structure of titanium or titanium nitride and the above conductive materials.

[0556] The dielectric constants of the insulator 816 and the insulator 885 are preferably lower than that of the insulator 822. By using a material with a low dielectric constant for the interlayer film, parasitic capacitance generated between wirings can be reduced.

[0557] At least a part of the structural examples described in this embodiment mode and the drawings corresponding to the structural examples can be combined with other structural examples, drawings, etc. as appropriate.

[0558] [Example]

[0559] In this embodiment, an electronic device using a display system according to one embodiment of the present invention was prototyped.

[0560] Figure 31AA schematic diagram of a prototype electronic device 90 is shown. The electronic device 90 includes a housing 91, a multi-jointed arm 93, a handle 98R, a handle 98L, and a buffer member 96. The housing 91 is connected to a support rod 97 via the multi-jointed arm 93. The buffer member 96 is the portion that contacts the user's face (forehead, cheeks, etc.) and blocks ambient light (external light). Because the buffer member 96 prevents external light from being seen, not only can the user focus on the image, but the image contrast can also be ensured, thereby enhancing the sense of immersion.

[0561] Housing 91 is equipped with a pair of lenses 94 and a pair of cameras 95 for eye tracking. Although not shown, housing 91 also houses a pair of display modules and an accelerometer for motion sensing. Housing 91 is connected to a computer and a circuit module with an FPGA via a cable. The computer executes the programs for the coordinate detection unit and image generation unit described in Implementation Example 1. Furthermore, the circuit module executes the program that functions as the data generation unit.

[0562] The electronic device 90 is assumed to be a device that is pulled close to the head and observed using the handle 98R and the handle 98L. In addition, the electronic device 90 is held by the multi-joint arm 93. Therefore, since it can be used hands-free, it is hygienic, and since it can be used in a way that does not feel heavy, it can be enjoyed by everyone from children to the elderly, regardless of their physique. For example, it is suitable for use by an unspecified number of people, such as demonstrations at exhibitions, entertainment purposes at tourist attractions, etc. In addition, in medical use, there is no need to support the weight of the goggles with the head, so not only can the physical burden of the doctor be reduced, but the doctor can also use it hands-free during surgery, so it is also safe from a hygienic point of view.

[0563] Figure 31B A photograph showing the prototype electronic device as seen from the front is shown.

[0564] A camera 95 is mounted below the lens 94. A pair of infrared LEDs 99 are arranged so as to sandwich the lens 94. The housing 91 is provided with an interocular distance adjustment mechanism 81, which allows the distance between the pair of lenses 94 to be adjusted.

[0565] The following shows the specifications of the display module arranged inside the housing 91. Two display modules are installed inside the housing 91.

[0566] [Table 1]

[0567]

[0568] In the prototype electronic device, foveated rendering was confirmed, where the resolution of each of the 32 display units was changed based on the coordinates of the foveation point measured through eye tracking.

[0569] At least a part of the configuration examples and the drawings corresponding to the configuration examples shown in this embodiment can be combined with other configuration examples or drawings as appropriate.

[0570] [Explanation of symbols]

[0571] 81: Eye distance adjustment mechanism, 90: Electronic device, 91: Frame, 93: Multi-joint arm, 94: Lens, 95: Camera, 96: Buffer member, 97: Support rod, 98L: Handle, 98R: Handle, 99: Infrared light LED, 500: Display system, 501: Sight line detection unit, 502: Posture detection unit, 503: Coordinate detection unit, 504: Image generation unit, 505: Data generation unit, 506: Display module, 507A: Optical system, 507B: Optical system, 507C: Optical system, 50 7: Optical system, 511: Image capture unit, 512: Light source, 513: Insulator, 514: Conductor, 515: Display unit, 516: Circuit unit, 520B: Pixel, 520G: Pixel, 520R: Pixel, 521: Block, 531: Lens group, 532: Lens group, 533: Lens, 534: Reflector, 535: Reflector, 536: Lens, 537: Light guide plate, 538: Reflector, 539: Reflector, 541: Substrate, 543: Adhesive layer, 545: Insulation layer, 551: Eye

Claims

1. A display system comprising: Display module; Line of sight detection unit; Posture detection unit; Coordinate detection unit; Image generation unit; as well as Data Generation Department, The display module includes a display portion and a circuit portion divided into multiple blocks. The sight line detection unit has a function of capturing the user's eyes and their vicinity and outputting image information to the coordinate detection unit. The coordinate detection unit has a function of generating coordinate information of a gaze point based on the image information and outputting the information to the image generation unit. The posture detection unit has a function of detecting the direction of the user's head and outputting the direction as posture information to the image generation unit. The image generating unit has a function of generating first image data based on the posture information, a function of generating resolution information for each of the blocks based on the coordinate information, and a function of outputting the first image data and the resolution information to the data generating unit. The data generating unit has a function of performing a sampling process on the first image data for each of the blocks according to the resolution information to generate second image data and output the second image data to the display module. The circuit unit has a function of performing interpolation processing on the second image data to insert missing data of the block subjected to the decimation processing to generate third image data and output the third image data to the display unit. Furthermore, the display unit has a function of displaying an image based on the third image data.

2. The display system according to claim 1, further comprising an optical system, wherein the optical system is located between the display module and the user, And the optical system includes a cookie lens.

3. The display system according to claim 1, further comprising an optical system, wherein the optical system is located between the display module and the user, Furthermore, the optical system includes one or more lenses and two or more reflective plates.

4. The display system according to claim 1, The sight line detection unit includes a light source that emits infrared light and a camera that is sensitive to infrared light.

5. The display system according to claim 4, The camera is arranged at a position where it can photograph the user's eyes from obliquely below.

6. The display system according to claim 1, The display unit includes a pixel circuit. And the pixel circuit includes a transistor including an oxide semiconductor in a semiconductor layer forming a channel.

7. The display system according to claim 6, The display module includes a plurality of driving circuits. The driving circuit includes a gate driving circuit and a source driving circuit. Furthermore, the display portion and the driver circuit are provided on the same substrate and are arranged in such a manner as to overlap each other.

8. The display system according to claim 7, The source driver circuit includes a transistor including silicon in a semiconductor layer forming a channel.

Images