Chip manufacturing demonstration platform

Abstract

The invention discloses a chip manufacturing demonstration platform, belongs to the field of education or training simulators, and solves the problems that in the prior art, a virtual simulation video teaching system is difficult to obtain more visual feelings, and a teaching mode of laboratory-level equipment is high in cost and cannot cover the whole process. According to the application, a single crystal furnace simulation demonstration device, a wafer feeding simulation demonstration device, a photoetching simulation demonstration device, an etching simulation demonstration device, a film deposition simulation demonstration device, an ion implantation simulation demonstration device and a polishing simulation demonstration device which simulate actual devices can be arranged; the manufacturing process of the chip can be vividly displayed by means of light, electricity, fog and the like. The chip manufacturing demonstration platform is a modularized, detachable and full-process-covered chip manufacturing process flow demonstration platform, and full-process visual teaching of chip manufacturing can be realized.

Description

Technical Field

[0001] The present application relates to a chip manufacturing demonstration platform, belonging to the field of education or training simulators. Background Art

[0002] Chip manufacturing is the core link of the semiconductor industry, involving dozens of complex processes such as photolithography, etching, thin film deposition, and ion implantation. Its microscopic process is difficult to observe with the naked eye.

[0003] With the rapid development of semiconductor technology, the industry's requirements for the professional capabilities of technicians are increasing, but traditional teaching and training methods can hardly meet the increased teaching requirements.

[0004] Existing chip manufacturing teaching methods primarily utilize virtual simulation video teaching systems or laboratory-grade equipment. Existing virtual simulation video teaching systems allow students to experience the chip manufacturing process by playing virtual simulation videos of the chip manufacturing process. Existing laboratory-grade equipment, on the other hand, uses simplified teaching equipment (such as desktop photolithography machines) for teaching. Both existing virtual simulation video teaching systems and laboratory-grade equipment have significant drawbacks.

[0005] With the rapid development of semiconductor technology, the industry's requirements for the professional capabilities of technicians are increasing, but traditional teaching and training methods have the following problems: process abstraction, chip manufacturing equipment is expensive and the operating environment is harsh (such as clean rooms), and students find it difficult to directly contact actual equipment, so they use abstract virtual simulation videos to try to get as close to the real scene as possible; process fragmentation, existing training mostly uses single process simulation (such as only demonstrating lithography or etching), and lacks a systematic display of the entire process; lack of flexibility, traditional equipment is fixed and integrated, and it is impossible to adjust the process combination or modular disassembly teaching as needed.

[0006] While some existing technologies utilize virtual simulation video teaching systems for demonstrations, these systems lack hardware support, making them difficult to intuitively demonstrate. They also typically simulate a single process (e.g., only photolithography or etching), lacking a systematic demonstration of multiple processes or even dry etching. Laboratory-level equipment is limited in cost, safety, and size, making it difficult to popularize. Furthermore, its single functionality and fixed modules prevent it from covering the entire process. Summary of the Invention

[0007] The present application provides a chip manufacturing demonstration platform, which is a modular, detachable, and full-process chip manufacturing process demonstration platform. It solves the problems of lack of real hardware interaction, process fragmentation and insufficient flexibility in the existing technology, and can realize visual teaching of the entire process of chip manufacturing (for example, from single crystal silicon growth to chip testing).

[0008] The technical solution adopted in this application relates to a chip manufacturing demonstration platform, including a demonstration equipment group, which includes multiple simulation demonstration equipment, and all the simulation demonstration equipment are arranged in sequence; the chip manufacturing demonstration platform also includes a streamline module; the streamline module includes a wafer carrier for conveying simulated wafers and a carrier conveying streamline for conveying the wafer carrier; the wafer carrier is arranged on the carrier conveying streamline and moves along the conveying direction of the carrier conveying streamline; the conveying direction of the carrier conveying streamline is consistent with the arrangement direction of all the simulation demonstration equipment; the multiple simulation demonstration equipment include multiple first simulation demonstration equipment and at least one second simulation demonstration equipment, and the lower part of the first simulation demonstration equipment is constructed with a culvert channel for the streamline module to pass through, and the culvert channels under all the first simulation demonstration equipment are arranged along a straight line, the streamline module passes through the culvert channels of all the first simulation demonstration equipment and the wafer carrier is conveyed in the culvert channel, and the lower part of the second simulation demonstration equipment is not provided with a culvert channel for the streamline module to pass through.

[0009] Optimized, the above-mentioned chip manufacturing demonstration platform also includes multiple platform boxes, all of which are arranged in a straight line in sequence; all simulation demonstration equipment of the demonstration equipment group are respectively arranged in the platform boxes, and at least one simulation demonstration equipment is arranged in each platform box; a window for displaying the simulation demonstration equipment is constructed on the front face of the platform box.

[0010] The optimized carrier conveyor streamline includes multiple double-row synchronous belt conveyors, each wafer carrier having a carrier platform, the lower portion of which has a contact portion that contacts the conveying surface of the double-row synchronous belt conveyors; all double-row synchronous belt conveyors of the carrier conveyor streamline are connected end to end to form a continuous conveyor streamline device. A proximity sensor group and a wafer carrier blocking module are located within the culvert below the first simulation demonstration device. The proximity sensor group, wafer carrier blocking module, and wafer carrier blocking module are arranged in conjunction with the wafer carrier; the proximity sensor group and wafer carrier blocking module are installed on the carrier conveyor streamline; after the simulated wafer is transported by the wafer carrier along the carrier conveyor streamline to the culvert of one of the multiple first simulation demonstration devices, it is stopped by the wafer carrier blocking module.

[0011] Optimized, one of the at least one second simulation demonstration devices is a wafer loading simulation demonstration device; the wafer loading simulation demonstration device includes a wafer material box and a wafer robot arm; the wafer material box has an internal cavity with an opening, and a plurality of shelf slots are respectively provided on the side walls on both sides of the internal cavity of the wafer material box; the wafer robot arm is arranged at the initial end of the carrier conveying streamline; the wafer robot arm includes a rotary cylinder, a primary cylinder, a secondary cylinder, a lifting cylinder and a wafer material fork. The cylinder body of the primary cylinder is connected to the power output end of the rotary cylinder, the cylinder body of the secondary cylinder is fixed to the piston end of the primary cylinder, the cylinder body of the lifting cylinder is fixed to the piston end of the secondary cylinder, and the piston movement direction of the secondary cylinder is consistent with that of the primary cylinder. The wafer material fork is a U-shaped fork, and the wafer material fork is fixed to the piston end of the lifting cylinder, and the piston movement direction of the lifting cylinder is perpendicular to the piston movement direction of the secondary cylinder.

[0012] Optimized, one of the at least one second simulation demonstration devices mentioned above is a single crystal furnace simulation demonstration device for simulating the generation of single crystal silicon rods; the single crystal furnace simulation demonstration device includes a single crystal furnace appearance simulation shell, the interior of the single crystal furnace appearance simulation shell is hollow and has an LED light strip on the top; the surface of the single crystal furnace appearance simulation shell has an observation window; the lower part of the single crystal furnace appearance simulation shell has a lifting cylinder, and the lifting cylinder is connected to a single crystal silicon rod simulation part installed inside the single crystal furnace appearance simulation shell; the lifting cylinder pushes the single crystal silicon rod simulation part to move up and down inside the single crystal furnace appearance simulation shell.

[0013] Optimized, one of the multiple first simulation demonstration devices is a lithography simulation demonstration device for simulating lithography; the lithography simulation demonstration device includes a lithography simulation demonstration rack, an optical lighting module, a mask module, and an objective lens module arranged on the lithography simulation demonstration rack from top to bottom; the optical lighting module has a built-in light inside, and the optical lighting module has a first light-transmitting portion on the surface facing the mask module and the objective lens module for the built-in light to pass through; the middle of the objective lens module has a second light-transmitting portion for the light beam emitted by the optical lighting module to pass through the objective lens module; the spot size of the light beam irradiated on the wafer carrier is smaller than the spot size of the light beam irradiated from the optical lighting module through the first light-transmitting portion of the mask module.

[0014] Optimized, one of the multiple first simulation demonstration devices is an etching simulation demonstration device for simulating etching; the etching simulation demonstration device includes an etching appearance simulation shell, the etching appearance simulation shell includes a lower box for placing a first simulated wafer and an upper box arranged on the top surface of the lower box; the first simulated wafer has a plurality of lamp beads arranged in an array; the upper surface of the etching appearance simulation shell has a first hollow portion for observing the first simulated wafer; the lower surface of the upper box is provided with a smoke outlet, and the smoke outlet is connected to a smoke generator through a pipeline; during the etching simulation, the lamp beads on the first simulated wafer light up the simulated etching path, and the smoke generator introduces smoke into the smoke outlet so that the smoke is ejected toward the top surface of the lower box to simulate the starting state of the plasma generation process during plasma etching.

[0015] Optimized, one of the multiple first simulation demonstration devices is a thin film deposition simulation demonstration device for simulating thin film deposition; the thin film deposition simulation demonstration device includes a thin film deposition appearance simulation shell, the thin film deposition appearance simulation shell includes a lower shell for placing a second simulation wafer and an upper shell located above the lower shell, and the second simulation wafer has a plurality of lamp beads arranged in an array; the upper surface of the thin film deposition appearance simulation shell has a second hollow portion for observing the second simulation wafer; the smoke outlet is connected to a smoke generator through a pipeline; during the thin film deposition simulation, the lamp beads on the second simulation wafer are lit to simulate the coating process, and the smoke generator introduces smoke into the smoke outlet so that the smoke is ejected toward the upper surface of the lower shell to simulate the process of gas ionization to form a stable plasma; the second hollow portion of the thin film deposition appearance simulation shell is covered with a second transparent acrylic, and the surface of the second transparent acrylic has an atomizing film that is in an atomized state when the power is off and in a transparent state when the power is on.

[0016] In an optimized embodiment, one of the multiple first simulation demonstration devices is an ion implantation simulation demonstration device for simulating ion implantation; the ion implantation simulation demonstration device includes an ion implantation appearance simulation housing; a third simulated wafer is provided within the ion implantation appearance simulation housing, and a plurality of arrayed lamp beads are provided on the third simulated wafer; the upper surface of the ion implantation appearance simulation housing has a third hollow portion for observing the third simulated wafer; during the ion implantation simulation, the lamp beads on the third simulated wafer light up to simulate the coating process; the third hollow portion of the ion implantation appearance simulation housing is covered with a third transparent acrylic, and a mist film is provided on the surface of the third transparent acrylic that becomes misted when powered off and becomes transparent when powered on; the ion implantation appearance simulation housing has a rotating platform, and the third simulated wafer is mounted on the rotating platform; and the ion implantation appearance simulation housing is equipped with an ion implantation wafer rotating power device for driving the rotating platform to rotate.

[0017] Optimized, one of the multiple first simulation demonstration devices is a polishing simulation demonstration device for simulating chemical mechanical polishing; the polishing simulation demonstration device includes a polishing table, a polishing head simulation component and a simulated polishing liquid system; the top of the polishing table has a simulated polishing pad, the polishing head simulation component has a simulated polishing head, and the simulated polishing head is located above the simulated polishing pad; the simulated polishing liquid system includes a water tank and a drip tube; the drip tube is connected to the water tank through a pipeline, and the liquid outlet end of the drip tube is located on one side of the simulated polishing head.

[0018] The advantages of the present application are: the chip manufacturing demonstration platform of the present application has strong demonstration and teaching flexibility. Through modular design, each process module is independently detachable, supports on-demand combination, and is flexibly adapted to different teaching scenarios; the chip manufacturing demonstration platform of the present application has a good interactive experience, and adopts a combination of simulated objects and light, electricity, fog, etc. Through three-dimensional display, students can more intuitively feel the working conditions of real chip manufacturing equipment and achieve better teaching effects; the chip manufacturing demonstration platform of the present application can achieve full process coverage of the chip manufacturing process, integrate the full process module of chip manufacturing, and can systematically display the connection relationship between each process, breaking through the limitations of traditional single process teaching. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a schematic diagram of the structure of the chip manufacturing demonstration platform of this application;

[0020] Figure 2 A schematic structural diagram of the platform box of the chip manufacturing demonstration platform of this application;

[0021] Figure 3 This is a schematic structural diagram of the gas source assembly of this application;

[0022] Figure 4 This is a schematic diagram of the structure of the wafer used for demonstration of this application;

[0023] Figure 5 A schematic structural diagram of the wafer carrier and the wafer carrier blocking module of the present application;

[0024] Figure 6 This is a schematic structural diagram of the streamline module of this application;

[0025] Figure 7-1 This is a schematic diagram of the structure of the single crystal furnace simulation demonstration equipment of this application;

[0026] Figure 7-2 This is a schematic diagram of the internal structure of the single crystal furnace simulation demonstration device of this application;

[0027] Figure 8 This is a schematic diagram of the structure of the wafer cassette and wafer robotic arm of this application;

[0028] Figure 9 This is a schematic diagram of the structure of the wafer loading simulation demonstration equipment of this application;

[0029] Figure 10 This is a schematic structural diagram of the lithography simulation demonstration device of this application;

[0030] Figure 11 A schematic diagram of the internal structure of the lithography simulation demonstration device of this application;

[0031] Figure 12 This is a schematic diagram of the structure of the etching simulation demonstration device of this application;

[0032] Figure 13 This is a schematic structural diagram of the thin film deposition simulation demonstration device of this application;

[0033] Figure 14 This is a schematic structural diagram of the ion implantation simulation demonstration device of the present application;

[0034] Figure 15 This is a schematic structural diagram of the polishing simulation demonstration device of this application;

[0035] Figure 16 A schematic diagram of the internal structure of the polishing simulation demonstration device of this application;

[0036] Figure 17 This is a schematic diagram of the structure of the wafer test simulation equipment of this application;

[0037] Figure 18 This is a schematic diagram of the structure of the microscope simulation device of this application. DETAILED DESCRIPTION

[0038] The following further illustrates the technical features of the present application with reference to the accompanying drawings and specific embodiments. It is also noted that, to provide a more detailed description of the embodiments, the following embodiments are best and preferred embodiments, and those skilled in the art may also adopt other alternatives for implementing certain known technologies. Furthermore, the accompanying drawings are intended only to provide a more detailed description of the embodiments and are not intended to limit the present application.

[0039] It should be noted that references in the specification to "one embodiment," "an embodiment," "an exemplary embodiment," "some embodiments," etc. indicate that the described embodiments may include specific features, structures, or characteristics, but not every embodiment necessarily includes such specific features, structures, or characteristics. In addition, when specific features, structures, or characteristics are described in conjunction with an embodiment, it is within the knowledge of persons skilled in the relevant art to implement such features, structures, or characteristics in conjunction with other embodiments (whether or not explicitly described).

[0040] In general, terms can be understood, at least in part, from their use in context. For example, depending at least in part on the context, the term "one or more" as used herein can be used to describe any feature, structure, or characteristic in the singular sense, or can be used to describe a combination of features, structures, or characteristics in the plural sense. Additionally, the term "based on" can be understood as not necessarily intended to convey an exclusive set of factors, but can instead, depending at least in part on the context, allow for the presence of other factors that are not necessarily explicitly described.

[0041] It is understood that, although the terms "first", "second" etc. can be used herein to describe various elements, these elements are not limited by these terms. These terms are only used to distinguish an element from another element. Therefore, without departing from the teaching of the present disclosure, the "first" element discussed below may also be referred to as the "second" element. It is understood that the meaning of "on ... ", "on ... " and "above ... " in the present disclosure should be interpreted in the widest way, so that "on ... " not only means "directly on" something "on" but also includes something "on" and there is an intervening feature or layer therebetween, and "on ... " or "above ... " not only means "on" something "on" or "above", but also can include its "on" something "on" or "above" and there is no intervening feature or layer therebetween.

[0042] Additionally, spatially relative terms such as "below," "beneath," "lower," "above," and "upper" may be used herein for descriptive convenience to describe the relationship of one element or feature to another element or features, as illustrated in the accompanying drawings. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the accompanying drawings. The device may be oriented in other ways, and the spatially relative descriptors used herein should be similarly interpreted accordingly.

[0043] As shown in the figure, the present application relates to a chip manufacturing demonstration platform, including a demonstration equipment group, the demonstration equipment group includes a plurality of simulation demonstration devices, and the simulation demonstration devices are arranged in sequence at intervals.

[0044] In one embodiment of the present application, all the simulation demonstration devices can be a single crystal furnace simulation demonstration device 3 for simulating the generation of single crystal silicon rods, a lithography simulation demonstration device 4 for simulating photolithography, an etching simulation demonstration device 5 for simulating etching, a thin film deposition simulation demonstration device 6 for simulating thin film deposition, an ion implantation simulation demonstration device 7 for simulating ion implantation, and a polishing simulation demonstration device 8 for simulating chemical mechanical polishing.

[0045] The single crystal furnace simulation demonstration equipment 3, the photolithography simulation demonstration equipment 4, the etching simulation demonstration equipment 5, the thin film deposition simulation demonstration equipment 6, the ion implantation simulation demonstration equipment 7, and the polishing simulation demonstration equipment 8 are arranged in a straight line and spaced apart in sequence.

[0046] In one embodiment of the present application, a chip manufacturing demonstration platform is provided with a unified gas source component, which supplies gas to the gas-using mechanisms of all simulation demonstration devices. Figure 3 The air source assembly includes a small air compressor 1201, an air storage tank 1202, a pressure reducing valve 1203 and a solenoid valve 1204.

[0047] The air supply end of small air compressor 1201 is connected to the interior of air tank 1202, which stores compressed air and supplies it externally through a pipeline. The pipeline from air tank 1202 to the outside is equipped with a pressure reducing valve 1203 and a solenoid valve 1204. Pressure reducing valve 1203 controls the output air pressure, while solenoid valve 1204 controls whether air is supplied externally.

[0048] In one embodiment of the present application, the chip manufacturing demonstration platform has a plurality of platform boxes 2, and all the platform boxes 2 are arranged in sequence in a straight line.

[0049] refer to Figure 2 All the simulation demonstration devices of the demonstration device group are respectively set in the platform box 2, and at least one simulation demonstration device is set in each platform box 2. A window for displaying the simulation demonstration device is constructed on the front surface of the platform box 2. During the demonstration, the trainees can observe the demonstration process of the simulation demonstration device inside the platform box 2 through the window.

[0050] In one embodiment of the present application, the platform box 2 is formed by bending a metal plate and can be fixed by welding or riveting after forming. The lower part of the platform box 2 can have a cabinet with a cabinet door, and the middle part of the platform box 2 can be provided with a drawer. The cabinet and the drawer can conveniently accommodate auxiliary equipment of the demonstration platform such as power supply facilities, gas supply facilities, and a control terminal, as well as teaching aids. The teaching aids can be, for example, a display with a corresponding video stored, so as to facilitate more efficient learning in combination with the video content during the demonstration.

[0051] In this application, a streamline module is used to simulate the conveying process of wafers on a real chip assembly line. Figure 5 and Figure 6The streamline module includes a wafer carrier 101 for transporting simulated wafers and a carrier conveying streamline 102 for transporting the wafer carrier. Wafer carrier 101 is arranged on carrier conveying streamline 102 and moves along the conveying direction of carrier conveying streamline 102. The conveying direction of carrier conveying streamline 102 is consistent with the arrangement direction of the simulation demonstration equipment. In this application, the simulation demonstration equipment can be divided into a first simulation demonstration equipment and a second simulation demonstration equipment according to whether the carrier conveying streamline 102 can pass through it.

[0052] To facilitate the arrangement of the streamlined modules, a culvert passageway was constructed beneath the first simulation demonstration apparatus for the streamlined modules to pass through. The culvert passageways beneath all first simulation demonstration apparatuses were arranged in a straight line, with the exit of the culvert passageway of the previous first simulation demonstration apparatus facing the entrance of the culvert passageway of the next first simulation demonstration apparatus. The streamlined modules passed through the culvert passageways of all first simulation demonstration apparatuses, and the wafer carrier 101 was transported within the culvert passageways. Unlike the first simulation demonstration apparatus, the second simulation demonstration apparatus did not have a culvert passageway beneath it for the streamlined modules to pass through.

[0053] The carrier conveying streamline 102 includes multiple double-row synchronous belt conveyors. All the double-row synchronous belt conveyors of the carrier conveying streamline 102 are connected end to end to form a continuous conveying streamline equipment. The wafer carrier 101 includes a flat carrier platform. Two contact parts that contact the conveying surface of the double-row synchronous belt conveyor are set at the lower part of the carrier platform. The two contact parts of the carrier platform are respectively attached to the conveying surfaces of the two conveyor belts of the double-row synchronous belt conveyor. Through the conveyance of the double-row synchronous belt conveyor, the carrier platform is conveyed along the extension direction of the carrier conveying streamline 102, thereby passing through the culvert channel of each first simulation demonstration device.

[0054] A proximity sensor group and a wafer carrier blocking module 104 are provided in the culvert channel at the lower portion of the first simulation demonstration device. The proximity sensor group, the wafer carrier blocking module 104 and the wafer carrier 101 are arranged in coordination.

[0055] The proximity sensor assembly and the wafer carrier blocking module 104 are installed on the carrier conveying line 102 .

[0056] After the simulated wafer is transported by the wafer carrier 101 along the carrier transport line 102 to a culvert channel of one of the first simulation demonstration devices, it is stopped by the wafer carrier blocking module 104 .

[0057] As shown in the figure, in this embodiment, the wafer carrier blocking module 104 includes a blocking cylinder 105 and a photoelectric sensor 106. The blocking cylinder 105 is installed between the two synchronous belts of the dual-row synchronous belt conveyor in the carrier conveying line 102. The photoelectric sensor 106 is installed on one side of the dual-row synchronous belt conveyor. When the wafer carrier 101 passes by the photoelectric sensor 106, the sensing end of the photoelectric sensor 106 faces the side of the wafer carrier 101. The control output end of the photoelectric sensor 106 is electrically connected to the control input end of the blocking cylinder 105. When the wafer carrier 101 passes by the photoelectric sensor 106, the sensing end of the photoelectric sensor 106 detects the wafer carrier 101 and activates. The control input end of the blocking cylinder 105 receives the control output of the photoelectric sensor 106, causing the blocking cylinder 105 to activate and extend its cylinder piston. The cylinder piston contacts the front end of the wafer carrier 101 and blocks its continued conveyance.

[0058] In this embodiment, the blocking cylinder 105 and the photoelectric sensor 106 are both arranged in the culvert channel at the bottom of the first simulation demonstration device, and a group of wafer carrier blocking modules 104 are arranged in the culvert channel at the bottom of each first simulation demonstration device, so that the wafer carrier 101 can be blocked when passing through the simulation demonstration device.

[0059] In one embodiment of the present application, the first simulation demonstration device can be a single crystal furnace simulation demonstration device 3. In one embodiment of the present application, the single crystal furnace simulation demonstration device 3 is installed in one of the platform boxes 2.

[0060] In one embodiment of the present application, a single crystal furnace simulation demonstration device 3 simulates the single crystal silicon production process using the Czochralski method. As shown in Figure 7, the single crystal furnace simulation demonstration device 3 includes a hollow housing 301 simulating the appearance of a single crystal furnace. The housing 301 features an LED light strip on the top, simulating the silicon melt being melted within the furnace through the lighting within the furnace. The housing 301 also features an observation window 302, through which light from the LED light strip is emitted.

[0061] The lower portion of the single crystal furnace exterior simulation housing 301 is equipped with a lifting cylinder 303. This lifting cylinder 303 is connected to a single crystal silicon rod simulation 306 installed within the single crystal furnace exterior simulation housing 301. The lifting cylinder 303 propels the single crystal silicon rod simulation 306, causing it to rise and fall within the single crystal furnace exterior simulation housing 301. The lifting cylinder 303 slowly drives the internal single crystal silicon rod simulation 306 upward, simulating the process of pulling single crystal silicon from the melt. Preferably, the lower portion of the single crystal silicon rod simulation 306 is cylindrical, while the upper portion is conical to more realistically simulate the single crystal silicon rod.

[0062] Preferably, a DC motor rotation drive mechanism is connected between the single crystal silicon rod simulator 306 and the lifting cylinder 303 to drive the rotation of the single crystal silicon rod simulator 306. The DC motor rotation drive mechanism includes a DC motor 304 and a fixed plate 305 mounted within the single crystal furnace exterior simulation housing 301. A protruding rotating shaft end is formed at the lower end of the single crystal silicon rod simulator 306. The rotating shaft end of the single crystal silicon rod simulator 306 passes through the fixed plate 305 and is rotatably connected to the fixed plate 305 via a bearing. The rotating shaft end of the single crystal silicon rod simulator 306 is connected to the motor shaft of the DC motor 304 via a coupling.

[0063] The housing of DC motor 304 is fixed relative to the piston end of lifting cylinder 303, and the cylinder body of lifting cylinder 303 is fixed relative to the single crystal furnace appearance simulation shell 301. Guide shafts 307 are provided on both sides of fixing plate 305. The bottom end of the single crystal furnace appearance simulation shell 301 is constructed with a sliding through hole for guide shafts 307 to pass through. Guide shafts 307 slide within the sliding through hole at the bottom end of the single crystal furnace appearance simulation shell 301.

[0064] The piston of the lifting cylinder 303 drives the DC motor 304 and the single crystal silicon rod simulation 306 to rise and fall as a whole. During the process of raising and lowering the DC motor 304 and the single crystal silicon rod simulation 306, the DC motor 304 drives the single crystal silicon rod simulation 306 to rotate synchronously. As a result, the single crystal silicon rod simulation 306 can rise while rotating, thereby more realistically simulating the process of pulling and growing single crystal silicon in a single crystal furnace.

[0065] In one embodiment of the present application, the photolithography simulation demonstration device 4 is installed in one of the platform boxes 2. The photolithography simulation demonstration device 4 includes a photolithography simulation demonstration frame 401 and a photolithography demonstration component.

[0066] The photolithography demonstration assembly includes an optical illumination module 402, a reticle module 403, and an objective lens module 404. These modules are installed sequentially from top to bottom on a photolithography simulation demonstration frame 401. During installation, the modules should be arranged as closely as possible along a longitudinal straight line to ensure smooth light propagation along a pre-set path during the demonstration.

[0067] The optical illumination module 402 has a built-in light, and a light-transmitting portion for the internal light to pass through is provided on the surface of the optical illumination module 402 facing the mask module 403 and the objective lens module 404. During the actual demonstration, when the built-in light of the optical illumination module 402 is turned on, the light from the built-in light passes through the light-transmitting portion at the bottom of the optical illumination module 402 and illuminates the mask of the mask module 403. After passing through the mask, it can also pass through the objective lens module 403, allowing the light beam from the built-in light of the optical illumination module 401 to illuminate the wafer carrier 301, specifically, the wafer on the wafer carrier 301.

[0068] In one embodiment of the present application, the appearance of optical illumination module 402 closely resembles the corresponding structure of a real lithography device. The appearance of optical illumination module 402 simulates the appearance of a real device's lighting system, but with a smaller and simpler design. The internal light source is a spotlight (e.g., a spotlight that emits colored visible light, such as an LED light) that replaces the ultraviolet (UV) and extreme ultraviolet (EUV) light sources found in real lithography devices to ensure safety during the demonstration process. In another embodiment, the appearance and internal structure of optical illumination module 402 can be adaptively adjusted based on actual application requirements, cost requirements, and other factors.

[0069] The built-in lighting of the optical lighting module 402 can be one of a thermal radiation light source (such as an incandescent lamp, a halogen tungsten lamp, etc.), a gas discharge light source (such as a fluorescent lamp, a high-pressure mercury lamp, a metal halide lamp, a high-pressure sodium lamp, etc.), a semiconductor light source (such as an LED lamp), or a combination of two or more. In other embodiments, the built-in lighting of the optical lighting module 402 can be adaptively adjusted based on actual application requirements, cost requirements, etc.

[0070] In one embodiment of the present application, a mask module 403 is installed within one of the platform boxes 2. Mask module 403 is a fixed, position-limited, imitation carrier that can accommodate a 5-inch square mask. The demonstration mask can be a real mask or, to save costs, a 5-inch square acrylic sheet. In another embodiment, the appearance and internal structure of mask module 403 can be adjusted based on actual application requirements and cost requirements.

[0071] Reticle module 403 should contain a mask stage, on which a demonstration mask is mounted. The mask stage has a clamp that mates with the mask to secure it. Furthermore, in this embodiment, the central portion of mask module 403 is partially transparent. The shape of the mask in this application can mimic the form of actual masks used in photolithography.

[0072] In one embodiment of the present application, the appearance design requirements and design ideas of the objective lens module 404 are the same as those of the optical illumination module 402 and the mask module 403, and its appearance is as close as possible to the corresponding structural appearance settings of the real lithography equipment.

[0073] The objective lens module 404 has a second light-transmitting portion in the middle, through which the light beam emitted from the optical illumination module 402 passes. The objective lens module 404 can be a simulation component, simulating the objective lens mechanism of a real lithography machine. The lens barrel is designed to mimic the appearance of a real machine lens barrel in a smaller scale. An acrylic plate is fixed to the top surface of the lens barrel, simulating the lens assembly of a real machine.

[0074] In one embodiment of the present application, a light-transmitting portion with a light-blocking structure at the edge can be provided below the light-transmitting portion of the objective lens module 404, and the light-transmitting opening of the light-transmitting portion is smaller than the light-transmitting opening of the light-transmitting portion of the objective lens module 404, so that the spot size of the light beam irradiated onto the wafer carrier 301 is significantly smaller than the spot size of the light beam passing through the mask module 403, so as to simulate the function of the projection objective lens to reduce the light beam. Preferably, the light-transmitting opening of the light-transmitting portion with a light-blocking structure at the edge can have a square structure to facilitate the simulation of the step-by-step scanning of the wafer during the photolithography process. In one embodiment of the present application, a simulated laser can be fixed below the light-transmitting portion of the objective lens module 404, and the simulated laser can be a spotlight (for example, a spotlight that emits colored visible light). In the present application, the color of the light beam emitted by the simulated laser is the same as the color of the light beam emitted by the built-in light of the optical lighting module 402, and the spot size of the light beam emitted by the simulated laser is significantly smaller than the spot size of the light beam emitted by the built-in light of the optical lighting module 402 (that is, visually, the spot size of the light beam irradiated on the wafer carrier 301 is significantly smaller than the spot size of the light beam passing through the mask module 403). Preferably, the spot of the light beam emitted by the simulated laser can be point-shaped. Therefore, this setting can simulate the light beam in a real machine, which is emitted by the lighting system and irradiated onto the mask, and then passes through the objective lens module to irradiate the reduced light beam onto the wafer. In other words, it can simulate the function of the projection objective lens to reduce the light beam.

[0075] In one embodiment of the present application, a first simulation laser 701 can be provided in the culvert channel at the bottom of the lithography simulation demonstration device 4. The beam irradiation direction of the first simulation laser 701 is toward the wafer carrier, which is used to simulate the interference laser of the real-time measurement of the high-speed motion workbench. In other words, it is used to simulate the interference laser of the real-time measurement of the simulated wafer position information.

[0076] In one of the embodiments of the present application, the above-described simulated laser fixed on the light-transmitting portion of the objective lens module 404 can be arranged in the culvert channel at the bottom of the photolithography simulation demonstration device 4. That is, the simulated laser fixed on the light-transmitting portion of the objective lens module 404 can be a second simulated laser (not shown). The color of the light beam emitted by the second simulated laser is the same as the color of the light beam emitted by the built-in light of the optical illumination module 402, and the spot size of the light beam emitted by the second simulated laser is significantly smaller than the size of the spot of the light beam emitted by the built-in light of the optical illumination module 402. Preferably, the spot of the light beam emitted by the second simulated laser can be point-shaped. By arranging the second simulated laser, it is possible to simulate the light beam in the real machine being emitted by the illumination system and irradiated onto the mask plate, and then reduced after passing through the objective lens module.

[0077] In one embodiment of the present application, an exemplary demonstration process of the lithography simulation demonstration device 4 may be as follows.

[0078] The wafer carrier 101 on the carrier conveying streamline 102 carries the simulated wafer incoming material. When the wafer carrier 101 arrives at the photolithography process, the wafer carrier 101 enters the culvert channel at the bottom and is stopped by the blocking device. At this time, it is determined whether the wafer carrier 101 has reached the predetermined position by whether the light signals of the two photoelectric sensors are blocked. After the judgment is in place, the first simulated laser 701 is turned on to illuminate the wafer carrier 101, simulating the interference laser in the real photolithography machine, which is used to measure the position information of the high-speed motion workbench in real time. Thereafter, the first simulated laser 701 is turned off, and the simulated wafer and wafer carrier 101 are lifted by the slide cylinder lifting device 303. The built-in light inside the optical illumination module 402 is turned on, and the light beam of the built-in light is guided to transmit through the mask. Subsequently, the second laser below the objective lens module 404 emits a point laser to hit the wafer. After the simulated light beam passes through the lens, it is scaled down and mapped onto the wafer (i.e., the exposure process).

[0079] In one embodiment of the present application, during a demonstration, a simulated wafer passes through the photolithography simulation demonstration apparatus 4 and is then transported by a wafer carrier 101 into the etching simulation demonstration apparatus 5 for a simulated etching demonstration. Upon entering the culvert below the etching simulation demonstration apparatus 5, the simulated wafer enters a blind spot. In other words, the culvert below the etching simulation demonstration apparatus 5 is opaque, at least within the viewer's (or learner's) field of view.

[0080] The etching simulation demonstration device 5 includes an etching appearance simulation shell 501. The shape of the etching appearance simulation shell 501 is shown in the figure. The etching appearance simulation shell 501 includes a placement part box (also called "lower box") for placing the first simulated wafer 502 and a light box (also called "upper box") provided on the top surface of the placement part box. The first simulated wafer 502 is placed in the placement part box. The light box has a built-in light. The surface of the light box facing the placement part box is provided with a smoke outlet and a light-transmitting part for the light of the built-in light to pass through. The smoke outlet is connected to a smoke generator through a pipe inside or on the back side of the light box (obstructed area for the observer). During the demonstration, the smoke generator introduces smoke into the smoke outlet so that the smoke is ejected toward the surface of the placement part box to simulate the ignition phenomenon when the plasma is formed in the plasma etching process. The built-in light of the light box irradiates the first simulated wafer 502 to simulate the plasma beam bombarding the wafer.

[0081] In one embodiment of the present application, a first simulated wafer 502 has a plurality of lamp beads arranged in an array, and the arrangement of the lamp beads matches the etching path that needs to be simulated. The surface of the placement part of the etching appearance simulation shell 501 has a first hollow portion for observing the first simulated wafer 502, and a first transparent acrylic plate is attached to the first hollow portion. The surface of the first transparent acrylic plate has an atomizing film that becomes transparent when powered on and becomes atomized when powered off, and the first transparent acrylic plate covers the first hollow portion. During the teaching demonstration, the atomizing film is transparent when powered on and opaque when powered off, so that visitors (learners) cannot directly see the simulated wafer when the display process has not yet demonstrated this process, which can increase the sense of process or mystery.

[0082] During the etching simulation, the lamp beads on the first simulated wafer 502 light up the simulated etching path, and the smoke generator introduces smoke into the smoke outlet so that the smoke is ejected toward the surface of the placement box.

[0083] During the etching simulation, the lamp beads on the first simulated wafer 502 are lit according to a preset pattern, and after lighting, the light brightness gradually changes from dark to bright, and a linear mapping relationship is established between the brightness and the etching depth, and the simulated etching depth is from shallow to deep.

[0084] The demonstration process of the etching simulation demonstration device 5 is as follows:

[0085] After the carrier on the streamline module arrives with wafers, the built-in lights in the housing of the simulated etching shell 501 turn on. The wafer and wafer carrier 101 are hidden within the tunnel of the simulated etching shell 501, entering the blind spot. The atomized film on the first transparent acrylic plate in the first hollowed-out portion is energized, turning transparent. The lighting effects on the first simulated wafer 502 beneath the first transparent acrylic plate turn on, and the smoke generator begins operating. The lights on the first simulated wafer 502 simulate the etching path, and the smoke simulates the plasma ignition phenomenon during plasma etching.

[0086] During the demonstration, after passing through the etching simulation demonstration device 5, the simulated wafer is transported by wafer carrier 101 into the thin film deposition simulation demonstration device 6, which simulates thin film deposition, for a thin film deposition simulation demonstration. When the simulated wafer enters the culvert below the thin film deposition simulation demonstration device 6, it enters a blind spot. In other words, the culvert below the thin film deposition simulation demonstration device 6 is opaque, at least within the viewer's (or learner's) field of view.

[0087] The thin film deposition simulation demonstration device 6 includes a thin film deposition appearance simulation shell 601 .

[0088] The thin film deposition appearance simulation shell 601 includes a light shell (also called "upper shell") located at the top and a thin film deposition shell (also called "lower shell") located below the light shell. A smoke outlet is constructed on the lower surface of the light shell, and the smoke outlet is connected to a smoke generator through a pipe (for example, a hose). The pipe can be set inside the light shell or behind the light shell, as long as it cannot be observed by visitors (or learners) during the demonstration teaching. In this application, the start or stop operation of the smoke generator can be operated manually or automatically by the main control device. The specific operation form can be selected according to the actual demonstration needs. The power on or off operation of the atomizing film can be operated manually or automatically by the main control device. The specific operation form can be selected according to the actual demonstration needs.

[0089] A second simulated wafer 602 is placed in the thin film deposition shell, and the second simulated wafer 602 includes a wafer substrate. In one embodiment of the present application, the second simulated wafer 602 simulates the shape of a real wafer and adopts a circular design. Its edge can have a flat edge shape or a notch shape. In other embodiments of the present application, the wafer substrate can adopt a rectangular, triangular or irregular shaped plate according to actual teaching needs. The lower surface of the light shell can also be constructed with a spotlight light source, which can emit colored visible light. During the teaching demonstration, the spotlight light source can emit colored visible light toward the second simulated wafer 602 to simulate the process of deposition of the vaporized coating material toward the wafer.

[0090] In this application, a second simulated wafer 602 has a plurality of lamp beads arranged in an array. The lamp beads are used to simulate different coating processes. In one embodiment of this application, the lamp beads are LED lamp beads. In other embodiments, the lamp beads can also be other light source devices such as incandescent lamps, halogen lamps, fluorescent lamps, laser lamps, etc., and can be configured and adjusted according to actual teaching needs and usage scenarios.

[0091] In this application, the lighting or shutting down of all lamp beads can be done manually or automatically through the main control device. The specific operation mode can be selected according to the actual demonstration needs.

[0092] In one embodiment of the present application, all the lamp beads are arranged in a rectangular array to simulate different processes of thin film deposition. The second simulated wafer 602 is installed in the thin film deposition housing. The shape of the thin film deposition housing is shown in the figure.

[0093] The upper surface of the thin film deposition housing is constructed with a second hollow portion through which the second simulated wafer 602 can be observed. The thin film deposition housing communicates with the interior of the thin film deposition housing. The second simulated wafer 602 is mounted within the thin film deposition housing, and the second hollow portion is located above the second simulated wafer 602. The second hollow portion is covered with a second transparent acrylic. The surface of the second transparent acrylic has an atomizing film that becomes atomized when the power is off.

[0094] The demonstration process of the thin film deposition demonstration device of the thin film deposition simulation demonstration equipment 6 is as follows.

[0095] Initially, the second transparent acrylic film is powered off, rendering it opaque. The lamps on the second simulated wafer 602 are off. At the start of the demonstration, the film on the second transparent acrylic film is powered on, becoming transparent. The smoke generator begins operating, sending smoke out of the smoke outlet via a pipe. The lighting effect on the second simulated wafer 602 beneath the second transparent acrylic film is activated. The lamps across the entire second simulated wafer 602 are initially lit randomly and evenly (the color of the light matches that emitted by a spotlight source, simulating the deposition of vaporized coating material onto the wafer). Over time, the number of illuminated lamps increases, gradually forming a continuous pattern until all of them are connected. This process simulates the formation of isolated crystal nuclei and their gradual connection to form a continuous film. After illumination, the light intensity is adjusted using a potentiometer resistor, with a synchronized gradient across the entire region (from dark to bright). A linear mapping relationship is established between brightness and deposition thickness, simulating a gradual increase in deposition thickness.

[0096] In one embodiment of the present application, during a demonstration, a simulated wafer passes through the thin film deposition simulation demonstration apparatus 6 and is then transported by a wafer carrier 101 into the ion implantation simulation demonstration apparatus 7 for simulating wafer thin film deposition, where an ion implantation simulation demonstration is performed. Upon entering the culvert below the ion implantation simulation demonstration apparatus 7, the simulated wafer enters a blind spot. In other words, the culvert below the ion implantation simulation demonstration apparatus 7 is opaque, at least within the viewer's (or learner's) field of view.

[0097] In one embodiment of the present application, the ion implantation simulation demonstration device 7 is installed in one of the platform boxes 2. The ion implantation simulation demonstration device 7 includes an ion implantation appearance simulation housing 701.

[0098] The ion implantation appearance simulation housing 701 contains a third simulated wafer 702, on which a plurality of array-arranged lamp beads are disposed. The surface of the ion implantation appearance simulation housing 701 has a third hollow portion through which the third simulated wafer 702 can be observed.

[0099] During the ion implantation simulation, the lamp beads on the third simulated wafer 702 are lit to simulate the ion implantation process.

[0100] The third hollow portion of the ion implantation appearance simulation housing 701 is covered with a third transparent acrylic, and the surface of the third transparent acrylic has an atomized film that is atomized when the power is off. The atomized film on the transparent acrylic becomes transparent when the power is on.

[0101] The ion implantation simulation housing 701 includes a rotating platform 703, on which a third simulated wafer 702 is mounted. A rotational power unit for the ion implantation wafer is installed within the ion implantation simulation housing 701 to drive the rotational platform 703. In one embodiment of the present application, the rotational power unit can be a pneumatic motor. In another embodiment of the present application, the rotational power unit can be an electric motor, a hydraulic motor, or other rotational power output device.

[0102] In one embodiment of the present application, during the demonstration process, after the wafer passes through the ion implantation simulation demonstration device 7, it is transported by the wafer carrier 101 into the polishing simulation demonstration device 8 that simulates chemical mechanical polishing for chemical mechanical polishing simulation demonstration.

[0103] In one embodiment of the present application, a polishing simulation demonstration device 8 is installed within one of the platform housings 2. The polishing simulation demonstration device 8 includes a polishing table 801, a simulated polishing head assembly, and a simulated polishing liquid system. A simulated polishing pad 802 is located on top of the polishing table 801. The simulated polishing head assembly includes a simulated polishing head 803, which is positioned above the simulated polishing pad 802. A rotary cylinder is connected to the simulated polishing head 803, which provides rotational power for the simulated polishing head 803.

[0104] The simulated polishing liquid system includes a water tank 804 and a dripping tube 805. The dripping tube 805 is connected to the water tank 804 via a pipeline, and the liquid outlet of the dripping tube 805 is located on one side of the simulated polishing head 803. A dripping pump is provided between the dripping tube 805 and the water tank 804 to pump liquid from the water tank 804 to the dripping tube 805.

[0105] The operating process of polishing simulation demonstration device 8 includes the following: After simulated polishing begins, the drip pump begins operating, dripping liquid through the drip tube onto the surface of simulated polishing pad 802, simulating the process of chemical polishing liquid dripping. A rotary cylinder drives the simulated polishing head 803 to rotate, simulating the chemical mechanical polishing process of a wafer being driven by the polishing head onto a polishing pad dripped with simulated chemical polishing liquid (e.g., water) during the CMP process.

[0106] In one embodiment of the present application, a wafer loading simulation demonstration device is provided between the single crystal furnace simulation demonstration device 3 and the photolithography simulation demonstration device 4. The wafer loading simulation demonstration device is used to simulate the process of taking the wafer out of the silo and placing it on the production line. The wafer loading simulation demonstration device corresponds to the second simulation demonstration device described above. Figure 8 and Figure 9 The wafer loading simulation demonstration device includes a wafer cassette 901 and a wafer robot. The wafer cassette 901 has an internal cavity with an opening. Multiple holding slots are provided on the sidewalls of the internal cavity of the wafer cassette 901. After a simulated wafer is inserted into the wafer cassette 901, both sides of the simulated wafer are inserted into the holding slots. Adjacent simulated wafers are spaced apart to facilitate removal of the simulated wafers by the wafer robot.

[0107] The wafer robot arm is arranged at the initial end of the carrier conveying line 102. The wafer robot arm includes a rotary cylinder 902, a primary cylinder 903, a secondary cylinder 904, a lifting cylinder 905 and a wafer material fork 906.

[0108] The cylinder body of the primary cylinder 903 is connected to the power output of the rotary cylinder 902, and the cylinder body of the primary cylinder 903 is driven by the rotary cylinder 902 to rotate. The cylinder body of the secondary cylinder 904 is fixed to the piston end of the primary cylinder 903, and the cylinder body of the lifting cylinder 905 is fixed to the piston end of the secondary cylinder 904. The pistons of the secondary cylinder 904 and the primary cylinder 903 move in the same direction. The wafer fork 906 is a U-shaped fork fixed to the piston end of the lifting cylinder 905. The piston of the lifting cylinder 905 moves perpendicularly to the piston of the secondary cylinder 904. The wafer fork 906 is equipped with multiple vacuum suction heads, each of which is connected to a vacuum pump.

[0109] After the demonstration starts, in the initial state, the wafer material fork 906 is located above the wafer carrier 101, the first-level cylinder 903 rotates 90° to drive the wafer material fork 906 to rotate 90°, the pistons of the first-level cylinder 903 and the second-level cylinder 904 extend in turn, the piston of the lifting cylinder 905 retracts, the vacuum pump of the wafer material fork 906 is turned on, the pistons of the first-level cylinder 903 and the second-level cylinder 904 retract, the rotating cylinder 902 rotates 90°, the first-level cylinder 903 extends, the vacuum pump of the wafer material fork 906 is turned off, and the lifting cylinder 905 extends, thereby placing the simulated wafer in the shelf slot at the predetermined position of the wafer material box 901 onto the wafer carrier 101, and the first-level cylinder 903 retracts to reach the waiting position.

[0110] The chip manufacturing demonstration platform of the present application may further include a wafer test simulation device and a microscope simulation device located along the streamline module after the polishing simulation demonstration device 8. The wafer test simulation device and the microscope simulation device may correspond to the first simulation demonstration device.

[0111] refer to Figure 17 The wafer test simulation equipment includes a wafer test simulation shell 1001, the top of the wafer test simulation shell 1001 is provided with an illumination light, and the wafer test simulation shell 1001 is provided with a test bench 1002, a single-axis manipulator 1003 and a slide cylinder 1004. The power output end of the single-axis manipulator 1003 and the power output end of the slide cylinder 1004 are respectively connected to the test bench 1002. Although not shown, a culvert channel for the streamline module to pass through is constructed at the lower part of the wafer test simulation shell 1001. The area on the upper surface of the culvert channel corresponding to the test bench 1002 can be transparent, so that the viewer can observe the simulated wafer from top to bottom when the test bench 1002 moves left and right. Preferably, a real wafer can be placed on the transparent part of the upper surface of the culvert channel to simulate the wafer test more realistically.

[0112] During the simulation demonstration, after the wafer carrier 101 of the streamline module carries the simulated wafer, the lighting on the top of the wafer test simulation shell 1001 is turned on to indicate that the wafer test simulation equipment starts working and enters the test phase. The single-axis manipulator 1003 drives the test table 1002 to descend, and the slide cylinder 1004 drives the test table 1002 to move forward, backward, left and right to simulate the chip test action.

[0113] refer to Figure 18 , the microscope simulation device is used to simulate the final wafer structure after the test wafer completes each process. The microscope simulation device includes a microscope simulation stand 1101, a simulated electron microscope 1102 and a display screen 1103, and the simulated electron microscope 1102 is fixed on the microscope simulation stand 1101. Although not shown, a culvert channel for the streamline module to pass through is constructed at the lower part of the microscope simulation stand 1101. The area on the upper surface of the culvert channel corresponding to the simulated electron microscope 1102 can be transparent, so that the viewer can observe the simulated wafer from top to bottom. Preferably, a real wafer can be placed on the transparent part of the upper surface of the culvert channel to more realistically simulate surface structure detection.

[0114] During the simulation demonstration, after the wafer carrier 101 of the streamline module carries the incoming wafer, the simulated electron microscope 1102 is located above the wafer, and the display screen 1103 simulates and magnifies the final wafer structure after the wafer completes each processing step.

[0115] The demonstration platform of this application can be provided with reset, single-step cycle, automatic operation and emergency stop functions.

[0116] The reset function means that after the device is turned on or restarted during emergency stop, you need to click the reset button to return all modules to their initial positions before continuing the program.

[0117] The meaning of single-step loop is: when you click the single-step loop button corresponding to the current demonstration step, this process will be demonstrated in a loop until you click the single-step loop again to release the loop. The demonstration platform can also proceed to the next process according to the program.

[0118] The meaning of automatic operation is: after the device is turned on and reset, click automatic operation, the demonstration platform can fully demonstrate the entire process and return to the initial state;

[0119] The meaning of the emergency stop function is: when the equipment is running, if there is a special situation, you can press the emergency stop button, and the equipment will quickly cut off the power supply to stop.

[0120] Of course, the above description is not a limitation of the present application, and the present application is not limited to the above examples. Any changes, modifications, additions or substitutions made by ordinary technicians in this technical field within the essential scope of the present application should fall within the scope of protection of the present application.

Claims

1. A chip manufacturing demonstration platform, comprising a demonstration equipment group, wherein the demonstration equipment group includes a plurality of simulation demonstration devices, and all simulation demonstration devices are arranged in sequence and spaced apart; characterized in that: Also includes streamlined modules; The streamline module comprises a wafer carrier (101) for conveying simulated wafers and a carrier conveying streamline (102) for conveying the wafer carrier (101); the wafer carrier (101) is arranged on the carrier conveying streamline (102) and moves along the conveying direction of the carrier conveying streamline (102); the conveying direction of the carrier conveying streamline (102) is consistent with the arrangement direction of all the simulation demonstration equipment; The multiple simulation demonstration devices include multiple first simulation demonstration devices and at least one second simulation demonstration device, wherein a culvert channel for the streamline module to pass through is constructed at the bottom of the first simulation demonstration device, and the culvert channels at the bottom of all the first simulation demonstration devices are arranged along a straight line, the streamline module passes through the culvert channels of all the first simulation demonstration devices and the wafer carrier (101) is transported in the culvert channel, and the second simulation demonstration device does not have a culvert channel for the streamline module to pass through at the bottom.

2. The chip manufacturing demonstration platform according to claim 1, characterized in that: It also includes a plurality of platform boxes (2), all of which are arranged in sequence in a straight line; all simulation demonstration devices of the demonstration device group are respectively arranged in the platform boxes (2), and at least one simulation demonstration device is arranged in each platform box (2); A window for displaying simulation demonstration equipment is constructed on the front face of the platform box (2).

3. The chip manufacturing demonstration platform according to claim 1, characterized in that: The carrier conveying streamline (102) includes a plurality of double-row synchronous belt conveyors, the wafer carrier (101) has a carrier platform, and the lower portion of the carrier platform has a contact portion that contacts the conveying surface of the double-row synchronous belt conveyors; All double-row synchronous belt conveyors of the carrier conveying streamline (102) are connected end to end to form a continuous conveying streamline equipment; A proximity sensor group and a wafer carrier blocking module (104) are provided in the culvert channel at the lower portion of the first simulation demonstration device, and the proximity sensor group, the wafer carrier blocking module (104) and the wafer carrier (101) are arranged in coordination; The proximity sensor group and the wafer carrier blocking module (104) are installed on the carrier conveying flow line (102); After the simulated wafer is transported along the carrier transport streamline (102) to a culvert channel of a first simulation demonstration device among the plurality of first simulation demonstration devices by the wafer carrier (101), it is stopped by the wafer carrier blocking module (104).

4. The chip manufacturing demonstration platform according to claim 1, characterized in that: One of the at least one second simulation demonstration device is a wafer loading simulation demonstration device; The wafer loading simulation demonstration device comprises a wafer cassette (901) and a wafer robotic arm; the wafer cassette (901) has an internal cavity with an opening, and a plurality of shelf slots are respectively provided on the side walls on both sides of the internal cavity of the wafer cassette (901); The wafer robot arm is arranged at the initial end of the carrier conveying streamline (102); the wafer robot arm comprises a rotary cylinder (902), a primary cylinder (903), a secondary cylinder (904), a lifting cylinder (905) and a wafer material fork (906); The cylinder body of the primary cylinder (903) is connected to the power output end of the rotating cylinder (902), the cylinder body of the secondary cylinder (904) is fixed to the piston end of the primary cylinder (903), the cylinder body of the lifting cylinder (905) is fixed to the piston end of the secondary cylinder (904), and the piston movement directions of the secondary cylinder (904) and the primary cylinder (903) are consistent; The wafer material fork (906) is a U-shaped fork, and the wafer material fork (906) is fixed to the piston end of the lifting cylinder (905). The piston movement direction of the lifting cylinder (905) is perpendicular to the piston movement direction of the secondary cylinder (904).

5. The chip manufacturing demonstration platform according to claim 1, characterized in that: One of the at least one second simulation demonstration device is a single crystal furnace simulation demonstration device (3) for simulating the generation of single crystal silicon rods; The single crystal furnace simulation demonstration device (3) comprises a single crystal furnace appearance simulation shell (301), wherein the single crystal furnace appearance simulation shell (301) is hollow inside and has an LED light bar on the top; and an observation window (302) is provided on the surface of the single crystal furnace appearance simulation shell (301); The lower part of the single crystal furnace appearance simulation shell (301) is provided with a lifting cylinder (303), and the lifting cylinder (303) is connected to a single crystal silicon rod simulation part installed inside the single crystal furnace appearance simulation shell (301); the lifting cylinder (303) pushes the single crystal silicon rod simulation part to move up and down inside the single crystal furnace appearance simulation shell (301).

6. The chip manufacturing demonstration platform according to claim 1, characterized in that: One of the plurality of first simulation demonstration devices is a lithography simulation demonstration device (4) for simulating lithography; The photolithography simulation demonstration device (4) comprises a photolithography simulation demonstration frame (401), an optical illumination module (402), a mask module (403), and an objective lens module (404) which are sequentially arranged on the photolithography simulation demonstration frame (401) from top to bottom; The optical lighting module (402) has a built-in light inside, and a first light-transmitting portion for the built-in light to pass through is provided on the surface of the optical lighting module (402) facing the mask module (403) and the objective lens module (404); The middle portion of the objective lens module (404) has a second light-transmitting portion for the light beam emitted by the optical lighting module (401) to pass through the objective lens module (404); The spot size of the light beam irradiated on the wafer carrier is smaller than the spot size of the light beam irradiated from the optical illumination module through the first light-transmitting portion of the mask module.

7. The chip manufacturing demonstration platform according to claim 1, characterized in that: One of the plurality of first simulation demonstration devices is an etching simulation demonstration device (5) for simulating etching; The etching simulation demonstration device (5) comprises an etching appearance simulation shell (501), the etching appearance simulation shell (501) comprising a lower box body on which a first simulation wafer (502) is placed and an upper box body arranged on the top surface of the lower box body; the first simulation wafer (502) is provided with a plurality of lamp beads arranged in an array; the upper surface of the etching appearance simulation shell (501) has a first hollow portion capable of observing the first simulation wafer (502); the lower surface of the upper box body is provided with a smoke outlet, and the smoke outlet is connected to a smoke generator via a pipeline; During etching simulation, the lamp beads on the first simulated wafer (502) light up the simulated etching path, and the smoke generator introduces smoke into the smoke outlet so that the smoke is ejected toward the top surface of the lower box to simulate the ignition state of the plasma generation process during plasma etching.

8. The chip manufacturing demonstration platform according to claim 1, characterized in that: One of the plurality of first simulation demonstration devices is a thin film deposition simulation demonstration device (6) for simulating thin film deposition; The thin film deposition simulation demonstration device (6) comprises a thin film deposition appearance simulation shell (601), the thin film deposition appearance simulation shell (601) comprising a lower shell on which a second simulation wafer (602) is placed and an upper shell located above the lower shell, the second simulation wafer (602) having a plurality of lamp beads arranged in an array; the upper surface of the thin film deposition appearance simulation shell (601) having a second hollow portion capable of observing the second simulation wafer (602); the lower surface of the upper shell being provided with a smoke outlet, the smoke outlet being connected to a smoke generator via a pipeline; During the thin film deposition simulation, the lamp beads on the second simulated wafer (602) are lit to simulate the coating process, and the smoke generator introduces smoke into the smoke outlet so that the smoke is ejected toward the upper surface of the lower shell to simulate the process of gas ionization to form a stable plasma; The second hollow portion of the thin film deposition appearance simulation shell (601) is covered with a second transparent acrylic, and the surface of the second transparent acrylic has an atomized film that is in an atomized state when the power is off and in a transparent state when the power is on.

9. The chip manufacturing demonstration platform according to claim 1, characterized in that: One of the plurality of first simulation demonstration devices is an ion implantation simulation demonstration device (7) for simulating ion implantation; The ion implantation simulation demonstration device (7) comprises an ion implantation appearance simulation housing (701); a third simulation wafer (702) is provided in the ion implantation appearance simulation housing (701); a plurality of lamp beads arranged in an array are provided on the third simulation wafer (702); and a third hollow portion is provided on the upper surface of the ion implantation appearance simulation housing (701) for observing the third simulation wafer (702); During the ion implantation simulation, the lamp beads on the third simulated wafer (702) are lit to simulate the coating process; The third hollow portion of the ion implantation appearance simulation housing (701) is covered with a third transparent acrylic, and the surface of the third transparent acrylic has an atomizing film that is in an atomized state when the power is off and in a transparent state when the power is on; The ion implantation appearance simulation shell (701) has a rotating platform (703) therein, and the third simulated wafer (702) is mounted on the rotating platform (703); and the ion implantation appearance simulation shell (701) has an ion implantation wafer rotating power device installed therein for driving the rotating platform to rotate.

10. The chip manufacturing demonstration platform according to claim 1, characterized in that: One of the plurality of first simulation demonstration devices is a polishing simulation demonstration device (8) for simulating chemical mechanical polishing; The polishing simulation demonstration device (8) comprises a polishing table (801), a polishing head simulation component and a simulated polishing liquid system; the top of the polishing table (801) is provided with a simulated polishing pad (802); the polishing head simulation component is provided with a simulated polishing head (803), and the simulated polishing head (803) is located above the simulated polishing pad (802); The simulated polishing liquid system comprises a water tank (804) and a dripping tube (805); the dripping tube (805) is connected to the water tank (804) via a pipeline, and the liquid outlet end of the dripping tube (805) is located on one side of the simulated polishing head (803).

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