Solar cell and photovoltaic module

Abstract

The application relates to the technical field of photovoltaic power generation, in particular to a solar cell and a photovoltaic module. The solar cell comprises a substrate, a patterned doped silicon layer, a passivation layer and an electrode, and the doped silicon layer is located between the substrate and the passivation layer. The doped silicon layer comprises a first sub-layer with a first thickness and a second sub-layer with a second thickness which are connected along a first direction, the first thickness is greater than the second thickness, and the second thickness is greater than or equal to 0 mu m. The intersection of the first sub-layer and the second sub-layer is a projection on the substrate, which is a boundary line, the boundary line comprises a plurality of connected units, the units comprise convex units and / or concave units; the convex units are convex in the second direction, and the convex shape of the convex units is a non-sharp-angle shape; the concave units are concave in the second direction, and the concave shape of the concave units is a non-sharp-angle shape; the second direction intersects the length direction of the electrode; and the electrode passes through the passivation layer and is in contact with the first sub-layer.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of photovoltaic power generation, and in particular to a solar cell and a photovoltaic module. BACKGROUND

[0002] In a solar cell, a doped silicon layer is made into a patterned structure, which is beneficial to reducing the parasitic absorption problem caused by the doped silicon layer, but is prone to new problems caused by subsequent sintering electrode operations, including: easily leading to microcracks of the structure (such as the edges of the above patterned structure or other film layers subsequently made), and easily leading to undesirable splashing of electrode paste and burning through the film layer, which aggravates the formation of recombination centers, affects the passivation performance of the solar cell, and further makes it difficult for the solar cell to stably improve the efficiency. SUMMARY

[0003] To solve the above technical problems, the present application discloses a solar cell and a photovoltaic module, which can not only alleviate the microcrack problem of the structure in the solar cell, but also reduce the undesirable splashing of the electrode paste, so as to realize the purpose of stably improving the photoelectric conversion efficiency and other performances of the solar cell.

[0004] In a first aspect, the present application provides a solar cell, comprising:

[0005] a substrate;

[0006] a patterned doped silicon layer arranged on a surface of the substrate; wherein the doped silicon layer comprises a first sub-layer with a first thickness and a second sub-layer with a second thickness arranged in a first direction, the first thickness is greater than the second thickness, and the second thickness is greater than or equal to 0 μm; the first direction is a planar direction of the substrate;

[0007] a passivation layer arranged on the surface of the substrate, and the doped silicon layer is located between the substrate and the passivation layer;

[0008] an electrode, the electrode passes through the passivation layer and is in contact with the first sub-layer;

[0009] wherein the intersection of the first sub-layer and the second sub-layer is a normal projection on the substrate, the normal projection comprises a plurality of connected units, and the units comprise convex units and / or concave units; when the normal projection comprises the convex units, the convex direction of the convex units is along a second direction, and the convex shape of the convex units is a non-sharp angle shape; when the normal projection comprises the concave units, the concave direction of the concave units is along the second direction, and the concave shape of the concave units is a non-sharp angle shape; the second direction is a direction intersecting the length direction of the electrode.

[0010] Optionally, at least one of an arc shape, a trapezoidal shape, a rectangular shape, or a special shape, wherein the special shape comprises a curved segment and an oblique segment connected to each other.

[0011] Preferably, the shape of the unit comprises the special shape, wherein an included angle between the oblique segment and a length direction of the electrode is α, and 0°≤α≤45°.

[0012] Further, for any unit of the demarcation line, a maximum distance between the unit and the electrode is L1, and a minimum distance between the unit and the electrode is L2, and 1 μm≤L1-L2≤250 μm.

[0013] Further, 10 μm≤L1≤500 μm.

[0014] Further, the demarcation line comprises a first demarcation line and a second demarcation line located on two sides of any electrode, and the first demarcation line and the second demarcation line are symmetrically arranged or asymmetrically arranged.

[0015] Further, the demarcation line comprises a plurality of units arranged in a periodic manner or a plurality of units arranged in an irregular manner.

[0016] Further, the demarcation line comprises a first demarcation line and a second demarcation line located on two sides of any electrode, and the first demarcation line and the second demarcation line are asymmetrically arranged; the unit comprises a first unit located on the first demarcation line and a second unit located on the second demarcation line.

[0017] A span between two farthest points of the first unit in a length direction of the electrode is L3, and 50 μm≤L3≤700 μm; a span between two farthest points of the second unit in the length direction of the electrode is L4, and 20 μm≤L4≤700 μm.

[0018] Preferably, 100 μm≤L4≤500 μm.

[0019] Further, L3≥L4.

[0020] Further, the second thickness is 0 μm.

[0021] Further, the unit is a convex unit or a concave unit.

[0022] Further, the second direction is perpendicular to the length direction of the electrode.

[0023] Further, the surface of the substrate has a first surface texturing structure corresponding to the region of the first sub-layer, the first surface texturing structure comprising at least one of a pyramid structure, a pyramid base structure, and a prismatic structure; and the surface of the substrate has a second surface texturing structure corresponding to the region of the second sub-layer, the second surface texturing structure comprising at least one of a pyramid structure, a pyramid base structure, and a prismatic structure.

[0024] Further, the doped silicon layer is disposed on a back surface of the substrate, and the doped silicon layer is a doped polysilicon layer; and the solar cell further comprises a dielectric layer disposed between the substrate and the doped silicon layer.

[0025] Further, the doped silicon layer comprises an N-type doped silicon layer and a P-type doped silicon layer disposed on a back surface of the substrate, and the N-type doped silicon layer and the P-type doped silicon layer are separated by an isolation region; and the electrode comprises a first electrode and a second electrode, the first electrode being in contact with the N-type doped silicon layer through the passivation layer, and the second electrode being in contact with the P-type doped silicon layer through the passivation layer.

[0026] In a second aspect, an embodiment of the present application provides a photovoltaic module, comprising the solar cell according to the first aspect.

[0027] Compared with the prior art, the present application has at least the following beneficial effects:

[0028] The solar cell according to the embodiments of the present application can not only alleviate the micro-crack problem of the structure in the solar cell, but also reduce the undesirable splashing of the electrode paste, thereby achieving the purpose of stably improving the photoelectric conversion efficiency and other performances of the solar cell.

[0029] Firstly, the solar cell according to the embodiments of the present application reduces the amount of the doped silicon layer by using a patterned doped silicon layer, thereby reducing the parasitic absorption problem caused by this material. Especially when the second sub-layer of the doped silicon layer is completely removed, the parasitic absorption is improved more significantly due to the large reduction in the setting area of the doped silicon layer.

[0030] Secondly, on the basis of setting the patterned doped silicon layer to improve the parasitic absorption, in order to simultaneously improve the resistance of this structure to thermal stress, the embodiments of the present application improve the structure characteristics of the division line between the first sub-layer and the second sub-layer, so that the division line is changed from the original straight line parallel to the length direction of the electrode to the division line with a convex unit and / or a concave unit and a non-sharp angle shape according to the present application. This special-shaped division line can effectively alleviate the influence of thermal stress in the solar cell manufacturing process and improve the resistance to thermal stress.

[0031] Finally, the application adopts a boundary line with protruding units and / or recessed units different from the length direction of the electrode, which can better balance the setting area of the first sub-layer and the distance between the edge (i.e. the boundary line) of the first sub-layer and the electrode, which helps to better balance the reduction of parasitic absorption and the reduction of the probability of electrode paste splashing onto the area where the second sub-layer is located. BRIEF DESCRIPTION OF DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiments will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0033] Figure 1 is a top view (partial schematic view) of a solar cell with a patterned doped silicon layer;

[0034] Figure 2 is a structural schematic diagram of a solar cell according to an embodiment of the present application;

[0035] Figure 3 is a structural schematic diagram of another solar cell according to an embodiment of the present application;

[0036] Figure 4 is Figure 3 shows a top view (partial schematic) of a solar cell;

[0037] Figure 5 is a deformed structure of the boundary line in the solar cell according to an embodiment of the present application;

[0038] Figure 6 is a schematic diagram showing the influence of adjusting the position of the boundary line on paste splashing when the boundary line is in a straight line shape;

[0039] Figure 7 is a schematic diagram showing the influence of the boundary line according to an embodiment of the present application on paste splashing;

[0040] Figure 8 is a structural schematic diagram of a boundary line according to an embodiment of the present application;

[0041] Figure 9 is Figure 8 is an enlarged schematic diagram of the structure at A in FIG. 8;

[0042] Figure 10 is a structural schematic diagram of another boundary line according to an embodiment of the present application;

[0043] Figure 11 is a structural schematic diagram of another solar cell according to an embodiment of the present application;

[0044] Figure 12 is a structural schematic diagram of a photovoltaic module according to an embodiment of the present application;

[0045] Figure 13 is a Zeta 3D microscope image (partial top view) of a solar cell according to Embodiment 1 of the present application;

[0046] Figure 14 is a Zeta 3D microscope image (partial top view) of a solar cell according to Embodiment 2 of the present application.

[0047] Legend of reference signs:

[0048] 1, substrate; 2, doped silicon layer; 21, first sub-layer; 22, second sub-layer; 23, N-type doped silicon layer; 24, P-type doped silicon layer; 3, passivation layer; 4, electrode; 41, first electrode; 42, second electrode; 43, light-receiving surface electrode; 5, dielectric layer; 6, emitter; 7, light-receiving surface functional layer; 71, light-receiving surface passivation layer; 72, light-receiving surface anti-reflection layer;

[0049] 10, boundary line; 11, unit; 111, convex unit; 112, concave unit; 11A, curved segment; 11B, oblique segment; 101, first boundary line; 102, second boundary line; 1011, first unit; 1012, second unit;

[0050] 100, solar cell; 200, solder strip. DETAILED DESCRIPTION

[0051] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work are within the scope of protection of the present application.

[0052] In the present application, the terms "upper", "lower", "left", "right", "front", "back", "top", "bottom", "inner", "outer", "vertical", "horizontal", "lateral", "longitudinal", and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. These terms are mainly used for better description of the present application and its embodiments, and are not used to limit the indicated devices, elements or components to have a specific orientation, or to be constructed and operated in a specific orientation.

[0053] In addition, the above-mentioned partial terms can be used to represent other meanings in addition to the orientation or positional relationship, for example, the term "upper" can also be used to represent a certain dependent relationship or connection relationship in some cases. For those skilled in the art, the specific meanings of these terms in this application can be understood according to the specific circumstances.

[0054] In addition, the terms "mount", "set", "provided with", "connected", "connected" should be broadly understood. For example, it can be a fixed connection, a detachable connection, or a monolithic structure; it can be a mechanical connection, or an electrical connection; it can be directly connected, or indirectly connected through an intermediate medium, or internal communication between two devices, elements or components. For those skilled in the art, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0055] In addition, the terms "first", "second", etc. are mainly used to distinguish different devices, elements or components (the specific types and structures may be the same or different), and are not intended to indicate or imply the relative importance and quantity of the indicated devices, elements or components. Unless otherwise stated, the meaning of "multiple" is two or more.

[0056] In a solar cell, the doped silicon layer (such as a doped polysilicon layer, etc.) has a certain parasitic absorption problem, which affects the absorption and utilization of light. Although the setting area of the doped silicon layer can be reduced by using a patterned doped silicon layer in order to reduce parasitic absorption and achieve the purpose of improving the efficiency of the solar cell, in fact, the setting of such a structure will bring new problems, so that reducing parasitic absorption cannot effectively help the solar cell to improve the efficiency stably.

[0057] This is because after the patterned doped silicon layer is provided, the surface of the solar cell will form a stepped structure, and the edge profile of the stepped structure is a straight line shape, and such a straight line shape of the edge profile has poor resistance to thermal stress generated in the subsequent high-temperature process of the solar cell.

[0058] For example, the doped silicon layer 1 is provided on the surface of the solar cell 2, and the doped silicon layer 1 is patterned to form a plurality of doped silicon layer 1a and a plurality of doped silicon layer 1b. The doped silicon layer 1a is provided on the surface of the solar cell 2, and the doped silicon layer 1b is provided on the surface of the doped silicon layer 1a. Figure 1As shown, it is a top view (partial schematic view) of a solar cell with a patterned doped silicon layer. In the solar cell, the boundary 10 between the region provided with the doped silicon layer 2 and the region not provided with the doped silicon layer 2 (i.e. the edge profile of the step-like structure) is a straight line parallel to the length direction of the electrode 4. After the preparation of such a patterned doped silicon layer 2, a series of high-temperature processes need to be further carried out, such as the preparation of a passivation layer (the preparation temperature can be as high as 500°C or above) on the basis of the doped silicon layer 2, and the sintering of the electrode (the sintering temperature can be as high as 800°C or above). The high-temperature conditions of these processes will generate certain thermal stress at the position of the step-like structure, and the position of the straight boundary 10 has poor resistance to such thermal stress, which causes the related structures, the passivation layer, etc. at the position of the boundary 10 to easily crack, thereby generating new recombination centers, deteriorating the passivation performance, and reducing the photoelectric conversion efficiency of the solar cell.

[0059] In addition, unlike the provision of a full-surface doped silicon layer 2 on the substrate, when a patterned doped silicon layer 2 is used, although the less the area of the doped silicon layer 2, the less the parasitic absorption, it also means that when the electrode 4 is prepared on the small-area doped silicon layer 2, the electrode paste is more likely to splash to other regions. For example Figure 1 As shown, the electrode 4 is only provided in the region provided with the doped silicon layer 2, and the less the doped silicon layer 2, the more likely the electrode paste to randomly splash to the region not provided with the doped silicon layer 2 when the electrode 4 is prepared, causing the passivation layer 3 in the splashing region to be burned through by the electrode paste. This also causes the passivation performance to deteriorate, and the photoelectric conversion efficiency of the solar cell to reduce.

[0060] Therefore, it can be seen that not only the provision of a patterned doped silicon layer can effectively improve the photoelectric conversion efficiency of the solar cell, but also the influence caused by the thermal stress and the non-ideal splashing of the electrode paste needs to be further reduced on this basis. In this way, the solar cell with a patterned doped silicon layer can be stably improved in efficiency.

[0061] Based on the above analysis, combined with Figure 2 and Figure 3 As shown, the present application provides a solar cell 100, which comprises a substrate 1, a patterned doped silicon layer 2, a passivation layer 3 and an electrode 4, the patterned doped silicon layer 2 is arranged between the substrate 1 and the passivation layer 3, and the electrode 4 contacts the doped silicon layer 2 through the passivation layer 3.

[0062] Among them, the patterned doped silicon layer 2 is arranged on the surface of the substrate 1, the doped silicon layer 2 comprises a first sub-layer 21 with a first thickness and a second sub-layer 22 with a second thickness which are arranged in a first direction, the first thickness is greater than the second thickness, and the second thickness is greater than or equal to 0 μm; the first direction is the planar direction of the substrate 1.

[0063] It is understandable that a patterned doped silicon layer 2 refers to patterning the entire doped silicon layer 2, causing local areas of the doped silicon layer 2 to be thinned or removed, so that the doped silicon layer 2 exhibits a film layer with certain patterned characteristics. In this patterned doped silicon layer 2, whether a local area is thinned or removed, it helps to reduce the parasitic absorption of the doped silicon layer 2, and will also form a step-like structure between the untreated area and the patterned area of ​​the doped silicon layer 2.

[0064] In one alternative implementation, see [reference] Figure 2 As shown, the patterned doped silicon layer 2 includes a first sublayer 21 and a second sublayer 22 connected along a first direction, and the thickness of the first sublayer 21 is greater than the thickness of the second sublayer 22. In this embodiment, the patterned doped silicon layer 2 can be obtained by partially thinning a local area of ​​the entire doped silicon layer 2, with the unthinned portion serving as the first sublayer 21 and the thinned portion serving as the second sublayer 22, thereby forming a doped silicon layer 2 with different thicknesses in the first direction (i.e., the plane direction of the substrate 1), thus exhibiting patterned characteristics. In this embodiment, the second sublayer 22 is partially removed, which helps to reduce the risk of burn-through of the passivation layer 3 due to imperfect sputtering of the electrode paste, and also plays a certain role in reducing parasitic absorption. In another optional embodiment, combined with Figure 3 As shown, the patterned doped silicon layer 2 includes only the first sublayer 21, and the second sublayer 22 has a second thickness of 0 μm, meaning that the second sublayer 22 is completely removed. In this embodiment, since the second sublayer 22 is completely removed, the reduction effect of parasitic absorption is more significant.

[0065] Among them, further integration Figure 4 and Figure 5 As shown, Figure 4 yes Figure 3 The diagram shows a top view of the solar cell 100, and only a partial area is shown for clarity of the relevant structures. Figure 5 This application shows some modified structures of the boundary line 10 in the solar cell 100 according to an embodiment of the present application. Figure 5 (a) is a schematic diagram of two side boundary lines 10 being arc-shaped protruding units 111. Figure 5 (b) is a schematic diagram showing that the two dividing lines 10 are respectively an arc-shaped protruding unit 111 and an arc-shaped recessed unit 112. Figure 5 (c) is a schematic diagram of the two side dividing lines 10 being arc-shaped protruding units 111, and Figure 5 (c) and Figure 5 The difference in (a) is that Figure 5 (c) has a higher degree of protrusion in the protrusion unit 111. Figure 5 (d) is a schematic diagram of the two dividing lines 10 being trapezoidal protruding units 111.Figure 5 (e) is a schematic view of the unit 11 with the profiled shape on both sides of the boundary line 10. The orthographic projection of the intersection between the first sub-layer 21 and the second sub-layer 22 on the substrate 1 is the boundary line 10, which includes a plurality of connected units 11, the units 11 including the protruding units 111 and / or the recessed units 112. It can be seen that in the embodiment of the present application, the units 11 can be formed by connecting a plurality of protruding units 111, or by connecting a plurality of recessed units 112, or by connecting a plurality of protruding units 111 and a plurality of recessed units 112. Preferably, the units 11 only include a plurality of protruding units 111 or only include a plurality of recessed units 112, so as to facilitate processing and reduce processing difficulty.

[0066] wherein, as shown in (a), when the boundary line 10 includes the protruding units 111, the protruding direction of the protruding units 111 is along the second direction, and the protruding shape of the protruding units 111 is a non-sharp-angle shape. As shown in (b), when the boundary line 10 includes the recessed units 112, the recessed direction of the recessed units 112 is along the second direction, and the recessed shape of the recessed units 112 is a non-sharp-angle shape; the second direction is a direction intersecting the length direction of the electrode 4. Figure 5 Figure 4 It can be understood that the orthographic projection of the intersection between the first sub-layer 21 and the second sub-layer 22 on the substrate 1 is the boundary line 10, which is also the orthographic projection of the edge of the first sub-layer 21 on the substrate 1, and the structure shape of the intersection between the first sub-layer 21 and the second sub-layer 22 can be reflected by the shape setting of the boundary line 10. In addition, the second direction is a direction intersecting the length direction of the electrode 4, that is, the second direction is not parallel to the length direction of the electrode 4. Preferably, the second direction is perpendicular to the length direction of the electrode 4. The protruding direction of the protruding units 111 and the recessed direction of the recessed structure are set along the second direction, that is, the protruding units 111 and the recessed units 112 of the embodiment of the present application have a shape trend different from the length direction of the electrode 4, which is helpful to offset the thermal stress from different directions and improve the thermal stress resistance of the intersection between the first sub-layer 21 and the second sub-layer 22.

[0067] It can be understood that the orthographic projection of the intersection between the first sub-layer 21 and the second sub-layer 22 on the substrate 1 is the boundary line 10, which is also the orthographic projection of the edge of the first sub-layer 21 on the substrate 1, and the structure shape of the intersection between the first sub-layer 21 and the second sub-layer 22 can be reflected by the shape setting of the boundary line 10. In addition, the second direction is a direction intersecting the length direction of the electrode 4, that is, the second direction is not parallel to the length direction of the electrode 4. Preferably, the second direction is perpendicular to the length direction of the electrode 4. The protruding direction of the protruding units 111 and the recessed direction of the recessed structure are set along the second direction, that is, the protruding units 111 and the recessed units 112 of the embodiment of the present application have a shape trend different from the length direction of the electrode 4, which is helpful to offset the thermal stress from different directions and improve the thermal stress resistance of the intersection between the first sub-layer 21 and the second sub-layer 22.

[0068] ​In the embodiments of the present application, the non-sharp-angle shape refers to a shape in which the protruding top end or the recessed bottom end of the unit 11 is not a sharp angle. Taking the protruding shape of the protruding unit 111 as an example, the protruding top end of the protruding unit 111 is in a smooth arc shape or a straight line shape, etc., rather than a sawtooth shape or other sharp-angle shape with a sharp pointed tip. It can be understood that in the embodiments of the present application, the connection between two adjacent units 11 can still be formed in a sharp-angle shape, but since the protruding shape or the recessed shape of the unit 11 itself is a non-sharp-angle shape, the number of sharp angles that can exist on the boundary line 10 formed by connecting a plurality of units 11 is still small, and the situation that the boundary line 10 has a large number of sharp angles due to the sawtooth shape or other sharp-angle shape of the unit 11 itself will not occur. In the embodiments of the present application, the unit 11 in the non-sharp-angle shape can be formed by a laser patterning process, etc. Compared with the unit 11 in the sharp-angle shape, the unit 11 in the non-sharp-angle shape has lower laser opening film difficulty and lower precision requirement for laser opening film, which is conducive to more accurately obtaining the corresponding boundary line 10 shape.

[0069] The passivation layer 3 is arranged on the surface of the substrate 1, and the doped silicon layer 2 is located between the substrate 1 and the passivation layer 3, that is, the passivation layer 3 is located on the first sub-layer 21 and also located on the second sub-layer 22 (when the thickness of the second sub-layer 22 is 0 μm, the part of the passivation layer 3 is located on the substrate 1), in other words, the passivation layer 3 covers the stepped structure formed by the patterned doped silicon layer 2. Optionally, the passivation layer 3 can include at least one of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, and an aluminum oxide layer. Preferably, the passivation layer 3 can include an aluminum oxide layer and a silicon nitride layer, which not only has a good passivation effect but also has a good antireflection effect.

[0070] The electrode 4 is in contact with the first sub-layer 21 in the doped silicon layer 2 through the passivation layer 3, and specifically, the electrode 4 is in ohmic contact with the first sub-layer 21 to achieve carrier transport. Optionally, the electrode 4 can be at least one of a silver electrode 4, a silver-aluminum electrode 4, a copper electrode 4, or a nickel electrode 4.

[0071] Through the above arrangement, the solar cell 100 of the embodiments of the present application can not only alleviate the micro-cracking problem of the structure in the solar cell 100 and reduce the undesirable splashing of the electrode paste, but also achieve the purpose of stably improving the photoelectric conversion efficiency and other performances of the solar cell 100 while reducing parasitic absorption.

[0072] Firstly, the solar cell 100 of the embodiments of the present application reduces the parasitic absorption problem caused by the material by adopting the patterned doped silicon layer 2 and reducing the amount of the doped silicon layer 2. Especially when the second sub-layer 22 of the doped silicon layer 2 is completely removed, the setting area of the doped silicon layer 2 is greatly reduced, and the improvement of parasitic absorption is more significant.

[0073] Secondly, on the basis of setting the patterned doped silicon layer 2 to improve the parasitic absorption, in order to improve the resistance of this structure to thermal stress, the embodiments of the present application improve the structure characteristics of the boundary line 10 between the first sub-layer 21 and the second sub-layer 22, so that it is changed from the original straight boundary line 10 parallel to the length direction of the electrode 4 to the boundary line 10 with the convex unit 111 and / or the concave unit 112 and non-sharp angle shape of the present application. This special-shaped boundary line 10 can mainly alleviate the influence of thermal stress in the process of the solar cell 100 and improve the resistance to thermal stress from the following aspects:

[0074] Firstly, since the shape of the boundary line 10 includes several convex units 111 and / or concave units 112 different from the length direction of the electrode 4, this shape can effectively reduce or offset the thermal stress in different directions at the junction of the first sub-layer 21 and the second sub-layer 22, and the shape of the convex unit 111 and the concave unit 112 is non-sharp angle shape, so that there are not many sharp angle structures in the boundary line 10, which can avoid the high concentration of thermal stress, thereby reducing the damage to the junction structure of the first sub-layer 21 and the second sub-layer 22 and the subsequent production of the passivation layer 3 due to thermal stress, and reducing the cracking or delamination problem of the structure. Secondly, the use of the above-mentioned special-shaped boundary line 10 can make the heat dissipation capacity of the edge position of the first sub-layer 21 better, and it is not easy to accumulate heat, thereby reducing the damage to the passivation film layer due to thermal stress.

[0075] Finally, the boundary line 10 with the convex unit 111 and / or the concave unit 112 different from the length direction of the electrode 4 used in the present application can better balance the setting area of the first sub-layer 21 and the distance between the edge of the first sub-layer 21 (i.e. the boundary line 10) and the electrode 4, which helps to better balance the reduction of parasitic absorption and the reduction of the probability of electrode paste splashing onto the area where the second sub-layer 22 is located.

[0076] It can be understood that the manufacturing process of the electrode 4 can be: printing the electrode paste on the passivation layer 3 corresponding to the area where the first sub-layer 21 is located, sintering the electrode paste at high temperature, so that it etches the passivation layer 3 to form ohmic contact with the first sub-layer 21 below the passivation layer 3. In this process, a part of the electrode paste may also splash to the area outside the first sub-layer 21, i.e. the area where the passivation layer 3 corresponding to the second sub-layer 22 is located (this area is the non-ideal splashing area of the electrode paste), causing the passivation layer 3 in this part of the area to be damaged by high-temperature paste.

[0077] In order to reduce the undesirable splashing of the electrode paste, when the boundary line 10 between the first sub-layer 21 and the second sub-layer 22 is a straight line parallel to the length direction of the electrode 4, only by expanding the area of the first sub-layer 21 can the first sub-layer 21 form a regular rectangular strip-shaped film layer with a larger area, and a larger safety distance is reserved for the splashing of the electrode paste. Taking an electrode 4 and the doped silicon layer 2 where the electrode 4 is located as an example, combined with Figure 6 shown, Figure 6 is a schematic diagram of the influence of adjusting the position of the boundary line 10 on the splashing of the paste when the boundary line 10 is a straight line. When the boundary line between the first sub-layer 21 and the second sub-layer 22 is a straight line parallel to the length direction of the electrode 4, the first sub-layer 21 forms a regular rectangular strip-shaped film layer. Among them, M1 is the position of the boundary line 10 before adjustment, and M2 is the position of the boundary line 10 after adjustment. The area between M1 and M2 is the distribution area of the random splashing of the electrode paste. The closer to M1, the greater the splashing probability and the more splashing of the electrode paste, and the closer to M2, the smaller the splashing probability and the less splashing of the electrode paste. Although by expanding the area of the first sub-layer 21, its edge reaches the position of M2, the probability of undesirable splashing of the electrode paste can be reduced, but at the same time, the setting area of the doped silicon layer 2 is obviously increased, which in turn leads to an increase in parasitic absorption. The key is that part of the rectangular strip-shaped doped silicon layer 2 whose area is increased will not have electrode paste splashing, that is, it is not necessary to prevent the undesirable splashing of the electrode paste. Therefore, part of the area of the first sub-layer 21 that is increased is a redundant sacrificial area that does not prevent the undesirable splashing of the electrode paste, but increases the parasitic absorption.

[0078] And the shape of the boundary line 10 is adjusted to be different from the convex unit 111 and / or the concave unit 112 in the length direction of the electrode 4 in the embodiment of the application, which can reduce such redundant sacrificial area. Referring to Figure 7 shown, Figure 7 is a schematic diagram of the influence of the boundary line 10 on the splashing of the electrode paste when the boundary line 10 is connected to form the shape of the convex unit 111 and / or the concave unit 112 in the embodiment of the application. In Figure 7In the embodiment, the dashed line represents the straight boundary line 10 for the purpose of comparison. When the boundary line 10 between the first sub-layer 21 and the second sub-layer 22 is set to the special shape of the embodiment, the first sub-layer 21 can cover the main splashing area of the electrode paste. Although the coverage area of the first sub-layer 21 is reduced for the area with a low splashing probability and a small splashing amount, the increase of the redundant area is effectively reduced, and the situation of reducing the undesirable splashing of the electrode paste at the expense of the parasitic absorption improvement effect is avoided. In particular, the redundant area of the first sub-layer 21 in the form of the straight boundary line 10 is greatly reduced in the embodiment. Thus, the special shape of the boundary line 10 in the embodiment can meet the following requirements: the first sub-layer 21 can provide a certain area to reduce the probability of undesirable splashing of the electrode paste, and can also ensure that a large amount of redundant area is not added to affect the parasitic absorption.

[0079] The boundary line 10 at the junction of the first sub-layer 21 and the second sub-layer 22 will be further described below.

[0080] Referring back to Figure 4 to 5 , and further referring to Figure 8 and Figure 9 , in the embodiment, the shape of the unit 11 includes at least one of an arc shape, a trapezoidal shape, a rectangular shape, or a special shape, wherein the special shape includes a curved segment 11A and an oblique segment 11B connected to each other. Compared with the rectangular shape, the shape of the unit 11 in the form of the arc shape, the trapezoidal shape, or the special shape is more conducive to the dispersion and reduction of thermal stress and heat, and further reduces the influence of thermal stress on the edge structure of the first sub-layer 21 and the subsequent deposition of the passivation layer 3.

[0081] It can be understood that the above shapes can be the convex shape of the convex unit 111 or the concave shape of the concave unit 112.

[0082] The arc shape refers to a segment of any smooth curve, and the arc shape can have various forms, including at least one of a circular arc, an elliptical arc, a parabolic arc, a spiral arc, or a parametric curve arc.

[0083] When the shape of the unit 11 is in the form of the trapezoidal shape, the short sides of the trapezoidal shape have certain sharp angles at both ends, but the overall convex top end or concave bottom end of the trapezoidal shape is in the form of a straight line rather than a sharp angle. Therefore, the shape of the unit 11 also belongs to the non-sharp angle shape of the embodiment. The boundary line 10 formed by connecting a plurality of such trapezoidal shapes will only have sharp angles at the connection positions of adjacent trapezoidal shapes, and the overall number of sharp angles of the boundary line 10 is small, and the non-sharp angle shape is still dominant. The same situation also applies to the rectangular shape of the unit 11, which will not be described here.

[0084] More preferably, referring to Figure 8 and Figure 9As shown, the shape of the unit 11 is a special shape formed by connecting the above-mentioned curved segment 11A and the oblique segment 11B. In the special shape, the included angle between the oblique segment 11B and the length direction of the electrode 4 is a, and 0°≤a≤45°. With the increase of the included angle a, the setting area of the first sub-layer 21 will decrease. Controlling the included angle a in the above-mentioned range is helpful to obtain a more appropriate area of the first sub-layer 21, so that it can better balance the two aspects of reducing parasitic absorption and reducing the probability of undesirable splashing of electrode paste. Exemplarily, the included angle a is 0°, 5°, 8°, 10°, 15°, 20°, 30°, 35° or 45°.

[0085] Further, referring to Figure 8 As shown, for any unit 11 of the demarcation line 10, the maximum distance between the unit 11 and the electrode 4 is L1, and the minimum distance between the unit 11 and the electrode 4 is L2, and 1 μm≤L1-L2≤250 μm. Taking one electrode 4 and the doped silicon layer 2 where the electrode 4 is located as an example, L1 refers to the distance between the topmost end of the convex unit 111 of the demarcation line 10 and the edge of the electrode 4, which is the farthest distance between the demarcation line 10 and the electrode 4, and L2 refers to the distance between the bottommost end of the convex unit 111 of the demarcation line 10 and the edge of the electrode 4, which is the nearest distance between the demarcation line 10 and the electrode 4. The difference between L1 and L2 reflects the degree of concave-convex fluctuation of the demarcation line 10, and further affects the setting area of the first sub-layer 21 of the doped silicon layer 2 and the distance between the first sub-layer 21 and the electrode 4. By controlling the difference between L1 and L2 within the above-mentioned range, the setting area of the first sub-layer 21 on both sides of the electrode 4 and the distance between the edge of the first sub-layer 21 and the electrode 4 can be better balanced. Thus, the effect of reducing parasitic absorption and the probability of reducing undesirable splashing of electrode paste can be better balanced. Exemplarily, the difference between L1 and L2 is 1 μm, 5 μm, 10 μm, 20 μm, 30 μm, 50 μm, 80 μm, 100 μm, 150 μm, 200 μm or 250 μm.

[0086] Further, 10 μm≤L1≤500 μm. L1 reflects the farthest distance between the demarcation line 10 and the electrode 4, and is also the farthest distance between the edge of the first sub-layer 21 and the electrode 4. The solar cell 100 usually has a specified size specification, and too large L1 is easy to cause the number of electrodes 4 to be too small, and too small L1 is easy to cause the number of electrodes 4 to be too large. When L1 is controlled within the range of 10 μm~500 μm, it is beneficial to ensure that the electrodes 4 on the solar cell 100 have a more appropriate number, so that it can meet the carrier collection efficiency while avoiding adverse effects on light incidence. Exemplarily, L1 is 10 μm, 20 μm, 50 μm, 100 μm, 200 μm, 300 μm, 400 μm or 500 μm.

[0087] further combining Figure 8 As shown, for any electrode 4, the demarcation line 10 includes a first demarcation line 101 and a second demarcation line 102 located on both sides of the electrode 4, which can be symmetrically arranged or asymmetrically arranged. Among them, symmetrically arranged means that the first demarcation line 101 and the second demarcation line 102 located on both sides of the electrode 4 are mirror-symmetrically arranged with the electrode 4 as the center. Asymmetrically arranged means that the first demarcation line 101 and the second demarcation line 102 located on both sides of the electrode 4 are asymmetrically arranged with the electrode 4 as the center, for example, there are differences in arrangement in terms of distance from the electrode 4, shape of the unit 11, positional relationship, etc.

[0088] Preferably, the first demarcation line 101 and the second demarcation line 102 are asymmetrically arranged. The asymmetric arrangement can be that the overall shape of the first demarcation line 101 and the second demarcation line 102 is different, or that the distance from the electrode 4 of the first demarcation line 101 and the distance from the electrode 4 of the second demarcation line 102 are different, or that the units 11 of the first demarcation line 101 and the units 11 of the second demarcation line 102 are arranged in staggered positions along the length direction perpendicular to the electrode 4. When the first demarcation line 101 and the second demarcation line 102 are asymmetrically arranged, especially when they are arranged in staggered positions, it is beneficial to better prevent the electrode paste from splashing onto the corresponding area of the second sub-layer 22.

[0089] further combining Figure 8 As shown, taking the example of the asymmetric arrangement formed by the staggered arrangement of the units 11 of the first demarcation line 101 and the units 11 of the second demarcation line 102, in this asymmetric arrangement, the point N1 with the shortest distance between the first unit 1011 of the first demarcation line 101 and the electrode 4, and the point N2 with the shortest distance between the second unit 1012 of the second demarcation line 102 and the electrode 4, are not on the same straight line (i.e. on the straight line perpendicular to the length direction of the electrode 4). Such an arrangement is equivalent to increasing the distance and / or area of the edge of the first sub-layer 21 to the electrode 4, and thus can better prevent the electrode paste from splashing onto the corresponding area of the second sub-layer 22, thereby enabling the arrangement area of the first sub-layer 21 to better meet the requirements of reducing parasitic absorption, reducing the influence of thermal stress, and reducing the probability of undesirable splashing of the electrode paste. In this way, the light utilization efficiency can be improved while ensuring good passivation performance, so that the solar cell 100 can be more stably improved in efficiency.

[0090] Further, when the first boundary line 101 and the second boundary line 102 are asymmetrically arranged, the unit 11 includes a first unit 1011 located at the first boundary line 101 and a second unit 1012 located at the second boundary line 102. Along the length direction of the electrode 4, the span between the two most distant points of the first unit 1011 is L3, and 50 μm≤L3≤700 μm. Exemplarily, L3 is 50 μm, 80 μm, 100 μm, 200 μm, 300 μm, 500 μm or 700 μm. Along the length direction of the electrode 4, the span between the two most distant points of the second unit 1012 is L4, and 20 μm≤L4≤700 μm. Exemplarily, L4 is 20 μm, 50 μm, 80 μm, 100 μm, 200 μm, 300 μm, 500 μm or 700 μm. Preferably, 100 μm≤L4≤500 μm.

[0091] Controlling the span of the first unit 1011 and the second unit 1012 within the above range can better prevent the electrode paste from being undesirably splashed, better adapt the process conditions for patterning the doped silicon layer 2, reduce the difficulty of the laser process, and improve the working efficiency of the laser process, so that the boundary line 10 with the special structure of the embodiment of the application is more suitable for actual mass production applications.

[0092] Further combining Figure 10 as shown, Figure 10 is a structural schematic diagram of another asymmetrically arranged boundary line 10 of the embodiment of the application, in which L3>L4. For the second boundary line 102 with the same curvature and different lengths, the shorter L4 indicates that the distance L2 between the second boundary line 102 and the electrode 4 is larger, i.e., the edge of the first sub-layer 21 is farther away from the electrode 4. This arrangement can better balance the setting area of the first sub-layer 21 to better balance the influence on parasitic absorption and undesired splashing of the electrode paste, i.e., controlling L4 to be smaller than L3 to make the edge of the first sub-layer 21 farther away from the electrode 4 to improve the effect of preventing the electrode paste from being splashed to the region where the second sub-layer 22 is located, but the increased area of the first sub-layer 21 is not too large to excessively increase the parasitic absorption. In other optional embodiments, L3 can also be equal to L4, for example, refer to the arrangement mode in Figure 8 .

[0093] Further, corresponding to the region of the first sub-layer 21, the surface of the substrate 1 has a first surface texturing structure, and the first surface texturing structure includes at least one of a pyramid structure, a pyramid base structure and a prism structure. Corresponding to the region of the second sub-layer 22, the surface of the substrate 1 has a second surface texturing structure, and the second surface texturing structure includes at least one of a pyramid structure, a pyramid base structure and a prism structure.

[0094] Referring back Figure 2 and Figure 3 As shown in FIG. 1, the solar cell 100 can be a passivated contact solar cell. In the solar cell 100, a doped silicon layer 2 is disposed on a back surface of a substrate 1, and the doped silicon layer 2 is a doped polysilicon layer. The solar cell 100 further includes a dielectric layer 5 disposed between the substrate 1 and the doped silicon layer 2. That is, on the back surface side, the substrate 1 is sequentially provided with the patterned dielectric layer 5 and the patterned doped silicon layer 2, and the dielectric layer 5 and the doped silicon layer 2 form a passivated contact structure. It can be understood that, in addition to the structure of the back surface, the solar cell 100 can also include a structure of a light receiving surface. For example, an emitter 6 is disposed on a light receiving surface of the substrate 1, a light receiving surface functional layer 7 and a light receiving surface electrode 43 are disposed on the emitter 6, and the light receiving surface electrode 43 is in ohmic contact with the emitter 6 through the light receiving surface functional layer 7. The light receiving surface functional layer 7 can include at least one of a light receiving surface passivation layer 71 and a light receiving surface anti-reflection layer 72. The light receiving surface passivation layer 71 can be an aluminum oxide layer, and the light receiving surface anti-reflection layer 72 can be one or more of a silicon oxide layer, a silicon nitride layer, or a silicon oxynitride layer.

[0095] The dielectric layer 5 can act as a potential barrier for electrons and holes, and can be combined with the polysilicon layer to prevent the passage of minority carriers. The dielectric layer 5 can also have a pinhole channel effect, allowing the free movement of carriers within the solar cell 100, and selectively passing majority carriers through the heavily doped polysilicon, thereby reducing the recombination loss of minority carriers. In addition, the dielectric layer 5 can act as a diffusion barrier to prevent the diffusion of doped elements in the doped polysilicon layer into the semiconductor substrate, and can work together with the barrier layer to provide a certain blocking effect, ensuring that only a small amount of doped elements reach the substrate 1. The material of the dielectric layer 5 can include a variety of dielectric materials, such as at least one of silicon oxide, magnesium fluoride, amorphous silicon, polysilicon, silicon carbide, silicon nitride, silicon oxynitride, aluminum oxide, or titanium oxide. Specifically, the dielectric layer 5 can be composed of a silicon oxide layer containing silicon oxide. This is because the silicon oxide layer has excellent passivation performance, can minimize the recombination loss of minority carriers on the surface of the semiconductor substrate, and is a thin film with excellent durability to subsequent high-temperature processes.

[0096] Further referring to Figure 11As shown, the solar cell 100 of the embodiment of the present application can also be a back contact solar cell 100. In the solar cell 100, the doped silicon layer 2 includes an N-type doped silicon layer 23 and a P-type doped silicon layer 24 arranged on the back light surface of the substrate 1, and the N-type doped silicon layer 23 and the P-type doped silicon layer 24 are arranged apart by an isolation region; the electrode 4 includes a first electrode 41 and a second electrode 42, the first electrode 41 contacts the N-type doped silicon layer 23 through the passivation layer 3, and the second electrode 42 contacts the P-type doped silicon layer 24 through the passivation layer 3. The light receiving surface of the solar cell 100 can also be provided with a light receiving surface functional layer 7, which can be an aluminum oxide layer or a silicon nitride layer or the like functional film layer.

[0097] The embodiment of the present application also provides a preparation method of a solar cell. It can be understood that the preparation method is one method for obtaining the solar cell of the embodiment of the present application, but is not limited to the only method. That is, the solar cell of the embodiment of the present application can also be prepared by other methods, which is not limited by the present application, so it should not be understood as the preparation method provided by the embodiment of the present application is a limitation on the solar cell.

[0098] Taking the solar cell of the embodiment of the present application as a passivated contact solar cell as an example, the solar cell can be prepared by the following preparation method:

[0099] The substrate is cleaned and microstructure morphology treated; wherein the substrate can be a silicon substrate, the microstructure morphology treatment can be isotropic etching treatment or anisotropic etching treatment, and preferably the substrate is anisotropically etched to form a textured structure on the surface of the substrate;

[0100] A diffusion layer is made on the light receiving surface of the substrate, and the diffusion layer and the substrate are of different conductive types, thus forming a PN junction; wherein the substrate is preferably an N-type silicon substrate, and the diffusion layer is a boron diffusion layer;

[0101] The back light surface of the substrate is cleaned and polished;

[0102] A dielectric layer, a doped amorphous silicon layer and a mask layer are sequentially prepared on the back light surface of the substrate; wherein the doped silicon layer and the substrate have the same conductive type, and preferably the substrate is an N-type silicon substrate, and the doped silicon layer is a phosphorus-doped amorphous silicon layer;

[0103] Annealing and crystallization are performed to convert the doped amorphous silicon layer into a doped polysilicon layer;

[0104] Patterned processing is performed to open the mask layer in some areas by laser, and the areas are used for subsequent formation of a second sub-layer, and the mask layer not opened is used to protect the doped polysilicon layer and the dielectric layer inside, and the areas are used for subsequent formation of a first sub-layer;

[0105] The laser-opened part is etched and cleaned by a wet etching and cleaning process, so that a second sub-layer with a second thickness is formed in the part, and the remaining mask layer is removed to expose the first sub-layer with a first thickness;

[0106] A passivation layer is prepared on the diffusion layer of the light-receiving surface and the patterned doped polysilicon layer of the back light surface, wherein the passivation layer can be an aluminum oxide layer, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, or the like, and when the passivation layer includes both the aluminum oxide layer and the silicon nitride layer, the ALD process is used to prepare the aluminum oxide layer on the light-receiving surface and the back light surface, and then the PECVD process is used to prepare one or more of the silicon nitride layer, the silicon oxynitride layer, and the silicon oxide layer on the aluminum oxide layer.

[0107] An electrode paste is printed on the passivation layer, and the electrode is sintered to obtain an ohmic contact between the electrode and the doped polysilicon layer through the passivation layer.

[0108] In the embodiment of the present application, the specified shape of the boundary line at the junction of the first sub-layer and the second sub-layer can be achieved by the above-mentioned steps of patterning and wet etching and cleaning. First, the pattern to be processed by the laser is set to the specified shape of the boundary line according to the specified shape of the boundary line in the embodiment of the present application; then, the laser is used to open the mask layer according to the set pattern in the step of patterning, so that the specified shape of the boundary line is formed at the junction of the opened mask layer and the unopened mask layer; finally, the first sub-layer and the second sub-layer with different thicknesses are formed by wet etching and cleaning, and the specified shape of the boundary line is still maintained at the junction of the first sub-layer and the second sub-layer.

[0109] The embodiment of the present application also provides a photovoltaic module, which is combined with the above-mentioned solar cell 100. Figure 12 As shown in FIG. 1, the photovoltaic module includes the above-mentioned solar cell 100. The solar cells 100 can be electrically connected by a solder strip 200.

[0110] The embodiment of the present application will be further described in combination with more specific examples and tests.

[0111] Example 1

[0112] The embodiment provides a solar cell, which includes:

[0113] An N-type silicon substrate including a light-receiving surface and a back light surface arranged oppositely;

[0114] A boron diffusion layer with a thickness of 0.8 μm, a light-receiving surface aluminum oxide layer with a thickness of 4 nm, and a light-receiving surface silicon nitride layer with a thickness of 80 nm are sequentially arranged on the light-receiving surface of the N-type silicon substrate.

[0115] A 2 nm silicon oxide dielectric layer, a 100 nm phosphorus-doped polycrystalline silicon layer, a 4 nm backlight aluminum oxide layer, and a 90 nm backlight silicon nitride layer are sequentially disposed on the backlight side of an N-type silicon substrate. Among them, the silicon oxide dielectric layer and the phosphorus-doped polycrystalline silicon layer are patterned film layers; the backlight aluminum oxide layer and the backlight silicon nitride layer are solid film layers. The backlight aluminum oxide layer is disposed on the patterned phosphorus-doped polycrystalline silicon layer and on the backlight side not covered by the phosphorus-doped polycrystalline silicon layer.

[0116] The silver electrode on the light-receiving surface makes ohmic contact with the silicon oxide layer, the aluminum oxide layer, and the boron diffusion layer on the light-receiving surface.

[0117] The silver electrode on the backlight surface makes an ohmic contact with the silicon nitride layer, the aluminum oxide layer, and the phosphorus-doped polysilicon layer on the backlight surface.

[0118] In this embodiment, the patterned phosphorus-doped polycrystalline silicon layer has only a first sublayer, and the second sublayer has a second thickness of 0 μm. That is, in the solar cell of this embodiment, only a local area on the silicon substrate has a phosphorus-doped polycrystalline silicon layer, while other areas do not have a phosphorus-doped polycrystalline silicon layer. Therefore, the orthographic projection of the boundary between the first and second sublayers onto the substrate is the dividing line, which is also the orthographic projection shape of the edge of the first sublayer onto the substrate.

[0119] See Figure 13 As shown, Figure 13 This is a Zeta 3D microscope image taken from a top-down view of the backlit side before fabricating the silver electrodes on the illuminated and backlit sides. Figure 13 The first sublayer 21, the substrate 1, and the boundary line 10 between them can be seen, but the electrodes located on the first sublayer 21 are not shown. Figure 13 In the figure, the white dashed box shows one unit 11 of the boundary line 10. As can be seen from the figure, the boundary line 10 includes several connected units 11. Unit 11 is a trapezoidal recessed unit, and the recessed direction of the recessed unit is perpendicular to the length direction of the electrode (i.e.,...). Figure 13 (The concave direction is transverse). After the electrodes were fabricated, the maximum distance L1 between the unit and the electrode was 155 μm, the minimum distance L2 between the unit and the electrode was 105 μm, the span L3 between the two farthest points of the first unit on the left side along the length of the electrode was 140 μm, and the span L4 between the two farthest points of the second unit on the right side along the length of the electrode was 140 μm.

[0120] Example 2

[0121] This embodiment provides a solar cell. Compared with Embodiment 1, the difference in this embodiment is the shape of the dividing line. See also... Figure 14As shown, after the light-receiving surface silver electrode and the back light surface silver electrode are made, a Zeta 3D microscope image is taken from the top view angle of the back light surface. Figure 14 In the figure, the white dashed line frame shows one unit 11 of the demarcation line 10. In combination with the figure and Figure 9 It can be seen that in the embodiment, the unit of the demarcation line 10 is a special shape composed of connected curved segments 11A and diagonal segments 11B. Among them, the included angle α between the diagonal segment 11B and the length direction of the electrode 4 is 5°, the maximum distance L1 between the unit 11 and the electrode 4 is 135 μm, the minimum distance L2 between the unit 11 and the electrode 4 is 131 μm, the span L3 between the two farthest points of the first unit on the left along the length direction of the electrode 4 is 140 μm, and the span L4 between the two farthest points of the second unit on the right along the length direction of the electrode 4 is 140 μm. In addition, the demarcation lines 10 on both sides of the electrode 4 are asymmetrically arranged, specifically, the lowest points of the demarcation lines on both sides are not on the same straight line (the straight line refers to Figure 14 the direction perpendicular to the length direction of the electrode).

[0122] Comparative Example

[0123] The present comparative example provides a solar cell, which is different from the embodiment 1 in that the shape of the demarcation line is different.

[0124] In the present comparative example, the demarcation line is a straight line parallel to the length direction of the electrode.

[0125] Structural parameter test: L1, L2, L3, L4 and the included angle α of each embodiment and the comparative example can be obtained by taking the top view planar image of the Zeta 3D microscope image of the solar cell of the specified area, and then by measuring and calculating. Specifically, the top view of the side of the solar cell with the demarcation line is taken as the shooting angle, five 5.6 μm×4.2 μm regions at different positions are selected, and the above-mentioned parameters of the corresponding unit are measured and calculated.

[0126] Performance test description:

[0127] The solar cells of the above-mentioned embodiments and comparative examples are tested for photoelectric conversion efficiency (Eta), open circuit voltage (Voc), short circuit current (Isc), fill factor (FF) and other aspects of performance by using a halm test sorting device. The halm machine is a device for simulating sunlight, and is equipped with electronic load, data acquisition and calculation and other devices for testing the electrical performance of photovoltaic devices (including solar cells). The silicon wafer of the solar cell for testing is 210 size, and the calibrated light intensity is 1000±5 W / m². The test results are shown in Table 1.

[0128] Table 1: Performance test results of the solar cells of the embodiments and the comparative example

[0129]

[0130] As can be seen from Table 1, the solar cell of the embodiment of the present application has a certain degree of improvement in open-circuit voltage, short-circuit current and fill factor, etc. compared with the comparative example, and the improvement effect of the second embodiment is more obvious. It can be seen that in the solar cell of the embodiment of the present application, on the basis of the patterned doped silicon layer on the back surface, the special-shaped boundary line is arranged, which can not only reduce parasitic absorption, but also relieve the micro-crack problem of the structure in the solar cell and reduce the undesirable splashing of the electrode paste, so as to achieve the purpose of stably improving the performance of the solar cell such as photoelectric conversion efficiency.

[0131] The technical solutions disclosed in the embodiments of the present application are described in detail above, and the principles and implementation modes of the present application are described by applying specific examples. The above description of the embodiments is only used to help understand the technical solutions and core invention points of the embodiments of the present application. Meanwhile, for those skilled in the art, according to the idea of the present application, the specific implementation modes and application ranges will be changed, and the content of the specification should not be understood as a limitation of the present application.

Claims

1. A solar cell, characterized in that, The solar cell includes: Base; A patterned doped silicon layer is disposed on the surface of the substrate; wherein the doped silicon layer consists of a first sublayer having a first thickness and a second sublayer having a second thickness connected along a first direction, the first thickness being greater than the second thickness, and the second thickness being greater than or equal to 0 μm; the first direction is the planar direction of the substrate; wherein when the second thickness is greater than 0 μm, the first sublayer and the second sublayer have the same conductivity type, and when the second thickness is equal to 0 μm, the doped silicon layer is only the first sublayer; A passivation layer is disposed on the surface of the substrate, and the doped silicon layer is located between the substrate and the passivation layer; An electrode that passes through the passivation layer and contacts the first sublayer; Wherein, the orthographic projection of the junction between the first sub-layer and the second sub-layer onto the substrate is the dividing line, the dividing line comprising a plurality of connected units, the units including protruding units and / or recessed units; when the dividing line includes the protruding units, the protruding direction of the protruding units is along a second direction, and the protruding shape of the protruding units is a non-sharp-angled shape; when the dividing line includes the recessed units, the recessing direction of the recessed units is along the second direction, and the recessed shape of the recessed units is a non-sharp-angled shape; the second direction is the direction intersecting the length direction of the electrode; Corresponding to any of the electrodes, the boundary line includes a first boundary line and a second boundary line located on both sides of the electrode, and the unit includes a first unit located on the first boundary line and a second unit located on the second boundary line; along the length direction of the electrode, the span between the two farthest points of the first unit is L3, 50 μm≤L3≤700 μm; along the length direction of the electrode, the span between the two farthest points of the second unit is L4, 20 μm≤L4≤700 μm.

2. The solar cell according to claim 1, characterized in that, The shape of the unit includes at least one of the following: arc, trapezoid, rectangle or irregular shape, wherein the irregular shape includes connected curve segments and oblique line segments.

3. The solar cell according to claim 2, characterized in that, The shape of the unit includes the irregular shape, in which the angle between the oblique line segment and the length direction of the electrode is α, 0°≤α≤45°.

4. The solar cell according to claim 1, characterized in that, For any unit of the boundary line, the maximum distance between the unit and the electrode is L1, and the minimum distance between the unit and the electrode is L2, where 1μm≤L1-L2≤250 μm.

5. The solar cell according to claim 4, characterized in that, 10 μm≤L1≤500 μm.

6. The solar cell according to claim 1, characterized in that, The first boundary line and the second boundary line are set symmetrically or asymmetrically; and / or, The dividing line includes a number of units that are periodically distributed or a number of units that are irregularly distributed.

7. The solar cell according to claim 6, characterized in that, The first dividing line and the second dividing line are set asymmetrically.

8. The solar cell according to claim 7, characterized in that, L3≥L4; and / or, 100 μm≤L4≤500 μm.

9. The solar cell according to any one of claims 1 to 8, characterized in that, The second thickness is 0 μm; and / or, The unit is a raised unit or a recessed unit; and / or, The second direction is perpendicular to the length direction of the electrode.

10. The solar cell according to any one of claims 1 to 8, characterized in that, Corresponding to the region of the first sub-layer, the surface of the substrate has a first surface texture structure, which includes at least one of a pyramid structure, a pyramid base structure, and a frustum structure. Corresponding to the region of the second sublayer, the surface of the substrate has a second surface texture structure, which includes at least one of a pyramid structure, a pyramid base structure, and a frustum structure.

11. The solar cell according to any one of claims 1 to 8, characterized in that, The doped silicon layer is disposed on the back surface of the substrate, and the doped silicon layer is a doped polycrystalline silicon layer; the solar cell further includes a dielectric layer disposed between the substrate and the doped silicon layer.

12. A photovoltaic module, characterized in that, The photovoltaic module includes a solar cell as described in any one of claims 1 to 11.

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