LED epitaxial wafer with high hydrolysis resistance and preparation method thereof

Abstract

The invention relates to the technical field of light emitting diodes, and discloses a high-hydrolysis-resistance LED epitaxial wafer and a preparation method thereof.The high-hydrolysis-resistance LED epitaxial wafer comprises a substrate, and a buffer layer, a U-type GaN layer, an N-type semiconductor layer, a superlattice layer, a multi-quantum well layer, an electron blocking layer and a P-type semiconductor layer are sequentially arranged on the substrate; wherein the N-type semiconductor layer is of a periodic structure which is formed by a GaN layer and a Si-doped AlGaN layer which grow alternately in a circulating mode; the superlattice layer comprises a Si-doped GaN layer and an InGaN layer, wherein the Si-doped GaN layer and the InGaN layer are periodically and alternately stacked. By implementing the method, the hydrolysis resistance and luminous efficiency of the blue-green LED epitaxial wafer can be effectively improved, the process is simple, and an additional chip process does not need to be added.

Description

Technical Field

[0001] The present invention relates to the technical field of light-emitting diodes, and in particular to a highly hydrolysis-resistant LED epitaxial wafer and a preparation method thereof. Background Art

[0002] GaN-based LED blue-green epitaxial wafers are key materials currently widely used in the field of optoelectronic devices. Their epitaxial structure usually includes an N-type GaN layer, a quantum well layer, and a P-type GaN layer. In the prior art, the N-type GaN layer usually adopts a Si-doped GaNBULK structure or a cyclic structure of a non-Si-doped GaN layer and a Si-doped GaN layer. By doping Si, the N-type GaN layer exhibits N polarity. This structure has high electrical and optical properties in LED chip manufacturing. However, the hydrolysis resistance of this LED chip epitaxial structure is poor. During the chip cutting process, the cutting path will expose the N-type GaN layer. The exposed N-type GaN layer is very susceptible to hydrolysis reactions in a high-temperature environment. This hydrolysis process will cause the N-type GaN layer to be corroded, the brightness of the chip will be reduced, and in severe cases, it will cause the electrode to fall off, thereby affecting the overall performance and service life of the LED chip.

[0003] Currently, a common approach to improving this situation is to add a deep etching process to the chip manufacturing process. This process effectively removes areas that could potentially cause hydrolysis, thereby improving the chip's resistance to hydrolysis. However, deep etching also increases production costs and prolongs process time, negatively impacting the manufacturing efficiency and economic benefits of LED chips. Therefore, optimizing the epitaxial structure of GaN-based blue-green LED epitaxial wafers has become a key research direction for improving their hydrolysis resistance. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a highly hydrolysis-resistant LED epitaxial wafer and a preparation method thereof, which can effectively improve the hydrolysis resistance and luminous efficiency of blue-green LED epitaxial wafers, and the process is simple and does not require additional chip processes.

[0005] In order to solve the above technical problems, the first aspect of the present invention provides a highly hydrolysis-resistant LED epitaxial wafer, comprising a substrate, on which a buffer layer, a U-type GaN layer, an N-type semiconductor layer, a superlattice layer, a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor layer are sequentially arranged;

[0006] Wherein, the N-type semiconductor layer is a periodic structure formed by cyclic alternating growth of GaN layer and Si-doped AlGaN layer;

[0007] The superlattice layer includes Si-doped GaN layers and InGaN layers that are periodically and alternately stacked.

[0008] As an improvement of the above solution, the number of periods of the N-type semiconductor layer is 40-50, and the total thickness of the N-type semiconductor layer is 1.4 μm-1.6 μm.

[0009] As an improvement of the above solution, in a single period, the thickness of the GaN layer is 15 nm-20 nm, and the thickness of the Si-doped AlGaN layer is 15 nm-20 nm.

[0010] As an improvement to the above solution, in the N-type semiconductor, the Si doping concentration in the Si-doped AlGaN layer is 1×10 19 atoms / cm 3 -2×10 19 atoms / cm 3 , the Al component accounts for 0.1-0.2.

[0011] As an improvement to the above solution, the number of periods of the superlattice layer is 3-6, and the total thickness of the superlattice layer is

[0012] In a single period, the thickness ratio of the Si-doped GaN layer to the InGaN layer is (4-10):1.

[0013] As an improvement to the above solution, the doping concentration of Si in the Si-doped GaN layer is lower than the doping concentration of Si in the Si-doped AlGaN layer.

[0014] As an improvement to the above solution, the Si doping concentration in the Si-doped GaN layer is 4×10 18 atoms / cm 3 -5×10 18 atoms / cm 3 ;

[0015] The In component ratio in the InGaN layer is 0.1-0.2.

[0016] As an improvement to the above solution, the growth temperatures of the GaN layer and the Si-doped AlGaN layer are both greater than the growth temperatures of the Si-doped GaN layer and the InGaN layer;

[0017] The growth pressures of the GaN layer and the Si-doped AlGaN layer are both greater than the growth pressures of the Si-doped GaN layer and the InGaN layer;

[0018] The growth speeds of the GaN layer and the Si-doped AlGaN layer are both greater than the growth speeds of the Si-doped GaN layer and the InGaN layer.

[0019] The second aspect of the present invention further provides a method for preparing the highly hydrolysis-resistant LED epitaxial wafer, comprising:

[0020] providing a substrate;

[0021] depositing a buffer layer on the substrate;

[0022] depositing a U-type GaN layer on the buffer layer;

[0023] depositing an N-type semiconductor layer on the U-type GaN layer;

[0024] depositing a superlattice layer on the N-type semiconductor layer;

[0025] depositing a multi-quantum well layer on the superlattice layer;

[0026] depositing an electron blocking layer on the multi-quantum well layer;

[0027] depositing a P-type semiconductor layer on the electron blocking layer;

[0028] Wherein, the N-type semiconductor layer is a periodic structure formed by cyclic alternating growth of GaN layer and Si-doped AlGaN layer;

[0029] The superlattice layer includes Si-doped GaN layers and InGaN layers that are periodically and alternately stacked.

[0030] As an improvement to the above solution, in the N-type semiconductor layer, the growth temperature of the GaN layer is 1080° C.-1120° C., the growth pressure is 200 torr-400 torr, and the growth speed is 1000 to 1200 rpm; the growth temperature of the Si-doped AlGaN layer is 1080° C.-1120° C., the growth pressure is 200 torr-400 torr, and the growth speed is 1000 to 1200 rpm;

[0031] In the superlattice layer, the Si-doped GaN layer is grown at a temperature of 800°C-850°C, a pressure of 100 torr-200 torr, and a rotational speed of 400 to 600 rpm; the InGaN layer is grown at a temperature of 800°C-850°C, a pressure of 100 torr-200 torr, and a rotational speed of 400 to 600 rpm.

[0032] The implementation of the present invention has the following beneficial effects:

[0033] In this application, a periodic structure formed by cyclically alternating growth of GaN layers and Si-doped AlGaN layers is used as the N-type semiconductor layer. Subsequently, a superlattice layer formed by periodically alternating stacked Si-doped GaN layers and InGaN layers is provided on the N-type semiconductor layer. By adjusting the epitaxial structure, it is possible to effectively prevent water molecules from entering the N-type semiconductor layer to corrode GaN, thereby improving the hydrolysis resistance of the blue-green LED epitaxial wafer without adding additional chip processes and reducing costs. In addition, the carrier recombination efficiency can be increased, thereby improving the luminous efficiency and reliability of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 : A schematic structural diagram of a highly hydrolysis-resistant LED epitaxial wafer according to the present invention;

[0035] Figure 2 : A schematic structural diagram of the N-type semiconductor layer in the present invention;

[0036] Figure 3 : Schematic diagram of the structure of the superlattice layer in the present invention.

[0037] Figure numerals: .

[0038] 1-substrate; 2-buffer layer; 3-U-type GaN layer; 4-N-type semiconductor layer; 41-GaN layer; 42-Si-doped AlGaN layer; 5-superlattice layer; 51-Si-doped GaN layer; 52-InGaN layer; 6-multi-quantum well layer; 7-electron blocking layer; 8-P-type semiconductor layer. DETAILED DESCRIPTION

[0039] In order to make the objectives, technical solutions and advantages of the present invention more clear, the present invention will be further described in detail with reference to specific embodiments below.

[0040] In the description of this application, it is necessary to understand that the orientations or positional relationships indicated by “upper”, “lower”, “top”, “bottom”, “inside”, “outside”, etc. are all based on the orientations or positional relationships shown in the accompanying drawings. The purpose is only to facilitate the description of the present invention and simplify the description. It does not indicate or imply that the referred parts must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0041] In order to solve the above problems, the first aspect of the present invention provides a highly hydrolysis-resistant LED epitaxial wafer, such as Figure 1 As shown, it includes a substrate 1, on which a buffer layer 2, a U-type GaN layer 3, an N-type semiconductor layer 4, a superlattice layer 5, a multi-quantum well layer 6, an electron blocking layer 7 and a P-type semiconductor layer 8 are sequentially arranged;

[0042] Among them, such as Figure 2As shown, the N-type semiconductor layer 4 is a periodic structure formed by cyclic alternating growth of a GaN layer 41 and a Si-doped AlGaN layer 42;

[0043] like Figure 3 As shown, the superlattice layer 5 includes Si-doped GaN layers 51 and InGaN layers 52 that are periodically and alternately stacked.

[0044] In the present application, a periodic structure formed by cyclic alternating growth of a GaN layer 41 and a Si-doped AlGaN layer 42 is used as the N-type semiconductor layer 4. Subsequently, a superlattice layer 5 formed by periodically alternating stacked Si-doped GaN layers 51 and InGaN layers 52 is arranged on the N-type semiconductor layer 4. By adjusting the epitaxial structure, it is possible to effectively prevent water molecules from entering the N-type semiconductor layer 4 and corroding GaN, thereby improving the hydrolysis resistance of the blue-green LED epitaxial wafer without adding additional chip processes and costs, and can also increase the carrier recombination efficiency, thereby improving the luminous efficiency and reliability of the device.

[0045] Specifically, the periodic structure formed by the cyclic alternating growth of GaN layers 41 and Si-doped AlGaN layers 42 as the N-type semiconductor layer 4 can not only effectively prevent water molecules from entering the N-type semiconductor layer 4 and corroding GaN, but also better expand the current and buffer stress through the different lattices of the alternating layers, thereby improving the crystal quality of the N-type semiconductor layer 4. Subsequently, a superlattice layer 5 formed by periodically alternating Si-doped GaN layers 51 and InGaN layers 52 is provided on the N-type semiconductor layer 4. This can release the stress superimposed on the N-type semiconductor layer 4, forming a dense barrier layer that prevents water molecules from entering deep into the N-type semiconductor layer 4, thereby protecting the GaN from hydrolysis and maintaining chip performance and stability. In addition, stress is released during the alternating growth process, reducing defects and dislocations caused by stress concentration. At the same time, due to lattice mismatch, V-shaped pits are formed on the surface. The sidewalls of the V-shaped pits can form localized potential wells, limiting the diffusion of electrons and holes in the active region, increasing carrier recombination efficiency, and thus improving the luminous efficiency and reliability of the device.

[0046] Preferably, if Figure 2 As shown, the number of periods of the N-type semiconductor layer 4 is 40-50, and the total thickness of the N-type semiconductor layer 4 is 1.4 μm-1.6 μm. Exemplary total thicknesses are 1.4 μm, 1.45 μm, 1.5 μm, 1.55 μm, and 1.6 μm, but not limited thereto.

[0047] Furthermore, the surface of the GaN layer 41 is a Ga surface. Although it does not react with water at room temperature or high temperature, the epitaxial layer will show N polarity after being doped with Si, which makes it very easy to hydrolyze at high temperature. In this application, Si doping is not performed in the GaN layer 41, but Si doping is performed in the AlGaN layer to ensure that the GaN layer 41 will basically not hydrolyze. In addition, AlGaN does not react with water at low temperatures, but forms an AlOOH structure at high temperatures. This layer will block water molecules from entering and corroding GaN, and it is not easy to hydrolyze even if doped with Si. In a single cycle, the thickness of the GaN layer 41 is 15nm-20nm, and the thickness of the Si-doped AlGaN layer 42 is 15nm-20nm. If the GaN layer 41 is too thick, the dense structure of the GaN layer 41 can effectively block the penetration of water molecules and improve the hydrolysis resistance, but it may cause stress accumulation, affect the crystal quality, and may also cause increased resistance, affecting the current spreading performance; if the Si-doped AlGaN layer 42 is too thick, the increase in Si doping concentration can improve the current spreading performance and form more AlOOH structures, which is beneficial to the improvement of the hydrolysis resistance, but it may cause the lattice mismatch to be aggravated, generate more defects, reduce the hydrolysis resistance, and affect the current spreading performance.

[0048] Furthermore, the Si doping concentration in the Si-doped AlGaN layer 42 is 1×10 19 atoms / cm 3 -2×10 19 atoms / cm 3 , while ensuring the anti-hydrolysis performance, it can improve the electron concentration and mobility. The Al component accounts for 0.1-0.2, which promotes the formation of AlOOH structure, thereby improving the hydrolysis resistance of the epitaxial wafer. Moreover, combined with the periodic structure, it can reduce the dislocation density of the GaN layer, thereby improving the crystal quality, improving the current expansion performance, increasing the luminous brightness of the LED device, and reducing the operating voltage.

[0049] Preferably, if Figure 3 As shown, the number of periods of the superlattice layer 5 is 3-6, and the total thickness of the superlattice layer 5 is An exemplary total thickness is But it’s not limited to this.

[0050] Furthermore, in the superlattice layer 5, the introduction of Si impurities into the Si-doped GaN layer 51 increases the free electron concentration in the GaN, reduces the resistance of the device, helps the current spread over a wider area, improves the current injection efficiency and device uniformity, while the InGaN layer 52 can increase the complexity and diversity of the structure, more effectively release the stress between the epitaxial layers, reduce defects and dislocations caused by stress concentration, and act as a potential well for carriers, providing additional carrier storage space, which helps improve the injection efficiency and transmission efficiency of carriers. In a single cycle, the thickness ratio of the Si-doped GaN layer 51 to the InGaN layer 52 is (4-10):1.

[0051] In some specific and preferred embodiments, the thickness of the Si-doped GaN layer 51 is The thickness of the InGaN layer 52 is

[0052] Preferably, in the superlattice layer 5, the doping concentration of Si in the Si-doped GaN layer 51 is lower than the doping concentration of Si in the Si-doped AlGaN layer 42, which can improve current spreading. The growth temperature of the Si-doped GaN layer 51 is lower than that of the N-type semiconductor layer. Too high Si concentration will cause the crystal quality of this layer to deteriorate.

[0053] Furthermore, in the superlattice layer 5, the Si doping concentration in the Si-doped GaN layer 51 is 4×10 18 atoms / cm 3 -5×10 18 atoms / cm 3 The In component ratio in the InGaN layer 52 is 0.1-0.2.

[0054] In some specific and preferred embodiments, the growth temperature of the GaN layer 41 and the Si-doped AlGaN layer 42 are both greater than the growth temperature of the Si-doped GaN layer 51 and the InGaN layer 52; the growth pressure of the GaN layer 41 and the Si-doped AlGaN layer 42 are both greater than the growth pressure of the Si-doped GaN layer 51 and the InGaN layer 52; the growth speed of the GaN layer 41 and the Si-doped AlGaN layer 42 are both greater than the growth speed of the Si-doped GaN layer 51 and the InGaN layer 52, which promotes the effective doping of Si and In, inhibits the phase separation of Al and Ga in the Si-doped AlGaN layer 42, improves the uniformity of the material, reduces defects caused by lattice mismatch, and thereby improves the crystal quality and hydrolysis resistance of the N-type semiconductor layer 4 and the superlattice layer 5, and further improves the luminescence performance of the LED device.

[0055] Accordingly, the present invention also provides a method for preparing the highly hydrolysis-resistant LED epitaxial wafer, comprising:

[0056] (1) providing a substrate 1;

[0057] Optionally, the substrate 1 includes but is not limited to a sapphire substrate; preferably, it is a patterned sapphire substrate (sapphire PSS substrate).

[0058] (2) depositing a buffer layer 2 on the substrate 1;

[0059] Preferably, the buffer layer 2 is an AlN layer, and the thickness of the buffer layer 2 is 16 nm-20 nm.

[0060] Furthermore, the buffer is grown by chemical vapor deposition (CVD), specifically:

[0061] The substrate 1 is placed in a CVD device, the growth temperature is adjusted to 600° C.-700° C., the flow rate ratio of Ar to N 2 is 4:1-6:1, the flow rate of oxygen is 1 sccm-2 sccm, and an Al target is introduced to deposit the buffer layer 2.

[0062] (3) depositing a U-type GaN layer 3 on the buffer layer 2;

[0063] Preferably, the thickness of the U-type GaN layer 3 is 2 μm-3 μm.

[0064] Furthermore, the U-type GaN layer 3 is grown by metal organic chemical vapor deposition (MOCVD), specifically:

[0065] The substrate 1 with the buffer layer 2 deposited thereon is placed in an MOCVD device, the growth temperature is adjusted to 1100°C-1150°C, the growth pressure is 100torr-200torr, the growth speed is 1000 rpm-1500 rpm, H2 is introduced as a carrier gas, and then N source and Ga source are introduced to grow the U-type GaN layer 3.

[0066] It will be appreciated that the subsequent layer structures of the epitaxial wafer are all completed in an MOCVD setup.

[0067] (4) depositing an N-type semiconductor layer 4 on the U-type GaN layer 3;

[0068] Preferably, the N-type semiconductor layer 4 is a periodic structure formed by cyclic alternating growth of a GaN layer 41 and a Si-doped AlGaN layer 42 .

[0069] Furthermore, depositing the N-type semiconductor layer 4 specifically includes:

[0070] The growth temperature is adjusted to 1080°C-1120°C, the growth pressure is 200torr-400torr, the growth speed is 1000 rpm-1200 rpm, H2 is introduced as a carrier gas, and then the N source and Ga source are introduced to grow the GaN layer 41, and the growth time is 5s-8s; then the Si source, Al source, N source and Ga source are used to grow the Si-doped AlGaN layer 42, and the growth time is 5s-8s. At this time, one cycle of growth is completed, and finally the stacked growth is repeated according to the preset number of cycles to obtain an N-type semiconductor layer 4 with a periodic structure.

[0071] (5) depositing a superlattice layer 5 on the N-type semiconductor layer 4;

[0072] Preferably, the superlattice layer 5 includes Si-doped GaN layers 51 and InGaN layers 52 that are periodically and alternately stacked.

[0073] Furthermore, depositing the superlattice layer 5 specifically includes:

[0074] The growth temperature is adjusted to 800°C-850°C, the growth pressure is 100 torr-200 torr, the growth speed is 400 rpm-600 rpm, N2 is introduced as a carrier gas, and then Si source, N source and Ga source are introduced to grow the Si-doped GaN layer 51; then the In source, N source and Ga source are used to grow the InGaN layer 52, and one cycle of growth is completed. Finally, the stacked growth is repeated according to the preset number of cycles to obtain a superlattice layer 5 with a periodic structure.

[0075] In the present application, the Si-doped GaN layer 51 and the InGaN layer 52 are grown at low temperature, which promotes the formation of surface V-shaped pits, and then uses the sidewalls of the V-shaped pits to form localized potential wells, which can limit the diffusion of electrons and holes in the active area and increase the carrier recombination efficiency.

[0076] (6) depositing a multi-quantum well layer 6 on the superlattice layer 5;

[0077] Preferably, the multi-quantum well layer 6 is a periodic structure of alternately stacked InGaN quantum well layers and Si-doped GaN quantum barrier layers, the number of stacking periods is 8-10, and the total thickness of the multi-quantum well layer 6 is In a single cycle, the In composition of the InGaN quantum well layer is 0.1-0.2 (blue) or 0.25-03.35 (green), and the thickness of the InGaN quantum well layer is The Si doping concentration in the Si-doped GaN quantum barrier layer is 1×10 18 atoms / cm 3 -2×10 18 atoms / cm 3, the thickness of the Si-doped GaN quantum barrier layer is

[0078] Furthermore, depositing the multi-quantum well layer 6 specifically includes:

[0079] The growth temperature is adjusted to 750°C-800°C, the growth pressure is 100torr-200torr, the growth speed is 400 rpm-600 rpm, N2 is introduced as a carrier gas, and then an In source, an N source and a Ga source are introduced to grow an InGaN quantum well layer; then a Si source, an N source and a Ga source are used to grow a Si-doped GaN quantum barrier layer, and one cycle of growth is completed. Finally, the stacked growth is repeated according to a preset number of cycles to obtain a multi-quantum well layer 6 with a periodic structure.

[0080] (7) depositing an electron blocking layer 7 on the multi-quantum well layer 6;

[0081] Preferably, the electron blocking layer 7 is an AlGaN layer, in which the Al component accounts for 0.2-0.3, which can effectively prevent electron overflow. The total thickness of the electron blocking layer 7 is 40nm-60nm.

[0082] Furthermore, depositing the electron blocking layer 7 specifically includes:

[0083] The growth temperature is adjusted to 950° C.-1000° C., the growth pressure is 100 torr-200 torr, the growth speed is 1000 rpm-1200 rpm, N 2 is introduced as a carrier gas, and then Al source, N source and Ga source are introduced to grow the electron blocking layer 7.

[0084] (8) depositing a P-type semiconductor layer 8 on the electron blocking layer 7;

[0085] Preferably, the P-type semiconductor layer 8 is a P-type GaN layer, the P-type dopant is preferably Mg, and the doping concentration of the P-type dopant is 2×10 19 atoms / cm 3 -3×10 19 atoms / cm 3 The thickness of the P-type semiconductor layer 8 is 200nm-300nm, so that the V-shaped pit can be filled.

[0086] Furthermore, depositing the P-type semiconductor layer 8 specifically includes:

[0087] The growth temperature is adjusted to 900° C.-980° C., the growth pressure is 100 torr-200 torr, the growth speed is 500 rpm-1200 rpm, H 2 is introduced as a carrier gas, and then Mg source, N source and Ga source are introduced to grow the P-type semiconductor layer 8.

[0088] It should be noted that in the present invention, the N source can be high-purity NH3, the Al source can be TMAl (trimethylaluminum), the Ga source can be TEGa (triethylgallium), the In source can be TMIn (trimethylindium), the Si source can be SiH4, and the Mg source can be CP2Mg.

[0089] The present invention will be further described below with specific embodiments:

[0090] Example 1

[0091] This embodiment provides a blue light emitting diode epitaxial wafer with high hydrolysis resistance, comprising a substrate on which a buffer layer, a U-type GaN layer, an N-type semiconductor layer, a superlattice layer, a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor layer are sequentially arranged;

[0092] The N-type semiconductor layer is a periodic structure formed by cyclic alternating growth of a GaN layer and a Si-doped AlGaN layer; the number of periods is 45, the thickness of the GaN layer is 17 nm, the thickness of the Si-doped AlGaN layer is 18 nm, and the doping concentration of Si is 1.5×10 19 atoms / cm 3 , the Al component accounts for 0.15, and the total thickness of the N-type semiconductor layer is 1.575μm.

[0093] The superlattice layer includes Si-doped GaN layers and InGaN layers that are periodically stacked alternately, with a period number of 5. The thickness of the Si-doped GaN layer is The doping concentration of Si is 1×10 19 atoms / cm 3 , the thickness of the InGaN layer is The In component ratio is 0.15, and the total thickness of the superlattice layer is

[0094] The method for preparing the blue light highly hydrolysis-resistant LED epitaxial wafer comprises:

[0095] (1) providing a substrate;

[0096] The substrate is a sapphire PSS substrate.

[0097] (2) depositing a buffer layer on the substrate;

[0098] The buffer layer is an AlN layer, and the thickness of the buffer layer is 18 nm.

[0099] Specifically, the substrate was placed in a CVD setting, the growth temperature was adjusted to 650° C., the flow rate ratio of Ar to N 2 was 5:1, the flow rate of oxygen was 1.5 sccm, and an Al target was introduced to deposit a buffer layer.

[0100] (3) depositing a U-type GaN layer on the buffer layer;

[0101] The thickness of the U-type GaN layer is 2.5 μm.

[0102] Specifically: the substrate with the buffer layer deposited is placed in the MOCVD equipment, the growth temperature is adjusted to 1125°C, the growth pressure is 150 torr, the growth speed is 1250 rpm, H2 is introduced as the carrier gas, and then the N source and Ga source are introduced to grow the U-type GaN layer.

[0103] (4) depositing an N-type semiconductor layer on the U-type GaN layer;

[0104] The N-type semiconductor layer is a periodic structure formed by cyclic alternating growth of a GaN layer and a Si-doped AlGaN layer.

[0105] Specifically: the growth temperature is adjusted to 1100°C, the growth pressure is 300 torr, the growth speed is 1100 rpm, H2 is introduced as a carrier gas, and then N source and Ga source are introduced to grow the GaN layer; then the Si source, Al source, N source and Ga source are used to grow the Si-doped AlGaN layer, and one cycle of growth is completed. Finally, the stacked growth is repeated for 44 cycles to obtain an N-type semiconductor layer with a periodic structure.

[0106] (5) depositing a superlattice layer on the N-type semiconductor layer;

[0107] The superlattice layer includes Si-doped GaN layers and InGaN layers that are periodically and alternately stacked.

[0108] Specifically: the growth temperature is adjusted to 825°C, the growth pressure is 150 torr, the growth speed is 500 rpm, N2 is introduced as a carrier gas, and then Si source, N source and Ga source are introduced to grow the Si-doped GaN layer; then the In source, N source and Ga source are used to grow the InGaN layer, and one cycle of growth is completed. Finally, the stacked growth is repeated for 4 cycles to obtain a superlattice layer with a periodic structure.

[0109] (6) depositing a multi-quantum well layer on the superlattice layer;

[0110] The multi-quantum well layer is a periodic structure of alternating InGaN quantum well layers and Si-doped GaN quantum barrier layers, with a stacking period of 9. In a single period, the In composition of the InGaN quantum well layer is 0.15, and the thickness of the InGaN quantum well layer is The Si doping concentration in the Si-doped GaN quantum barrier layer is 1.5×10 18 atoms / cm 3, the thickness of the Si-doped GaN quantum barrier layer is The total thickness of the multi-quantum well layer is

[0111] Specifically: the growth temperature is adjusted to 775°C, the growth pressure is 150 torr, the growth speed is 500 rpm, N2 is introduced as a carrier gas, and then In source, N source and Ga source are introduced to grow the InGaN quantum well layer; then Si source, N source and Ga source are used to grow the Si-doped GaN quantum barrier layer, and one cycle of growth is completed. Finally, the stacked growth is repeated for 8 cycles to obtain a multi-quantum well layer with a periodic structure.

[0112] (7) depositing an electron blocking layer on the multi-quantum well layer;

[0113] The electron blocking layer is an AlGaN layer, wherein the Al component accounts for 0.25, and the thickness of the electron blocking layer is 50 nm.

[0114] Specifically, the growth temperature was adjusted to 975° C., the growth pressure was 150 torr, the growth speed was 1100 rpm, N 2 was introduced as a carrier gas, and then Al source, N source and Ga source were introduced to grow the electron blocking layer.

[0115] (8) depositing a P-type semiconductor layer on the electron blocking layer;

[0116] The P-type semiconductor layer is a P-type GaN layer, the P-type dopant is Mg, and the doping concentration of the P-type dopant is 2.5×10 19 atoms / cm 3 , the thickness of the P-type semiconductor layer is 250nm.

[0117] Specifically, the growth temperature was adjusted to 940° C., the growth pressure was 150 torr, the growth speed was 800 rpm, H 2 was introduced as a carrier gas, and then Mg source, N source and Ga source were introduced to grow the P-type semiconductor layer.

[0118] Example 2

[0119] This embodiment provides a blue light emitting diode epitaxial wafer with high hydrolysis resistance, which is basically the same as that of embodiment 1, except that:

[0120] In the superlattice layer, the Si doping concentration of the Si-doped GaN layer is 4.5×10 18 atoms / cm 3 .

[0121] Example 3

[0122] This embodiment provides a blue light emitting diode epitaxial wafer with high hydrolysis resistance, which is basically the same as that of embodiment 2, except that:

[0123] The thickness of the GaN layer is 15 nm, the thickness of the Si-doped AlGaN layer is 15 nm, and the total thickness of the N-type semiconductor layer is 1.35 μm.

[0124] Example 4

[0125] This embodiment provides a blue light emitting diode epitaxial wafer with high hydrolysis resistance, which is basically the same as that of embodiment 2, except that:

[0126] In the superlattice layer, the thickness of the Si-doped GaN layer is The thickness of the InGaN layer is The total thickness of the superlattice layer is

[0127] Comparative Example 1

[0128] This comparative example provides a blue light LED epitaxial wafer with high hydrolysis resistance, which is basically the same as Example 1, except that:

[0129] The N-type semiconductor layer is a Si-doped GaN layer, and the Si doping concentration is 1.5×10 19 atoms / cm 3 , with a thickness of 1.575μm.

[0130] Comparative Example 2

[0131] This comparative example provides a blue light LED epitaxial wafer with high hydrolysis resistance, which is basically the same as Example 1, except that:

[0132] The N-type semiconductor layer is a periodic structure formed by cyclic alternating growth of a GaN layer and a Si-doped GaN layer; the number of periods is 45, the thickness of the GaN layer is 17 nm, the thickness of the Si-doped GaN layer is 18 nm, and the doping concentration of Si is 1.5×10 19 atoms / cm 3 , the total thickness of the N-type semiconductor layer is 1.575 μm.

[0133] Example 5

[0134] This embodiment provides a green LED epitaxial wafer with high hydrolysis resistance, which is basically the same as that of embodiment 1, except that:

[0135] The multi-quantum well layer is a periodic structure of alternating InGaN quantum well layers and Si-doped GaN quantum barrier layers, with a stacking period of 9. In a single period, the In composition of the InGaN quantum well layer is 0.3, and the thickness of the InGaN quantum well layer is The Si doping concentration in the Si-doped GaN quantum barrier layer is 1.5×1018 atoms / cm 3 , the thickness of the Si-doped GaN quantum barrier layer is The total thickness of the multi-quantum well layer is

[0136] Example 6

[0137] This embodiment provides a green LED epitaxial wafer with high hydrolysis resistance, which is basically the same as that of embodiment 5, except that:

[0138] In the superlattice layer, the Si doping concentration of the Si-doped GaN layer is 4.5×10 18 atoms / cm 3 .

[0139] Comparative Example 3

[0140] This comparative example provides a green LED epitaxial wafer with high hydrolysis resistance, which is basically the same as Example 5, except that:

[0141] The N-type semiconductor layer is a Si-doped GaN layer, and the Si doping concentration is 1.5×10 19 atoms / cm 3 , with a thickness of 1.575μm.

[0142] Comparative Example 4

[0143] This comparative example provides a green LED epitaxial wafer with high hydrolysis resistance, which is basically the same as Example 5, except that:

[0144] The N-type semiconductor layer is a periodic structure formed by cyclic alternating growth of a GaN layer and a Si-doped GaN layer; the number of periods is 45, the thickness of the GaN layer is 17 nm, the thickness of the Si-doped GaN layer is 18 nm, and the doping concentration of Si is 1.5×10 19 atoms / cm 3 , the total thickness of the N-type semiconductor layer is 1.575 μm.

[0145] Performance Testing

[0146] 1. Hydrolysis resistance: The LED epitaxial wafers obtained in the examples and comparative examples were made into 08mil*08mil LED lamp beads, which were then subjected to lighting tests. Subsequently, the obtained lamp beads were subjected to a hydrolysis resistance test (high temperature and high humidity, temperature 85°C, humidity 85%, back pressure -10V) for 336 hours, and the lighting condition of the obtained chips was tested. The test results are shown in Table 1 below.

[0147] Table 1 Hydrolysis resistance test results

[0148]

[0149]

[0150] From the above results, it can be seen that by using a periodic structure formed by the cyclic alternating growth of GaN layers and Si-doped AlGaN layers as the N-type semiconductor layer, and then arranging a superlattice layer formed by periodically alternating Si-doped GaN layers and InGaN layers on the N-type semiconductor layer, through the adjustment of the epitaxial structure, water molecules can be effectively blocked from entering the N-type semiconductor layer to corrode GaN, thereby improving the hydrolysis resistance of the blue-green LED epitaxial wafer, so that it can achieve 336 hours without lamp failure, and no additional chip process is required.

[0151] 2. The LED epitaxial wafers obtained in the embodiment and the comparative example were made into 08mil*08mil LED lamp beads, and the luminous brightness and forward voltage were tested. The test results are shown in Table 2.

[0152] Table 2 Test results of luminous brightness and forward voltage

[0153] Luminous brightness Forward voltage (V) Example 1 8.01 2.90 Example 2 8.05 2.88 Example 3 7.95 2.91 Example 4 7.89 2.89 Comparative Example 1 7.92 2.93 Comparative Example 2 7.86 2.92 Example 5 6.20 2.81 Example 6 6.25 2.76 Comparative Example 3 6.13 2.76 Comparative Example 4 6.18 2.83

[0154] From the above results, it can be seen that by using a periodic structure formed by cyclically alternating growth of GaN layers and Si-doped AlGaN layers as the N-type semiconductor layer, and then arranging a superlattice layer formed by periodically alternating stacked Si-doped GaN layers and InGaN layers on the N-type semiconductor layer, the current expansion performance can be effectively improved by adjusting the epitaxial structure, thereby improving the electrical performance of the LED lamp beads.

[0155] The above disclosure is only a preferred embodiment of the present invention and certainly cannot be used to limit the scope of the present invention. Therefore, equivalent changes made according to the claims of the present invention are still within the scope of the present invention.

Claims

1. A highly hydrolysis-resistant LED epitaxial wafer, characterized in that: The invention comprises a substrate, on which a buffer layer, a U-type GaN layer, an N-type semiconductor layer, a superlattice layer, a multi-quantum well layer, an electron blocking layer and a P-type semiconductor layer are sequentially arranged; Wherein, the N-type semiconductor layer is a periodic structure formed by cyclic alternating growth of GaN layer and Si-doped AlGaN layer; The superlattice layer includes Si-doped GaN layers and InGaN layers that are periodically and alternately stacked.

2. The highly hydrolysis-resistant LED epitaxial wafer according to claim 1, wherein The number of periods of the N-type semiconductor layer is 40-50, and the total thickness of the N-type semiconductor layer is 1.4 μm-1.6 μm.

3. The highly hydrolysis-resistant LED epitaxial wafer according to claim 2, wherein: In a single period, the thickness of the GaN layer is 15 nm to 20 nm, and the thickness of the Si-doped AlGaN layer is 15 nm to 20 nm.

4. The highly hydrolysis-resistant LED epitaxial wafer according to any one of claims 1 to 3, wherein: In the N-type semiconductor, the Si doping concentration in the Si-doped AlGaN layer is 1×10 19 atoms / cm 3 -2×10 19 atoms / cm 3 , the Al component accounts for 0.1-0.

2.

5. The highly hydrolysis-resistant LED epitaxial wafer according to claim 1, wherein: The number of periods of the superlattice layer is 3-6, and the total thickness of the superlattice layer is In a single period, the thickness ratio of the Si-doped GaN layer to the InGaN layer is (4-10):

1.

6. The highly hydrolysis-resistant LED epitaxial wafer according to claim 4, wherein: The doping concentration of Si in the Si-doped GaN layer is lower than the doping concentration of Si in the Si-doped AlGaN layer.

7. The highly hydrolysis-resistant LED epitaxial wafer according to claim 6, wherein: The Si doping concentration in the Si-doped GaN layer is 4×10 18 atoms / cm 3 -5×10 18 atoms / cm 3 ; The In component ratio in the InGaN layer is 0.1-0.

2.

8. The highly hydrolysis-resistant LED epitaxial wafer according to claim 1, wherein: The growth temperatures of the GaN layer and the Si-doped AlGaN layer are both greater than the growth temperatures of the Si-doped GaN layer and the InGaN layer; The growth pressures of the GaN layer and the Si-doped AlGaN layer are both greater than the growth pressures of the Si-doped GaN layer and the InGaN layer; The growth speeds of the GaN layer and the Si-doped AlGaN layer are both greater than the growth speeds of the Si-doped GaN layer and the InGaN layer.

9. A method for preparing a highly hydrolysis-resistant LED epitaxial wafer according to any one of claims 1 to 8, characterized in that: include: providing a substrate; depositing a buffer layer on the substrate; depositing a U-type GaN layer on the buffer layer; depositing an N-type semiconductor layer on the U-type GaN layer; depositing a superlattice layer on the N-type semiconductor layer; depositing a multi-quantum well layer on the superlattice layer; depositing an electron blocking layer on the multi-quantum well layer; depositing a P-type semiconductor layer on the electron blocking layer; Wherein, the N-type semiconductor layer is a periodic structure formed by cyclic alternating growth of GaN layer and Si-doped AlGaN layer; The superlattice layer includes Si-doped GaN layers and InGaN layers that are periodically and alternately stacked.

10. The method for preparing a highly hydrolysis-resistant LED epitaxial wafer according to claim 9, wherein: In the N-type semiconductor layer, the growth temperature of the GaN layer is 1080° C.-1120° C., the growth pressure is 200 torr-400 torr, and the growth speed is 1000 to 1200 rpm; the growth temperature of the Si-doped AlGaN layer is 1080° C.-1120° C., the growth pressure is 200 torr-400 torr, and the growth speed is 1000 to 1200 rpm; In the superlattice layer, the growth temperature of the Si-doped GaN layer is 800°C-850°C, the growth pressure is 100torr-200torr, and the growth speed is 400-600 rpm; the growth temperature of the InGaN layer is 800°C-850°C, the growth pressure is 100torr-200torr, and the growth speed is 400-600 rpm.

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