Laser etch for light emitting diode devices and related methods

Abstract

Solid state lighting devices are disclosed, and more particularly, laser etched light emitting diode (LED) devices and related methods are disclosed. An LED device adopting a sapphire substrate is difficult to etch by using a traditional technology, but the problems are solved by laser etching and sapphire substrate ablation. Laser etching a surface of a sapphire substrate may form light extraction features, including structures formed in or on a light emitting surface of the substrate. The light extraction feature may include a pattern having a feature repetition, the size of which together with a reduced substrate thickness provides a target emission distribution, such as a Lambert emission distribution, of the flip chip structure. In some embodiments, laser ablation of the sapphire substrate may also be used to form trenches between the active layer portions of the LED matrix to constitute pixels that reduce interference between the active layer portions. The trench may also be filled with a material having light altering properties to further optimize the desired emission characteristics.

Description

Technical Field

[0001] The present disclosure relates to solid-state lighting devices, and more particularly to laser etching and related methods for light emitting diode (LED) devices. Background Art

[0002] Solid-state lighting devices, such as light-emitting diodes (LEDs), are increasingly being used in both consumer and commercial applications. Advances in LED technology have resulted in highly efficient and mechanically robust light sources with long operating lives. As a result, modern LEDs have enabled a variety of new display applications and are increasingly being used in general lighting and automotive applications, often replacing incandescent and fluorescent light sources.

[0003] An LED is a solid-state device that converts electrical energy into light and typically includes one or more active layers (or active regions) of semiconductor material arranged between oppositely doped n-type and p-type layers. When a bias is applied to the doped layers, holes and electrons are injected into the one or more active layers, where they are recombined to generate emission, such as visible light or ultraviolet light. An LED chip typically includes an active region that can be made of, for example, silicon carbide, gallium nitride, gallium phosphide, aluminum nitride, gallium arsenide-based materials, and / or organic semiconductor materials. Photons generated by the active region are excited in all directions.

[0004] In general, it is desirable to operate an LED with the highest possible light emission efficiency, which can be measured by emission intensity related to output power (e.g., lumens per watt). A practical goal of improving emission efficiency is to maximize the extraction of light emitted by the active region in the desired light transmission direction. The light extraction efficiency and external quantum efficiency of an LED can be limited by a variety of factors, including internal reflection. According to the generally accepted meaning of Snell's law, photons that reach a surface (interface) between the surface of a light-emitting LED and the surrounding environment are either refracted or internally reflected. If photons are internally reflected in a repetitive manner, such photons are ultimately absorbed and never contribute to visible light emitted from the LED.

[0005] LED packages, modules, and fixtures have been developed that can include multiple LED emitters arranged in close proximity to one another. In such applications, the LED emitters can be arranged so that the emissions corresponding to the individual LED emitters are combined to produce a desired light emission. The emissions corresponding to the individual LED emitters can be selectively generated to provide similar or different emission characteristics. When different LED emitters are arranged in close proximity to one another, it can be difficult to produce high-quality light with the desired emission characteristics. Furthermore, conventional LED emitter packages can also impose limitations on the spacing between individual LED emitters.

[0006] The art continues to seek improved LED and solid-state lighting devices having desirable lighting characteristics that overcome challenges associated with traditional lighting devices. Summary of the Invention

[0007] The present disclosure relates to solid-state lighting devices, and more particularly to laser etching and related methods for light emitting diode (LED) devices. LED devices using sapphire substrates are difficult to etch using traditional techniques, but laser etching and sapphire substrate ablation overcome these difficulties. Laser etching the surface of a sapphire substrate can form light extraction features, including structures formed in or on the light emitting surface of the substrate. The light extraction features can include having a characteristic repeating pattern whose size, together with the reduced substrate thickness, provides a target emission distribution for a flip-chip structure, such as a Lambertian emission distribution. In some embodiments, laser ablation of the sapphire substrate can also be used to form grooves between active layer portions of an LED matrix to form pixels, which reduce interference between the active layer portions. The grooves can also be filled with a material having light-changing properties to further optimize the desired emission characteristics.

[0008] In an embodiment, an LED chip includes a substrate comprising a first surface and a second surface opposite the first surface, the substrate comprising a thickness of less than or equal to 500 micrometers (μm). The LED chip also includes an active LED structure located on the first surface of the substrate, the active LED structure configured to generate light through the substrate when electrically activated. The LED chip also includes a first plurality of light extraction features located on the second surface of the substrate according to a predetermined pattern, each light extraction feature in the first plurality of light extraction features comprising a height and a width, and an average ratio of the height to the width of each light extraction feature in the first plurality of light extraction features ranging from 0.3 to 1. In an embodiment, each light extraction feature in the first plurality of light extraction features includes a second plurality of light extraction features that are smaller than the first plurality of light extraction features. In an embodiment, the width of the first plurality of light extraction features may be between 1 μm and 30 μm. In an embodiment, the width of the second plurality of light extraction features may be between 10 nm and 500 nm. In an embodiment, the distribution of the second plurality of light extraction features is random. In an embodiment, the active LED structure includes a Group III nitride semiconductor material, and the substrate includes sapphire. In an embodiment, the first plurality of light extraction features and the second plurality of light extraction features comprise the same material as the substrate. In an embodiment, the first plurality of light extraction features are formed in an additional layer located on the second surface of the substrate. In an embodiment, the additional layer comprises at least one of glass, silicon nitride, silicon dioxide, and silicone. In an embodiment, the predetermined pattern comprises light extraction features uniformly distributed across the second surface of the substrate. In an embodiment, the predetermined pattern comprises light extraction features non-uniformly distributed across the second surface of the substrate. In an embodiment, the predetermined pattern comprises linear grooves across the second surface of the substrate. In an embodiment, the predetermined pattern comprises linear grooves having non-uniform spacing across the second surface of the substrate. In an embodiment, the predetermined pattern comprises a first region in the second surface of the substrate having a first density of light extraction features and a second region in the second surface of the substrate having a second density of light extraction features different from the first density. In an embodiment, the substrate is 500 μm thick when the light emitted by the LED chip is between 220 nm and 320 nm. In an embodiment, the substrate is 150 μm thick when the light emitted by the LED chip is between 400 nm and 550 nm.

[0009] In another embodiment, a method includes providing a light emitting diode (LED) wafer, the LED wafer including a substrate having a first surface and a second surface opposite the first surface; and an active LED structure located on the first surface of the substrate. The method also includes performing laser etching on the second surface of the substrate to form a first plurality of light extraction features according to a predetermined pattern. The method also includes separating a plurality of LED chips from the LED wafer, each of the plurality of LED chips including a portion of the active LED structure and a portion of the substrate having a light extraction feature from the first plurality of light extraction features. In an embodiment, the substrate is crystalline sapphire, and wherein, in response to the laser etching, the first plurality of light extraction features includes one or more amorphous sapphire deposits. In an embodiment, the method may further include etching the one or more amorphous sapphire deposits to form a second plurality of light extraction features in each of the first plurality of light extraction features. In an embodiment, the width of the first plurality of light extraction features may be between 1 μm and 10 μm, and the width of the second plurality of light extraction features may be between 10 nm and 500 nm. In an embodiment, laser etching at the second surface of the substrate includes laser etching an additional layer formed on the second surface of the substrate, the additional layer including at least one of glass, silicon nitride, silicon dioxide, and silica gel.

[0010] In embodiments, a method for fabricating a pixelated light emitting diode (LED) device includes forming an active LED structure on a first surface of a substrate; defining a plurality of scribe lines through the active layer to form a plurality of active layer portions, the plurality of active layer portions forming a plurality of pixels; and laser etching inter-pixel regions within the substrate along the scribe lines to form trenches in the inter-pixel regions of the substrate such that the pixels are at least partially optically isolated. In embodiments, the laser etching includes laser etching the first surface of the substrate. In embodiments, the laser etching includes laser etching a second surface of the substrate opposite the first surface. In embodiments, the method includes forming one or more layers having light-altering properties in the trenches. In embodiments, the light-altering properties may include reflective or absorptive properties. In embodiments, the method includes securing the pixelated LED lighting device to a printed circuit board substrate; and laser etching the inter-pixel regions to completely remove the substrate in the inter-pixel regions. In embodiments, the method includes laser etching the second surface of the substrate opposite the first surface to form a first plurality of light extraction features according to a predetermined pattern. In embodiments, the substrate is sapphire. In embodiments, the laser performing the laser etching is focused below the surface of the substrate. In an embodiment, the laser etching includes repeatedly pulsing an ultrafast laser, wherein each pulse of the ultrafast laser is shorter than 1 nanosecond.

[0011] In another aspect, any of the aforementioned aspects (alone or together) and / or the individual aspects and features described herein can be combined to achieve additional advantages. Unless otherwise indicated herein, any of the disclosed features and elements can be combined with one or more other disclosed features and elements.

[0012] Those skilled in the art will understand the scope of the present disclosure and realize additional aspects thereof after reading the following detailed description of the preferred embodiments in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate several aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.

[0014] Figure 1A is an exemplary non-Lambertian emission distribution of a light emitting diode (LED) chip mounted in a flip-chip manner with a sapphire substrate as the light emitting surface.

[0015] Figure 1B is an exemplary Lambertian emission distribution of an LED chip according to aspects of the present disclosure, the LED chip being flip-chip mounted with a sapphire substrate as the light emitting surface.

[0016] Figure 2 is a generalized cross-sectional view of an LED chip with a flip-chip orientation and light extraction features according to aspects of the present disclosure.

[0017] Figure 3 According to the principle of the present disclosure Figure 2 Cross-sectional view of a representative LED chip with flip-chip orientation and light extraction features arranged in a similar manner.

[0018] Figure 4 is a cross-sectional view of an LED chip. Figure 3 The LED chip in FIG is similar to that in FIG, except that the light extraction features are formed in an additional layer on the second surface of the substrate.

[0019] Figure 5 is a cross-sectional view of an LED chip. Figure 3 The LED chip is similar to the LED chip, except that the surface of the light extraction feature may include additional light extraction features formed thereon.

[0020] Figure 6 is with Figure 5 A focused ion beam (FIB) image of a portion of a similar LED chip.

[0021] Figure 7A and Figure 7B Depicted are exemplary light extraction feature distributions on an LED chip according to aspects of the present disclosure.

[0022] Figure 7C and Figure 7D Depicted are exemplary light extraction features in the form of grooves on an LED chip according to aspects of the present disclosure.

[0023] Figures 8A to 8D Depicted are exemplary light extraction features according to aspects of the present disclosure.

[0024] Figure 9 is a bottom overview diagram of a pixelated LED array with laser ablated trenches according to aspects of the present disclosure.

[0025] Figure 10 is a cross-sectional view of a pixelated LED array with laser ablated trenches according to aspects of the present disclosure.

[0026] Figure 11A and Figure 11B are cross-sectional views of pixelated LED arrays with different laser ablation arrangements according to aspects of the present disclosure.

[0027] Figure 12 is another cross-sectional view of a pixelated LED array having laser ablated trenches and a material having light-changing properties according to aspects of the present disclosure.

[0028] Figure 13 is a flow chart of a method for fabricating an LED device having laser-etched light extraction features on a substrate of the LED device according to aspects of the present disclosure.

[0029] Figure 14 is a flow chart of a method for making a pixelated LED device according to aspects of the present disclosure. DETAILED DESCRIPTION

[0030] The embodiments described below represent the necessary information to enable those skilled in the art to practice the embodiments and illustrate the best mode for practicing these embodiments. After reading the following description with reference to the accompanying drawings, those skilled in the art will understand the concepts of the present disclosure and will recognize applications of these concepts not specifically mentioned herein. It should be understood that these concepts and applications fall within the scope of the present disclosure and the appended claims.

[0031] It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element without departing from the scope of this disclosure. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0032] It will be understood that when an element such as a layer, region, or substrate is referred to as being “on” or extending “on” another element, it may be directly on or directly extending onto the other element, or there may be intervening elements. In contrast, when an element is referred to as being “directly on” or extending “directly” onto another element, there are no intervening elements. Similarly, it will be understood that when an element such as a layer, region, or substrate is referred to as being “on” or extending “on” another element, it may be directly on or directly extending onto the other element, or there may be intervening elements. In contrast, when an element is referred to as being “directly on” or extending “directly on” another element, there are no intervening elements. It will also be understood that when an element is referred to as being “connected” or “coupled” to another element, it may be directly connected or coupled to the other element, or there may be intervening elements. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements.

[0033] Relative terms, such as "below" or "above" or "upper" or "lower" or "horizontal" or "vertical", may be used herein to describe the relationship of one element, layer or region to another element, layer or region as illustrated in the figures. It will be understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the figures.

[0034] The terms used herein are for the purpose of describing specific embodiments only and are not intended to limit the present disclosure. As used herein, unless the context clearly indicates otherwise, the singular forms "a", "an", and "the" are also intended to include the plural forms. It should also be understood that the terms "comprise", "comprising", "include", and / or "including", when used herein, specify the presence of the recited features, wholes, steps, operations, elements, and / or parts, but do not preclude the presence or addition of one or more other features, wholes, steps, operations, elements, parts, and / or groups thereof.

[0035] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will also be understood that the terms used herein should be interpreted as having a meaning consistent with their meaning in the context of this specification and the relevant art, and will not be interpreted as idealized or overly formal unless explicitly defined as such herein.

[0036] Embodiments are described herein with reference to schematic illustrations of embodiments of the present disclosure. Therefore, the actual sizes of layers and elements may be different, and due to, for example, manufacturing technology and / or tolerances, variations in the shapes of the illustrations are expected. For example, a region shown or described as a square or rectangle may have circular or curved features, and a region shown as a straight line may have some irregularities. Therefore, the regions shown in the figures are schematic, and their shapes are not intended to illustrate the precise shape of the region of the device, and are not intended to limit the scope of the present disclosure. In addition, for illustrative purposes, the size of a structure or region may be exaggerated relative to other structures or regions, and the size of the structure or region is therefore provided to illustrate the general structure of this theme, and the size of the structure or region may or may not be drawn to scale. Common elements between figures may be illustrated herein using common element numbers, and may not be repeatedly described subsequently.

[0037] The present disclosure relates to solid-state lighting devices, and more particularly to laser etching and related methods for light emitting diode (LED) devices. LED devices using sapphire substrates are difficult to etch using traditional techniques, but laser etching and sapphire substrate ablation overcome these difficulties. Laser etching the surface of a sapphire substrate can form light extraction features, including structures formed in or on the light emitting surface of the substrate. The light extraction features can include having a characteristic repeating pattern whose size, together with the reduced substrate thickness, provides a target emission distribution for a flip-chip structure, such as a Lambertian emission distribution. In some embodiments, laser ablation of the sapphire substrate can also be used to form grooves between active layer portions of an LED matrix to form pixels, which reduce interference between the active layer portions. The grooves can also be filled with a material having light-changing properties to further optimize the desired emission characteristics.

[0038] An LED chip typically includes an active LED structure or active region that can have many different semiconductor layers arranged in many different ways. The fabrication and operation of LEDs and their active structures are generally known in the art and are only briefly discussed herein. The layers of the active LED structure can be fabricated using known processes, with a suitable process being metal organic chemical vapor deposition. The layers of the active LED structure typically include many different layers and typically include an active layer sandwiched between oppositely doped n-type and p-type epitaxial layers, all of which are formed continuously on a growth substrate. It should be understood that additional layers and elements may also be included in the active LED structure, including but not limited to buffer layers, nucleation layers, superlattice structures, undoped layers, cladding layers, contact layers, and current diffusion layers as well as light extraction layers and elements. The active layer may include a single quantum well, a multiple quantum well, a double heterostructure, or a superlattice structure.

[0039] Active LED structures can be made from different material systems, some of which are based on Group III nitride material systems. Group III nitrides refer to those semiconductor compounds formed between nitrogen (N) and elements in Group III of the periodic table, typically aluminum (Al), gallium (Ga), and indium (In). Gallium nitride (GaN) is a common binary compound. Group III nitrides also refer to ternary and quaternary compounds, such as aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and aluminum indium gallium nitride (AlInGaN). For Group III nitrides, silicon (Si) is a common n-type dopant, and magnesium (Mg) is a common p-type dopant. Therefore, for Group III nitride-based material systems, the active layer, n-type layer, and p-type layer can include one or more layers of GaN, AlGaN, InGaN, and AlInGaN that are undoped or doped with Si or Mg. Other material systems include silicon carbide (SiC), organic semiconductor materials, and other III-V systems such as gallium phosphide (GaP), gallium arsenide (GaAs), and related compounds.

[0040] Different embodiments of the active LED structure can emit light of different wavelengths depending on the composition of the active layer and the n-type and p-type layers. In some embodiments, the active LED structure can emit blue light having a peak wavelength ranging from approximately 430 nanometers (nm) to 480 nm. In other embodiments, the active LED structure can emit green light having a peak wavelength ranging from 500 nm to 570 nm. In other embodiments, the active LED structure can emit red light having a peak wavelength ranging from 600 nm to 650 nm. In some embodiments, the active LED structure can emit light having a peak wavelength anywhere in the visible spectrum, for example, with a peak wavelength primarily ranging from 400 nm to 700 nm.

[0041] In certain embodiments, the active LED structure can be configured to emit light outside the visible spectrum, including one or more portions of the ultraviolet (UV), infrared (IR), or near-IR spectrum. The UV spectrum is generally divided into three wavelength range categories, which are represented by the letters A, B, and C. In this manner, UV-A light is generally defined as having a peak wavelength range of 315 nm to 400 nm, UV-B is generally defined as having a peak wavelength range of 280 nm to 315 nm, and UV-C is generally defined as having a peak wavelength range of 100 nm to 280 nm. UV LEDs are of particular interest for use in applications related to the disinfection of microorganisms in air, water, and surfaces, among others. In other applications, UV LEDs can also be provided with one or more fluorescent materials to provide an LED package with aggregated emission having a broad spectrum and improved color quality for visible light applications. The near-IR and / or IR wavelengths of the LED structures of the present disclosure can have wavelengths above 700 nm, such as in the range of 750 nm to 1100 nm or greater.

[0042] The LED chip may also be covered with one or more fluorescent materials or other conversion materials, such as phosphors, such that at least some of the light from the LED chip is absorbed by the one or more phosphors and converted to one or more different wavelength spectra according to the characteristic emission from the one or more phosphors. In some embodiments, the combination of the LED chip and the one or more phosphors emits a substantially white light combination. The one or more phosphors may include yellow (e.g., YAG:Ce), green (e.g., LuAg:Ce), and red (e.g., Ca i-x-y Sr x Eu yAlSiN3) emitting phosphors and combinations thereof. The fluorescent materials described herein may be or may include one or more of a phosphor, a scintillator, a fluorescent ink, a quantum dot material, a dayglow strip, and the like. The fluorescent material may be provided in any suitable manner, such as directly coated on one or more surfaces of the LED, dispersed in an encapsulation material configured to cover one or more LEDs, and / or coated on one or more optical or support elements (e.g., by powder coating, inkjet printing, etc.). In some embodiments, the fluorescent material may be down-converting or up-converting, and a combination of down-converting and up-converting materials may be provided. In some embodiments, a plurality of different (e.g., different in composition) fluorescent materials arranged to produce different peak wavelengths may be arranged to receive emission from one or more LED chips. In some embodiments, one or more phosphors may include a yellow phosphor (e.g., YAG:Ce), a green phosphor (e.g., LuAg:Ce), and a red phosphor (e.g., Ca i-x- y Sr x Eu y One or more fluorescent materials can be disposed on one or more portions of the LED chip and / or substrate in various configurations.

[0043] Light emitted by the active layer or active region of an LED chip can typically propagate in multiple directions. For targeted directional applications, internal reflectors or external reflective surfaces can be used to redirect as much light as possible into the desired emission direction. The internal reflector can include a single layer or multiple layers. Some multilayer reflectors include a metal reflective layer and a dielectric reflective layer, wherein the dielectric reflective layer is arranged between the metal reflective layer and the multiple semiconductor layers. A passivation layer is arranged between the metal reflective layer and a first electrical contact and a second electrical contact, wherein the first electrical contact is arranged to be in conductive electrical communication with the first semiconductor layer, and the second electrical contact is arranged to be in conductive electrical communication with the second semiconductor layer. For single or multilayer reflectors that include a surface with a reflectivity of less than 100%, some light may be absorbed by the reflector. In addition, light redirected through the active LED structure may be absorbed by other layers or components within the LED chip.

[0044] As used herein, a layer or region of a light emitting device may be considered "transparent" when at least 80% of the emitted radiation incident on the layer or region is emitted through the layer or region. Additionally, as used herein, a layer or region of an LED may be considered "reflective" or embodied as a "mirror" or "reflector" when at least 80% of the emitted radiation incident on the layer or region is reflected. In some embodiments, the emitted radiation comprises visible light, such as blue and / or green LEDs with or without fluorescent materials. In other embodiments, the emitted radiation may comprise invisible light. For example, in the context of GaN-based blue and / or green LEDs, silver (Ag) may be considered a reflective material (e.g., at least 80% reflective). In the case of UV LEDs, appropriate materials may be selected to provide a desired, and in some embodiments high, reflectivity and / or a desired, and in some embodiments low, absorptivity. In certain embodiments, a "light transmissive" material may be configured to transmit at least 50% of the emitted radiation of a desired wavelength.

[0045] The present disclosure can be used for LED chips having various geometries, including flip-chip geometries. The flip-chip structure of the LED typically includes an anode connection and a cathode connection made from the same side or face of the LED chip. The anode and cathode sides are typically configured as mounting surfaces of the LED chip for flip-chip mounting to another surface, such as a printed circuit board. In this regard, the anode connection and cathode connection on the mounting surface are used to mechanically join and electrically couple the LED chip to the other surface. When mounted in a flip-chip manner, the opposite side or face of the LED chip corresponds to a light emitting surface oriented toward a predetermined emission direction. In some embodiments, the growth substrate of the LED chip can form the light emitting surface and / or be adjacent to the light emitting surface when mounted in a flip-chip manner. During chip fabrication, the active LED structure can be epitaxially grown on the growth substrate.

[0046] The growth substrate can typically include a variety of materials, such as sapphire (Al2O3), SiC, aluminum nitride (AlN), and GaN. Sapphire is a common substrate for group III nitrides and has certain advantages, including low cost, mature manufacturing processes, and good optical properties for light transmission. However, sapphire is also known to exhibit guided modes for light propagation, which results in some lateral waveguiding within the substrate. In this way, the light emission pattern of sapphire-based flip-chips may not be completely Lambertian in nature. Instead, the enhanced intensity of light may be emitted toward the peripheral edges of such LED chips.

[0047] Figure 1A is an exemplary emission distribution of an LED chip mounted in flip-chip fashion with a sapphire substrate as the light emitting surface. Figure 1AIn the figure, the emission angle is plotted as measured from the direction normal to the light-emitting surface of the LED chip. Therefore, an angle of 0° represents the direction perpendicular to the center of the light-emitting surface. The light generated in the active LED structure can pass through the sapphire substrate before leaving the chip and contributing to the emission distribution. Figure 1A As shown in Figure 1, lateral waveguides within the sapphire substrate may result in a drop in emission intensity at an angle of 0°. While such an emission profile is acceptable for many LED applications, certain directional applications (including flashlights, beams, and stage lighting) may prefer a more Lambertian emission profile. Traditional LED chip structures (such as those in which the active LED structure is flip-chip mounted to a carrier substrate and the growth substrate is removed) have been developed to address the aforementioned shortcomings of the sapphire substrate. However, such techniques typically involve more complex manufacturing processes with associated increased costs.

[0048] According to the principles of the present disclosure, a sapphire substrate structure for a flip-chip LED is disclosed that provides a more Lambertian emission distribution. Such a structure includes a combination of certain substrate thicknesses and various light extraction features disposed along the light emitting surface. In this manner, aspects of the present disclosure can provide exemplary emission distributions for flip-chip LEDs having a sapphire substrate, such as Figure 1B As shown. In this regard, enhanced light emission is provided at or near an angle of 0°, while reduced light emission is provided at wider angles (such as ±30° or greater). Although the embodiments of the present disclosure are described in the context of a sapphire substrate, the disclosed principles are equally applicable to other growth substrates that may exhibit lateral waveguiding, including AlN substrates and SiC substrates.

[0049] Figure 2 is a generalized cross-sectional view of an LED chip 10 having a flip-chip orientation according to aspects of the present disclosure. The LED chip 10 includes an active LED structure 12 formed on a substrate 14 or growth substrate. In some embodiments, one or more buffer layers and / or undoped layers 16 can be disposed between the substrate 14 and the active LED structure 12. The substrate 14 can be embodied as a patterned substrate such that a first surface 14' of the substrate 14 closest to the active LED structure 12 is patterned. The first surface 14' can include a plurality of recessed features and / or raised features that form an interface that enhances light extraction between the active LED structure 12 and the substrate 14. A plurality of metallization layers, dielectric layers, and / or reflective layers can be disposed on a side of the active LED structure 12 opposite the substrate 14, which layers are disposed between the substrate 14 and the active LED structure 12. Figure 2 The anode contact 20 and cathode contact 22 complete the LED chip 10. As shown, the anode / cathode side of the LED chip 10 forms the mounting surface 10. M , and the opposite surface of the LED chip 10 forms the main light emitting surface 10LE As shown in the figure, the main light emitting surface 10 LE The second surface 14' corresponding to the substrate 14 is opposite to the first surface 14'. As used herein, the main light emitting surface 10 LE The intended light exit surface for the majority of the light generated by the active LED structure 12 is formed.

[0050] When the LED chip 10 is electrically activated, light generated within the active LED structure 12 can enter the substrate 14 and follow any number of light propagation paths. The escape cone 21 shows the angle at which light 23-1 located at or approximately normal to the second surface 14" can escape from the substrate 14 along a desired emission direction. Light 23-2 that reaches the second surface 14" at an angle outside the escape cone 21 can be laterally redirected within the substrate 14, thereby forming a lateral waveguide. In some embodiments, the second surface 14" of the substrate 14 is formed with light extraction features 24 that form non-planar surfaces that increase the probability that the laterally propagating light 23-2 can escape from the second surface 14" as light 23-3 along a desired emission direction. The light extraction features 24 can be embodied as protrusions raised from the substrate 14, such as an array of conical protrusions. In some embodiments, the light extraction features 24 are formed in the substrate 14 by a subtractive process, such as etching. The light extraction features 24 can form a repeating pattern across one or more portions of the substrate 14. In some embodiments, the light extraction features 24 can be arranged in an array across the surface of the substrate 14 in a variety of predetermined patterns (such as in lines or other shapes), or arranged at different densities in different areas of the surface of the substrate 14 depending on the desired light emission characteristics. In some embodiments, the light extraction features 24 form a tapered array in the second surface 14". In the absence of the light extraction features 24, the laterally propagating light 23-2 may continue to produce Figure 1A As will be described in more detail below, the dimensions of the light extraction features 24 and the thickness of the substrate 14 are disclosed, which provide a non-Lambertian light emission similar to Figure 1B light emission pattern.

[0051] In an embodiment, the light extraction feature 24 can be formed by ultrafast laser etching, wherein ultrashort pulses of a sub-bandgap laser can be used to induce nonlinear photoionization when they are tightly focused within the substrate material and / or dielectric material. In certain embodiments, such laser etching involves providing a laser focus below the surface of the material and forming a subsurface damage region. The laser parameters can be configured to promote the propagation of the subsurface damage region to the surface of the material to form the light extraction feature 24. In the context of ultrafast lasers, ultrashort pulses refer to pulses with pulse lengths on the order of femtoseconds to picoseconds, or pulses shorter than nanoseconds. Laser modification can be manifested in several ways, including local changes in the refractive index of the material and / or an increase in the chemical etching rate of the material. Modifying a material in this manner is generally referred to as femtosecond direct laser writing (fs-DLW) or ultrafast laser imprinting (ULI). Because the material modification is confined to the laser focus volume, ULI can be performed deep within a transparent substrate, with its resolution primarily determined by the pulse energy and the size and shape of the laser focus. Thus, translating the material through the laser focus in three dimensions allows for the imprinting of channels, planes, or volumes of arbitrary shape.

[0052] Increased chemical etch rates are beneficial due to the nature of the substrate being etched. For example, using sapphire as a substrate in LED chips offers numerous advantages and benefits, including the ability to achieve higher-power, higher-contrast LED matrices at a lower cost and with higher brightness compared to SiC-based substrates. However, sapphire substrates are difficult to etch or otherwise texture because they are harder and chemically inert than SiC substrates. Consequently, etching sapphire substrates is significantly more expensive and challenging than etching SiC substrates.

[0053] By etching or otherwise texturing a sapphire substrate using ultrafast laser etching, the crystalline sapphire can be textured and / or locally removed, leaving behind amorphous sapphire deposits that are more sensitive to chemical etchants, thereby making the amorphous sapphire deposits easier to remove after the ultrafast laser etching is performed. Between the ultrafast etching removal of a relatively large portion of the sapphire crystal and the ultralocal modification, the ultrafast laser etching and subsequent chemical etching can form larger scale light extraction features (e.g., 24) having widths between 1 μm and 10 μm, as well as smaller scale light extraction features (e.g., 24) having widths between 10 nm and 500 nm. Figure 5 60 in the ).

[0054] Figure 3 According to the principle of the present disclosure Figure 2A cross-sectional view of a representative LED chip 26 arranged in a flip-chip configuration is similarly shown. As shown, the active LED structure 12 generally includes a p-type layer 28, an n-type layer 30, and an active layer 32 formed on a substrate 14. In some embodiments, one or more buffer layers and / or undoped layers 16 may be disposed between the substrate 14 and the active LED structure 12. The substrate 14 may be embodied as a patterned substrate such that a first surface 14′ of the substrate 14 closest to the active LED structure 12 is patterned, such as for Figure 2 as described. In some embodiments, the n-type layer 30 is located between the active layer 32 and the substrate 14. In other embodiments, the doping order can be reversed. The substrate 14 can include many different materials such as sapphire or AlN or SiC, and can have one or more surfaces that are shaped, textured, or patterned to enhance light extraction. In some embodiments, the substrate 14 is transmissive (preferably transparent) to the wavelength of light generated by the active layer 32. For example, the substrate 14 can include a material that transmits at least 80% or at least 90% of the light generated by the active LED structure 12. In some embodiments, the active LED structure 12 includes a Group III nitride semiconductor material or an (Al, In, Ga)N material, and the substrate 14 includes sapphire.

[0055] The LED chip 26 may also include a first reflective layer 34 disposed on the portion of the p-type layer 28 with the current spreading layer 36 therebetween. The first reflective layer 34 may include many different materials, and preferably includes a material that exhibits a refractive index step with the material of the active LED structure 12 to promote total internal reflection (TIR) ​​of light generated from the active LED structure 12. Light that undergoes total internal reflection is redirected without experiencing absorption or loss, and thereby may contribute to useful or desired LED chip emission. In some embodiments, the first reflective layer 34 includes a material having a refractive index lower than the refractive index of the material of the active LED structure 12. The first reflective layer 34 may include many different materials, some of which have a refractive index less than 2.3, while other materials may have a refractive index less than 2.15, less than 2.0, and less than 1.5. In some embodiments, the first reflective layer 34 includes a dielectric material, some embodiments including silicon dioxide (SiO2) and / or silicon nitride (SiN). It should be understood that many dielectric materials may be used, such as SiN, SiN x , Si3N4, Si, germanium (Ge), SiO2, SiO x , titanium dioxide (TiO2), tantalum pentoxide (Ta2O5), indium tin oxide (ITO), magnesium oxide (MgO x), zinc oxide (ZnO), and combinations thereof. In some embodiments, the first reflective layer 34 can include multiple alternating layers of different dielectric materials, such as alternating layers of SiO2 and SiN, symmetrically repeated or asymmetrically arranged. Some Group III nitride materials (such as GaN) can have a refractive index of approximately 2.4, SiO2 can have a refractive index of approximately 1.48, and SiN can have a refractive index of approximately 1.9. Embodiments having an active LED structure 12 comprising GaN and a first reflective layer 34 comprising SiO2 can have a sufficient refractive index step between the two to allow efficient total internal reflection of light. Depending on the type of material used, the first reflective layer 34 can have different thicknesses, in some embodiments having a thickness of at least 0.2 microns (μm). In some of these embodiments, the first reflective layer 34 can have a thickness ranging from 0.2 μm to 0.7 μm, and in some of these embodiments, the thickness can be approximately 0.5 μm. A portion of the first reflective layer 34 can extend along the sidewalls of the mesa of the active LED structure 12.

[0056] The current spreading layer 36 may be embodied as a layer of conductive material, such as a transparent conductive oxide (such as ITO) or a metal (such as platinum Pt), although other materials may also be used. In some embodiments, the current spreading layer 36 may continuously cover the p-type layer 28. In other embodiments and as Figure 3 As shown, the current spreading layer 36 can be formed with a plurality of openings or even discontinuous regions that allow portions 34′ of the first reflective layer 34 to extend through the current spreading layer 36 and contact the p-type layer 28. In this manner, an interface formed between the p-type layer 28 and the first reflective layer 34 that does not include the current spreading layer 36 can exhibit increased reflectivity of light generated by the active LED structure 12. Although the current spreading layer 36 may not continuously cover the p-type layer 28, the openings or discontinuous regions of the current spreading layer 36 can have sufficiently small lateral dimensions to still properly spread current along the p-type layer 28.

[0057] The LED chip 26 may also include a second reflective layer 38 positioned on the first reflective layer 34 such that the first reflective layer 34 is disposed between the active LED structure 12 and the second reflective layer 38. The second reflective layer 38 may include a metal layer configured to reflect any light that may pass through the first reflective layer 34 away from the active LED structure 12. The second reflective layer 38 may include many different materials, such as Ag, gold (Au), Al, or combinations thereof. As shown, the second reflective layer 38 may include one or more reflective layer interconnects 40 that provide a conductive path through the first reflective layer 34 to the current spreading layer 36. In some embodiments, the reflective layer interconnects 40 include reflective layer vias. Thus, the first reflective layer 34, the second reflective layer 38, and the reflective layer interconnects 40 form a reflective structure for the LED chip 26. In some embodiments, the reflective layer interconnects 40 include the same material as the second reflective layer 38 and are formed simultaneously with the second reflective layer 38. In other embodiments, the reflective layer interconnects 40 may include a different material than the second reflective layer 38. The LED chip 26 may also include a barrier layer 42 on the side of the second reflective layer 38 opposite the first reflective layer 34 to prevent the second reflective layer 38 material (such as Ag) from migrating to other layers. Preventing such migration helps the LED chip 26 maintain efficient operation throughout its life. The barrier layer 42 may include a conductive material, suitable materials including but not limited to sputtering Ti / Pt followed by evaporation of Au bulk material or sputtering Ti / Ni followed by evaporation of Ti / Au bulk material. A passivation layer 44 is included on the barrier layer 42 and on any portion of the second reflective layer 38 that may not be covered by the barrier layer 42. The passivation layer 44 may also be disposed on portions of the first reflective layer 34 that are not covered by the second reflective layer 38. The passivation layer 44 protects the LED chip 26 and provides electrical insulation therefor, and may include many different materials, such as dielectric materials. In some embodiments, the passivation layer 44 is a single layer, and in other embodiments, the passivation layer 44 includes multiple layers. Suitable materials for the passivation layer 44 include but are not limited to SiN, SiN x In some embodiments, the first reflective layer 34 includes SiO2 and the passivation layer 44 includes SiN, SiN x In other embodiments, at least a portion of the first reflective layer 34 and the passivation layer 44 may include SiO 2 .

[0058] exist Figure 3, LED chip 26 includes a p-contact 46 and an n-contact 48 disposed on passivation layer 44 and configured to provide electrical connections to active LED structure 12. P-contact 46 (which may also be referred to as an anode contact) may include one or more p-contact interconnects 50 extending through passivation layer 44 to barrier layer 42 or to second reflective layer 38 to provide an electrical path to p-type layer 28. In some embodiments, one or more p-contact interconnects 50 include one or more p-contact vias. N-contact 48 (which may also be referred to as a cathode contact) may include one or more n-contact interconnects 52 extending through passivation layer 44, barrier layer 42, first and second reflective layers 34 and 38, p-type layer 28, and active layer 32 to provide an electrical path to n-type layer 30. In some embodiments, one or more n-contact interconnects 52 include one or more n-contact vias. In operation, a signal applied across p-contact 46 and n-contact 48 is conducted to p-type layer 28 and n-type layer 30, causing LED chip 26 to emit light from active layer 32. P-contact 46 and n-contact 48 can include many different materials, such as Au, copper (Cu), nickel (Ni), In, Al, Ag, tin (Sn), Pt, or combinations thereof. In further embodiments, p-contact 46 and n-contact 48 can include conductive oxides and transparent conductive oxides, such as ITO, nickel oxide (NiO), ZnO, cadmium tin oxide, indium oxide, tin oxide, magnesium oxide, ZnGa2O4, ZnO2 / Sb, Ga2O3 / Sn, AgInO2 / Sn, In2O3 / Zn, CuAlO2, LaCuOS, CuGaO2, and SrCu2O2. The choice of material used can depend on the location of the contacts and the desired electrical properties, such as transparency, junction resistivity, and sheet resistance. As described above, the LED chip 26 is arranged for flip-chip mounting, and the p-contact 46 and n-contact 48 are configured to be mounted or bonded to a surface such as a printed circuit board. M The second surface 14" of the substrate 14 forms the light emitting surface 26 of the LED chip 26. LE .

[0059] exist Figure 3 The thickness 14 of the substrate 14 is T and the height 24 of the light extraction features 24 H and width 24 W is configured to reduce lateral waveguides and provide a similar Figure 1B For illustration purposes, Figure 3 The relative sizes of the light extraction features 24 may be exaggerated. According to aspects of the present disclosure, the thickness 14 of the substrate 14 TCan be less than or equal to 500 μm or less, or 150 μm or less, or less than or equal to 75 μm, or less than or equal to 60 μm, or less than or equal to 50 μm, or less than or equal to 25 μm, or less than or equal to 10 μm, or a range defined by any of the above specified values ​​with 0.5 μm as the lower limit. In some embodiments, depending on the wavelength of the emitted light, thickness values ​​greater than 100 μm may exhibit undesirable levels of lateral waveguiding, particularly for directional lighting applications. In other embodiments, when the emitted light is in the UVC / UVB range (e.g., 220 to 320 nm), the substrate 14 can be 500 μm thick. In other embodiments, when the emitted light is in the 400 to 550 nm wavelength range, the substrate 14 can be 150 μm thick. As used in this application, "light" includes emission from the LED chip in the UVC / UVB range, even though it may be outside the visible range of the human eye. According to further aspects of the present disclosure, the height 24 of the light extraction feature 24 H and width 24 W The height 24 of the light extraction features 24 may be greater than about 0.5 μm, or may be within a range from 0.5 μm to 10 μm, among other ranges. H and / or width 24 W It may be larger, such as up to about 100 μm, or even the same or similar value as the thickness of substrate 14. It has also been found that regardless of the actual size, the average height 24 of the individual light extraction features 24 across substrate 14 is H With width 24 W The ratio (ie height 24 H Divide by the width 24 W ) is set in the range of from 0.3 to 1, or in the range of from 0.3 to 0.7, or in the range of from 0.3 to 0.6, and can be in all the above-specified thicknesses 14 T values ​​provide an improved Lambertian emission pattern.

[0060] Figure 4 is a cross-sectional view of an LED chip 54. Figure 3 The LED chip 26 is similar to that in FIG, except that the light extraction features 24 are formed in an additional layer 56 on the second surface 14″ of the substrate 14. Figure 3 Unlike the light extraction features 24 shown, which are formed directly in portions of the substrate 14, Figure 4The light extraction features 24 are formed in the additional layer 56. In some embodiments, the additional layer 56 can include a material that is transmissive and / or transparent to the wavelengths of light generated by the active layer 32. For example, the additional layer 56 can include a material that transmits at least 80% or at least 90% of the light from the active LED structure 12. Exemplary materials for the additional layer 56 include glass, silicon nitride, SiO2, and silicone. The light extraction features 24 can be pre-formed in the additional layer 56 before the additional layer 56 is applied to the substrate 14. In other embodiments, the light extraction features 24 can be formed in the additional layer after the additional layer 56 is added to the substrate 14. In some embodiments, the height 24 of the light extraction features 24 in the additional layer 56 is greater than or equal to 20%. H and width 24 W Can be combined with the above Figure 3 Same as described.

[0061] Figure 5 is a cross-sectional view of an LED chip 58. Figure 3 24, except that the surface of the light extraction features 24 may include additional light extraction features 60 formed thereon. In this regard, the additional light extraction features 60 may have a smaller size than the larger light extraction features 24 and further increase the likelihood of light escaping the substrate 14. In some embodiments, the additional light extraction features 60 may have a height and / or width that is smaller than the light extraction features 24, such as less than the height 24 of the light extraction features 24. H and / or width 24 W 0.5 times, or less than 0.3 times, or less than 0.1 times. Although the light extraction features 24 can be formed in a repeating pattern across the substrate 14, the additional light extraction features 60 can be formed in an irregular arrangement, such as random texturing along the sidewalls or side surfaces of the light extraction features 24. In some embodiments, the additional light extraction features 60 can be formed simultaneously with the larger light extraction features 24. For example, the light extraction features 24 can be formed by the ultrafast laser etching process described above, and the operating parameters of the laser ablation can be adjusted to form the irregularities of the additional light extraction features 60. In other embodiments, the additional light extraction features 60 can be formed in a subsequent step, such as chemical or plasma etching through a mask applied to the larger light extraction features 24. In a specific example, a nanoparticle solution can be spin-coated onto the light extraction features 24 so that the nanoparticles form various nano-etching masks distributed along the light extraction features 24. The additional light extraction features 60 can then be formed through the nano-etching mask by an etching process (such as plasma etching). After etching, the nanoparticles can be removed.

[0062] Figure 6 is with Figure 5Focused ion beam (FIB) image of a portion of LED chip 62 that is similar to LED chip 58. The FIB image depicts light extraction features 24 formed as grooves on substrate 14. In other embodiments, the light extraction features 24 can be in the form of other shapes or sizes. The light extraction features 24 can include a second plurality of smaller light extraction features 60 that are formed due to ultra-local modification caused by ultrafast laser etching and subsequent chemical etching to remove deposits left by the ultrafast laser etching. The second plurality of light extraction features 60 can be relatively random in size and distribution. In other embodiments, the laser parameters can be set to produce smaller light extraction features within a predetermined size range and having a predetermined distribution on the light extraction features 24.

[0063] Figure 7A and Figure 7B An exemplary light extraction feature distribution on LED chips 70 and 71 according to aspects of the present disclosure is shown. Due to the ability to easily adjust the focal location and / or position of the LED chips relative to the laser, LED chips 70 and 71 can be formed with multiple light extraction features arranged in a variety of predetermined patterns. LED chips 70 and 71 can be similar to LED chips 62 and 58, etc.

[0064] exist Figure 7A , a plurality of light extraction features 24 can be formed in a regular, evenly spaced pattern on the substrate surface of the LED chip 70. The number and / or density of the plurality of light extraction features 24 can vary based on the size of the light extraction features 24, the size of the LED chip 70, and / or the desired emission characteristics of the LED chip 70.

[0065] exist Figure 7B In FIG. 5 , the plurality of light extraction features 24 formed on the LED chip 71 may have a density that varies across different regions of the LED chip 71. For example, Figure 7B As shown, the light extraction features 24 can be distributed more densely in the central region of the surface of the LED chip 71 and more sparsely in the non-central regions of the surface of the LED chip 71. The density gradient can change the emission brightness, contrast, or light interference caused by the LED chip 71, and thus the distribution can be selected based on the desired emission characteristics of the LED chip 71.

[0066] Figure 7C and Figure 7D Exemplary light extraction features in the form of grooves on LED chips 72 and 73 according to aspects of the present disclosure are shown. Figure 7A and Figure 7B Similar to the example in FIG. 1 , the light extraction features 24 may have different distributions across the tops of the LED chips 72 and 73, except that Figure 7C and Figure 7DIn FIG, the light extraction features 24 can be in the form of grooves formed across the surfaces of the LED chips 72 and 73. The grooves can be straight lines as depicted, or in other embodiments can be non-straight lines, or take the form of circles, squares, or any other shape. Figure 7D In the embodiment, the grooves of the light extraction features 24 can be more densely spaced at the center and at the Figure 7C The middle grooves are evenly distributed across the LED chips 72 .

[0067] Figures 8A to 8D Depicted are exemplary light extraction features according to aspects of the present disclosure.

[0068] In embodiments, secondary smaller light extraction features can be formed without the use of masks. Figures 8A to 8D In FIG, after the initial etching is completed using an ultrafast laser to form the light extraction features 24, a thin film of Ag is deposited on the surface. Figure 8A In the case of a 50 Å thick Ag film, Figure 8B A 150A thick film was deposited in Figure 8C In the , a 100 Å thick film was deposited and Figure 8D A 200 Å thick film was deposited in a wafer. The wafer was then annealed at 400°C, causing surface dewetting. Generally, the thicker the film, the larger the size of light extraction features 81, 82, 83, and 84. For example, light extraction feature 81 can have a diameter of approximately 10 nm to 60 nm, while light extraction feature 84 can have a diameter between 200 nm and 500 nm.

[0069] Figure 9 is a bottom overview diagram of a pixelated LED array with laser ablated trenches according to aspects of the present disclosure.

[0070] In addition to forming light extraction features through ultrafast laser etching, ultrafast lasers can also be used to ablate sapphire substrates to remove material, thereby changing the light emission characteristics of the LED array. For example, an LED array 90 having multiple active layer portions 92 that can be configured to emit light can be grown on a sapphire substrate. To reduce crosstalk and interference between active layer portions 92, the sapphire substrate can be ablated to form grooves 91 between active layer portions 92. The grooves can pixelate the LED array 90, thereby changing the light emission characteristics of the LED array 90 to improve the contrast between pixels.

[0071] In the past, when using SiC-based substrates, similar grooves were formed using various forms of wet or dry etching, but these techniques are not feasible for sapphire substrates. Sapphire substrates are highly valued for their hardness and ability to handle higher power, high contrast LED matrices - however, etching sapphire substrates using existing wet and dry etching chemistries is not feasible. Using ultrafast laser etching to ablate the sapphire substrate to form grooves 91 overcomes previous challenges. Ultrafast lasers enable fine control of the depth and width of grooves 91 by modulating the spatiotemporal width, focal area, power, and wavelength of the laser pulses. As a result, the optical isolation of the LEDs for each pixel in the array can be finely and independently controlled.

[0072] Figure 10 An example of laser etching of a pixelated LED array 90 is shown in FIG, which is a cross-sectional view of a pixelated LED array 90 having laser-ablated trenches 91 according to aspects of the present disclosure.

[0073] Active LED structures 12 (e.g., active layers) can be grown on substrate 14, and then a plurality of scribe streets 96 or recesses can be formed in active LED structures 12 to form active layer portions 94 that are part of pixelated LED array 90. Ultrafast etching can be performed on substrate 14 on the same side of LED array 90 where active LED structures 12 are formed. Grooves 91 formed by ultrafast laser etching thereby provide some separation between pixels, thereby improving contrast and other emission characteristics. The width of trenches 91 can be less than the width of scribe streets 96. The depth and width of trenches 91 can be modified based on the desired emission characteristics.

[0074] In other embodiments, such as Figure 11A In the embodiment of the present invention, the trenches 91 can be formed on the side of the substrate opposite to the side on which the active LED structures 12 are formed. Depending on the desired light emission characteristics and / or the intended use of the LED array 90, the substrate between each pixel can be as shown in FIG. Figure 11B Each individual LED chip 10 can be physically isolated from each other LED chip 10. In an embodiment, the LED array can first be mounted or fixed to the PCB layer 95 as an integral unit and then laser etched to completely isolate the individual pixels / LED chips 10.

[0075] In other embodiments, such as Figure 12 In some embodiments, a material 93 may be placed in the trench 91, wherein the material 93 has light-changing properties, such as varying degrees of reflectivity or absorptivity. In some embodiments, multiple layers of different materials having different light-changing properties may be placed in the trench 91.

[0076] In addition to forming trenches 91 by laser etching, ultrafast lasers can also be used to form light extraction features (eg, 24 and 60 ) on the surface of substrate 14 of LED array 90 .

[0077] Figure 13 The present invention is a flow chart of a method for fabricating an LED device having laser-etched light extraction features on a substrate of the LED device, according to various aspects of the present disclosure. The flow chart begins at step 1302, where the method includes providing a light emitting diode (LED) wafer, the LED wafer including a substrate having a first surface and a second surface opposite the first surface; and an active LED structure located on the first surface of the substrate. In various embodiments, the substrate can be crystalline sapphire.

[0078] At step 1304, the method includes laser etching at the second surface of the substrate to form a first plurality of light extraction features according to a predetermined pattern. In various embodiments, the substrate may be crystalline sapphire, and after the laser etching, the first plurality of light extraction features may include one or more amorphous sapphire deposits. In an embodiment, the amorphous sapphire may be chemically etched to form a second plurality of light extraction features in each of the first plurality of light extraction features. In an embodiment, the first plurality of light extraction features may have a width between 1 μm and 10 μm, and the second plurality of light extraction features may have a width between 10 nm and 500 nm. In an embodiment, laser etching at the second surface of the substrate includes laser etching an additional layer formed on the second surface of the substrate, the additional layer comprising at least one of glass, silicon nitride, silicon dioxide, and silica gel.

[0079] At 1306 , the method includes separating a plurality of LED chips from the LED wafer, each LED chip of the plurality of LED chips including a portion of an active LED structure and a portion of a substrate having light extraction features of the first plurality of light extraction features.

[0080] Figure 14 is a flow chart of a method for making a pixelated LED device according to aspects of the present disclosure. The method begins at step 1402 , where the method includes forming an active LED structure on a first surface of a substrate.

[0081] At step 1404 , the method includes defining a plurality of recesses or scribe streets through the active layer to form a plurality of active layer portions, the plurality of active layer portions forming a plurality of pixels.

[0082] At step 1406, the method includes laser etching an inter-pixel region of the substrate to form trenches in the inter-pixel region of the substrate such that the pixels are at least partially optically isolated. In embodiments, the laser etching includes laser etching a first surface of the substrate. In other embodiments, the laser etching includes laser etching a second surface of the substrate opposite the first surface. In some embodiments, one or more layers of material having light-modifying properties, such as a reflective material or an absorptive material, may be added to the trenches to further modify the light emission characteristics of the LED array.

[0083] It is contemplated that any of the aforementioned aspects and / or the individual aspects and features described herein may be combined to achieve additional advantages. Any of the various embodiments disclosed herein may be combined with one or more other disclosed embodiments, unless otherwise indicated herein.

[0084] Those skilled in the art will recognize improvements and modifications to the preferred embodiments of the present disclosure. All such improvements and modifications are considered to be within the scope of the concepts disclosed herein and the claims that follow.

Claims

1. A light emitting diode (LED) chip, comprising: a substrate comprising a first surface and a second surface opposite the first surface, the substrate comprising a thickness less than or equal to 500 micrometers (μm); an active LED structure located on the first surface of the substrate, the active LED structure configured to generate light through the substrate when electrically activated; as well as A first plurality of light extraction features according to a predetermined pattern are located at the second surface of the substrate, each of the first plurality of light extraction features includes a height and a width, and an average ratio of the height to the width of each light extraction feature in the first plurality of light extraction features is in the range from 0.3 to 1.

2. The LED chip according to claim 1, wherein: Each of the first plurality of light extraction features includes a second plurality of light extraction features that is smaller than the first plurality of light extraction features.

3. The LED chip according to claim 2, wherein: The first plurality of light extraction features can have a width between 1 μm and 30 μm.

4. The LED chip according to claim 2, wherein: The width of the second plurality of light extraction features can be between 10 nm and 500 nm.

5. The LED chip according to claim 2, wherein: The distribution of the second plurality of light extraction features is random.

6. The LED chip according to claim 1, wherein: The active LED structure includes a Group III nitride semiconductor material, and the substrate includes sapphire.

7. The LED chip according to claim 2, wherein: The first plurality of light extraction features and the second plurality of light extraction features comprise a same material as the substrate.

8. The LED chip according to claim 1, wherein: The first plurality of light extraction features is formed in an additional layer on the second surface of the substrate.

9. The LED chip according to claim 8, wherein: The additional layer includes at least one of glass, silicon nitride, silicon dioxide and silica gel.

10. The LED chip according to claim 1, wherein: The predetermined pattern includes light extraction features evenly distributed across the second surface of the substrate.

11. The LED chip according to claim 1, wherein: The predetermined pattern includes light extraction features that are non-uniformly distributed across the second surface of the substrate.

12. The LED chip according to claim 1, wherein: The predetermined pattern includes linear grooves across the second surface of the substrate.

13. The LED chip according to claim 1, wherein: The predetermined pattern includes linear grooves having non-uniform spacing across the second surface of the substrate.

14. The LED chip according to claim 1, wherein: The predetermined pattern includes a first region of the second surface of the substrate having a first density of light extraction features and a second region of the second surface of the substrate having a second density of light extraction features different from the first density.

15. The LED chip according to claim 1, wherein: When the light emitted by the LED chip is between 220 nm and 320 nm, the substrate is 500 μm thick.

16. The LED chip according to claim 1, wherein: When the light emitted by the LED chip is between 400 nm and 550 nm, the substrate is 150 μm thick.

17. A method comprising: A light emitting diode (LED) wafer is provided, the LED wafer comprising: a substrate having a first surface and a second surface opposite to the first surface; and an active LED structure located on the first surface of the substrate; performing laser etching at the second surface of the substrate to form a first plurality of light extraction features according to a predetermined pattern; and A plurality of LED chips are singulated from the LED wafer, each LED chip of the plurality of LED chips including a portion of the active LED structure and a portion of the substrate having light extraction features of the first plurality of light extraction features.

18. The method according to claim 17, wherein The substrate is crystalline sapphire, and wherein, in response to the laser etching, the first plurality of light extraction features comprises one or more amorphous sapphire deposits.

19. The method according to claim 18, further comprising: The one or more amorphous sapphire deposits are etched to form a second plurality of light extraction features in each of the first plurality of light extraction features.

20. The method according to claim 19, wherein The width of the first plurality of light extraction features can be between 1 μm and 10 μm, and the width of the second plurality of light extraction features can be between 10 nm and 500 nm.

21. The method according to claim 17, wherein The laser etching at the second surface of the substrate includes laser etching an additional layer formed on the second surface of the substrate, wherein the additional layer includes at least one of glass, silicon nitride, silicon dioxide, and silica gel.

22. A method for making a pixelated light emitting diode (LED) device, comprising: forming an active LED structure on the first surface of the substrate; defining a plurality of scribe lines through the active layer to form a plurality of active layer portions, the plurality of active layer portions forming a plurality of pixels; as well as An inter-pixel region within the substrate is laser etched along the scribe streets to form trenches in the inter-pixel region of the substrate such that pixels are at least partially optically isolated.

23. The method according to claim 22, wherein The laser etching includes: performing laser etching on the first surface of the substrate.

24. The method according to claim 22, wherein The laser etching includes laser etching a second surface of the substrate opposite to the first surface.

25. The method of claim 22, further comprising: One or more layers having light-changing properties are formed in the trenches.

26. The method according to claim 25, wherein The light changing properties can include reflective properties or absorptive properties.

27. The method of claim 22, further comprising: securing the pixelated LED lighting device to a printed circuit board substrate; as well as The inter-pixel region is laser etched to completely remove the substrate in the inter-pixel region.

28. The method of claim 22, further comprising: Laser etching is performed at a second surface of the substrate opposite the first surface to form a first plurality of light extraction features according to a predetermined pattern.

29. The method according to claim 22, wherein The substrate is sapphire.

30. The method of claim 22, wherein: The focus of the laser that performs the laser etching is located below the surface of the substrate.

31. The method according to claim 22, wherein The laser etching includes: repeatedly emitting an ultrafast laser in a pulsed manner, wherein each pulse of the ultrafast laser is shorter than 1 nanosecond.

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