Terahertz radar real-time imaging device and method based on dual-processor heterogeneous platform
Through the FPGA+GPU heterogeneous platform, real-time data processing of high-resolution terahertz radar imaging is achieved, which solves the problem of insufficient computing power of traditional platforms, improves imaging accuracy and real-time performance, and is particularly suitable for complex trajectories and dynamic scenes.
Patent Information
- Application Number
- CN202510924233.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-04
- Publication Date
- 2025-09-16
AI Technical Summary
Traditional single-processor platforms lack computing power in terahertz radar high-resolution imaging and cannot meet real-time data processing needs. In addition, traditional FPGA+DSP architectures have difficulty meeting real-time requirements in high-bandwidth scenarios and have problems with large size and high power consumption.
Adopting an FPGA+GPU heterogeneous platform, through the collaborative design of hardware acceleration and parallel computing, the FPGA is used to perform fast Fourier transform and range pulse compression of digital intermediate frequency echoes, the GPU is used for azimuth processing and coherent accumulation, and inertial navigation data is combined to compensate for phase errors in real time, achieving real-time operation of the entire process.
It realizes real-time data processing of high-resolution imaging of terahertz radar, improves computing efficiency, eliminates defocusing errors caused by platform motion, and is suitable for imaging tasks with complex trajectories and dynamic scenes.
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Figure CN120652470A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of radar imaging technology, and in particular relates to a terahertz radar real-time imaging device and method based on a dual-processor heterogeneous platform. Background Art
[0002] Terahertz radar imaging technology boasts advantages such as high resolution and high penetration, and is widely used in scenarios such as target identification and structure detection. However, it places high demands on the imaging system's data processing capabilities. The BP (Back Projection) algorithm is a typical time-domain SAR imaging algorithm. By gridding the imaging area, it can accurately capture every pixel in the imaging area. By coherently integrating pulses in the time domain, a precisely focused image can be obtained. This algorithm offers advantages such as high imaging accuracy and strong trajectory adaptability, making it particularly suitable for terahertz radar systems with complex flight trajectories and demanding imaging accuracy.
[0003] Because the BP algorithm requires coherent superposition of all pulses at each pixel, it requires enormous computational effort, especially in high-bandwidth terahertz scenarios, placing extremely high demands on the platform's computing power. Single-processor platforms, plagued by bottlenecks such as insufficient computing power and limited storage, cannot meet the demands of high-resolution, real-time terahertz SAR imaging.
[0004] To this end, the adoption of heterogeneous platform architectures has become a trend. In traditional FPGA+DSP architectures, the FPGA, due to its highly parallel pipeline processing capabilities, is typically responsible for high-speed pre-processing of radar echo data, such as analog-to-digital conversion, digital filtering, and pulse compression; while the DSP is responsible for complex floating-point calculations, such as phase compensation and coherent accumulation in imaging algorithms. Compared to a single platform, the FPGA+DSP architecture combines the parallelism of the FPGA with the computational flexibility of the DSP, improving overall computational efficiency to a certain extent. However, the traditional FPGA+DSP architecture is still limited by the computing power of a single DSP core. When faced with the high-bandwidth and data-intensive BP algorithm processing requirements of terahertz radar, it struggles to meet the real-time requirements. Furthermore, its large size and high power consumption limit its application in portable or airborne platforms. Summary of the Invention
[0005] The present invention proposes a terahertz radar real-time imaging device and method based on a dual-processor heterogeneous platform. The heterogeneous platform is constructed using FPGA+GPU. Through the collaborative design of hardware acceleration and parallel computing, the device and method solve the technical difficulties of large real-time data processing volume and high computing power requirements of the BP algorithm in terahertz radar high-resolution imaging, and realize real-time processing of the entire process from echo acquisition to image display.
[0006] The terahertz radar real-time imaging device based on a dual-processor heterogeneous platform includes three parts: a power module, an airborne terminal, and a ground terminal. The power module is used to provide stable power support for the airborne terminal and the ground terminal.
[0007] The airborne end includes a signal processor module, a radio frequency front-end module, a frequency source module, a switch module, an IP radio airborne end module, a navigation module and a picture transmission radio sending module.
[0008] The switch module is used to realize data transmission between modules in the airborne terminal.
[0009] The frequency source module is used to generate a reference clock for the signal processor module and simultaneously generate a Ku-band radar signal.
[0010] The navigation module is used to obtain the real-time position and attitude information of the airborne terminal to form inertial navigation data.
[0011] The RF front-end module receives the Ku-band radar signal generated by the frequency source module, multiplies it into a terahertz band signal and then transmits it, and receives the reflected simulated radar original echo signal and mixes it into a simulated radar intermediate frequency echo signal.
[0012] The signal processor module includes an acquisition unit, a processing and control unit, and a storage unit. The acquisition unit is implemented by a single-chip ADC daughter card, which uses an analog-to-digital converter to acquire the analog radar intermediate frequency echo signal after mixing by the RF front-end module to generate a digital intermediate frequency echo signal. The processing and control unit uses FPGA and GPU to process the digital intermediate frequency echo signal and the inertial navigation data output by the navigation module according to the instructions of the host computer. The FPGA performs range pulse compression processing in the BP algorithm on the digital intermediate frequency echo signal and then transmits it to the GPU. The GPU combines the inertial navigation data with the BP algorithm to perform azimuth processing, and saves the obtained image data to the storage unit, and simultaneously outputs it to the image transmission radio sending module.
[0013] The image transmission radio sending module is used to send the image data generated by the airborne signal processing module to the image transmission radio receiving module.
[0014] The IP radio airborne terminal module is used to transmit the host computer instructions of the ground terminal to the signal processing module of the airborne terminal.
[0015] The ground terminal includes an image transmission radio receiving module, a video capture card, a host computer and an IP radio ground terminal module.
[0016] The video capture card is used to capture image data sent by the image transmission radio receiving module and transmit it to the host computer for display.
[0017] The host computer sends an operation instruction to the airborne terminal through the IP radio ground terminal module. After the airborne terminal signal processor module completes the execution, the operating status and system return information are returned through the IP radio airborne terminal module to complete the instruction response.
[0018] A terahertz radar real-time imaging method based on a dual-processor heterogeneous platform, which implements terahertz radar real-time imaging based on the above-mentioned device, includes the following steps: Step 1: The host computer issues a command to start acquisition. The RF front-end module multiplies the Ku-band radar signal generated by the frequency source module into a terahertz-band signal and transmits it. It also receives the reflected signal after encountering an object and obtains an analog intermediate-frequency echo signal through filtering and intermediate-frequency down-conversion.
[0019] The acquisition unit of the signal processor module samples the analog intermediate frequency echo signal processed by the RF front-end module through an analog-to-digital converter and converts it into a digital intermediate frequency echo signal.
[0020] Step 2: The signal processing module and control unit use BP algorithm to perform real-time imaging processing. The specific steps are as follows: Step 2.1: FPGA performs fast Fourier transform on the digital intermediate frequency echo signal, completes range pulse compression, and then transmits the frequency band data to GPU for subsequent processing.
[0021] Step 2.2: The GPU receives the FPGA pre-processed data, combines it with the inertial navigation data, and uses the CUDA parallel architecture to complete pixel back-projection and coherent accumulation.
[0022] In step 2.3, the GPU compares the current coherent accumulation pulse count with the set target and caches the image data of the completed full-aperture calculation scene to the storage unit. The image grid is updated with the image of the completed partial-aperture calculation scene, and step 2.2 is repeated until the full-aperture calculation scene is completed.
[0023] Step 3: The host computer issues an image upload command, the GPU transfers the image data in the storage unit to the FPGA, and the FPGA transmits the image data to the image transmission radio sending module through the SDI interface. The video capture card on the ground side receives the image data and displays it on the host computer, forming terahertz video SAR.
[0024] The present invention has the following beneficial effects: 1. A parallel processing architecture based on FPGA+GPU heterogeneous platform is proposed to solve the problems of large data volume and high computing power requirements of BP algorithm in terahertz radar high-resolution imaging.
[0025] 2. The FPGA leverages hardware pipeline features to perform real-time FFT pulse compression on the sampled digital IF echoes, reducing the computational load on the GPU. The GPU can perform high-throughput floating-point operations. Leveraging the CUDA multi-threaded architecture, each block processes one pixel, and each thread completes phase compensation calculations for one pulse, followed by accumulation. This allows for parallel pixel-by-pixel phase compensation and accumulation.
[0026] 3. The dual-processor heterogeneous platform implements data pipeline processing through the PCIe interface, avoiding the bandwidth and storage bottlenecks of a single platform and meeting the real-time imaging requirements of terahertz radar.
[0027] 4. The inertial navigation data output by the navigation module contains the platform's real-time position, attitude, and posture information, which is integrated into the BP algorithm in real time. The antenna phase center position is dynamically calculated based on each frame of navigation information, and the phase error is compensated in real time in CUDA parallel computing. This can eliminate the defocus error caused by platform motion, achieve more precise focusing, and improve the imaging accuracy of dynamic scenes. It is particularly suitable for dynamic imaging tasks in complex trajectory scenes. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 This is a structural block diagram of a terahertz radar real-time imaging device based on a dual-processor heterogeneous platform; Figure 2 This is a flow chart of the real-time imaging method of terahertz radar based on a dual-processor heterogeneous platform; Figure 3 This is a flowchart of the GPU's processing of the azimuth direction in the BP algorithm; Figure 4 This is a flowchart of GPU real-time imaging; Figure 5 This is the result of BP imaging processing performed by this method in the embodiment. DETAILED DESCRIPTION
[0029] The present invention will be further explained below with reference to the accompanying drawings; like Figure 1 As shown in FIG, a terahertz radar real-time imaging device based on a dual-processor heterogeneous platform includes three parts: a power module, an airborne terminal, and a ground terminal. The power module is used to provide stable power support for the airborne terminal and the ground terminal.
[0030] The airborne end includes a signal processor module, a radio frequency front-end module, a frequency source module, a switch module, an IP radio airborne end module, a navigation module and a picture transmission radio sending module.
[0031] The switch module is used to realize data transmission between modules in the airborne terminal.
[0032] The frequency source module is used to generate a reference clock for the signal processor module and simultaneously generate a Ku-band radar signal.
[0033] The navigation module is used to obtain the real-time position and attitude information of the airborne terminal to form inertial navigation data.
[0034] The RF front-end module receives the Ku-band radar signal generated by the frequency source module, multiplies it into a terahertz band signal and then transmits it, and receives the reflected simulated radar original echo signal and mixes it into a simulated radar intermediate frequency echo signal.
[0035] The signal processor module includes an acquisition unit, a processing and control unit, and a storage unit. The acquisition unit is implemented using a single-chip ADC daughter card, which uses an analog-to-digital converter to acquire the analog radar intermediate frequency (IF) echo signal after mixing by the RF front-end module, generating a digital IF echo signal. The processing and control unit, in accordance with host computer instructions, utilizes an FPGA and a GPU to process the digital IF echo signal and the inertial navigation data output by the navigation module. The FPGA performs range pulse compression processing in the BP algorithm on the digital IF echo signal and then transmits it to the GPU. The GPU, combined with the inertial navigation data, performs azimuth processing in the BP algorithm and stores the resulting image data in the storage unit.
[0036] The image transmission radio sending module is used to send the image data generated by the airborne signal processing module to the image transmission radio receiving module on the ground side.
[0037] The IP radio airborne terminal module is used to transmit the host computer instructions of the ground terminal to the signal processing module of the airborne terminal.
[0038] The ground terminal includes an image transmission radio receiving module, a video capture card, a host computer and an IP radio ground terminal module.
[0039] The video capture card is used to capture image data sent by the image transmission radio receiving module and transmit it to the host computer for display.
[0040] The host computer sends operational commands to the airborne terminal via the IP radio ground module. After the airborne signal processing module completes the execution, it transmits the operating status and system return information back via the IP radio airborne module, completing the command response. The following describes the imaging method and applicability of the aforementioned terahertz radar real-time imaging device based on a dual-processor heterogeneous platform, using a real-world scenario. Considering imaging a 30m strip in the front and side view, the imaging resolution is set to 5cm×5cm, the interpolation factor is 2, and the imaging time is calculated to be one synthetic aperture length per frame. Each frame corresponds to a synthetic aperture length L = 1 meter. The flight speed is 5 meters per second, and the pulse repetition frequency is set to 1 kHz. The calculated imaging time per frame is 0.2 seconds, consisting of 200 pulses. A metal corner reflector is placed in the center of the detection area as a strong scattering reference target, and naturally distributed trees in the surrounding area serve as typical ground objects. The corner reflector is primarily used for system resolution calibration, while the natural vegetation targets are used to verify the imaging algorithm's adaptability to complex scattering scenarios.
[0041] The airborne terminal is deployed on the drone. After powering up, it performs a power-on self-test and system initialization. Once all subsystems are ready, the drone ascends vertically to a preset altitude of 35 meters, completes hover calibration, and enters standby mode, ready for an observation flight toward the target area.
[0042] like Figure 2 As shown, the imaging method of the terahertz radar real-time imaging device based on the dual-processor heterogeneous platform specifically includes the following steps: Step 1: When the UAV is cruising to the target area, the ground terminal sends a start acquisition command through the host computer. After the command is transmitted to the airborne terminal via the IP radio ground terminal module, the signal processing module immediately responds and starts working. The acquisition unit samples the analog intermediate frequency echo signal processed by the RF front-end module through the analog-to-digital converter in real time, and divides the data frame according to the pulse repetition period, and outputs the first The time domain echo signal of a pulse ,in , is the total number of pulses contained in each frame of image.
[0043] Step 2: The signal processing module and control unit use BP algorithm to perform real-time imaging processing. The imaging grid size is set to 1200×40 pixels. The specific steps are as follows: Step 2.1, FPGA Time domain echo data of pulses Perform fast Fourier transform to achieve range pulse compression and obtain frequency domain signal , transmitted to the GPU via PCIe. is the radar center frequency. To optimize resource utilization, the FFT calculation is pipelined using Xilinx IP cores.
[0044] Step 2.2: GPU receives the frequency domain signal pre-processed by FPGA Based on the size of the new imaging area for each frame and the set interpolation factor, the imaging grid is divided into 1200×40 pixels. Using the CUDA two-level parallel model, a CUDA block is assigned to each pixel, and each block is assigned 200 threads. Each thread is responsible for performing phase compensation calculations on the echo data of a pulse. The calculation results of each thread are stored in the shared memory and coherently accumulated after all threads are completed, finally obtaining the complex imaging result of the pixel point. The imaging processing process of each block in the GPU is as follows: Figure 3 As shown, it includes distance calculation, phase compensation and coherent accumulation, as follows: Step 2.2.1. Distance calculation After the system is started, the navigation module outputs the initial position information of the platform in the carrier coordinate system (ECEF) , latitude and longitude information 、 and heading angle , pitch angle and roll angle To the GPU, as the reference point for subsequent coordinate transformation. The GPU obtains the position coordinates of the antenna phase center of the East-North-Sky imaging coordinate system (ENU) through the attitude solution module. , the specific solution process is as follows: Established The East-North-Sky imaging coordinate system (ENU) with the origin is defined as e E 、e N 、e U Represent the unit vectors of east, north and sky respectively, where 、 、 Composed into a rotation matrix , defined as follows: Calculate the position coordinates of the antenna phase center in the East-North-Sky imaging coordinate system (ENU) : Among them, APC represents the antenna phase center offset parameter value, which is a fixed offset vector of the antenna phase center relative to the inertial navigation module reference point in the carrier coordinate system. Its specific value is obtained through system structure measurement. The rotation matrix from ECEF to ENU The transposed matrix of : Represents the rotation matrix constructed according to the carrier attitude angle: 、 、 The antenna phase center position coordinates corresponding to different pulse times are calculated based on the attitude information output by the navigation module in real time .
[0045] To construct a three-dimensional pixel grid of the imaging area, the system first calculates the angle between the main direction of the radar beam and the ground according to the set flight altitude H and the angle between the main direction of the radar beam and the ground. , beam width and imaging resolution , determine the projection range of the imaging area in the y-axis direction: and calculate Number of pixels in the direction: Later in Starting from the beginning in the axis direction, according to the step size Generates a linear sequence of pixel coordinates.
[0046] Similarly, Axis direction according to the length of the synthetic aperture of a single frame and lateral resolution Construct a pixel column. The axis direction is set to a fixed value according to the flight altitude of the drone, and the pixel coordinate grid corresponding to a frame of image can be generated. .
[0047] During the continuous flight imaging process, the system adopts a sliding window strategy: after each fixed distance of flight, the imaging grid is regenerated. The axis direction moves forward by one frame length. The system sets the single frame imaging length to , then Frame image The axis starting coordinates are: in, is the sliding distance between each frame. To achieve image stitching or overlap, ≤ . Axis direction and The axis direction remains unchanged, and each subsequent frame image is based on the updated Regenerate the pixel coordinate grid to ensure continuous coverage of the target area.
[0048] Calculate the two-way distance between the antenna phase center and the target pixel position , and the round-trip delay for each pixel : in, Represents the speed of light.
[0049] Step 2.2.2 Phase compensation According to the round-trip delay Get the compensation factor , for the frequency domain signal at each pulse moment Perform phase compensation Where I1 represents the frequency domain signal after phase compensation.
[0050] Step 2.2.3, coherent accumulation When a thread completes the phase compensation signal of a pulse, it stores the result in the shared memory space of the block. After the echo data of 200 pulse moments are calculated, coherent accumulation is performed in the shared memory to achieve synthetic aperture focusing: in, Indicates the target pixel The complex form of the imaging result, its modulus represents the reflection intensity, and the argument represents the phase information of the target pixel.
[0051] Step 2.3: The GPU compares the current number of pulses accumulated by coherent processing with the set target. When the GPU block has processed 200 pulses cumulatively, it represents a complete frame of image data processing. Figure 4 As shown in the figure, the full-aperture calculation scene is marked as completed and cached in the storage unit; the block whose coherent accumulated pulse number has not reached 200 continues to receive new pulse data and incrementally updates the imaging results according to step 2.2 until the full-aperture calculation scene is output.
[0052] Step 3: The host computer on the ground sends an image upload command, and the GPU transfers the image data in the storage unit to the FPGA through the PCIe interface. After the FPGA completes the image format conversion, it transmits it to the image transmission radio sending module through the SDI interface. Finally, the ground-side video capture card collects the image and outputs it to the host computer for display in real time to obtain terahertz video SAR.
[0053] The entire system stops working until the host computer issues an end command; the drone lands in a safe area and the experimental flight ends.
[0054] Figure 5 The image below shows the result of BP imaging processing of received radar echo data using this method. The image clearly shows the angular reflection and tree locations, demonstrating the feasibility of the overall process and good imaging results. Within a 30 m × 30 m imaging area, this method achieves an image update rate of 5 frames per second (5 Hz) at a spatial resolution of 5 cm × 5 cm, meeting the requirements for real-time imaging of high-resolution dynamic scenes.
[0055] Those skilled in the art should understand that, without departing from the core idea of the present invention, reasonable expansion can be made in aspects such as algorithm optimization and hardware adaptation, and these improvements all fall within the scope of protection defined by the claims of the present invention and their equivalents.
Claims
1. A terahertz radar real-time imaging device based on a dual-processor heterogeneous platform, comprising an airborne terminal and a ground terminal. The airborne terminal transmits terahertz band signals according to instructions from the ground terminal, receives echo signals reflected by objects, performs imaging processing using a signal processing module, and transmits the signals back to the ground terminal. The device is characterized by: The signal processor module includes an acquisition unit, a processing and control unit, and a storage unit; the acquisition unit generates a digital intermediate frequency echo signal by simulating the echo signal through an analog-to-digital converter; the processing and control unit uses FPGA and GPU to process the digital intermediate frequency echo signal and inertial navigation data according to the ground terminal instructions, wherein the FPGA performs range pulse compression processing in the BP algorithm on the digital intermediate frequency echo signal and then transmits it to the GPU; the GPU combines the inertial navigation data with the azimuth processing in the BP algorithm, and saves the obtained image data to the storage unit and sends it to the ground terminal at the same time.
2. The terahertz radar real-time imaging device based on a dual-processor heterogeneous platform according to claim 1, characterized in that: The airborne end also includes a radio frequency front-end module, a frequency source module, a switch module, an IP radio airborne end module, a navigation module and a radio transmission module; The switch module is used to realize data transmission between modules in the airborne terminal; The frequency source module is used to generate a reference clock for the signal processor module and simultaneously generate a Ku-band radar signal; The navigation module is used to obtain the real-time position and attitude information of the airborne terminal to form inertial navigation data; The RF front-end module receives the Ku-band radar signal generated by the frequency source module, multiplies it into a terahertz band signal and transmits it, and receives the reflected simulated radar original echo signal and mixes it into a simulated radar intermediate frequency echo signal; The image transmission station sending module is used to send the image data generated by the airborne signal processing module to the ground terminal; The IP radio airborne terminal module is used to transmit the instructions of the ground terminal to the signal processing module of the airborne terminal.
3. The terahertz radar real-time imaging device based on a dual-processor heterogeneous platform according to claim 1, characterized in that: The ground terminal includes an image transmission radio receiving module, a video capture card, a host computer and an IP radio ground terminal module; The video capture card is used to collect image data sent by the onboard terminal and transmit it to the host computer for display; The host computer sends an operation instruction to the airborne terminal through the IP radio ground terminal module. After the airborne terminal signal processor module completes the execution, the operating status and system return information are returned through the IP radio airborne terminal module to complete the instruction response.
4. The terahertz radar real-time imaging device based on a dual-processor heterogeneous platform according to claim 1, characterized in that: The acquisition unit is a single-chip ADC daughter card.
5. A terahertz radar real-time imaging method based on a dual-processor heterogeneous platform, characterized by: The radar echo signal is collected using the device according to any one of claims 1 to 4, and real-time imaging processing is performed, the specific steps of which are as follows: Step 1: The host computer issues a command to start acquisition. The RF front-end module multiplies the Ku-band radar signal generated by the frequency source module into a terahertz-band signal and transmits it. It also receives the reflected signal after encountering an object and obtains an analog intermediate frequency echo signal through filtering and intermediate frequency down-conversion. The acquisition unit of the signal processor module samples the analog intermediate frequency echo signal processed by the RF front-end module through the analog-to-digital converter and converts it into a digital intermediate frequency echo signal. ,in , is the total number of pulses contained in each frame of image; Step 2: The signal processing module and control unit use BP algorithm to perform real-time imaging processing. The specific steps are as follows: Step 2.1, FPGA performs fast Fourier transform on the digital intermediate frequency echo signal to obtain the frequency domain signal , completing the range pulse compression, where is the radar center frequency; Step 2.2: GPU receives FPGA pre-processed data , combined with inertial navigation data, using CUDA parallel architecture to complete pixel back projection and coherent accumulation; Step 2.3: The GPU compares the current number of pulses accumulated by coherent accumulation with the set target, and caches the image data of the completed full-aperture calculation scene to the storage unit; updates the imaging scene grid with the image of the completed partial-aperture calculation scene, and repeats step 2.2 until the full-aperture calculation scene is completed; Step 3: The host computer issues an image upload command, the GPU transfers the image data in the storage unit to the FPGA, and the FPGA transmits the image data to the image transmission radio sending module through the SDI interface. The video capture card on the ground side receives the image data and displays it on the host computer, forming a terahertz video SAR.
6. The terahertz radar real-time imaging method based on a dual-processor heterogeneous platform according to claim 5, characterized in that: The acquisition unit samples the analog intermediate frequency echo signal processed by the RF front-end module through the analog-to-digital converter in real time, and divides the data frame according to the pulse repetition period, and outputs the first The time domain echo signal of a pulse .
7. The terahertz radar real-time imaging method based on a dual-processor heterogeneous platform according to claim 5, characterized in that: FFT calculation uses Xilinx IP core to implement pipeline processing.
8. The terahertz radar real-time imaging method based on a dual-processor heterogeneous platform according to claim 5, characterized in that: The GPU divides the grid data size according to imaging requirements, assigns a CUDA block to each pixel, and allocates N threads to each block. Each thread is responsible for performing phase compensation calculations on the echo data of a pulse. The calculation results of each thread are stored in shared memory and coherently accumulated after all threads are completed, ultimately obtaining the complex imaging result of the pixel point.
9. The terahertz radar real-time imaging method based on a dual-processor heterogeneous platform according to claim 8, characterized in that: The imaging processing of each block in the GPU includes distance calculation, phase compensation and coherent accumulation, as follows: Step 2.2.
1. Distance calculation The GPU calculates the antenna phase center position coordinates corresponding to the i-th pulse based on the inertial navigation data. ; According to the system parameters, construct the three-dimensional pixel grid of the imaging area ; Calculate the two-way distance between the antenna phase center and the target pixel position , and the round-trip delay for each pixel : in, represents the speed of light; Step 2.2.2 Phase compensation According to the round-trip delay Get the compensation factor , for the frequency domain signal at each pulse moment Perform phase compensation Where I1 represents the frequency domain signal after phase compensation; Step 2.2.3, coherent accumulation When a thread completes the phase compensation signal of a pulse, it stores the result in the shared memory space of the Block. After the echo data of N pulse moments are calculated, coherent accumulation is performed in the shared memory to achieve synthetic aperture focusing: in, Indicates the target pixel The complex form of the imaging result, its modulus represents the reflection intensity, and the argument represents the phase information of the target pixel.
10. The terahertz radar real-time imaging method based on a dual-processor heterogeneous platform according to claim 5, characterized in that: The GPU transfers the image data in the storage unit to the FPGA through the PCIe interface. After the FPGA completes the image format conversion, it transmits it to the image transmission radio sending module through the SDI interface. Finally, it is collected by the video capture card on the ground side and output to the host computer for display in real time to obtain terahertz video SAR.
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