Voltage stabilizing circuit

Abstract

The embodiment of the invention discloses a voltage stabilizing circuit. The voltage stabilizing circuit comprises an operational amplifier module, a comparison module, a channel selection module, an output control module and a voltage division module, the channel selection module is used for gating any input end and any output end; the comparison module outputs a first control signal to the control end of the output control module according to the voltage of the partial voltage output end of the partial voltage module and a reference voltage; the operational amplifier module outputs a second control signal to the control end of the output control module according to the voltage of the partial voltage output end of the partial voltage module and the reference voltage; the output control module controls the output voltage of the output end of the output control module according to the first control signal or the second control signal. According to the technical scheme, the working mode of the voltage stabilizing circuit is switched through the channel selection module according to the condition of the connected load circuit, the problem that a traditional digital voltage stabilizing circuit is poor in power supply rejection ratio is solved, the defect that a traditional analog voltage stabilizing circuit is low in response speed is overcome, and the performance of the voltage stabilizing circuit is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a voltage stabilizing circuit. Background Art

[0002] A low-dropout linear regulator (LDO) converts a range of input voltages into a stable output voltage to power a load circuit. Due to its simple structure, low power consumption, minimal ripple, and high integration, LDOs are widely used in large-scale digital systems such as system-on-chips (SoCs). Typically, these load circuits are large-scale digital circuits, and the current demanded from the voltage source varies depending on the load circuit's operating state. Therefore, LDOs require strong drive capability and fast response to ensure stable system operation.

[0003] As SoC integration increases, the power consumption and area cost requirements for LDOs become more stringent, requiring cost reduction while maintaining good stability. Traditional analog LDOs have several drawbacks: PMOS LDOs are suitable for low currents, have low dropout voltages, and suffer from poor power supply rejection ratio (PSRR); NMOS LDOs are suitable for high currents and offer good PSRR, but they suffer from large dropout voltages and require additional charge pump circuitry, increasing design complexity and reliability risks. Compared to analog LDO solutions, digital LDOs have become a research hotspot due to their advantages, such as smaller pass transistor area, easier stability assurance, and better process scalability. However, digital LDOs adjust the output voltage discontinuously, resulting in significant ripple. Furthermore, when in the on state, the power transistors in digital LDOs operate in a deep linear region, resulting in extremely low equivalent resistance and poor overall PSRR performance. Summary of the Invention

[0004] In order to solve the above technical problems, an embodiment of the present invention provides a voltage stabilization circuit to achieve high-performance voltage stabilization.

[0005] According to one aspect of the present invention, there is provided a voltage stabilizing circuit, comprising: an operational amplifier module, a comparison module, a channel selection module, an output control module, and a voltage divider module; The first input terminal of the operational amplifier module is connected to the voltage-dividing output terminal of the voltage-dividing module, the second input terminal of the operational amplifier module is connected to the reference voltage terminal, the output terminal of the operational amplifier module is connected to the first input terminal of the channel selection module, the first input terminal of the comparison module is connected to the voltage-dividing output terminal of the voltage-dividing module, the second input terminal of the comparison module is connected to the reference voltage terminal, the output terminal of the comparison module is connected to the second input terminal of the channel selection module, the output terminal of the channel selection module is connected to the control terminal of the output control module, the input terminal of the output control module is connected to the input voltage terminal, the first terminal of the output control module is connected to the first terminal of the voltage-dividing module, the second terminal of the output control module is connected to the bias current source, and the output terminal of the output control module is connected to the second terminal of the voltage-dividing module; The channel selection module is used to select any input end and output end; the comparison module is used to output a first control signal to the control end of the output control module based on the voltage of the voltage divider output end of the voltage divider module and the reference voltage; the operational amplifier module is used to output a second control signal to the control end of the output control module based on the voltage of the voltage divider output end of the voltage divider module and the reference voltage; the output control module is used to control the output voltage of the output control module according to the first control signal or the second control signal.

[0006] Optionally, the voltage stabilizing circuit also includes a logic control module, the input end of the logic control module is connected to the output end of the output control module, the output end of the logic control module is connected to the control end of the channel selection module, and the logic control module is used to generate a first selection signal or a second selection signal based on the relationship between the voltage at the output end of the output control module and the target voltage.

[0007] Optionally, the logic control module includes a successive approximation logic and a logic controller, the input end of the successive approximation logic is connected to the output end of the output control module, the output end of the successive approximation logic is connected to the input end of the logic controller, the output end of the logic controller is connected to the control end of the channel selection module, the successive approximation logic is used to output a digital logic signal after comparing the voltage at the output end of the output control module with the target voltage; the logic controller is used to generate a first selection signal or a second selection signal based on the digital logic signal.

[0008] Optionally, the output control module includes a first current mirror unit, a first transistor, a second current mirror unit, a second transistor and an output control unit; the first end of the first current mirror unit is connected to the input voltage end, the second end of the first current mirror unit is connected to the reference current source, the third end of the first current mirror unit is connected to the first electrode of the first transistor, the gate of the first transistor is connected to the output end of the channel selection module, the second electrode of the first transistor is connected to the first end of the second current mirror unit, the second end of the second current mirror unit is connected to the first end of the voltage divider module, the third end of the second current mirror unit is connected to the second electrode of the second transistor, the first electrode of the second transistor is connected to the input voltage end, the gate of the second transistor is respectively connected to the second electrode of the second transistor and the first end of the output control unit, the second end of the output control unit is connected to the input voltage end, and the third end of the output control unit is connected to the second end of the voltage divider module.

[0009] Optionally, the first current mirror unit includes a third transistor and a fourth transistor, the first electrode of the third transistor is connected to the input voltage end, the second electrode of the third transistor is connected to the gate of the third transistor, the second electrode of the third transistor is also connected to the reference current source, the gate of the third transistor is also connected to the gate of the fourth transistor, the first electrode of the fourth transistor is connected to the input voltage end, and the second electrode of the fourth transistor is connected to the first electrode of the first transistor.

[0010] Optionally, the second current mirror unit includes a fifth transistor and a sixth transistor, the second electrode of the fifth transistor is connected to the second electrode of the first transistor, the second electrode of the fifth transistor is also connected to the gate of the fifth transistor, the gate of the fifth transistor is also connected to the gate of the sixth transistor, the first electrode of the fifth transistor and the first electrode of the sixth transistor are both connected to the first end of the voltage divider module, and the second electrode of the sixth transistor is connected to the second electrode of the second transistor.

[0011] Optionally, the output control unit includes a seventh transistor, an eighth transistor and a ninth transistor, the first electrode of the seventh transistor and the first electrode of the eighth transistor are both connected to the input voltage end, the gate of the seventh transistor is connected to the gate of the second transistor, the gate of the seventh transistor is also connected to the second electrode of the ninth transistor, the gate of the eighth transistor is connected to the first electrode of the ninth transistor, the second electrode of the seventh transistor and the second electrode of the eighth transistor are both connected to the second end of the voltage divider module, and the gate of the ninth transistor is connected to the output end of the logic controller.

[0012] Optionally, the channel selection module includes a first gating switch and a second gating switch, the first end of the first gating switch is connected to the output end of the operational amplifier module, the control end of the first gating switch is connected to the output end of the logic controller, the second end of the first gating switch and the second end of the second gating switch are both connected to the control end of the output control module, the first end of the second gating switch is connected to the output end of the comparison module, and the control end of the second gating switch is connected to the output end of the logic controller.

[0013] Optionally, the op amp module includes an operational amplifier, a first input terminal of the operational amplifier is connected to the voltage divider output terminal of the voltage divider module, a second input terminal of the operational amplifier is connected to the reference voltage terminal, and an output terminal of the operational amplifier is connected to the first terminal of the first selection switch.

[0014] Optionally, the voltage divider module includes a first resistor and a second resistor, the first end of the first resistor is connected to the output end of the output control module, the second end of the first resistor is connected to the first end of the second resistor, and the second end of the second resistor is connected to the first end of the output control module.

[0015] In the technical solution of the embodiments of the present invention, both the op amp module and the comparison module can output control signals based on the voltage at the voltage divider output terminal of the voltage divider module and the reference voltage, controlling the current flowing from the input voltage terminal to the output terminal of the voltage regulator circuit, thereby adjusting the output voltage of the voltage regulator circuit to stabilize it. The channel selection module can select either the op amp module or the comparison module. When the op amp module is selected, the voltage regulator circuit is similar to a traditional analog voltage regulator circuit. By controlling the current flowing from the input voltage terminal to the output terminal of the voltage regulator circuit, the output voltage of the voltage regulator circuit is maintained near the target voltage. The comparison module can quickly adjust the output voltage of the voltage regulator circuit. The channel selection module can switch the operating mode of the voltage regulator circuit. Under light load conditions, the switching mode is selected to reduce output ripple. Under heavy load conditions, a hybrid voltage regulation mode can be adopted. The switching mode is selected during power-up, allowing the output voltage to rise rapidly to near the target value. After stabilization, it can be switched to the linear mode. The technical solution of the embodiments of the present invention switches the operating mode of the voltage regulator circuit through the channel selection module according to the conditions of the connected load circuit. This not only solves the problem of poor power supply rejection ratio of traditional digital voltage regulator circuits, but also improves the slow response speed of traditional analog voltage regulator circuits, thereby improving the performance of the voltage regulator circuit.

[0016] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0018] Figure 1 This is a structural diagram of an analog LDO in the related art.

[0019] Figure 2 This is a schematic diagram of the structure of another analog LDO in the related art.

[0020] Figure 3 This is a structural diagram of a digital LDO in the related art.

[0021] Figure 4 It is a structural schematic diagram of a voltage stabilizing circuit provided by an embodiment of the present invention.

[0022] Figure 5 It is a structural diagram of another voltage stabilizing circuit provided by an embodiment of the present invention.

[0023] Figure 6 This is a structural diagram of another voltage stabilizing circuit provided by an embodiment of the present invention.

[0024] Figure 7 This is a circuit schematic diagram of a voltage stabilizing circuit provided by an embodiment of the present invention.

[0025] Figure 8 This is a schematic diagram of signal changes during the working process of a voltage stabilization circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0026] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0027] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0028] Figure 1 、 Figure 2 It is an analog linear voltage regulator circuit in the related art. Figure 1 This is a schematic diagram of the structure of a PMOS LDO in related art. The PMOS LDO primarily includes a first operational amplifier EA1, a first voltage-divider resistor Rf1, a second voltage-divider resistor Rf2, a first capacitor C1, and a PMOS transistor MP1. The PMOS LDO uses the operational amplifier EA1 to adjust the PMOS transistor MP1 based on the first voltage-divider voltage Vf1 and the first reference voltage Vref1, thereby adjusting the output voltage Vout1 of the PMOS LDO. PMOS LDOs are primarily used in low-current applications and have high output impedance, a small voltage difference between the input voltage VIN1 and the output voltage Vout1, and poor power supply rejection ratio (PSRR) performance. Figure 2 This is a schematic diagram of the structure of an NMOS LDO in related art. The NMOS LDO mainly includes an operational amplifier EA2, a third voltage-divider resistor Rf3, a fourth voltage-divider resistor Rf4, a charge pump circuit, a second capacitor C2, and an NMOS transistor MN1. Clk is a clock signal. The NMOS LDO adjusts the NMOS transistor MN1 according to the second voltage-divider voltage Vf2 and the second reference voltage Vref2 through the second operational amplifier EA2, thereby adjusting the output voltage Vout2 of the NMOS LDO. NNOS LDOs are mainly used in high-current applications and have low output impedance and good PSRR performance. However, they have disadvantages such as a large voltage difference between the input voltage VIN2 and the output voltage Vout2, multiple additional circuits, increased design difficulty, and poor reliability.

[0029] Figure 3This paper demonstrates the structure of a digital LDO in related art. The digital LDO primarily includes a comparator COMP, a clock module OSC, digital control logic, multiple transistors MP2-MPn, a fifth voltage-divider resistor Rf5, a sixth voltage-divider resistor Rf6, and a third capacitor C3. The digital LDO uses the comparator COMP, based on the comparison result between the third divided voltage Vf3 and the third reference voltage Vref3, as well as the clock module OSC and digital control logic, to adjust the number of transistors MP2, MP3, ..., MPn that are on, thereby adjusting the digital LDO's output voltage Vout3. The digital control logic is typically a bidirectional shift register. The digital LDO uses the clock module OSC and bidirectional shift register to adjust the number of transistors that are on. This approach results in discontinuous control of the digital LDO's output voltage Vout3, resulting in significant output ripple. Furthermore, when the digital LDO is on, the power transistor operates in the deep linear region, where the equivalent resistance of the adjustment transistor is very low, resulting in a poor overall PSRR.

[0030] In view of this, Figure 4 This is a schematic diagram of the structure of a voltage stabilizing circuit provided by an embodiment of the present invention. This embodiment is suitable for scenarios with high requirements for output voltage accuracy, response speed or anti-interference performance, especially in applications with a large load variation range, such as microprocessors, communication equipment power supplies, automotive electronics and industrial automation. Figure 4 As shown, the voltage stabilizing circuit includes: an operational amplifier module 101, a comparison module 102, a channel selection module 103, an output control module 104 and a voltage divider module 105; A first input terminal of the operational amplifier module 101 is connected to the voltage-dividing output terminal of the voltage-dividing module 105, a second input terminal of the operational amplifier module 101 is connected to the reference voltage terminal, an output terminal of the operational amplifier module 101 is connected to a first input terminal of the channel selection module 103, a first input terminal of the comparison module 102 is connected to the voltage-dividing output terminal of the voltage-dividing module 105, a second input terminal of the comparison module 102 is connected to the reference voltage terminal, an output terminal of the comparison module 102 is connected to a second input terminal of the channel selection module 103, an output terminal of the channel selection module 103 is connected to a control terminal of the output control module 104, an input terminal of the output control module 104 is connected to an input voltage terminal VIN, a first terminal of the output control module 104 is connected to a first terminal of the voltage-dividing module 105, a second terminal of the output control module 104 is connected to a bias current source Ib, and an output terminal of the output control module 104 is connected to a second terminal of the voltage-dividing module 105; The channel selection module 103 is used to select any input terminal and output terminal of itself; the comparison module 102 is used to output a first control signal to the control terminal of the output control module 104 according to the voltage Vf of the voltage divider output terminal of the voltage divider module 105 and the reference voltage Vref; the operational amplifier module 101 is used to output a second control signal to the control terminal of the output control module 104 according to the voltage Vf of the voltage divider output terminal of the voltage divider module 105 and the reference voltage Vref; the output control module 104 is used to control the output voltage Vout of the output control module 104 according to the first control signal or the second control signal.

[0031] The voltage divider module 105 divides the output voltage Vout of the output control module 104 to obtain a voltage Vf at the voltage divider output terminal. The output voltage of the output control module 104 is the output voltage of the voltage stabilizing circuit. Here, both the output voltage of the output control module 104 and the output voltage of the voltage stabilizing circuit may be represented by Vout. The reference voltage terminal provides a reference voltage. The reference voltage terminal is connected to the second input terminal of the operational amplifier module 101 and the second input terminal of the comparison module 102. The operational amplifier module 101 may be an operational amplifier that continuously detects the voltage Vf at the voltage divider output terminal and the reference voltage Vref, amplifies the voltage difference between the two input terminals, and generates a second control signal. The second control signal may be a continuous analog control signal. If the channel selection module 103 selects the operational amplifier module 101 to participate in the voltage stabilization operation, the operating mode of the voltage stabilizing circuit may be referred to as a linear mode. The comparison module 102 may be a high-speed comparator that compares the voltage Vf at the voltage divider output terminal with the reference voltage Vref and outputs a first control signal based on the magnitude relationship between the two input terminals. The first control signal may be a switch control signal, for example, it may be 0 or 1. If the channel selection module 103 selects the comparison module 102 to participate in the voltage stabilization work, the working mode of the voltage stabilization circuit may be referred to as a switch mode at this time. For example, when the external load is light, the switch mode may be selected. Under light load conditions, the use of the switch mode may reduce the output ripple and achieve a stable output function. Under heavy load conditions, a hybrid voltage stabilization mode may be used, and the switch mode may be selected during the power-on process so that the output voltage rises rapidly to near the target value, and may be switched to a linear mode after stabilization. The use of a hybrid voltage stabilization mode under heavy load conditions may solve the problem of poor PSRR in traditional digital LDOs and improve the stability of the voltage stabilization circuit.

[0032] The channel selection module 103 can be a multiplexer or multiple switches, and can select to connect the output of the op amp module 101 or the output of the comparison module 102 to its output terminal, and transmit the control signal to the control terminal of the output control module 104 as a control signal. The channel selection module 103 can select a switching mode or a linear mode based on the magnitude relationship between the output voltage Vout of the voltage stabilizing circuit and the target voltage. For example, when the output voltage Vout of the voltage stabilizing circuit is close to the target voltage, that is, the difference between the output voltage Vout of the voltage stabilizing circuit and the target voltage is small, the linear mode can be selected, and the second control signal can be output to the control terminal of the output control module 104. When the output voltage Vout of the voltage stabilizing circuit is much lower than the target voltage, that is, the difference between the output voltage Vout of the voltage stabilizing circuit and the target voltage is large, the switching mode can be selected, and the first control signal can be output to the control terminal of the output control module 104. The output control module 104 can include multiple transistors. Based on the control signal selected by the channel selection module 103, the current flowing from the input voltage terminal VIN to the output terminal of the voltage stabilizing circuit can be adjusted, thereby adjusting the output voltage Vout of the voltage stabilizing circuit to stabilize it.

[0033] Specifically, the voltage divider module 105 can divide the output voltage Vout of the voltage regulator circuit to obtain a voltage Vf1 at the voltage divider output terminal. The operational amplifier module 101 detects the magnitude of the voltage Vf1 at the voltage divider output terminal and the reference voltage Vref, and outputs a second control signal. The comparison module 102 can also compare the voltage Vf1 at the voltage divider output terminal with the reference voltage Vref and output a first control signal. The channel selection module 103 selects to output either the first control signal or the second control signal based on the magnitude relationship between the output voltage Vout of the voltage regulator circuit and the target voltage, and transmits it to the control terminal of the output control module 104. If the output control module 104 receives the second control signal from the operational amplifier module 101, it can adjust the output voltage Vout of the voltage regulator circuit by linearly adjusting the conduction level of the power device, similar to a traditional analog voltage regulator circuit. If the output control module 104 receives the first control signal from the comparison module 102, it can adjust the output voltage Vout of the voltage regulator circuit by rapidly switching the power device. The adjusted output voltage Vout of the voltage regulator circuit is further divided by the voltage divider module 105 to obtain the voltage Vf at the voltage divider output terminal. This voltage is then compared with the reference voltage Vref, forming a closed-loop negative feedback system. Regardless of the selected mode, the goal is to maintain the output voltage Vout of the voltage regulator circuit near the target voltage.

[0034] In the technical solution of the embodiments of the present invention, both the op amp module and the comparison module can output control signals based on the relationship between the voltage at the voltage divider output terminal of the voltage divider module and the reference voltage, controlling the current flowing from the input voltage terminal to the output terminal of the voltage regulator circuit, thereby adjusting the output voltage of the voltage regulator circuit to stabilize it. The channel selection module can select either the op amp module or the comparison module. When the op amp module is selected, the voltage regulator circuit is similar to a traditional analog voltage regulator circuit. By controlling the current flowing from the input voltage terminal to the output terminal of the voltage regulator circuit, the output voltage of the voltage regulator circuit is maintained near the target voltage. The comparison module enables rapid adjustment of the output voltage of the voltage regulator circuit. The channel selection module can switch the operating mode of the voltage regulator circuit. Under light load conditions, switching mode is selected to reduce output ripple. Under heavy load conditions, a hybrid voltage regulation mode can be adopted. Switching mode is selected during power-up, allowing the output voltage to rise rapidly to near the target value. After stabilization, it can be switched to linear mode. The technical solution of the embodiments of the present invention switches the operating mode of the voltage regulator circuit through the channel selection module based on the conditions of the connected load circuit. This not only solves the problem of poor power supply rejection ratio of traditional digital voltage regulator circuits, but also improves the slow response speed of traditional analog voltage regulator circuits, thereby improving the performance of the voltage regulator circuit.

[0035] Figure 5 is a structural diagram of another voltage stabilizing circuit provided by an embodiment of the present invention. In some optional embodiments of the present invention, the voltage stabilizing circuit further includes a logic control module 106, the input end of the logic control module 106 is connected to the output end of the output control module 104, and the output end of the logic control module 106 is connected to the control end of the channel selection module 103. The logic control module 106 is used to generate a first selection signal or a second selection signal according to the relationship between the voltage Vout at the output end of the output control module 104 and the target voltage.

[0036] The input of the logic control module 106 is connected to the output of the output control module 104, i.e., the output of the voltage stabilizing circuit. The logic control module 106 can directly monitor the output voltage Vout of the voltage stabilizing circuit, compare it with the target voltage, and generate and output a corresponding gating signal. The first gating signal can indicate that the output of the operational amplifier module 101 is selected to be connected to the output of the channel selection module 103. The second gating signal can indicate that the output of the comparison module 102 is selected to be connected to the output of the channel selection module 103.

[0037] Specifically, the logic control module 106 can continuously monitor the output voltage Vout of the voltage regulator circuit and compare it with the target voltage. If the output voltage Vout of the voltage regulator circuit is close to the target voltage, that is, the difference between the output voltage Vout of the voltage regulator circuit and the target voltage is small, the logic control module 106 generates a first selection signal, and the channel selection module 103 connects the output of the operational amplifier module 101 to the control terminal of the output control module 104. By adjusting the state of the power transistor in the linear region and controlling the current flowing from the input voltage terminal to the output terminal of the voltage regulator circuit, the output voltage Vout of the voltage regulator circuit is maintained near the target voltage. If the output voltage Vout of the voltage regulator circuit is much lower than the target voltage, that is, the difference between the output voltage Vout of the voltage regulator circuit and the target voltage is large, the logic control module 106 generates a second selection signal, and the channel selection module 103 connects the output of the comparison module 102 to the control terminal of the output control module 104. The output of the comparison module 102 is typically a high or low level, which can quickly increase the output voltage Vout of the voltage regulator circuit.

[0038] In some optional embodiments of the present invention, continue to refer to Figure 5 The logic control module 106 includes a successive approximation logic unit 1061 and a logic controller 1062. The input end of the successive approximation logic unit 1061 is connected to the output end of the output control module 104, the output end of the successive approximation logic unit 1061 is connected to the input end of the logic controller 1062, and the output end of the logic controller 1062 is connected to the control end of the channel selection module 103. The successive approximation logic unit 1061 is used to output a digital logic signal after comparing the voltage at the output end of the output control module 104 with the target voltage; the logic controller 1062 is used to generate a first selection signal or a second selection signal according to the digital logic signal.

[0039] The successive approximation logic 1061 can digitally evaluate the degree of deviation of the output voltage Vout of the voltage stabilization circuit relative to the target voltage using a successive approximation method. The digital logic signal output by the successive approximation logic 1061 can be a digital quantity representing the evaluation result of the output voltage Vout of the voltage stabilization circuit. The logic controller 1062 can output a first selection signal or a second selection signal to the control terminal of the channel selection module 103 based on the evaluation result of the successive approximation logic 1061.

[0040] Specifically, the successive approximation logic 1061 can continuously or periodically sample the output Vout of the voltage regulator circuit. Through a successive approximation process, it converts the magnitude relationship between the output voltage Vout of the voltage regulator circuit and the target voltage into a digital logic signal, and outputs the digital logic signal to the logic controller 1062. Based on the received digital logic signal, the logic controller 1062 outputs a corresponding selection signal to the control terminal of the channel selection module 103. Based on the received selection signal, the channel selection module 103 connects the output terminal of the operational amplifier module 101 or the output terminal of the comparison module 102 to the control terminal of the output control module 104, thereby adjusting the output voltage Vout of the voltage regulator circuit. After adjustment, the successive approximation logic 1061 samples again, beginning a new round of evaluation and selection.

[0041] In some optional embodiments of the present invention, Figure 5 As shown, the output control module 104 includes a first current mirror unit 1041, a first transistor M1, a second current mirror unit 1042, a second transistor M2 and an output control unit 1043; the first end of the first current mirror unit 1041 is connected to the input voltage terminal VIN, the second end of the first current mirror unit 1041 is connected to the reference current source Ib, the third end of the first current mirror unit 1041 is connected to the first electrode of the first transistor M1, the gate of the first transistor M1 is connected to the output end of the channel selection module 103, the second electrode of the first transistor M1 is connected to the second current mirror unit 1043, and the output control unit 1043 is connected to the output end of the channel selection module 103. The first end of the unit 1042 is connected, the second end of the second current mirror unit 1042 is connected to the first end of the voltage divider module 105, the third end of the second current mirror unit 1042 is connected to the second electrode of the second transistor M2, the first electrode of the second transistor M2 is connected to the input voltage terminal VIN, the gate of the second transistor M2 is respectively connected to the second electrode of the second transistor M2 and the first end of the output control unit 1043, the second end of the output control unit 1043 is connected to the input voltage terminal VIN, and the third end of the output control unit 1043 is connected to the second end of the voltage divider module 105.

[0042] The first current mirror unit 1041 may be a PMOS current mirror. The first current mirror unit 1041 mirrors the reference current Ib to its third terminal, providing a static operating current for the first transistor M1. Here, both the reference current source and the reference current are represented by Ib. The first transistor M1 may be a PMOS transistor. The first terminal of the first transistor M1 may be a source, and the second terminal may be a drain. The gate of the first transistor M1 is connected to the output terminal of the channel selection module 103 and can transmit a current signal to the second current mirror unit 1042 based on a control signal from the channel selection module 103. The second current mirror unit 1042 may be an NMOS current mirror. The second current mirror unit 1042 can use the current signal transmitted by the first transistor M1 to drive the second transistor M2. The second transistor M2 may be a PMOS transistor. The first terminal of the second transistor M2 may be a source, and the second terminal may be a drain. The gate and drain of the second transistor M2 are short-circuited, causing it to operate in a saturation region. When current flows through the second current mirror unit 1042, since the second transistor operates in a saturation region, the gate of the second transistor M2 can drive the output control unit 1043.

[0043] Figure 6 is a structural diagram of another voltage stabilizing circuit provided by an embodiment of the present invention. In some optional embodiments of the present invention, such as Figure 6 As shown, the first current mirror unit 1041 includes a third transistor M3 and a fourth transistor M4, a first electrode of the third transistor M3 is connected to the input voltage terminal VIN, a second electrode of the third transistor M3 is connected to the gate of the third transistor M3, the second electrode of the third transistor M3 is also connected to the reference current source Ib, the gate of the third transistor M3 is also connected to the gate of the fourth transistor M4, a first electrode of the fourth transistor M4 is connected to the input voltage terminal VIN, and a second electrode of the fourth transistor M4 is connected to the first electrode of the first transistor M1.

[0044] The third transistor M3 and the fourth transistor M4 may be PMOS transistors. The first electrodes of the third transistor M3 and the fourth transistor M4 may be sources, and the second electrodes may be drains. The first current mirror unit 1041 may be used to provide the first transistor M1 with a current proportional to the bias current source Ib. The drain and gate of the third transistor M3 are short-circuited, causing it to operate in a saturation region. The reference current source Ib draws current from the second electrode of the third transistor M3, mirrors it through the fourth transistor M4, and provides it to the first transistor M1. The size of the fourth transistor M4 may be set to n times that of the third transistor M3. When the first transistor M1 operates in switching mode, the current flowing through the first transistor M1 is equal to n*Ib. When the first transistor M1 operates in linear mode, the linear loop controls the operating state of the first transistor, and the current flowing through the first transistor M1 is less than or equal to n*Ib.

[0045] In some optional embodiments of the present invention, continue to refer to Figure 6 The second current mirror unit 1042 includes a fifth transistor M5 and a sixth transistor M6. The second electrode of the fifth transistor M5 is connected to the second electrode of the first transistor M1, the second electrode of the fifth transistor M5 is also connected to the gate of the fifth transistor M5, the gate of the fifth transistor M5 is also connected to the gate of the sixth transistor M6, the first electrode of the fifth transistor M5 and the first electrode of the sixth transistor M6 are both connected to the first end of the voltage divider module 105, and the second electrode of the sixth transistor M6 is connected to the second electrode of the second transistor M2.

[0046] The fifth transistor M5 and the sixth transistor M6 may be NMOS transistors. The first electrode of the fifth transistor M5 and the sixth transistor M6 may be a source electrode, and the second electrode may be a drain electrode. The gate and drain of the fifth transistor M5 are short-circuited so that it operates in a saturation region. The current flowing through the fifth transistor M5 is the drain current of the first transistor M1, which is mirrored by the sixth transistor to directly drive the second transistor M2. The fifth transistor M5 and the sixth transistor M6 may be of equal size.

[0047] In some optional embodiments of the present invention, continue to refer to Figure 6 The output control unit 1043 includes a seventh transistor M7, an eighth transistor M8, and a ninth transistor M9. The first electrode of the seventh transistor M7 and the first electrode of the eighth transistor M8 are both connected to the input voltage terminal VIN, the gate of the seventh transistor M7 is connected to the gate of the second transistor M2, the gate of the seventh transistor M7 is also connected to the second electrode of the ninth transistor M9, the gate of the eighth transistor M8 is connected to the first electrode of the ninth transistor M9, the second electrode of the seventh transistor M7 and the second electrode of the eighth transistor M8 are both connected to the second end of the voltage divider module 105, and the gate of the ninth transistor M9 is connected to the output end of the logic controller 1062.

[0048] The seventh transistor M7 and the eighth transistor M8 may be PMOS transistors. The first electrodes of the seventh transistor M7 and the eighth transistor M8 may be sources, and the second electrodes may be drains. The gate of the seventh transistor M7 is connected to the gate of the second transistor M2, and the gate and drain of the second transistor M2 are short-circuited. The seventh transistor M7 and the second transistor M2 may form a current mirror structure. Therefore, the seventh transistor M7 may mirror the current flowing through the second transistor. The ninth transistor M9 may serve as a switch to control whether the eighth transistor M8 is connected to the voltage stabilization circuit. The gate of the ninth transistor M9 is connected to the output terminal of the logic controller 1062. The ninth transistor M9 may be turned on when the channel selection module selects the operational amplifier module 101. For example, when the output voltage Vout of the voltage regulator circuit is close to the target voltage, that is, the difference between the output voltage Vout of the voltage regulator circuit and the target voltage is small, the logic control module 106 generates a first selection signal, and the channel selection module 103 connects the output terminal of the operational amplifier module 101 to the control terminal of the output control module 104. At this time, the gate of the ninth transistor M9 receives a high-level signal, the ninth transistor M9 is turned on, and the eighth transistor M8 is connected to the voltage regulator circuit, and together with the seventh transistor M7, controls the output voltage Vout of the voltage regulator circuit. When the output voltage Vout of the voltage regulator circuit is much lower than the target voltage, that is, the difference between the output voltage Vout of the voltage regulator circuit and the target voltage is large, the logic control module 106 generates a second selection signal, and the channel selection module 103 connects the output of the comparison module 102 to the control terminal of the output control module 104. At this time, the gate of the ninth transistor M9 receives a low-level signal, the ninth transistor M9 is not turned on, and the eighth transistor M8 is not connected to the voltage regulator circuit.

[0049] Figure 7 is a circuit diagram of a voltage stabilizing circuit provided by an embodiment of the present invention. In some optional embodiments of the present invention, such as Figure 7 As shown, the channel selection module 103 includes a first gating switch 1031 and a second gating switch 1032. The first end of the first gating switch 1031 is connected to the output end of the operational amplifier module 101, the control end of the first gating switch 1031 is connected to the output end of the logic controller 1062, the second end of the first gating switch 1031 and the second end of the second gating switch 1032 are both connected to the control end of the output control module 104, the first end of the second gating switch 1032 is connected to the output end of the comparison module 102, and the control end of the second gating switch 1032 is connected to the output end of the logic controller 1062.

[0050] The first selection switch 1031 is used to control the output end of the operational amplifier module 101 to be connected to the control end of the output control module 104. The second selection switch 1032 is used to control the output end of the comparison module 102 to be connected to the control end of the output control module 104. The selection signal may include a first selection switch control signal EN_L and a second selection switch control signal EN_S. The first selection signal may be when the first selection switch control signal EN_L is at a high level and the second selection switch control signal EN_S is at a low level. The second selection signal may be when the first selection switch control signal EN_L is at a low level and the second selection switch control signal EN_S is at a high level. For example, when the logic controller 1062 outputs a first selection signal, the first selection switch 1031 is turned on, connecting the output end of the operational amplifier module 101 to the control end of the output control module 104, and adjusting the output voltage Vout of the voltage stabilizing circuit in a linear mode; when the logic controller 1062 outputs a second selection signal, the second selection switch 1032 is turned on, connecting the output end of the comparison module 102 to the control end of the output control module 104, and adjusting the output voltage Vout of the voltage stabilizing circuit in a switching mode.

[0051] In some optional embodiments of the present invention, the operational amplifier module 101 includes an operational amplifier EA, a first input terminal of the operational amplifier EA is connected to the voltage divider output terminal Vf of the voltage divider module 105, a second input terminal of the operational amplifier EA is connected to the reference voltage terminal Vref, and an output terminal of the operational amplifier EA is connected to the first terminal of the first selection switch 1031.

[0052] Among them, the first input terminal of the operational amplifier EA can be a non-inverting input terminal, and the second input terminal can be an inverting input terminal. The operational amplifier EA can continuously sample the voltage Vf of the voltage divider output terminal of the voltage divider module 105 and send it to the non-inverting input terminal of the operational amplifier EA. The inverting input terminal is connected to the reference voltage Vref. The operational amplifier EA can be a differential amplifier that can detect the voltage difference between the two input terminals and amplify the voltage difference to generate a second control signal. The second control signal can be a continuous analog control signal. The second control signal can adjust the output voltage Vout of the voltage stabilizing circuit in a linear voltage stabilization mode. Similar to the operating mode of the traditional analog voltage stabilizing circuit, the second control signal is used to control the current flowing through the first transistor M1 so that the output voltage Vout of the voltage stabilizing circuit is maintained near the target voltage.

[0053] In some optional embodiments of the present invention, the voltage divider module 105 includes a first resistor R1 and a second resistor R2, the first end of the first resistor R1 is connected to the output end of the output control module 104, the second end of the first resistor R1 is connected to the first end of the second resistor R2, and the second end of the second resistor R2 is connected to the first end of the output control module 104.

[0054] The connection point between the second end of the first resistor and the first end of the second resistor is the voltage-dividing output terminal of the voltage-dividing module 105. The voltage-dividing module 105 can sample the output voltage Vout of the voltage-stabilizing circuit and generate a voltage Vf at the voltage-dividing output terminal, which is transmitted to the first input terminal of the operational amplifier module 101 and the first input terminal of the comparison module 102 for comparison with the reference voltage Vref.

[0055] The working principle of the present invention is shown in FIG. Figure 7 and Figure 8 , Figure 8 The present invention illustrates the changes in the output voltage Vout, reference voltage Vref, voltage Vf at the voltage divider output terminal, first select switch control signal EN_L, and second select switch control signal EN_S of the voltage regulator circuit during its operation. When the output voltage Vout of the voltage regulator circuit is significantly lower than the target voltage (i.e., when the difference between the output voltage Vout of the voltage regulator circuit and the target voltage is large), the successive approximation logic 1061 compares the output voltage Vout of the voltage regulator circuit with the target voltage and outputs the second select switch EN_S. At this point, the second select switch 1032 turns on, and the comparison module 102 participates in the operation of the voltage regulator circuit. The comparison module 102 compares the voltage Vf at the voltage divider output terminal with the reference voltage Vf to generate a first control signal, which is transmitted to the gate of the first transistor M1, turning on the first transistor M1. The current then flows through the fifth transistor M5, the sixth transistor M6, and the second transistor M2, ultimately flowing through the seventh transistor M7, causing the seventh transistor M7 to output current, thereby increasing the output voltage Vout of the voltage regulator circuit. When the output voltage Vout of the voltage regulator circuit approaches the target voltage (i.e., the difference between the output voltage Vout of the voltage regulator circuit and the target voltage is small), the successive approximation logic 1061 compares the output voltage Vout of the voltage regulator module with the target voltage and generates a first selection signal. At this point, the operational amplifier EA activates the voltage regulator circuit. Similar to a conventional analog loop operation mode, the operational amplifier EA generates a second control signal based on the voltage Vf at the voltage divider output terminal of the voltage divider module and the reference voltage Vref. The second control signal is transmitted to the gate of the first transistor M1. By controlling the current flowing through the first transistor M1, the output voltage Vout of the voltage regulator circuit is maintained near the target voltage.

[0056] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in the present invention can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved. This is not limited herein.

[0057] The above specific embodiments do not limit the scope of protection of the present invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the present invention.

Claims

1. A voltage stabilizing circuit, characterized in that: include: Operational amplifier module, comparison module, channel selection module, output control module and voltage divider module; The first input terminal of the operational amplifier module is connected to the voltage-dividing output terminal of the voltage-dividing module, the second input terminal of the operational amplifier module is connected to the reference voltage terminal, the output terminal of the operational amplifier module is connected to the first input terminal of the channel selection module, the first input terminal of the comparison module is connected to the voltage-dividing output terminal of the voltage-dividing module, the second input terminal of the comparison module is connected to the reference voltage terminal, the output terminal of the comparison module is connected to the second input terminal of the channel selection module, the output terminal of the channel selection module is connected to the control terminal of the output control module, the input terminal of the output control module is connected to the input voltage terminal, the first terminal of the output control module is connected to the first terminal of the voltage-dividing module, the second terminal of the output control module is connected to the bias current source, and the output terminal of the output control module is connected to the second terminal of the voltage-dividing module; The channel selection module is used to select any input end and output end; the comparison module is used to output a first control signal to the control end of the output control module based on the voltage of the voltage divider output end of the voltage divider module and the reference voltage; the operational amplifier module is used to output a second control signal to the control end of the output control module based on the voltage of the voltage divider output end of the voltage divider module and the reference voltage; the output control module is used to control the output voltage of the output control module according to the first control signal or the second control signal.

2. The voltage stabilizing circuit according to claim 1, wherein: It also includes a logic control module, the input end of the logic control module is connected to the output end of the output control module, the output end of the logic control module is connected to the control end of the channel selection module, and the logic control module is used to generate a first selection signal or a second selection signal according to the relationship between the voltage of the output end of the output control module and the target voltage.

3. The voltage stabilizing circuit according to claim 2, wherein: The logic control module includes a successive approximation logic device and a logic controller. The input end of the successive approximation logic device is connected to the output end of the output control module, the output end of the successive approximation logic device is connected to the input end of the logic controller, and the output end of the logic controller is connected to the control end of the channel selection module. The successive approximation logic device is used to output a digital logic signal after comparing the voltage at the output end of the output control module with the target voltage; the logic controller is used to generate a first selection signal or a second selection signal based on the digital logic signal.

4. The voltage stabilizing circuit according to claim 1, wherein: The output control module includes a first current mirror unit, a first transistor, a second current mirror unit, a second transistor and an output control unit; the first end of the first current mirror unit is connected to the input voltage end, the second end of the first current mirror unit is connected to the reference current source, the third end of the first current mirror unit is connected to the first electrode of the first transistor, the gate of the first transistor is connected to the output end of the channel selection module, the second electrode of the first transistor is connected to the first end of the second current mirror unit, the second end of the second current mirror unit is connected to the first end of the voltage divider module, the third end of the second current mirror unit is connected to the second electrode of the second transistor, the first electrode of the second transistor is connected to the input voltage end, the gate of the second transistor is respectively connected to the second electrode of the second transistor and the first end of the output control unit, the second end of the output control unit is connected to the input voltage end, and the third end of the output control unit is connected to the second end of the voltage divider module.

5. The voltage stabilizing circuit according to claim 4, wherein: The first current mirror unit includes a third transistor and a fourth transistor, the first electrode of the third transistor is connected to the input voltage terminal, the second electrode of the third transistor is connected to the gate of the third transistor, the second electrode of the third transistor is also connected to the reference current source, the gate of the third transistor is also connected to the gate of the fourth transistor, the first electrode of the fourth transistor is connected to the input voltage terminal, and the second electrode of the fourth transistor is connected to the first electrode of the first transistor.

6. The voltage stabilizing circuit according to claim 4, wherein: The second current mirror unit includes a fifth transistor and a sixth transistor, the second electrode of the fifth transistor is connected to the second electrode of the first transistor, the second electrode of the fifth transistor is also connected to the gate of the fifth transistor, the gate of the fifth transistor is also connected to the gate of the sixth transistor, the first electrode of the fifth transistor and the first electrode of the sixth transistor are both connected to the first end of the voltage divider module, and the second electrode of the sixth transistor is connected to the second electrode of the second transistor.

7. The voltage stabilizing circuit according to claim 4, wherein: The output control unit includes a seventh transistor, an eighth transistor and a ninth transistor, the first electrode of the seventh transistor and the first electrode of the eighth transistor are both connected to the input voltage terminal, the gate of the seventh transistor is connected to the gate of the second transistor, the gate of the seventh transistor is also connected to the second electrode of the ninth transistor, the gate of the eighth transistor is connected to the first electrode of the ninth transistor, the second electrode of the seventh transistor and the second electrode of the eighth transistor are both connected to the second end of the voltage divider module, and the gate of the ninth transistor is connected to the output end of the logic controller.

8. The voltage stabilizing circuit according to claim 1, wherein: The channel selection module includes a first gating switch and a second gating switch, wherein the first end of the first gating switch is connected to the output end of the operational amplifier module, the control end of the first gating switch is connected to the output end of the logic controller, the second end of the first gating switch and the second end of the second gating switch are both connected to the control end of the output control module, the first end of the second gating switch is connected to the output end of the comparison module, and the control end of the second gating switch is connected to the output end of the logic controller.

9. The voltage stabilizing circuit according to claim 8, characterized in that: The operational amplifier module includes an operational amplifier, a first input end of the operational amplifier is connected to the voltage divider output end of the voltage divider module, a second input end of the operational amplifier is connected to the reference voltage end, and an output end of the operational amplifier is connected to the first end of the first selection switch.

10. The voltage stabilizing circuit according to claim 1, wherein: The voltage divider module includes a first resistor and a second resistor, the first end of the first resistor is connected to the output end of the output control module, the second end of the first resistor is connected to the first end of the second resistor, and the second end of the second resistor is connected to the first end of the output control module.

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