Board-level packaging structure with components and packaging method

Abstract

The invention discloses a board-level packaging structure with a component and a packaging method. The packaging structure comprises a glass substrate, a bonding material layer, an insulating material layer, a bare chip, the component, a wire, a plastic packaging layer, a wiring layer, a back adhesive film and spherical solder. The packaging method comprises the following steps: mounting bare chips and components on the insulating material layer; performing plastic packaging on the product and then rearranging a wire layer; and after de-bonding, pasting a back adhesive film, and then carrying out ball mounting and cutting. According to the invention, the packaging technology is utilized, in the board-level 2D packaging, components and other forms of Die can be sealed in the Pkg, the functions of the components are led out to the RDL in a routing mode, compared with the prior art, the diversity of products is ensured, the corresponding resistance and capacitance requirements are met by synchronously placing different types of components, and the product quality is improved. The requirements of various forms of Die sealing are met; and the components are integrated in the Pkg, so that the Pkg and the thickness of the product can be greatly reduced, and the product is miniaturized, light and thin.

Description

Technical Field

[0001] The present invention relates to the technical field of chip packaging, and in particular to a board-level packaging structure with components and a packaging method. Background Art

[0002] At present, the chip packaging structure is relatively simple, mainly including the chip, internal RDL circuit, and EMC, without related components, and cannot meet the customer's capacitance, resistance, and various forms of die sealing requirements; the inability to meet customer capacitance and resistance is mainly reflected in: it is impossible to form a complete circuit module in a Pkg to achieve specific functions (such as signal processing, power management, communication, etc.). The existing technology can only attach components to the spherical surface of the package Pkg. The external component method requires reserving space for the components or attaching components on the back of the ball surface, which will have requirements for the ball height, so the thickness of the overall product will become thicker, or the overall Pkg will become larger.

[0003] Therefore, it is necessary to develop a board-level packaging structure with components and a packaging method to solve the above problems. Summary of the Invention

[0004] The purpose of the present invention is to design a board-level packaging structure with components and a packaging method in order to solve the above problems.

[0005] The present invention achieves the above-mentioned purpose through the following technical solutions: A board-level packaging structure with components, comprising: Glass substrate; A bonding material layer; the bonding material layer is coated on the upper surface of the glass substrate; Insulating material layer; the insulating material layer is coated on the upper surface of the bonding material layer; at least one die; Components; bare chips and components are fixedly mounted on the insulating material layer; A wire; a first end of the wire is connected to the component, and a second end of the wire is arranged upwardly at the same height as the bump of the die; Plastic encapsulation layer; the plastic encapsulation layer encapsulates the bare die, the bare die's bumps, components, and wire settings.

[0006] Furthermore, the board-level packaging structure with components also includes a wiring layer. After the bumps of the bare chip and the top of the wire are ground on the top of the plastic layer, the wiring layer is installed on the top of the plastic layer and connected to the bumps of the bare chip and the top of the wire.

[0007] Furthermore, after removing the glass substrate, the bonding material layer and the insulating material layer, a backing film is pasted on the bottom of the plastic packaging layer.

[0008] Furthermore, a plurality of solder balls are planted on top of the wiring layer.

[0009] Preferably, the wire is arranged perpendicular to the copper terminal of the component.

[0010] As another preferred embodiment, when there are at least two bare chips, the at least two bare chips are connected via wires.

[0011] A packaging method for a component board-level packaging structure, comprising the following steps: S1. coating a bonding material on a glass substrate to form a bonding material layer; S2. coating an insulating material on the surface of the bonding material to form an insulating material layer; S3. Fix the bare chips and components on the insulating material layer, and use a wire bonding machine to bond wires to the copper terminals of the components. S4, plastic-encapsulating the bare die, the bare die bumps, components, and wires, and then grinding the bumps and wires to remove them; S5. Performing a redistribution layer on the surface of the bumps and wires of the ground bare chip; S6. After the redistribution layer is completed, the glass carrier is debonded and the temporary insulating material is cleaned, and then the adhesive film is attached to the same side; S7. Plant the ball on the product with the adhesive film attached, and then cut it into single units.

[0012] Preferably, in step S2, the insulating material is polyimide.

[0013] As another preferred embodiment, in step S3, when there are at least two bare chips, bare wafer-level interconnection wire bonding is performed between the at least two chips.

[0014] Preferably, in step S5, the redistribution layer comprises physical vapor deposition, photoresist coating, exposure, development, electroplating, debonding, etching, and grinding performed in sequence.

[0015] The beneficial effects of the present invention are: In this application, packaging technology is used to package components and other forms of dies in board-level 2D packaging. The functions of the components are brought out to the RDL by wire bonding. Compared with the existing technology, the diversity of the products is guaranteed, and different types of components (various types of capacitors, resistors and other components) are placed simultaneously to meet the corresponding resistance and capacitance requirements, as well as the requirements of various forms of die sealing. Integrating the components in the Pkg can greatly reduce the Pkg and thickness of the product, making the product miniaturized and thinner. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 Schematic diagram of step S1 in a packaging method for a board-level packaging structure with components; Figure 2 Schematic diagram of step S2 in the packaging method of the board-level packaging structure with components; Figure 3 Schematic diagram of step S3 in the packaging method of the board-level packaging structure with components; wherein A is a cross-sectional view and B is a top view; Figure 4 Schematic diagram of step S4 in the packaging method of a board-level packaging structure with components; wherein A is a cross-sectional view and B is a top view; Figure 5 Schematic diagram of step S5 in the packaging method of a board-level packaging structure with components; wherein A is a cross-sectional view and B is a top view; Figure 6 Schematic diagram of step S6 in the packaging method of a board-level packaging structure with components; wherein A is a cross-sectional view and B is a top view; Figure 7 Schematic diagram of step S7 in the packaging method of a board-level packaging structure with components; wherein A is a cross-sectional view and B is a top view; Figure 8 A is a schematic diagram of another embodiment; wherein A is a cross-sectional view and B is a top view.

[0017] Legend: 1. Glass substrate, 2. Bonding material layer, 3. Insulation material layer, 4. First bare die, 5. Second bare die, 6. Leads, 7. Components, 8. Wire, 9. Plastic layer, 10. Wiring layer, 11. Solder balls, 12. Adhesive film. DETAILED DESCRIPTION

[0018] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings of the embodiments of the present invention. It should be understood that the described embodiments are only a portion of the embodiments of the present invention, not all of them. Generally, the components of the embodiments of the present invention described and illustrated in the drawings herein may be arranged and designed in a variety of different configurations.

[0019] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention as claimed, but rather merely represents selected embodiments of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort are intended to fall within the scope of protection of the present invention.

[0020] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not require further definition or explanation in subsequent drawings.

[0021] In the description of the present invention, it should be understood that the terms "upper", "lower", "inside", "outside", "left", "right", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, or are the orientations or positional relationships in which the inventive product is conventionally placed when in use, or are the orientations or positional relationships conventionally understood by those skilled in the art. These are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0022] Furthermore, the terms “first”, “second”, etc. are merely used for distinguishing descriptions and should not be understood as indicating or implying relative importance.

[0023] In the description of the present invention, it should also be noted that, unless otherwise expressly specified or limited, terms such as "disposed" and "connected" should be understood in a broad sense. For example, "connected" can mean a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can also mean internal communication between two components. Those skilled in the art will be able to understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0024] The specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0025] Example 1 like Figure 1-5 As shown, a board-level packaging structure with components includes: Glass substrate 1; Bonding material layer 2; the bonding material layer 2 is coated on the upper surface of the glass substrate 1; Insulating material layer 3; the insulating material layer 3 is coated on the upper surface of the bonding material layer 2; Two bare chips; the two bare chips are connected by a lead 6, and the two bare chips are: a first bare chip 4 located at the bottom and a second bare chip 5 located at the top, and the second bare chip 5 is placed above the first bare chip 4; Component 7; the two bare chips and the component 7 are fixedly mounted on the insulating material layer 3; Wire 8; the first end of wire 8 is connected to component 7, and the second end of wire 8 is arranged upwardly at the same height as the bump of the bare chip; wire 8 is arranged perpendicular to the copper terminal of component 7; Plastic layer 9; plastic layer 9 encapsulates the bare chip, the bare chip's bumps, components 7, and wire 8; Wiring layer 10; after grinding the bare die bumps and the top of the wire 8 on the top of the plastic layer 9, the wiring layer 10 is installed on the top of the plastic layer 9 and connected to the bare die bumps and the top of the wire 8; like Figure 6 As shown, after removing the glass substrate 1 , the bonding material layer 2 and the insulating material layer 3 , a backing film 12 is pasted on the bottom of the plastic packaging layer 9 .

[0026] like Figure 7 As shown, a plurality of solder balls 11 are implanted on top of the wiring layer 10 .

[0027] Example 2 like Figure 8 As shown, different from embodiment 1, this embodiment has only one bare chip.

[0028] When manufacturing Example 1: A packaging method with a component board-level packaging structure includes the following steps: S1, such as Figure 1 As shown, a bonding material is coated on a glass substrate 1 to form a bonding material layer 2; the bonding material is a laser debonding adhesive; S2, such as Figure 2 As shown, an insulating material is coated on the surface of the bonding material to form an insulating material layer 3; the insulating material is polyimide; S3, such as Figure 3 As shown, two bare chips (dies) and components 7 are fixedly mounted (bonded) on the insulating material layer 3, and wires 8 are bonded to the copper terminals of the components 7 using a wire bonding machine; bare wafer-level interconnection wire bonding (die to die) is performed between the two chips; S4, such as Figure 4 As shown, the bare die, the bare die bumps, the components 7, and the wires 8 are molded (plastic encapsulated), and after the molding, the pillars (pillars / bumps) and the wires 8 are ground out by grinding (grinding); S5, such as Figure 5 As shown, a redistribution layer 10 (RDL) is formed on the surface of the bumps and wires 8 of the ground die. The redistribution layer 10 includes physical vapor deposition (PVD Ti / Cu), photoresist coating, exposure, development, electroplating, stripping, etching, and then grinding. S6, such as Figure 6 As shown, on a product having a redistribution layer 10 (RDL), after debonding the glass carrier and cleaning the temporary insulating material, the adhesive film 12 is attached to the same side; S7, such as Figure 7 As shown, the product with the adhesive film 12 attached is ball-planted and then cut into individual units.

[0029] like Figure 8 As shown, when performing the manufacturing of Example 2: there is only one bare chip, and there is no need to connect the two bare chips.

[0030] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as within the scope of protection of the present invention.

Claims

1. A board-level packaging structure with components, characterized in that: include: Glass substrate; a bonding material layer; A bonding material layer is coated on the upper surface of the glass substrate; Insulation material layer; The insulating material layer is coated on the upper surface of the bonding material layer; at least one die; Components; bare chips and components are fixedly mounted on the insulating material layer; A wire; a first end of the wire is connected to the component, and a second end of the wire is arranged upwardly at the same height as the bump of the die; Plastic encapsulation layer; the plastic encapsulation layer encapsulates the bare die, the bare die's bumps, components, and wire settings.

2. A board-level packaging structure with components according to claim 1, characterized in that: The board-level packaging structure with components also includes a wiring layer. After the bumps of the bare chip and the top of the wire are ground on the top of the plastic layer, the wiring layer is installed on the top of the plastic layer and connected to the bumps of the bare chip and the top of the wire.

3. A board-level packaging structure with components according to claim 2, characterized in that: After removing the glass substrate, bonding material layer and insulating material layer, a backing film is pasted on the bottom of the plastic packaging layer.

4. The board-level packaging structure with components according to claim 3, characterized in that: A plurality of solder balls are planted on top of the wiring layer.

5. The board-level packaging structure with components according to claim 1, characterized in that: Copper terminal setting for vertical components of wire.

6. The board-level packaging structure with components according to claim 1, characterized in that: When there are at least two bare chips, the at least two bare chips are connected via wires.

7. A packaging method for a board-level packaging structure with components according to any one of claims 1 to 6, characterized in that: The following steps are involved: S1. coating a bonding material on a glass substrate to form a bonding material layer; S2. coating an insulating material on the surface of the bonding material to form an insulating material layer; S3. Fix the bare chips and components on the insulating material layer, and use a wire bonding machine to bond wires to the copper terminals of the components. S4, plastic-encapsulating the bare die, the bare die bumps, components, and wires, and then grinding the bumps and wires to remove them; S5. Performing a redistribution layer on the surface of the bumps and wires of the ground bare chip; S6. After the redistribution layer is completed, the glass carrier is debonded and the temporary insulating material is cleaned, and then the adhesive film is attached to the same side; S7. Plant the ball on the product with the adhesive film attached, and then cut it into single units.

8. The packaging method of the board-level packaging structure with components according to claim 7, characterized in that: In step S2 , the insulating material is polyimide.

9. The packaging method of the board-level packaging structure with components according to claim 7, characterized in that: In step S3, when there are at least two bare chips, bare wafer-level interconnection wire bonding is performed between the at least two chips.

10. The packaging method of the board-level packaging structure with components according to claim 7, characterized in that: In step S5 , the redistribution layer includes physical vapor deposition, photoresist coating, exposure, development, electroplating, stripping, etching, and grinding performed in sequence.

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