Radio frequency integrated capacitor structure based on RDL technology and preparation method thereof

Abstract

The invention relates to the technical field of radio frequency integrated circuits and advanced semiconductor packaging, in particular to a radio frequency integrated capacitor structure based on an RDL process and a preparation method, and the radio frequency integrated capacitor structure comprises a substrate, a composite dielectric layer, a temperature sensor, a signal processing module and a compensation module. The composite dielectric layer is formed by alternately stacking silicon nitride and aluminum oxide, the electrode contour generates arc curvature radius and side wall inclination angle parameters through three-dimensional electromagnetic field simulation, and a machine learning model optimizes mask design and etching process parameters based on leakage current measured data, so that the edge leakage current density is reduced. High-density interconnection of all the modules is achieved through the RDL technology, an existing packaging process is compatible, and the problems of phase synchronization errors and high-frequency signal distortion caused by uncontrollable capacitance temperature coefficients in a radio frequency circuit are systematically solved.

Description

Technical Field

[0001] The present invention relates to the technical field of advanced semiconductor packaging and radio frequency integrated circuits, and in particular to a radio frequency integrated capacitor structure based on an RDL process and a preparation method thereof. Background Art

[0002] The RDL process is a wiring technology used in advanced semiconductor packaging. By depositing and patterning a metal layer on the chip surface or package substrate, it achieves high-density interconnection between the chip's internal electrodes and the external package pins. Its core lies in the use of photolithography and electroplating processes to form micron-scale metal traces, combined with dielectric layer isolation, to provide flexible signal redistribution capabilities for complex packaging structures. In RF integrated capacitor structures, this process forms embedded capacitor units by stacking multiple layers of metal dielectrics. The electrode spacing and overlap area are controlled by photolithography precision, thereby utilizing the parasitic capacitance effect between metal layers to achieve high-frequency coupling or energy storage functions.

[0003] Existing technologies suffer from the uncontrollable temperature coefficient of MIM capacitors in RFICs, leading to reduced high-frequency system stability. This technical pain point stems from the fact that the intrinsic dielectric constant temperature coefficient of a single, homogeneous dielectric material exhibits a fixed polarity, making it impossible to offset temperature-induced capacitance offsets through the material's intrinsic properties over a wide temperature range. For example, in the beamforming circuits of 5G millimeter-wave phased array antennas, the phase-shifting capacitors in the transmit and receive channels can experience nonlinear capacitance drift due to drastic fluctuations in the base station's ambient temperature. This can cause phase synchronization errors between array elements to exceed tolerances, ultimately leading to degraded beam pointing accuracy and signal transmission interruptions. Summary of the Invention

[0004] In view of the shortcomings of the existing technology, the present invention provides an RF integrated capacitor structure and preparation method based on the RDL process to solve the problem that the temperature coefficient of the MIM capacitor in the RF integrated circuit is uncontrollable, resulting in a decrease in the stability of the high-frequency system.

[0005] In order to solve the above technical problems, the specific technical solutions of the present invention are as follows: In a first aspect, the present invention provides an RDL-based radio frequency integrated capacitor structure, comprising a substrate, a composite dielectric layer, a temperature sensor, a signal processing module, an electric field optimization module, a compensation module, and a capacitor unit: A composite dielectric layer, disposed on the surface of the substrate, is composed of alternately stacked silicon nitride layers and aluminum oxide layers, wherein the silicon nitride layers are amorphous and the aluminum oxide layers have a lattice orientation control interface; A temperature sensor, integrated on the substrate, for detecting the operating temperature of the capacitor unit; a signal processing module, electrically connected to the platinum thin film temperature sensor via RDL metal interconnection, receiving the temperature signal and outputting a compensation voltage signal; an electric field optimization module configured to generate electrode geometric parameters through three-dimensional electromagnetic field simulation, wherein the electrode geometric parameters include arc curvature radius and sidewall inclination angle; a compensation module, receiving the compensation voltage signal and applying it to the capacitor plate, wherein the compensation voltage signal is dynamically adjusted according to a mapping relationship between the temperature signal and a preset capacitance drift to offset the capacitance offset caused by temperature; A capacitor unit, composed of a multi-layer metal dielectric stack in the composite dielectric layer and the RDL metal interconnect; The electrode geometric parameters generated by the electric field optimization module are used to control the electrode arc curvature radius through grayscale exposure of the photolithography mask, and to regulate the electrode side wall inclination angle through reactive ion etching; The signal processing module receives the real-time temperature data of the platinum thin film temperature sensor, calculates the compensation voltage signal according to the capacitance drift mapping relationship, and transmits the signal to the compensation module; The compensation module adjusts the voltage value applied to the capacitor plate according to the compensation voltage signal, and feeds back the adjusted capacitance value to the signal processing module to form a closed-loop control.

[0006] In a second aspect, the present invention provides a method for preparing a radio frequency integrated capacitor structure based on an RDL process, which is applied to the radio frequency integrated capacitor structure based on the RDL process, comprising: Performing oxygen plasma cleaning on the surface of a silicon or glass substrate, and depositing a composite adhesion layer after cleaning to enhance the interface bonding strength between the substrate and a subsequent composite dielectric layer; Aluminum oxide and silicon nitride layers are sequentially deposited via atomic layer deposition to form a composite dielectric layer. During the deposition of the aluminum oxide layer, in-situ infrared spectroscopy is used to monitor the precursor adsorption reaction and dynamically adjust the number of deposition cycles to control the film density. When depositing the silicon nitride layer, the ratio of silane to ammonia is detected in real time by plasma emission spectroscopy to optimize the stoichiometric ratio of silicon nitride to form an amorphous structure.

[0007] Furthermore, the method for preparing a radio frequency integrated capacitor structure based on the RDL process of the present invention includes: After the composite dielectric layer is deposited, a platinum thin film is deposited on the surface of the substrate and patterned to form the platinum thin film temperature sensor; Placing the platinum thin film temperature sensor in a constant temperature bath for multi-point calibration, with the calibration temperature covering a range of -40°C to 125°C, recording a resistance-temperature characteristic curve and storing it in a microcontroller unit; The piecewise linear interpolation algorithm is used to process the calibration data, so that the microcontroller unit dynamically corrects the temperature measurement value according to the calibration data, thereby reducing the temperature measurement error.

[0008] Furthermore, the method for preparing a radio frequency integrated capacitor structure based on the RDL process of the present invention includes: According to the electrode geometric parameters generated by the electric field optimization module, a grayscale photolithography mask is produced by a preset electron beam direct writing process, and a gradient exposure pattern is formed on the photoresist covering the composite dielectric layer by dose modulation; Based on the gradient exposure pattern, reactive ion etching is performed using fluorine-based gas to simultaneously remove photoresist residues and passivate the electrode sidewalls, thereby generating an electrode profile with an arc-shaped curvature radius and a sidewall inclination angle.

[0009] Furthermore, the method for preparing a radio frequency integrated capacitor structure based on the RDL process of the present invention includes: Conducting electrical testing on an electrode profile having an arc-shaped curvature radius and a sidewall inclination angle to obtain measured leakage current data, and comparing the measured leakage current data with a three-dimensional electromagnetic field simulation result; Based on the generated electrode geometric parameters and leakage current data, a correlation database of arc curvature radius, sidewall inclination angle and leakage current is established; A machine learning algorithm is used to train an optimization model that takes electrode geometry parameters as input and outputs mask design parameters for updating the grayscale lithography mask fabrication process.

[0010] Furthermore, the method for preparing a radio frequency integrated capacitor structure based on an RDL process of the present invention includes: collecting operating temperature data at a preset period by the platinum thin film temperature sensor, and inputting the data into the signal processing module after eliminating environmental noise through digital filtering; The signal processing module calculates the compensation voltage adjustment amount through a preset algorithm and transmits the result to the compensation module; After the compensation module applies the compensation voltage to the capacitor plate, it resamples the capacitance value and feeds it back to the signal processing module to form a closed-loop control.

[0011] Furthermore, the method for preparing a radio frequency integrated capacitor structure based on an RDL process of the present invention includes: processing temperature and capacitance drift data by a polynomial fitting algorithm in the signal processing module to generate a capacitance drift mapping relationship, converting the compensation voltage signal into an analog voltage by a digital-to-analog converter and then applying it to the capacitor plate; The microcontroller unit dynamically controls the output intensity of the compensation voltage by adjusting the duty cycle of the pulse width modulation signal according to the capacitance drift mapping relationship and the real-time temperature data.

[0012] Beneficial effects of the present invention: The present invention significantly improves the temperature stability and high-frequency performance of RF integrated capacitors through the stress buffering effect of the heterogeneous interface of the composite dielectric layer, the temperature closed-loop compensation mechanism, and data-driven process parameter optimization. The amorphous structure of silicon nitride in the composite dielectric layer and the lattice orientation of aluminum oxide synergistically regulate the interface to reduce the temperature sensitivity of the dielectric constant; the platinum thin film temperature sensor and the closed-loop control circuit dynamically adjust the compensation voltage to suppress the capacitance value drift under a wide temperature range; the machine learning model iteratively optimizes the mask design parameters based on the measured leakage current data, and combines the reactive ion etching process to accurately control the electrode geometry and reduce the edge leakage current density. Each technical module achieves high-density integration through RDL metal interconnection. While being compatible with the existing packaging process, it systematically solves the phase synchronization error and signal distortion problems caused by the uncontrollable capacitance temperature coefficient in RF circuits. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the technical solution of the present invention, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, for ordinary technicians in this field, other drawings can be obtained based on the drawings without paying any creative labor.

[0014] Figure 1 This is a flow chart of a method for fabricating a radio frequency integrated capacitor structure based on an RDL process provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0015] In order to make the purpose, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below in conjunction with the specific embodiments of the present invention and the corresponding drawings. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention. The technical solutions provided by each embodiment of the present invention are described in detail below in conjunction with the drawings. In order to better understand the purpose of the present invention, the present invention is further described in detail below.

[0016] In a first aspect, the present invention provides an RDL-based radio frequency integrated capacitor structure, comprising a substrate, a composite dielectric layer, a temperature sensor, a signal processing module, an electric field optimization module, a compensation module, and a capacitor unit: A composite dielectric layer, disposed on the surface of the substrate, is composed of alternately stacked silicon nitride layers and aluminum oxide layers, wherein the silicon nitride layers are amorphous and the aluminum oxide layers have a lattice orientation control interface; A temperature sensor, integrated on the substrate, for detecting the operating temperature of the capacitor unit; a signal processing module, electrically connected to the platinum thin film temperature sensor via RDL metal interconnection, receiving the temperature signal and outputting a compensation voltage signal; an electric field optimization module configured to generate electrode geometric parameters through three-dimensional electromagnetic field simulation, wherein the electrode geometric parameters include arc curvature radius and sidewall inclination angle; a compensation module, receiving the compensation voltage signal and applying it to the capacitor plate, wherein the compensation voltage signal is dynamically adjusted according to a mapping relationship between the temperature signal and a preset capacitance drift to offset the capacitance offset caused by temperature; A capacitor unit, composed of a multi-layer metal dielectric stack in the composite dielectric layer and the RDL metal interconnect; The electrode geometric parameters generated by the electric field optimization module are used to control the electrode arc curvature radius through grayscale exposure of the photolithography mask, and to regulate the electrode side wall inclination angle through reactive ion etching; The signal processing module receives the real-time temperature data of the platinum thin film temperature sensor, calculates the compensation voltage signal according to the capacitance drift mapping relationship, and transmits the signal to the compensation module; The compensation module adjusts the voltage value applied to the capacitor plate according to the compensation voltage signal, and feeds back the adjusted capacitance value to the signal processing module to form a closed-loop control.

[0017] A composite dielectric layer is applied to the substrate surface, forming a stacked structure by alternating deposition of silicon nitride and aluminum oxide layers. The silicon nitride layer is formed into an amorphous structure using plasma-enhanced chemical vapor deposition, while the aluminum oxide layer uses atomic layer deposition to control the lattice orientation interface to optimize the temperature stability of the dielectric constant. A temperature sensor is integrated into the substrate surface, formed by sputtering and patterning a platinum thin film into a platinum resistor structure. This sensor is electrically connected to the signal processing module via RDL metal interconnects. The signal processing module receives real-time temperature data collected by the platinum thin film temperature sensor, converts it into digital signals, and then inputs it into a microcontroller unit, which generates a compensation voltage signal using a preset capacitance drift mapping relationship.

[0018] The electric field optimization module builds an electrode model based on 3D electromagnetic field simulation software, generating electrode geometric parameters including arc curvature radius and sidewall tilt angle. These parameters are then used to create a grayscale photolithography mask using an electron beam direct write process, forming a gradient exposure pattern on the photoresist covering the composite dielectric layer. Reactive ion etching uses fluorine-based gases to anisotropically etch the exposed pattern, simultaneously removing photoresist residue and passivating the electrode sidewalls. The result is an electrode profile with an arc curvature radius and optimized sidewall tilt angle.

[0019] The compensation module receives the compensation voltage signal output by the signal processing module, converts it into an analog voltage via a digital-to-analog converter, and applies it to the capacitor plates. A feedback circuit collects the adjusted capacitance value at a preset interval, digitally filters it to eliminate ambient noise, and transmits it back to the signal processing module, forming a closed-loop control circuit. Based on real-time temperature data and a capacitance drift mapping table, the microcontroller unit dynamically adjusts the pulse-width modulation signal duty cycle to control the compensation voltage output intensity and offset temperature-induced capacitance offset.

[0020] The leakage current characteristics of the electrode profile are determined through electrical testing. The measured data are then compared with three-dimensional electromagnetic field simulation results to establish a database correlating arc curvature radius, sidewall inclination angle, and leakage current. A machine learning algorithm trains an optimization model based on this database. The model uses electrode geometry as input to generate mask design parameters, iteratively updating the grayscale photolithography mask fabrication process. The platinum thin-film temperature sensor undergoes multi-point calibration in a thermostatic chamber before packaging. The calibration data is processed using a piecewise linear interpolation algorithm to reduce temperature measurement errors and is then burned into the microcontroller unit's embedded memory.

[0021] A multilayer metal dielectric stack, comprised of a composite dielectric layer and RDL metal interconnects, forms the capacitor unit. The electrode spacing is controlled by photolithographic precision, and the temperature coefficient of the parasitic capacitance is tuned by alternating silicon nitride and aluminum oxide heterojunctions. The amorphous structure of the silicon nitride layer is optimized for stoichiometry by real-time monitoring of the silane-ammonia ratio using plasma emission spectroscopy. The lattice orientation of the aluminum oxide layer is dynamically adjusted by in-situ infrared spectroscopy analysis of the precursor adsorption dynamics, allowing for dynamic adjustment of deposition cycles.

[0022] Each module is electrically connected through RDL metal interconnection. The closed-loop control logic of the signal processing module, the parameter iteration mechanism of the electric field optimization module, and the dynamic adjustment function of the compensation module work together to systematically solve the problem of capacitance temperature coefficient drift in RF integrated circuits, while being compatible with the existing RDL packaging process.

[0023] Second, see Figure 1 The present invention provides a method for preparing a radio frequency integrated capacitor structure based on an RDL process, which is applied to the radio frequency integrated capacitor structure based on the RDL process, and includes: Step 1: performing oxygen plasma cleaning on the surface of a silicon or glass substrate, and depositing a composite adhesion layer after cleaning to enhance the interface bonding strength between the substrate and a subsequent composite dielectric layer; Step 2: Aluminum oxide and silicon nitride layers are sequentially deposited by atomic layer deposition to form a composite dielectric layer. During the deposition of the aluminum oxide layer, in-situ infrared spectroscopy is used to monitor the precursor adsorption reaction and dynamically adjust the number of deposition cycles to control the film density. Step 3: When depositing the silicon nitride layer, the ratio of silane to ammonia is detected in real time by plasma emission spectroscopy to optimize the stoichiometric ratio of silicon nitride to form an amorphous structure.

[0024] Oxygen plasma cleaning is performed on silicon or glass substrates using an oxygen plasma treatment at a radio frequency power of 100-500W for 5-15 minutes to remove organic contaminants and activate hydroxyl groups on the substrate surface. A titanium / copper composite adhesion layer is then deposited via magnetron sputtering. The titanium layer thickness is controlled within the range of 5-15 nanometers to improve interfacial adhesion, and the copper layer thickness is 20-50 nanometers to enhance conductivity. This adhesion layer provides a stable interface foundation for the subsequent uniform deposition of the composite dielectric layer.

[0025] An aluminum oxide layer and a silicon nitride layer are sequentially deposited via atomic layer deposition to form a composite dielectric layer. Trimethylaluminum and water vapor are used as precursors for the aluminum oxide layer deposition. In-situ infrared spectroscopy is used to monitor the dynamic adsorption and desorption of the precursors on the substrate surface. The deposition cycle number is adjusted in real time based on the adsorption saturation, keeping the film density of the aluminum oxide layer within the range of 2.8-3.2 g / cm³. The silicon nitride layer is deposited using a plasma-enhanced chemical vapor deposition process with silane and ammonia as the reaction gases. The formation of the amorphous structure is controlled by adjusting the reaction chamber pressure and substrate temperature. The lattice orientation interface of the aluminum oxide layer and the amorphous structure of the silicon nitride layer form a heterogeneous dielectric layer, synergistically regulating the temperature sensitivity of the dielectric constant.

[0026] During the deposition of the silicon nitride layer, the molecular emission line intensity ratio of silane and ammonia in the reaction chamber is monitored in real time by plasma emission spectroscopy, and the gas flow ratio is dynamically adjusted to a range of 1:3-1:5. When silane is in excess, the ammonia flow rate is increased to suppress the formation of a silicon-rich phase. When ammonia is in excess, the silane supply is increased to avoid the appearance of hole defects in the silicon nitride layer. The optimized stoichiometric ratio stabilizes the silicon-nitrogen atomic ratio of the silicon nitride layer at 3:4, forming a continuous and dense amorphous dielectric layer with a breakdown field strength of the order of 8-10MV / cm. The alternating stacking of aluminum oxide layers and silicon nitride layers, through the interface stress buffering effect, makes the overall temperature coefficient of the composite dielectric layer approach zero.

[0027] Each process step achieves synergy through complementary material properties: oxygen plasma cleaning and titanium / copper adhesion layers enhance interface reliability, atomic layer deposition precisely controls the aluminum oxide lattice structure, and plasma-enhanced chemical vapor deposition optimizes the amorphous properties of silicon nitride. The gradient design of the composite dielectric layer offsets the intrinsic temperature coefficient of a single material through the heterogeneous interface. Combined with the multi-layer stack of RDL metal interconnects, the result is an RF integrated capacitor unit with wide temperature stability.

[0028] Specifically, the method for preparing a radio frequency integrated capacitor structure based on the RDL process of the present invention includes: After the composite dielectric layer is deposited, a platinum thin film is deposited on the surface of the substrate and patterned to form the platinum thin film temperature sensor; Placing the platinum thin film temperature sensor in a constant temperature bath for multi-point calibration, with the calibration temperature covering a range of -40°C to 125°C, recording a resistance-temperature characteristic curve and storing it in a microcontroller unit; The piecewise linear interpolation algorithm is used to process the calibration data, so that the microcontroller unit dynamically corrects the temperature measurement value according to the calibration data, thereby reducing the temperature measurement error.

[0029] After the composite dielectric layer is deposited, a 50-200 nanometer thick platinum film is deposited on the substrate surface via magnetron sputtering. The film is then patterned using photolithography and ion beam etching to form a platinum resistance temperature sensor with a serpentine structure. This sensor is connected to the metal traces of the signal processing module via RDL metal interconnects, enabling low-impedance transmission of the temperature signal.

[0030] A platinum thin-film temperature sensor is placed in a high-precision thermostat and calibrated at multiple points over the temperature range of -40°C to 125°C at 10°C intervals. Each temperature point is held constant for 5 minutes. The resistance change of the platinum resistor is measured using a four-wire method to generate a resistance-temperature characteristic curve. The calibration data is converted to digital form and stored in the microcontroller's flash memory, creating a mapping table between temperature and digital signals.

[0031] The microcontroller uses a piecewise linear interpolation algorithm to process calibration data, dividing the resistance-temperature curve over a wide temperature range into multiple linear intervals. Within each interval, two-point calibration values ​​are used to calculate the slope and intercept parameters, dynamically correcting the real-time temperature measurement. This algorithm reduces nonlinear errors, maintaining temperature detection accuracy within ±0.5°C and providing high-precision temperature input for subsequent capacitor drift compensation.

[0032] A calibrated platinum thin-film temperature sensor is integrated with the composite dielectric layer and RDL metal interconnects on the same substrate. A microcontroller unit (MCU) reads temperature data periodically via the I²C bus and generates a compensation voltage control signal based on a pre-stored capacitance drift mapping table. The temperature sensor's resistance change is converted into a voltage signal via a Wheatstone bridge circuit. This signal is amplified by an instrumentation amplifier and then fed into a signal processing module, forming a closed-loop control link from temperature acquisition to capacitance compensation.

[0033] Functional synergy between process steps improves system stability: the platinum thin film patterning process ensures compatibility between the sensor and RDL interconnects, multi-point calibration eliminates intrinsic material nonlinearity, and a piecewise interpolation algorithm reduces the microcontroller's computational load. The embedded integration of the temperature sensor eliminates parasitic inductance introduced by external leads, meeting the signal integrity requirements of RF circuits.

[0034] Specifically, the method for preparing a radio frequency integrated capacitor structure based on the RDL process of the present invention includes: According to the electrode geometric parameters generated by the electric field optimization module, a grayscale photolithography mask is produced by a preset electron beam direct writing process, and a gradient exposure pattern is formed on the photoresist covering the composite dielectric layer by dose modulation; Based on the gradient exposure pattern, reactive ion etching is performed using fluorine-based gas to simultaneously remove photoresist residues and passivate the electrode sidewalls, thereby generating an electrode profile with an arc-shaped curvature radius and a sidewall inclination angle.

[0035] The electrode geometric parameters output by the electric field optimization module, including the arc curvature radius and sidewall tilt angle, are converted into a grayscale photolithography mask through an electron beam direct writing process. The electron beam is scanned across the mask substrate at an accelerating voltage of 50-100 kV. Dose modulation is achieved by adjusting the beam current density in different regions, forming an exposure pattern with continuous grayscale transitions on the photoresist covering the composite dielectric layer. The exposed photoresist is treated with a tetramethylammonium hydroxide developer for 30-60 seconds to form a gradient sidewall profile corresponding to the arc curvature radius.

[0036] Reactive ion etching (RIE) is performed using a mixture of carbon tetrafluoride and oxygen, with a gas flow ratio set between 4:1 and 6:1, and RF power maintained in the 200-400W range. During the etching process, the fluorine-based plasma simultaneously anisotropically etches the photoresist and composite dielectric layer in the exposed areas, maintaining a vertical to lateral etch rate ratio of greater than 3:1, resulting in an arc-shaped curvature radius corresponding to the grayscale mask. During the etching process, oxygen free radicals react with carbon polymers on the sidewalls to form volatile products, which simultaneously remove photoresist residues and form a silicon nitride passivation layer, stabilizing the electrode sidewall tilt angle within a range of 75-85 degrees.

[0037] The electrode profile formation process achieves parameter control through process synergy: grayscale mask dose modulation determines the three-dimensional morphology after photoresist development, and reactive ion etching parameter matching accurately transfers this morphology to the composite dielectric layer. The arc curvature radius is adjusted by gradually varying the exposure dose to adjust the edge electric field distribution, and sidewall tilt optimization suppresses leakage current through the passivation layer. After etching, the electrode profile and the multilayer stack of RDL metal interconnects together form the capacitor unit. Its geometric parameters are optimized through a closed-loop optimization process using 3D electromagnetic field simulation and measured leakage current data, ultimately improving the temperature stability of the RF capacitor.

[0038] Specifically, the method for preparing a radio frequency integrated capacitor structure based on the RDL process of the present invention includes: Conducting electrical testing on an electrode profile having an arc-shaped curvature radius and a sidewall inclination angle to obtain measured leakage current data, and comparing the measured leakage current data with a three-dimensional electromagnetic field simulation result; Based on the generated electrode geometric parameters and leakage current data, a correlation database of arc curvature radius, sidewall inclination angle and leakage current is established; A machine learning algorithm is used to train an optimization model that takes electrode geometry parameters as input and outputs mask design parameters for updating the grayscale lithography mask fabrication process.

[0039] When conducting electrical tests on electrode profiles with curved curvature radii and sidewall angles, a test system consisting of a probe station and a semiconductor parameter analyzer is used to scan and acquire leakage current data within a preset bias voltage range. The test environment covers the actual operating temperature range of RF capacitors. Data is transmitted to a data processing terminal via a standardized interface. The data is then analyzed for differences with theoretical values ​​derived from 3D electromagnetic field simulation software, generating error distribution maps that serve as a basis for process optimization.

[0040] When establishing a relational database, electrode geometry parameters and leakage current data are categorized and stored by process batch number. The data structure includes fields for arc curvature radius, sidewall inclination angle, leakage current density, and temperature conditions. The database links 3D electromagnetic field simulation result files via primary keys, supporting multi-dimensional data retrieval based on curvature radius and inclination angle combinations. The geometric parameters of the electrode profile form a nonlinear mapping relationship with the leakage current characteristics, providing a training sample set for the machine learning model.

[0041] The optimization model is trained using a random forest algorithm. The input layer receives electrode geometry and operating temperature data, and the output layer generates mask design parameters, including the dose gradient distribution for electron beam writing and the gas ratio combination for reactive ion etching. Cross-validation is used during model training, and the loss function integrates leakage current error and process cost weights. The trained optimization model is integrated into the mask layout design system through an interface. Based on the real-time input geometry parameters, the system generates mask exposure pattern files, driving the electron beam writing equipment to update the grayscale mask production process.

[0042] During the process iteration process, after the electrode profile created with the new mask undergoes electrical testing, leakage current data is automatically transmitted back to the database, triggering online learning updates of the model parameters. Electrode geometry, leakage current characteristics, and mask design parameters form a closed-loop feedback loop. Leveraging the nonlinear fitting capabilities of the machine learning model, the breakdown voltage and temperature stability of the RF capacitor are gradually optimized. Discrepancy analysis between the 3D electromagnetic field simulation results and the measured data is written to a log file to verify the model's prediction accuracy and process consistency.

[0043] Each technical module collaborates through data flow: electrical testing provides process verification data, the database establishes parameter relationships, and the machine learning model generates process optimization instructions. The arc curvature radius of the electrode profile is controlled by mask dose gradient to regulate the edge electric field distribution, and the sidewall tilt angle is optimized by optimizing the etching gas ratio to reduce leakage current density.

[0044] Specifically, the method for preparing a radio frequency integrated capacitor structure based on the RDL process of the present invention includes: collecting operating temperature data at a preset period by the platinum thin film temperature sensor, and inputting the data into the signal processing module after eliminating environmental noise through digital filtering; The signal processing module calculates the compensation voltage adjustment amount through a preset algorithm and transmits the result to the compensation module; After the compensation module applies the compensation voltage to the capacitor plate, it resamples the capacitance value and feeds it back to the signal processing module to form a closed-loop control.

[0045] A platinum thin-film temperature sensor collects operating temperature data via the I²C bus at a 10-100 millisecond interval. The collected analog signal is converted to a digital signal via a 24-bit analog-to-digital converter. The digital filtering module uses a Kalman filter algorithm to eliminate ambient noise, and the processed temperature data is stored in the microcontroller unit's dual-port RAM. The signal processing module uses a pre-stored capacitance drift mapping table to match the temperature data with the preset mapping relationship and calculates the compensation voltage adjustment using a proportional-integral differential algorithm.

[0046] The calculated compensation voltage digital signal is transmitted to the compensation module via a serial peripheral interface and converted to an analog voltage signal by a 16-bit digital-to-analog converter. This signal is then boosted by a power amplifier and applied to the capacitor plates, adjusting the electric field strength between the plates to offset temperature-induced changes in the dielectric constant. After the compensation voltage is applied, the capacitor value is resampled by a charge integrator circuit, and the sampled data is converted back to digital and transmitted to the signal processing module.

[0047] The signal processing module compares the feedback capacitance value with the target capacitance and dynamically adjusts the control parameters of the proportional and integral differential algorithms based on the error. These adjusted parameters are updated into the capacitance drift mapping table, forming a closed-loop control loop for temperature detection, compensation voltage generation, and capacitance feedback. The microcontroller unit synchronizes data acquisition, processing, and feedback timing using a hardware timer, ensuring that the closed-loop control response time matches the RF signal cycle.

[0048] A platinum thin-film temperature sensor is integrated into a coplanar waveguide structure with RDL metal interconnects to reduce high-frequency signal crosstalk. The compensation module's power amplifier uses a differential output structure, connected to the capacitor plates via shielded cables, to suppress the impact of common-mode noise on compensation voltage accuracy. During closed-loop control, the digital filtering algorithm is optimized in tandem with the proportional / integral differential algorithm to keep capacitance fluctuations within the RF circuit's tolerances.

[0049] In terms of process implementation, the temperature sensor's data acquisition link and the compensation module's voltage application path are integrated on the same metal layer through the RDL process. The signal processing module's algorithm firmware is burned into the microcontroller unit's flash memory. This closed-loop control logic reduces the impact of external temperature disturbances on the RF capacitor while maintaining compatibility with existing RDL packaging processes.

[0050] Specifically, the method for preparing a radio frequency integrated capacitor structure based on the RDL process described in the present invention includes: processing temperature and capacitance drift data through a polynomial fitting algorithm in the signal processing module to generate a capacitance drift mapping relationship, and converting the compensation voltage signal into an analog voltage through a digital-to-analog converter and then applying it to the capacitor plate; The microcontroller unit dynamically controls the output intensity of the compensation voltage by adjusting the duty cycle of the pulse width modulation signal according to the capacitance drift mapping relationship and the real-time temperature data.

[0051] The signal processing module uses stored historical temperature and capacitance drift data and a third-order polynomial fitting algorithm to establish a capacitance drift mapping relationship. The polynomial coefficients are optimized and calculated using the least-squares method, and the mapping table is stored as a two-dimensional array in the microcontroller unit's flash memory. After analog-to-digital conversion, the temperature data is input into the polynomial calculation unit, which outputs a real-time prediction of the capacitance drift compensation at the corresponding temperature point.

[0052] The compensation voltage signal is converted to an analog voltage via a 16-bit digital-to-analog converter. A low-temperature drift Zener diode is used as the reference voltage source, and the output voltage range covers 0-5V. The converted analog signal is then passed through a differential amplifier circuit to enhance its drive capability and transmitted via shielded wiring to the capacitor plates, suppressing high-frequency noise from interfering with compensation accuracy. After the compensation voltage is applied, the change in the equivalent capacitance of the capacitor unit is detected by a charge integrator circuit, and the sampled data is fed back to the signal processing module for closed-loop verification.

[0053] The microcontroller unit generates a pulse-width modulated signal through a hardware PWM module, whose duty cycle is dynamically adjusted based on the capacitance drift mapping relationship. When the temperature change rate exceeds a threshold, a fuzzy control algorithm is used to adaptively adjust the PWM frequency and duty cycle step size to match the compensation voltage output intensity with the temperature drift rate. The PWM signal is converted to a DC voltage through a low-pass filter and superimposed on the main compensation voltage to form a composite control signal, extending the compensation dynamic range.

[0054] The DMA controller aligns temperature data with capacitor drift, ensuring synchronization between polynomial fitting calculations and PWM duty cycle updates. The closed-loop control period of the signal processing module is an integer multiple of the RF signal modulation period to prevent harmonic interference. The microcontroller unit forms a common ground loop with the capacitor unit and temperature sensor through RDL metal interconnects, reducing the impact of parasitic inductance on compensation loop stability.

[0055] In terms of process implementation, the polynomial coefficient table and PWM control parameters are burned into the microcontroller unit through an online programming interface, supporting field calibration updates. The digital-to-analog converter and PWM module are integrated into the analog front end of the same chip, isolated from the digital circuitry by a metal shielding layer.

[0056] This invention addresses the uncontrollable temperature coefficient of MIM capacitors in radio frequency integrated circuits (RFICs) by integrating composite dielectric layers, closed-loop temperature compensation, and coordinated optimization of process parameters. The composite dielectric layer utilizes an alternating stack of silicon nitride and aluminum oxide. The silicon nitride layer is formed into an amorphous state through plasma-enhanced chemical vapor deposition, while the aluminum oxide layer is deposited using atomic layer deposition to control the lattice orientation interface. The heterogeneous interface between the two materials creates a stress buffering effect, which reduces the overall temperature coefficient of the composite dielectric layer to near zero, offsetting the intrinsic temperature sensitivity of the individual dielectric materials.

[0057] A temperature sensor integrated into the substrate surface detects the operating temperature of the capacitor unit via a platinum thin-film resistor and transmits this information to the signal processing module via the RDL metal interconnect. The signal processing module then uses a pre-stored capacitance drift mapping relationship and a proportional-integral differential algorithm to calculate the compensation voltage adjustment. This is then applied to the capacitor plates via a digital-to-analog converter. After the compensation voltage is applied, a charge integrator circuit provides real-time feedback of the capacitance value to the signal processing module, forming a closed-loop control link between temperature, voltage, and capacitance, dynamically offsetting the dielectric constant shift caused by temperature.

[0058] The electrode contour is simulated using 3D electromagnetic fields to generate arc curvature radius and sidewall tilt parameters, and a machine learning model is used to optimize mask design and etching processes. Measured leakage current data is compared with simulation results, and a database is updated to drive the model's iterative adjustments to the electron beam direct writing dose gradient and reactive ion etching gas ratio. This process synergy reduces electrode edge leakage current density through data-driven parameter optimization, improving the high-frequency stability of RF capacitors over a wide temperature range.

Claims

1. The RF integrated capacitor structure based on RDL process is characterized by: It includes a substrate, a composite dielectric layer, a temperature sensor, a signal processing module, an electric field optimization module, a compensation module, and a capacitor unit: A composite dielectric layer, disposed on the surface of the substrate, is composed of alternately stacked silicon nitride layers and aluminum oxide layers, wherein the silicon nitride layers are amorphous and the aluminum oxide layers have a lattice orientation control interface; A temperature sensor, integrated on the substrate, for detecting the operating temperature of the capacitor unit; a signal processing module, electrically connected to the platinum thin film temperature sensor via RDL metal interconnection, receiving the temperature signal and outputting a compensation voltage signal; an electric field optimization module configured to generate electrode geometric parameters through three-dimensional electromagnetic field simulation, wherein the electrode geometric parameters include arc curvature radius and sidewall inclination angle; a compensation module, receiving the compensation voltage signal and applying it to the capacitor plate, wherein the compensation voltage signal is dynamically adjusted according to a mapping relationship between the temperature signal and a preset capacitance drift to offset the capacitance offset caused by temperature; A capacitor unit, composed of a multi-layer metal dielectric stack in the composite dielectric layer and the RDL metal interconnect; The electrode geometric parameters generated by the electric field optimization module are used to control the electrode arc curvature radius through grayscale exposure of the photolithography mask, and to regulate the electrode side wall inclination angle through reactive ion etching; The signal processing module receives the real-time temperature data of the platinum thin film temperature sensor, calculates the compensation voltage signal according to the capacitance drift mapping relationship, and transmits the signal to the compensation module; The compensation module adjusts the voltage value applied to the capacitor plate according to the compensation voltage signal, and feeds back the adjusted capacitance value to the signal processing module to form a closed-loop control.

2. A method for preparing a radio frequency integrated capacitor structure based on an RDL process, applied to the radio frequency integrated capacitor structure based on an RDL process according to claim 1, characterized in that: include: Performing oxygen plasma cleaning on the surface of a silicon or glass substrate, and depositing a composite adhesion layer after cleaning to enhance the interface bonding strength between the substrate and a subsequent composite dielectric layer; Aluminum oxide and silicon nitride layers are sequentially deposited via atomic layer deposition to form a composite dielectric layer. During the deposition of the aluminum oxide layer, in-situ infrared spectroscopy is used to monitor the precursor adsorption reaction and dynamically adjust the number of deposition cycles to control the film density. When depositing the silicon nitride layer, the ratio of silane to ammonia is detected in real time by plasma emission spectroscopy to optimize the stoichiometric ratio of silicon nitride to form an amorphous structure.

3. The method for preparing a radio frequency integrated capacitor structure based on RDL process according to claim 2, characterized in that: include: After the composite dielectric layer is deposited, a platinum thin film is deposited on the surface of the substrate and patterned to form the platinum thin film temperature sensor; Placing the platinum thin film temperature sensor in a constant temperature bath for multi-point calibration, with the calibration temperature covering a range of -40°C to 125°C, recording a resistance-temperature characteristic curve and storing it in a microcontroller unit; The piecewise linear interpolation algorithm is used to process the calibration data, so that the microcontroller unit dynamically corrects the temperature measurement value according to the calibration data, thereby reducing the temperature measurement error.

4. The method for preparing a radio frequency integrated capacitor structure based on RDL process according to claim 1, characterized in that: include: According to the electrode geometric parameters generated by the electric field optimization module, a grayscale photolithography mask is produced by a preset electron beam direct writing process, and a gradient exposure pattern is formed on the photoresist covering the composite dielectric layer by dose modulation; Based on the gradient exposure pattern, reactive ion etching is performed using fluorine-based gas to simultaneously remove photoresist residues and passivate the electrode sidewalls, thereby generating an electrode profile with an arc-shaped curvature radius and a sidewall inclination angle.

5. The method for preparing a radio frequency integrated capacitor structure based on RDL process according to claim 4, characterized in that: include: Conducting electrical testing on an electrode profile having an arc-shaped curvature radius and a sidewall inclination angle to obtain measured leakage current data, and comparing the measured leakage current data with a three-dimensional electromagnetic field simulation result; Based on the generated electrode geometric parameters and leakage current data, a correlation database of arc curvature radius, sidewall inclination angle and leakage current is established; A machine learning algorithm is used to train an optimization model that takes electrode geometry parameters as input and outputs mask design parameters for updating the grayscale lithography mask fabrication process.

6. The method for preparing a radio frequency integrated capacitor structure based on RDL process according to claim 1, characterized in that: include: The platinum thin film temperature sensor collects working temperature data at a preset period, and the data is input into the signal processing module after being digitally filtered to eliminate environmental noise; The signal processing module calculates the compensation voltage adjustment amount through a preset algorithm and transmits the result to the compensation module; After the compensation module applies the compensation voltage to the capacitor plate, it resamples the capacitance value and feeds it back to the signal processing module to form a closed-loop control.

7. The method for preparing a radio frequency integrated capacitor structure based on RDL process according to claim 6, characterized in that: include: The temperature and capacitance drift data are processed by a polynomial fitting algorithm in the signal processing module to generate a capacitance drift mapping relationship, and the compensation voltage signal is converted into an analog voltage by a digital-to-analog converter and then applied to the capacitor plate; The microcontroller unit dynamically controls the output intensity of the compensation voltage by adjusting the duty cycle of the pulse width modulation signal according to the capacitance drift mapping relationship and the real-time temperature data.

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