Signal processing method and device
By using FPGA and LSTM network to process signals in the electronic commodity anti-theft system, the system's anti-interference problem in complex environments is solved, and the accuracy and stability of detection are improved.
Patent Information
- Application Number
- CN202510817659.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-18
- Publication Date
- 2025-09-19
AI Technical Summary
Existing electronic commodity anti-theft systems have insufficient anti-interference capabilities in complex and changing environments, and are prone to false positives and missed positives, affecting system stability.
A field programmable gate array (FPGA) is used to transmit detection signals, and the label signal and environmental noise signal are converted into frequency domain information through the fast Fourier transform module. The information is input into the trained long short-term memory network (LSTM) module for classification. Combined with the FIR bandpass filter and alarm module, abnormal disturbances and noise in the signal can be dynamically filtered out.
The anti-interference ability of the electronic commodity anti-theft system is improved, the accuracy of the classification results and the stability of the system are enhanced, and long-distance detection is achieved.
Smart Images
Figure CN120671015A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of electronic anti-theft technology, and in particular to a signal processing method and device. Background Art
[0002] Electronic Article Surveillance (EAS) is an anti-theft measure used in open shopping environments. It works by detecting the resonant signal of radio frequency tags to monitor merchandise. However, in complex and changing operating environments, the effects of environmental noise, electromagnetic interference, and other unexpected signals can lead to false positives, missed detections, and even reduce overall system stability.
[0003] Existing anti-interference technologies often rely on signal processing and classification methods that manually extract time-frequency domain features and combine them with classifiers such as decision trees or support vector machines. These methods struggle to maintain effective anti-interference performance in non-stationary noise environments, when multiple devices are operating simultaneously, or when encountering electromagnetic interference with similar operating frequencies. Therefore, improving the anti-interference capabilities of electronic product anti-theft systems is a critical issue that needs to be addressed. Summary of the Invention
[0004] The embodiments of the present invention provide a signal processing method and device, which can improve the anti-interference capability of an electronic commodity anti-theft system.
[0005] An embodiment of the present invention provides a signal processing method, comprising the following steps: The field programmable gate array FPGA transmits a first detection signal to detect the tag signal of the electronic product and collects the environmental noise signal; Based on the label signal and the environmental noise signal, the fast Fourier transform module in the FPGA is used to convert the signal into frequency domain information. The frequency domain information is then input into the trained long short-term memory network (LSTM) module in the FPGA to obtain the first classification result. When the first classification result indicates that the electronic commodity tag does not exist, retransmitting the first detection signal to perform detection until the first classification result indicates that the electronic commodity tag exists; The second detection signal is transmitted to detect until a second classification result is obtained; when the second classification result is that the electronic product tag does not exist, the first detection signal is re-transmitted to detect until the second classification result is that the electronic product tag exists.
[0006] Furthermore, the signal processing method further includes: controlling the alarm module to sound an alarm.
[0007] Furthermore, before using the fast Fourier transform module in the FPGA to convert into frequency domain information, it also includes: receiving the tag signal and environmental noise signal of the electronic product through a receiving circuit, and processing them using an FIR bandpass filter, and storing the processing results in a storage module; wherein, the receiving circuit includes: a receiving antenna and a high-speed ADC module.
[0008] Furthermore, inputting the frequency domain information into the trained long short-term memory network LSTM module in the FPGA to obtain a first classification result specifically includes: inputting the frequency domain information eight times into the trained long short-term memory network LSTM module to obtain a classification result.
[0009] Furthermore, the long short-term memory network (LSTM) module has specific training steps including: using historically collected label signals of electronic products and historically collected environmental noise signals to train the LSTM network module to obtain a classification result; wherein the classification result includes: the presence of the label of the electronic product or the absence of the label of the electronic product; and deploying the trained LSTM module offline into the FPGA.
[0010] An embodiment of the present invention provides a signal processing device, comprising: a field programmable gate array (FPGA), one end of the FPGA being connected to a transmitting antenna via a transmitting circuit, and the other end of the FPGA being connected to a receiving antenna via a receiving circuit; The FPGA includes: a storage module RAM, a fast Fourier transform module FFT, an LSTM network module and a direct digital frequency synthesizer DDS; the input end of the RAM is connected to the output end of the receiving circuit, the output end of the RAM is connected to the input end of the FFT, the output end of the FFT is connected to the input end of the LSTM network module; the output end of the DDS is connected to the input end of the transmitting circuit.
[0011] Furthermore, the FPGA also includes: an alarm circuit.
[0012] Furthermore, the input end of the DDS is connected to the output end of the frequency selection module.
[0013] The embodiments of the present invention provide a signal processing method and apparatus, which have the following beneficial effects compared with the prior art: The label signal and the environmental noise signal are converted into frequency domain information through the fast Fourier transform module, and the frequency domain information is input into the trained LSTM network module to obtain the first classification result; because the forget gate and input gate in the LSTM network can dynamically filter abnormal disturbances or noise in the signal, the classification result has increased anti-interference ability during the acquisition process. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] Figure 1A flow chart of a method provided by an embodiment of the present invention; Figure 2 A schematic diagram of a signal processing device provided by an embodiment of the present invention; Figure 3 LSTM network structure diagram provided for an embodiment of the present invention; Figure 4 This is a diagram of the internal structure of the LSTM network module provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0015] To make the above-mentioned objects, features, and advantages of the present invention more readily apparent, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings. The following description sets forth numerous specific details to facilitate a full understanding of the present invention. However, the present invention can be implemented in many other ways than those described herein, and those skilled in the art may make similar modifications without departing from the scope of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.
[0016] See also Figure 1 , an embodiment of the present invention provides a signal processing method, comprising the following steps: Step 1: The field programmable gate array FPGA transmits a first detection signal to detect the tag signal of the electronic product and collects the environmental noise signal.
[0017] Step 2: Based on the label signal and the environmental noise signal, use the fast Fourier transform module in the FPGA to convert it into frequency domain information, and input the frequency domain information into the trained long short-term memory network LSTM module in the FPGA to obtain the first classification result.
[0018] Step 3: When the first classification result indicates that the electronic commodity tag does not exist, the first detection signal is re-transmitted to perform detection until the first classification result indicates that the electronic commodity tag exists.
[0019] Step 4: transmit a second detection signal to detect until a second classification result is obtained; when the second classification result is that the electronic product tag does not exist, re-transmit the first detection signal to detect until the second classification result is that the electronic product tag exists.
[0020] The method of the present invention is applied to an LSTM network electronic commodity theft prevention detection system based on a field programmable gate array (FPGA), and specifically includes the following contents: An EAS system is provided with a sweep bandwidth of 7.7-8.7 MHz, 16 sweep points, a complete detection cycle of 1 ms, a 256-point sampling of the ambient signal, represented by a 10-bit fixed-point bit width, and a 256-point fast Fourier transform (FFT) representation using 16-bit fixed-point data. For the EAS detection and reception system, the detected signal frequency is known at the current moment, and detection is performed only on known frequency parameters under a single parameter.
[0021] The FPGA-based LSTM network electronic commodity anti-theft detection system includes at least one detection and receiving channel and one transmission channel. Each detection and receiving channel includes a storage module, a fast Fourier transform module, and an LSTM network module connected in sequence, all of which are integrated on the FPGA chip; the transmission channel includes a DDS module and a transmission circuit connected to it.
[0022] After the EAS is powered on, it enters the coarse scanning mode, in which the EAS signal is collected.
[0023] First, the transmitting circuit transmits a detection signal , each time the signal is received , after fast Fourier transform, the frequency domain information of the label data is obtained as ,from Select the frequency information within the frequency band of interest: ;in, for The frequency data of interest, The fixed-point format is Q(16,15).
[0024] The LSTM network is fed with the current input Perform matrix operations: .
[0025] in Represents the Sigmoid function, Tanh represents the hyperbolic tangent activation function. W, 、 are the parameters for network training; Is the hidden state of the LSTM network. Input gate , Forget Gate , output gate and candidate memory units Obtained from the above matrix operation. t represents the current time, and t-1 represents the previous time.
[0026] Memory cells in LSTM networks The information at time t is input into the gate at the current time. Control candidate memory cells and the Forget Gate Control the memory cells of the previous moment information jointly determined.
[0027] .
[0028] in Represents matrix dot product.
[0029] Hidden State The output gate Controlling memory cells A portion of the output at the current moment: .
[0030] Based on the complete calculation process within the LSTM unit Time input as well as - The hidden layer output at time Calculating the forget gate right - Moment Memory Unit The selection and rejection of information. Then calculate Candidate memory unit at the moment and input gate , through the input gate Select time t Useful information and - time The useful information in Memory cells of the moment Then set After the activation function, according to the output gate Determine hidden state Output.
[0031] Network parameters and The fixed-point format is Q(16,10), the network weights W, 、 The fixed-point format is Q(8,5).
[0032] The above complete calculation process is a calculation process of one time step. This example requires a total of 8 time steps to output a classification result.
[0033] Matrix operations can be calculated by multiplication and accumulation operations, and the calculation formula is: .
[0034] The Sigmoid activation function formula is: , the implementation of the fixed-point Sigmoid function is achieved by function approximation: .
[0035] The function approximation method only requires one multiplication and two shift operations, which is easy to implement in hardware and consumes little logic resources. Then, the symmetry of the Sigmoid function is utilized:
[0036] .
[0037] Get the fixed-point calculation of the entire Sigmoid function.
[0038] The fixed-point number formats of the Sigmoid function input and output are Q(16,10) and Q(8,7) respectively.
[0039] The Tanh activation function can be represented by the Sigmoid fixed-point function: .
[0040] The fixed-point number formats of the Tanh function input and output are Q(16,10) and Q(8,7) respectively.
[0041] LSTM layer output The fully connected layer participates in the fully connected layer operations as input. The fully connected layer operations are equivalent to matrix operations and can still be implemented by multiplication and accumulation operations. The output of the fully connected layer serves as the input of the Sigmoid output layer, which uses the Sigmoid function to output the classification results.
[0042] If the output layer determines that it is a tag signal, it will enter the fine scanning mode from the coarse scanning mode to detect the frequency parameters again; if it is determined that there is no tag signal, the parameters will be updated and the coarse scanning mode will be re-entered to detect the next frequency; if the frequency is detected in the fine scanning mode and it is determined that there is a tag, the device will enter the alarm state; if the fine scanning mode determines that there is no tag, the parameters will be updated and the coarse scanning mode will be re-entered to detect the next frequency.
[0043] The present invention discloses an intelligent electronic goods anti-theft system based on an FPGA, comprising at least one acquisition channel and one transmission channel. Specifically, the system comprises: a transmission module for generating and selecting a detection waveform of a desired frequency; a transmission circuit and a transmission antenna for generating an electromagnetic wave signal of a corresponding frequency and transmitting it into a detection space; a receiving antenna and a receiving circuit for sampling tag signals within the detection space; a storage module for storing the signals acquired by the sampling circuit; a fast Fourier transform module for performing a Fourier transform on the acquired signals to convert the time domain into frequency domain information; an LSTM network module for classifying the sequence information after conversion to the frequency domain; and an alarm module for generating an audible and visual alarm for signals classified as tags. The present invention realizes an EAS signal detection and reception system with strong anti-interference capabilities and a long detection distance.
[0044] The overall detection process of the system consists of four parts: parameter update, rough scanning mode, fine scanning mode and alarm: A detection cycle of both coarse scanning mode and fine scanning mode includes four parts: noise environment acquisition, signal transmission, signal acquisition and signal processing: Noise environment acquisition stage is used to sample the current environmental noise information ; The signal transmission phase is used to transmit the waveform of the tag in the detection space; the signal acquisition phase is used to sample the tag information in the current detection space .
[0045] In the coarse scan mode, if the tag signal is judged to be present, the device jumps to the fine scan mode. In the coarse scan mode, if the tag signal is judged not to be present, the device updates the parameters and re-enters the coarse scan mode. In the fine scan mode, if the tag signal is judged to be present, the device jumps to the alarm state. In the fine scan mode, if the tag signal is judged not to be present, the device updates the parameters and re-enters the coarse scan mode.
[0046] The system includes at least one detection and receiving channel. Each detection channel includes: a receiving circuit part for receiving the tag signal in the detection space; a storage module for storing the signal sampled by the receiving circuit part; a fast Fourier transform module for performing Fourier transform on the data in the storage module, converting the time domain information into frequency domain information, and performing normalization processing; an LSTM module for judging the input frequency domain signal and outputting the classification information of the signal; and an alarm module for generating sound and light alarm information for the tag signal in the output classification. The receiving circuit includes a receiving antenna and a high-speed ADC, which samples the label information. The data sampled by the receiving circuit is preprocessed using FIR bandpass filtering and then stored in a storage module. The Fourier transform module has fixed-point input and output, and the frequency domain information is normalized using calibration and normalization. The input of the LSTM network requires a total of eight inputs from the Fourier transform module. The LSTM network outputs a classification based on the eight inputs. The internal parameters of the LSTM network are trained using noise data and label data. The LSTM network includes an LSTM network layer, a fully connected layer, and a Sigmoid output layer. The LSTM network layer contains two LSTM units, and the fully connected layer includes two neurons. The storage module, fast Fourier transform module, LSTM network module, and alarm module are all integrated on the FPGA chip. The parameters of the LSTM network are trained using collected data and then deployed offline on the FPGA.
[0047] like Figure 3 The figure shows the LSTM network structure, which includes the input layer, LSTM network layer, fully connected layer, and sigmoid output layer.
[0048] Figure 4 This is the internal structure diagram of the LSTM network module, which includes the matrix operation MAC module, weight storage ROM, activation function module ACT, dot multiplication module Dot and candidate unit and hidden state The weight storage module is used to store the weight matrix required for matrix operations; the matrix operation MAC module is used to perform matrix operations on the input and the weight matrix; the activation function ACT module is used to perform nonlinear operations on the matrix operation results.
[0049] See Figure 2 An embodiment of the present invention provides a signal processing device, including: a field programmable gate array (FPGA), one end of the FPGA is connected to a transmitting antenna via a transmitting circuit, and the other end of the FPGA is connected to a receiving antenna via a receiving circuit.
[0050] The FPGA includes a memory module RAM, a fast Fourier transform module FFT, an LSTM network module, and a direct digital frequency synthesizer DDS; the input end of the RAM is connected to the output end of the receiving circuit, the output end of the RAM is connected to the input end of the FFT, the output end of the FFT is connected to the input end of the LSTM network module; and the output end of the DDS is connected to the input end of the transmitting circuit.
[0051] The beneficial effects of the present invention are: The EAS system uses a digital receiving architecture based on FPGA chips to complete signal reception and signal processing; the signal processing uses an LSTM network instead of the traditional feature extraction decision tree method, which has strong anti-interference ability and higher robustness; the present invention performs signal processing and classification on the tag signals sampled by the EAS equipment, has good classification results, and realizes an EAS system with strong anti-interference performance and long detection distance.
[0052] A specific embodiment is as follows: This embodiment discloses a signal processing method, the specific steps of which are as follows: S1. Send a first detection signal to detect the tag signal of the electronic product and collect the environmental noise signal.
[0053] S2. Based on the label signal and the environmental noise signal, the fast Fourier transform module in the FPGA is used to convert the signal into frequency domain information, and the frequency domain information is input into the trained long short-term memory network LSTM module in the FPGA to obtain the first classification result.
[0054] S3. When the first classification result indicates that the electronic commodity tag does not exist, retransmit the first detection signal to perform detection until the first classification result indicates that the electronic commodity tag exists.
[0055] S4. Transmit a second detection signal to perform detection until a second classification result is obtained; when the second classification result is that the electronic product tag does not exist, retransmit the first detection signal to perform detection until the second classification result is that the electronic product tag exists.
[0056] The EAS system includes but is not limited to at least one of electronic devices such as FPGA and DSP that can be configured to execute a signal processing method provided by the present invention.
[0057] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the patent for this invention shall be determined by the appended claims.
Claims
1. A signal processing method, characterized in that: The following steps are involved: The field programmable gate array FPGA transmits a first detection signal to detect the tag signal of the electronic product and collects the environmental noise signal; Based on the label signal and the environmental noise signal, the fast Fourier transform module in the FPGA is used to convert the signal into frequency domain information. The frequency domain information is then input into the trained long short-term memory network (LSTM) module in the FPGA to obtain the first classification result. When the first classification result indicates that the electronic commodity tag does not exist, retransmitting the first detection signal to perform detection until the first classification result indicates that the electronic commodity tag exists; transmitting a second detection signal to perform detection until a second classification result is obtained; When the second classification result is that the electronic commodity tag does not exist, the first detection signal is re-transmitted to perform detection until the second classification result is that the electronic commodity tag exists.
2. A signal processing method according to claim 1, characterized in that: The signal processing method further includes: controlling the alarm module to sound an alarm.
3. A signal processing method according to claim 1, characterized in that: Before converting the information into frequency domain information using the fast Fourier transform module in the FPGA, the method further includes: The tag signal and environmental noise signal of the electronic product are received by the receiving circuit, and processed using an FIR bandpass filter, and the processing results are stored in a storage module; wherein the receiving circuit includes: a receiving antenna and a high-speed ADC module.
4. A signal processing method according to claim 1, characterized in that: Inputting the frequency domain information into the trained long short-term memory network (LSTM) module in the FPGA to obtain the first classification result specifically includes: The eight frequency domain information is input into the trained long short-term memory network LSTM module to obtain a classification result.
5. A signal processing method according to claim 4, characterized in that: The specific training steps of the long short-term memory network LSTM module include: Using historically collected electronic product label signals and historically collected environmental noise signals to train an LSTM network module to obtain a classification result; wherein the classification result includes: the presence of the electronic product label or the absence of the electronic product label; Deploy the trained LSTM module offline to the FPGA.
6. A signal processing device, characterized in that: It includes: a field programmable gate array (FPGA), one end of the FPGA is connected to a transmitting antenna via a transmitting circuit, and the other end of the FPGA is connected to a receiving antenna via a receiving circuit; The FPGA includes a memory module RAM, a fast Fourier transform module FFT, an LSTM network module and a direct digital frequency synthesizer DDS; The input end of the RAM is connected to the output end of the receiving circuit, the output end of the RAM is connected to the input end of the FFT, the output end of the FFT is connected to the input end of the LSTM network module; the output end of the DDS is connected to the input end of the transmitting circuit.
7. A signal processing device according to claim 6, characterized in that: The FPGA further includes an alarm circuit.
8. A signal processing device according to claim 6, characterized in that: The input end of the DDS is connected to the output end of the frequency selection module.