LED (Light Emitting Diode) chip structure of composite layer ITO (Indium Tin Oxide) film and preparation method thereof

Abstract

The invention relates to the technical field of semiconductor lighting, in particular to an LED chip structure of a composite layer ITO film and a preparation method of the LED chip structure, and the LED chip structure comprises a substrate, a GAN layer, a P layer, an ITO bottom layer, an ITO middle layer and an ITO top layer which are sequentially arranged from bottom to top; wherein the number of the ITO middle layers is at least two, namely the first middle layer and the second middle layer; wherein the ITO bottom layer accounts for 5%-10% of the total thickness D of the coating ITO, the Hearthcoil is set to be 10A-15A, and the ion source is low in energy and low in airflow; wherein the first middle layer accounts for 10%-15% of the total thickness D of the coating film ITO, the Hearthcoil is set to be 20A-30A, the energy of an ion source is increased, and gas is appropriate; wherein the second middle layer accounts for 30%-40% of the total thickness D of the coating ITO, the Hearthcoil is set to be 30A-40A, the ion source is high in energy, and Ar bombardment is increased, the composite ITO film layer with at least three layers is formed by adjusting the coil current to be matched with the ion source device in the RPD coating process, so that the problems of stress and insufficient carrier mobility are effectively relieved, and finally the purposes of reducing the product voltage and improving the lighting effect are achieved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor lighting, and in particular to an LED chip structure of a composite layer ITO film and a preparation method thereof. Background Art

[0002] LEDs have the advantages of high luminous efficacy, low energy consumption, long life, and environmental friendliness. They have long become indispensable optoelectronic components in daily life and are currently widely used in high-efficiency solid-state lighting applications such as digital tubes, display screens, backlights, automotive lights, traffic lights, and landscape lighting. Currently, LEDs have low external quantum efficiency due to their low light extraction efficiency. Therefore, the main problem with LEDs is how to extract light from the interior of the semiconductor material. The most common method is to grow a current spreading layer on top of the epitaxial layer. The current spreading layer can spread the carriers outside the electrode, so that some light can avoid the reflection of light by the opaque electrode. ITO film has properties such as high transmittance, low resistivity and good lateral current spreading, and is often used as the current spreading layer of LEDs. In the existing technology, ITO films usually have a contradiction between conductivity and transmittance, and the main defects of existing coating technology are: 1. The carrier mobility attenuation caused by lattice defects in single-layer ITO film (thickness 80-150nm) 2. High temperature annealing process (>500℃) can easily cause film cracking and increase contact resistance by 15-20%. 3. Conventional multilayer structures (such as ITO / Ag / ITO) have an interface reflection loss of 8-12%, resulting in light loss. Summary of the Invention

[0003] The purpose of the present invention is to provide a composite layer ITO film technology that improves the luminous efficiency of LED chips by improving the transparent conductive layer structure, so as to solve the problems raised in the above background technology.

[0004] To achieve the above object, the present invention provides the following technical solution: a composite layer ITO film LED chip structure, comprising a substrate, a GAN layer, a P layer, an ITO bottom layer, an ITO middle layer and an ITO top layer arranged in order from bottom to top; The ITO intermediate layer is at least two layers, namely, intermediate layer 1 and intermediate layer 2; The ITO bottom layer accounts for 5%-10% of the total thickness D of the coated ITO, the Hearthcoil is set at 10A-15A, and the ion source has low energy and low airflow; The middle layer accounts for 10%-15% of the total thickness of the ITO coating. The Hearthcoil is set at 20A-30A, and the ion source increases energy and appropriate gas. The second intermediate layer accounts for 30%-40% of the total thickness D of the coated ITO film, the Hearthcoil is set at 30A-40A, the ion source has high energy, and the Ar bombardment is increased; The ITO top layer accounts for 5%-10% of the total thickness D of the coated ITO, the Hearthcoil is set to 10A-20A, the ion source is high energy, and the Ar bombardment is increased.

[0005] A method for preparing an LED chip structure with a composite ITO film layer comprises the following steps: Step 1: The conductivity of the ITO film, i.e., the In / Sn ratio, and the light transmittance, i.e., the oxygen content, are sensitive to the composition. The spot size affects the local heating degree of the ITO source, causing the selective decomposition of indium trioxide and tin dioxide, thereby forming ITO films with different In / Sn ratios. Step 2: Add an ion source device with variable energy and gas layering control. By bombarding the evaporated ITO material molecules with ions, on the one hand, the mobility of the ITO deposition is changed, and on the other hand, the surface of the ITO film is appropriately roughened. By adjusting the acceleration voltage of the ion source and the Ar gas flow rate, the energy is gradually optimized to the balance point, thereby obtaining the required film density and ITO roughening effect; Step 3: Adjust the specific parameter settings and prepare each layer.

[0006] Preparation of ITO bottom layer, the specific steps include as follows: ITO bottom layer: Hearthcoil is set to 10A-15A, ion source voltage is set to 0V-300V, Ar gas flow is set to 1sccm-3sccm, large spot coating, ITO source is heated evenly, evaporated IN / Sn has high uniformity, and is easier to form good ohmic contact with the epitaxial layer. At the same time, the ion source energy is relatively low, which reduces the damage to the epitaxial layer while ensuring the lateral mobility of ITO.

[0007] Preparation of the intermediate layer 1. The specific steps include: setting the Hearthcoil to 20A-30A, the ion source voltage to 0V-1200V, the Ar gas flow rate to 1sccm-3sccm, and reducing the spot size to heat the ITO source locally. Indium trioxide and tin dioxide will be selectively decomposed, the carrier concentration will increase, the film resistance will decrease, and the ion source energy will increase. At this time, the film layer will be denser and the surface will be relatively flat. This layer serves as a buffer layer.

[0008] The specific steps for preparing the second intermediate layer are as follows: Hearthcoil is set to 30A-40A, the ion source voltage is set to 0V-1800V, the Ar gas flow rate is set to 5sccm-10sccm, the spot is further reduced, the In / Sn ratio of the ITO film layer is further differentiated, the carrier concentration is increased, and the ion source energy is further increased, thereby increasing the lateral mobility of ITO and further reducing the film resistance. As the Ar gas increases, the surface of the ITO film begins to be roughened, increasing the light output area.

[0009] The specific steps for preparing the ITO top layer include: setting the Hearthcoil to 10A-20A, the ion source voltage to 0V-1800V, and the Ar gas flow rate to 20sccm-30sccm. This layer is the last layer of the ITO film. Due to the gradual effect of the previous buffer layer, the film resistance has been significantly reduced, but in order to reduce the brightness loss, the Ar gas flow rate is further increased in this layer to obtain a highly crystallinity and roughened film layer, thereby improving the chip brightness.

[0010] Compared with the prior art, the present invention has the following beneficial effects: 1. In order to reduce the high resistance and film cracking caused by lattice defects and stress problems in the ITO film layer, this application adjusts the coil current and matches the ion source device during the RPD coating process to form a composite ITO film layer of at least three layers, thereby effectively alleviating the stress and insufficient carrier mobility problems, and ultimately achieving the purpose of reducing product voltage and improving light efficiency.

[0011] 2. Dimensional carrier transport channel (improve mobility, reduce film resistance, and reduce chip voltage).

[0012] 3. Gradient layer coarsening effect (increases light output area and increases chip brightness).

[0013] 4. Stress buffer structure (the buffer layer is set to reduce film stress, avoid high temperature cracking, and improve product reliability). BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0015] Figure 1 This is a structural diagram of an LED chip with a composite ITO film according to the present invention; Figure 2 This is a diagram of the irradiation combination of the ITO film of the present invention and the ion source. DETAILED DESCRIPTION

[0016] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0017] See also Figures 1 to 2 , the present invention provides a technical solution: A composite ITO film LED chip structure includes a substrate, a GAN layer, a P layer, an ITO bottom layer, an ITO middle layer, and an ITO top layer arranged in order from bottom to top; The ITO intermediate layer is at least two layers, namely, intermediate layer 1 and intermediate layer 2; The ITO bottom layer accounts for 5%-10% of the total thickness D of the coated ITO, the Hearthcoil is set at 10A-15A, and the ion source has low energy and low airflow; The middle layer accounts for 10%-15% of the total thickness of the ITO coating. The Hearthcoil is set at 20A-30A, and the ion source increases energy and appropriate gas. The second intermediate layer accounts for 30%-40% of the total thickness D of the coated ITO film, the Hearthcoil is set at 30A-40A, the ion source has high energy, and the Ar bombardment is increased; The ITO top layer accounts for 5%-10% of the total thickness D of the coated ITO, the Hearthcoil is set to 10A-20A, the ion source is high energy, and the Ar bombardment is increased.

[0018] A method for preparing an LED chip structure with a composite ITO film layer comprises the following steps: Step 1: The conductivity of the ITO film, i.e., the In / Sn ratio, and the light transmittance, i.e., the oxygen content, are sensitive to the composition. The spot size affects the local heating degree of the ITO source, causing the selective decomposition of indium trioxide and tin dioxide, thereby forming ITO films with different In / Sn ratios. Step 2: Add an ion source device with variable energy and gas layering control. By bombarding the evaporated ITO material molecules with ions, on the one hand, the mobility of the ITO deposition is changed, and on the other hand, the surface of the ITO film is appropriately roughened. By adjusting the acceleration voltage of the ion source and the Ar gas flow rate, the energy is gradually optimized to the balance point, thereby obtaining the required film density and ITO roughening effect; Step 3: Adjust the specific parameter settings and prepare each layer.

[0019] Preparation of ITO bottom layer, the specific steps include as follows: ITO bottom layer: Hearthcoil is set to 10A-15A, ion source voltage is set to 0V-300V, Ar gas flow is set to 1sccm-3sccm, large spot coating, ITO source is heated evenly, evaporated IN / Sn has high uniformity, and is easier to form good ohmic contact with the epitaxial layer. At the same time, the ion source energy is relatively low, which reduces the damage to the epitaxial layer while ensuring the lateral mobility of ITO.

[0020] Preparation of the intermediate layer 1. The specific steps include: setting the Hearthcoil to 20A-30A, the ion source voltage to 0V-1200V, the Ar gas flow rate to 1sccm-3sccm, and reducing the spot size to heat the ITO source locally. Indium trioxide and tin dioxide will be selectively decomposed, the carrier concentration will increase, the film resistance will decrease, and the ion source energy will increase. At this time, the film layer will be denser and the surface will be relatively flat. This layer serves as a buffer layer.

[0021] The specific steps for preparing the second intermediate layer are as follows: Hearthcoil is set to 30A-40A, the ion source voltage is set to 0V-1800V, the Ar gas flow rate is set to 5sccm-10sccm, the spot is further reduced, the In / Sn ratio of the ITO film layer is further differentiated, the carrier concentration is increased, and the ion source energy is further increased, thereby increasing the lateral mobility of ITO and further reducing the film resistance. As the Ar gas increases, the surface of the ITO film begins to be roughened, increasing the light output area.

[0022] The specific steps for preparing the ITO top layer include: setting the Hearthcoil to 10A-20A, the ion source voltage to 0V-1800V, and the Ar gas flow rate to 20sccm-30sccm. This layer is the last layer of the ITO film. Due to the gradual effect of the previous buffer layer, the film resistance has been significantly reduced, but in order to reduce the brightness loss, the Ar gas flow rate is further increased in this layer to obtain a highly crystallinity and roughened film layer, thereby improving the chip brightness.

[0023] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A composite ITO film LED chip structure, characterized by: It includes a substrate, a GAN layer, a P layer, an ITO bottom layer, an ITO middle layer and an ITO top layer arranged in sequence from bottom to top; The ITO intermediate layer is at least two layers, namely, intermediate layer 1 and intermediate layer 2; The ITO bottom layer accounts for 5%-10% of the total thickness D of the coated ITO, the Hearthcoil is set at 10A-15A, and the ion source has low energy and low airflow; The middle layer accounts for 10%-15% of the total thickness of the ITO coating. The Hearthcoil is set at 20A-30A, and the ion source increases energy and appropriate gas. The second intermediate layer accounts for 30%-40% of the total thickness D of the coated ITO film, the Hearthcoil is set at 30A-40A, the ion source has high energy, and the Ar bombardment is increased; The ITO top layer accounts for 5%-10% of the total thickness D of the coated ITO, the Hearthcoil is set to 10A-20A, the ion source is high energy, and the Ar bombardment is increased.

2. A method for preparing an LED chip structure with a composite ITO film according to claim 1, characterized in that: The steps include: Step 1: The conductivity of the ITO film, i.e., the In / Sn ratio, and the light transmittance, i.e., the oxygen content, are sensitive to the composition. The spot size affects the local heating degree of the ITO source, causing the selective decomposition of indium trioxide and tin dioxide, thereby forming ITO films with different In / Sn ratios. Step 2: Add an ion source device with variable energy and gas layering control. By bombarding the evaporated ITO material molecules with ions, on the one hand, the mobility of the ITO deposition is changed, and on the other hand, the surface of the ITO film is appropriately roughened. By adjusting the acceleration voltage of the ion source and the Ar gas flow rate, the energy is gradually optimized to the balance point, thereby obtaining the required film density and ITO roughening effect; Step 3: Adjust the specific parameter settings and prepare each layer.

3. The method for preparing a composite ITO film LED chip structure according to claim 2, wherein: Step 3. Adjust the specific parameter settings. Prepare the ITO bottom layer with the ITO middle layer as the two layers in the preparation of each layer. The specific steps include the following: ITO bottom layer: Hearthcoil is set to 10A-15A, the ion source voltage is set to 0V-300V, the Ar gas flow rate is set to 1sccm-3sccm, large spot coating, the ITO source is heated evenly, the evaporated IN / Sn has high uniformity, and it is easier to form a good ohmic contact with the epitaxial layer. At the same time, the ion source energy is low, which reduces the damage to the epitaxial layer while ensuring the lateral mobility of ITO.

4. The method for preparing a LED chip structure of a composite ITO film according to claim 2, characterized in that: The step three is to adjust the specific parameter settings. In the preparation of each layer, the ITO intermediate layer is required to be two layers to prepare the intermediate layer one. The specific steps include intermediate layer one: setting the Hearthcoil to 20A-30A, setting the ion source voltage to 0V-1200V, setting the Ar gas flow rate to 1sccm-3sccm, and reducing the light spot to locally heat the ITO source. Indium trioxide and tin dioxide will be selectively decomposed, the carrier concentration will increase, the film resistance will decrease, and the ion source energy will increase. At this time, the film layer is denser and the surface is relatively smooth. This layer serves as a buffer layer.

5. The method for preparing a composite ITO film LED chip structure according to claim 2, wherein: The step three is to adjust the specific parameter settings. When preparing each layer, the ITO intermediate layer is required to be two layers to prepare the intermediate layer 2. The specific steps for preparing the intermediate layer 2 are as follows: the Hearthcoil is set to 30A-40A, the ion source voltage is set to 0V-1800V, the Ar gas flow rate is set to 5sccm-10sccm, the light spot is further reduced, the In / Sn ratio of the ITO film layer is further differentiated, the carrier concentration is increased, and the ion source energy is further increased, thereby increasing the lateral mobility of ITO and further reducing the film resistance. As the Ar gas increases, the surface of the ITO film begins to be roughened, thereby increasing the light output area.

6. The method for preparing a composite ITO film LED chip structure according to claim 2, wherein: The step three is to adjust the specific parameter settings. In the preparation of each layer, the ITO top layer is prepared with the ITO middle layer as two layers. The ITO top layer preparation steps specifically include: Hearthcoil is set to 10A-20A, the ion source voltage is set to 0V-1800V, and the Ar gas flow rate is set to 20sccm-30sccm. This layer is the last layer of the ITO film. Due to the gradual effect of the previous buffer layer, the film resistance has been significantly reduced. However, in order to reduce the brightness loss, the Ar gas flow rate is further increased in this layer to obtain a high crystallinity and roughened film layer to improve the chip brightness.

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