High-capacity multi-channel storage management system and method for satellite equipment

Abstract

The invention relates to a high-capacity multi-channel storage management system and method for on-satellite equipment. The system is composed of a master control FPGA, a monitoring FPGA, a NandFlash grouping storage unit and a NandFlash important data storage unit. According to the system, on the basis of utilizing the advantages of high reliability and low power consumption of the NandFlash, data storage can be carried out through a plurality of independently running NandFlash groups, the storage capacity of the system is remarkably improved, partition management can be conveniently carried out according to partition requirements of users through the groups, and the complexity of storage management is reduced; according to the system, the storage unit with the ECC function of the BRAM is configured in the master control FPGA to carry out multi-channel data storage management, and the reliability of data storage can be further improved by utilizing an ECC encoding and decoding algorithm.

Description

Technical Field

[0001] The present application relates to the technical field of satellite-borne data storage management, and in particular to a large-capacity multi-channel storage management system and method for satellite-borne equipment. Background Art

[0002] In spacecraft, satellites and other onboard electronic equipment, data storage must meet stringent requirements such as high reliability and low power consumption. The current mainstream large-capacity storage solutions mainly rely on SATA interface memory or EMMC embedded storage chips. The advantages of SATA or EMMC are simple interfaces, a small number of pins required to connect to the main control chip FPGA (field programmable gate array), and large single-chip storage chips with fast storage speeds. However, SATA has high power consumption and is difficult to meet the low power requirements of onboard equipment. In addition, SATA's ability to resist single-particle upsets is weak, making data errors prone to occur, resulting in reduced reliability of onboard data storage. Similarly, EMMC is mostly consumer-grade design, lacks anti-radiation reinforcement, and is prone to data failure during long-term missions, resulting in insufficient reliability of onboard data storage.

[0003] To improve the reliability of onboard data storage, some existing onboard equipment uses NandFlash as a storage solution. NandFlash enhances data integrity through redundant design and verification algorithms, resulting in higher reliability, no mechanical structure, and significantly lower static power consumption than SATA. However, NandFlash storage management is complex, and the single-chip storage capacity is far lower than SATA or eMMC. This is especially true for applications requiring a high number of partitions (such as multi-task data isolation), as it requires complex address mapping and logical management, significantly increasing management complexity.

[0004] Therefore, how to solve the problem of capacity limitation and high management complexity of existing on-board equipment data storage while ensuring high reliability and low power consumption has become a technical problem that needs to be urgently solved by those skilled in the art. Summary of the Invention

[0005] Based on this, it is necessary to provide a large-capacity multi-channel storage management system and method for on-board equipment to address the above technical problems.

[0006] A large-capacity multi-channel storage management system for onboard equipment, the system comprising:

[0007] The master FPGA is used to perform data storage management, multi-channel data parallel reception based on multi-payload interfaces, satellite service interaction, command analysis, telemetry transmission, backup and recovery of important data, and interaction with the monitoring FPGA, NandFlash group storage unit, and NandFlash important data storage unit;

[0008] Monitoring FPGA, used to monitor and refresh the main control FPGA and collect single board status;

[0009] The NandFlash group storage unit is used to store data received by the master FPGA. It contains several NandFlash groups. Each group contains at least two NandFlash chips, and each NandFlash group operates independently.

[0010] NandFlash is an important data storage unit used to store status data during system operation and restore the original status data after the system is powered off and restarted;

[0011] Among them, the main control FPGA also includes a first storage management unit and a second storage management unit with ECC (error detection and correction) function of BRAM (block random access memory), which are respectively used to store and manage data written to NandFlash when multi-channel data inputs one interface and multi-channel data inputs different interfaces.

[0012] Furthermore, the NandFlash is a NandFlash with SLC (single-level cell), TLC (triple-level cell) or MLC (multi-level cell) particles.

[0013] Furthermore, the first storage management unit and the second storage management unit both store and manage the data written to NandFlash in the order of first framing, then ECC encoding, and finally storing in solid storage; wherein, the framing method is to frame the data according to the AOS frame format (Advanced On-Orbit System frame format).

[0014] Furthermore, the first storage management unit is composed of an interface management module, a first-level FIFO (first-in-first-out memory), a first-level data selection module, a plurality of partition FIFOs, a second-level data selection module, a framing module, an ECC encoding module, a second-level FIFO, and a solid storage management module connected in sequence;

[0015] The process of data storage management performed by the first storage management unit when multi-channel data is input into one interface is as follows:

[0016] Parse the multi-channel data received by an interface according to the interface management module, and record the data partition number and data length obtained by parsing;

[0017] The parsed multi-channel data is written into the first-level FIFO, and the first-level data selection module determines whether the partition FIFO corresponding to each partition number is in a one-frame readable state. If so, the data in the first-level FIFO is taken out and stored in the corresponding partition FIFO; the number of partition FIFOs depends on the number of data partitions;

[0018] All partition FIFOs are monitored in real time according to the second-level data selection module. When the storage bytes of a partition FIFO reach the set threshold or the partition playback start instruction is received, the data stored in the partition FIFO is taken out and input into the framing module and ECC encoding module in sequence for framing and ECC encoding. The encoded data is input into the second-level FIFO for cache and then further input into the storage management module for storage.

[0019] Furthermore, the second storage management unit is composed of a data receiving framing branch corresponding to each interface and a unified Ready cache module, an ECC encoding module, a second-level FIFO, and a persistent storage management module;

[0020] The process of data storage management performed by the second storage management unit when multi-channel data is input to different interfaces is as follows:

[0021] First, data is received, parsed, and framed according to the data receiving and framing branches corresponding to each interface;

[0022] Then, the framing data of each interface is input into a Ready cache module for caching and the arrival order of the framing data of different interfaces is recorded. The framing data in the Ready cache module is then taken out and input into the ECC encoding module for ECC encoding. The encoded data is input into the second-level FIFO for caching and then further input into the storage management module for storage.

[0023] Furthermore, the data receiving framing branch is divided into a first type of data receiving framing branch and a second type of data receiving framing branch according to the data input speed of each interface; wherein the first type of data receiving framing branch is composed of an interface management module, a first-level FIFO, and an interface framing module connected in sequence, and the second type of data receiving framing branch is composed of an interface management module and an interface framing module connected in sequence;

[0024] Among them, the interface framing module in the first type of data receiving framing branch is also connected to the write end of the first type of BRAM, and is used to write the framing data into the first type of BRAM for caching. The read end of the first type of BRAM is connected and interacted with the ECC encoding module in the second storage management unit, and data is read and error corrected through the ECC encoding module;

[0025] Among them, the interface management module in the second type of data receiving framing branch is also connected to the write end of the second type of BRAM, and is used to write the received data into the second type of BRAM for caching. The read end of the second type of BRAM is connected to the interface framing module, and data is read and framed through the interface framing module; the interface framing module in the second type of data receiving framing branch is also connected to the write end of the third type of BRAM, and is used to write the framed data into the third type of BRAM for caching. The read end of the third type of BRAM is connected and interacted with the ECC encoding module in the second storage management unit, and data is read and error corrected through the ECC encoding module.

[0026] Furthermore, the master FPGA also has a time-based playback function, including:

[0027] After framing the data according to the AOS frame format, the master FPGA replaces the first 4 bytes of the AOS frame format with the time information instead of the original synchronization header information. The master FPGA then performs data storage management on the framed data after the information replacement in the order of first performing ECC encoding and then storing it in the fixed memory.

[0028] When the master FPGA receives the instruction to replay by time, it parses the time information in the stored data and starts from the stored address 0 and traverses the storage space of the entire load partition with the set step size. If the correct data storage starting address is found within the set start and end time or the search times out but the correct data storage starting address is still not found, the traversal is exited and the data is replayed in chronological order.

[0029] Furthermore, the monitoring FPGA monitors and refreshes the master FPGA, including:

[0030] The monitoring FPGA monitors the single-event upset of the master FPGA in real time. When a single-event upset is detected or a single-event upset causes a functional abnormality in the master FPGA, the monitoring FPGA is refreshed to repair the abnormality.

[0031] Furthermore, the above system adopts a triple-module redundancy mechanism at the software level to implement code operation.

[0032] A large-capacity multi-channel storage management method for on-board equipment is provided, the method being implemented based on the large-capacity multi-channel storage management system for on-board equipment, and comprising the following steps:

[0033] Based on the master FPGA, it performs data storage management, multi-channel data parallel reception based on multi-payload interfaces, satellite service interaction, command analysis, telemetry transmission, backup and recovery of important data, and interaction with the monitoring FPGA, NandFlash group storage unit, and NandFlash important data storage unit;

[0034] Monitor and refresh the main control FPGA according to the monitoring FPGA, and collect the board status;

[0035] The data received by the master FPGA is stored according to the NandFlash group storage unit; wherein the NandFlash group storage unit includes a plurality of NandFlash groups, each group includes at least two NandFlashes, and each NandFlash group operates independently;

[0036] The NandFlash important data storage unit stores the status data during system operation and restores the original status data after the system is powered off and restarted;

[0037] Furthermore, the first storage management unit and the second storage management unit with the ECC function of BRAM in the main control FPGA respectively perform storage management on the data written into NandFlash when multi-channel data inputs one interface and multi-channel data inputs different interfaces.

[0038] The aforementioned large-capacity, multi-channel storage management system and method for onboard equipment utilizes a monitoring FPGA within the system to monitor and refresh the master FPGA, enabling rapid response to and repair of master FPGA anomalies, thereby improving the reliability of data storage management. Furthermore, the NandFlash group storage unit and NandFlash critical data storage unit within the system leverage NandFlash's high reliability and low power consumption to store data via multiple independently running NandFlash groups, significantly increasing the system's storage capacity. The grouping facilitates partition management based on user requirements, reducing the complexity of storage management. Furthermore, the NandFlash critical data storage unit stores system status data during operation, facilitating recovery of the original status data after a system power outage and restart, thereby enhancing system robustness. Furthermore, by configuring a storage unit with BRAM ECC functionality within the master FPGA for multi-channel data storage management, the ECC encoding and decoding algorithm can be utilized to further enhance data storage reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 A schematic diagram of the overall framework of a large-capacity multi-channel storage management system for onboard equipment in one embodiment;

[0040] Figure 2 1. A schematic diagram of a flow chart of a first storage management unit performing data storage management when multi-channel data is input into one interface in one embodiment;

[0041] Figure 3The figure is a flow chart of data storage management performed by the second storage management unit in one embodiment when multi-channel data is input to different interfaces. DETAILED DESCRIPTION

[0042] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0043] In one embodiment, Figure 1 As shown, a large-capacity multi-channel storage management system for on-board equipment is provided, which consists of a main control FPGA, a monitoring FPGA, a NandFlash group storage unit and a NandFlash important data storage unit.

[0044] The master FPGA is responsible for data storage management, parallel reception of multi-channel data via multiple payload interfaces, onboard communication, command parsing, telemetry transmission, critical data backup and recovery, and interaction with the monitoring FPGA, NandFlash group storage unit, and NandFlash critical data storage unit. The master FPGA also includes a first storage management unit and a second storage management unit with BRAM ECC functionality, respectively responsible for managing the storage of data written to NandFlash when multi-channel data is input to a single interface or when multi-channel data is input to different interfaces.

[0045] Monitoring FPGA is used to monitor and refresh the main control FPGA and collect single board status quantities (current, voltage, temperature, etc.).

[0046] The NandFlash group storage unit is used to store data received by the master FPGA. It contains several NandFlash groups, each group contains at least two NandFlash chips, and each NandFlash group operates independently. In this embodiment, there are 4 NandFlash groups in the system, each group contains 2 NandFlash chips.

[0047] NandFlash is an important data storage unit used to store status data during system operation and restore the original status data after the system is powered off and restarted.

[0048] In a large-capacity, multi-channel storage management system for onboard equipment constructed in this application, by configuring a monitoring FPGA to monitor and refresh the master FPGA, it can quickly respond to and repair anomalies in the master FPGA, thereby improving the reliability of data storage management. By configuring NandFlash group storage units and NandFlash important data storage units, data can be stored through multiple independently running NandFlash groups based on the high reliability and low power consumption advantages of NandFlash, significantly increasing the system's storage capacity. NandFlash groups facilitate partition management based on user partition requirements, reducing the complexity of storage management. At the same time, the NandFlash important data storage units store status data during system operation, facilitating the restoration of original status data after system power failure and restart, thereby improving system robustness. Furthermore, by configuring a storage unit with BRAM ECC function in the master FPGA for multi-channel data storage management, ECC encoding and decoding algorithms can be used to perform ECC encoding on data written to NandFlash and ECC decoding on data read from NandFlash, ensuring the reliability of important data streams during system operation.

[0049] Furthermore, NandFlash can use NandFlash with SLC, TLC or MLC particles.

[0050] Furthermore, the first storage management unit and the second storage management unit both store and manage the data written into the NandFlash in the order of first framing, then ECC encoding, and finally storing in the persistent storage; wherein the framing method is to frame the data in accordance with the AOS frame format.

[0051] It can be understood that existing storage solutions usually store interface data into fixed storage first, and then frame it according to the AOS frame format when the data is played back. However, the present application adopts the method of framing first and then storing it into fixed storage, which is conducive to locating abnormal data. The data is framed before being stored, and the frame contains a frame count. If the playback data is abnormal when the system is running on track, by analyzing the frame count and data content, it can be located whether the data anomaly occurred in the data storage stage or the data playback stage.

[0052] Furthermore, the first storage management unit is composed of an interface management module, a first-level FIFO, a first-level data selection module, a plurality of partition FIFOs, a second-level data selection module, a framing module, an ECC encoding module, a second-level FIFO, and a persistent storage management module connected in sequence. The process of data storage management performed by the first storage management unit when multi-channel data is input into one interface is as follows: Figure 2 Shown, including:

[0053] First, the multi-channel data received by an interface is parsed according to the interface management module, and the data partition number and data length obtained by parsing are recorded. Then the parsed multi-channel data is written into the first-level FIFO and sent to the first-level data selection module (corresponding to Figure 2 The first Mux (multiplexer) in the partition determines whether the partition FIFO corresponding to each partition number is in a one-frame readable state. If it is in a one-frame readable state, the data in the first-level FIFO is taken out and stored in the corresponding partition FIFO; wherein the number of partition FIFOs depends on the number of data partitions.

[0054] Then, according to the second level data selection module (corresponding to Figure 2 The second Mux in the partition monitors all partition FIFOs in real time. When the storage bytes of a partition FIFO reach the set threshold (such as 884 bytes) or the partition starts playback instruction, the data stored in the partition FIFO is taken out and input into the framing module and ECC encoding module in turn for framing and ECC encoding. The encoded data is input into the second-level FIFO for cache and then further input into the storage management module for storage. Figure 2 The number of partition FIFOs is set to 128, the capacity of each partition FIFO is 1KB, the capacity of the first-level FIFO is 16KB, the capacity of the second-level FIFO is 2KB, wr_en and wr_data represent write enable and write data respectively. Figure 2 The priority of the 128 partition FIFOs is arranged as VIP128>VIP1>VIP2>…>VIP127.

[0055] Specifically, according to the AOS frame format requirements, a frame of data after framing in this embodiment is 896 bytes.

[0056] Furthermore, the second storage management unit is composed of the data receiving framing branch corresponding to each interface and a unified Ready cache module, ECC encoding module, second-level FIFO and solid storage management module. The process of data storage management of the second storage management unit when multi-channel data is input to different interfaces is as follows: Figure 3 As shown, including:

[0057] When multi-channel data is input to three different interfaces, the second storage management unit first receives, parses and frames the data according to the data receiving and framing branches corresponding to each interface.

[0058] The framed data from each interface is then fed into a Ready Cache module for caching and the arrival order of the framed data from different interfaces is recorded, thus preventing data confusion during subsequent data processing. The framed data is then removed from the Ready Cache module and fed into the ECC encoding module for ECC encoding. The encoded data is then fed into the second-level FIFO for buffering and then into the persistent storage management module for persistent storage. The Ready Cache module is a distributed RAM-based data buffer.

[0059] The above-mentioned data receiving framing branches are divided into the first type of data receiving framing branches (corresponding to Figure 3 Interface A and interface C in the second type of data receiving framing branch (corresponding to Figure 3 The first-type data receiving framing branch comprises an interface management module, a first-level FIFO, and an interface framing module connected in sequence, and the second-type data receiving framing branch comprises an interface management module and an interface framing module connected in sequence. It should be noted that there is no necessary capacity relationship between the first-level FIFO and the second-level FIFO in the first storage management unit and the second storage management unit.

[0060] Among them, the interface framing module in the first type of data receiving framing branch is also connected to the write end of the first type of BRAM, which is used to write the framing data into the first type of BRAM for caching. The read end of the first type of BRAM is connected and interacted with the ECC encoding module in the second storage management unit, and data is read and error corrected through the ECC encoding module.

[0061] The interface management module in the second-type data receiving framing branch is also connected to the write end of the second-type BRAM to write the received data into the second-type BRAM for caching. The read end of the second-type BRAM is connected to the interface framing module, and the interface framing module is used to read and frame the data. The interface framing module in the second-type data receiving framing branch is also connected to the write end of the third-type BRAM to write the framed data into the third-type BRAM for caching. The read end of the third-type BRAM is connected and interacted with the ECC encoding module in the second storage management unit to read and correct the data through the ECC encoding module. It should be noted that the three types of BRAM do not necessarily have a certain capacity relationship. Figure 3 The three types of BRAM are simple dual-port RAMs that support independent write ports and read ports. Figure 3 Where wr_addr represents the write address, rd_en, rd_data and rd_addr represent read enable, read data and read address respectively, and Frame_vaild represents the frame valid signal.

[0062] It can be understood that the above-mentioned first-class data receiving framing branch caches data by configuring a first-level FIFO and a first-class BRAM with lower capacity, which is suitable for situations where the data input speed of the interface is low, while the second-class data receiving framing branch supports caching of high-speed input data by configuring a second-class BRAM and a third-class BRAM with higher capacity.

[0063] It is worth noting that the FIFO and BRAM in this embodiment are only used for illustration, and the above-mentioned FIFOs at various levels and BRAMs of various types may also be replaced by other memories of the same capacity.

[0064] Furthermore, the master FPGA also has a time-based playback function, including:

[0065] After framing the data according to the AOS frame format, the master FPGA replaces the first 4 bytes of the AOS frame format with the time information instead of the original synchronization header information. The master FPGA then performs data storage management on the framed data after the information replacement in the order of first performing ECC encoding and then storing it in the fixed memory.

[0066] When the master FPGA receives the instruction to replay by time, it parses the time information in the stored data and starts from the stored address 0 and traverses the storage space of the entire load partition with a set step size (such as 200KB). If the correct data storage starting address is found within the set start and end time or the search times out (such as more than 30s) but the correct data storage starting address is still not found, the traversal is exited and the data is replayed in chronological order.

[0067] It can be understood that the time-based playback function of the master FPGA can store time information in the framing data, eliminating the need to design additional space to store time information and reducing the complexity of system design.

[0068] Furthermore, the monitoring FPGA monitors and refreshes the master FPGA, including:

[0069] The monitoring FPGA monitors the single-event upset of the master FPGA in real time. When a single-event upset is detected or a single-event upset causes a functional abnormality in the master FPGA, the monitoring FPGA is refreshed to repair the abnormality.

[0070] Furthermore, a large-capacity multi-channel storage management system for on-board equipment constructed in this application adopts a triple-module redundancy mechanism at the software level to implement code operation. The triple-module redundancy mechanism is a technology that achieves fault tolerance through redundant design and majority voting mechanism, which can further improve the reliability of this system.

[0071] In one embodiment, a method for managing large-capacity multi-channel storage of on-board equipment is provided. The method is implemented based on the above-mentioned large-capacity multi-channel storage management system for on-board equipment and includes the following steps:

[0072] Based on the master FPGA, it performs data storage management, multi-channel data parallel reception based on multi-payload interfaces, satellite service interaction, command analysis, telemetry transmission, backup and recovery of important data, and interaction with the monitoring FPGA, NandFlash group storage unit, and NandFlash important data storage unit;

[0073] Monitor and refresh the main control FPGA according to the monitoring FPGA, and collect the board status;

[0074] The data received by the master FPGA is stored according to the NandFlash group storage unit; wherein the NandFlash group storage unit includes a plurality of NandFlash groups, each group includes at least two NandFlashes, and each NandFlash group operates independently;

[0075] The NandFlash important data storage unit stores the status data during system operation and restores the original status data after the system is powered off and restarted;

[0076] Furthermore, the first storage management unit and the second storage management unit with the ECC function of BRAM in the main control FPGA respectively perform storage management on the data written into NandFlash when multi-channel data inputs one interface and multi-channel data inputs different interfaces.

[0077] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0078] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present application shall be determined by the appended claims.

Claims

1. A large-capacity multi-channel storage management system for onboard equipment, characterized in that: The system comprises: The master FPGA is used to perform data storage management, multi-channel data parallel reception based on multi-payload interfaces, satellite service interaction, command analysis, telemetry transmission, backup and recovery of important data, and interaction with the monitoring FPGA, NandFlash group storage unit, and NandFlash important data storage unit; Monitoring FPGA, used to monitor and refresh the master FPGA and collect board status; The NandFlash group storage unit is used to store data received by the master FPGA, including several NandFlash groups, each group contains at least two NandFlashes, and each NandFlash group operates independently; NandFlash is an important data storage unit used to store status data during system operation and restore the original status data after the system is powered off and restarted; The master FPGA further includes a first storage management unit and a second storage management unit with BRAM ECC function, which are respectively used to store and manage data written into NandFlash when multi-channel data inputs one interface and multi-channel data inputs different interfaces.

2. The large-capacity multi-channel storage management system for satellite equipment according to claim 1, characterized in that: The NandFlash is a NandFlash with SLC, TLC or MLC particles.

3. The large-capacity multi-channel storage management system for satellite equipment according to claim 1, characterized in that: The first storage management unit and the second storage management unit both store and manage the data written into NandFlash in the order of first framing, then ECC encoding, and finally storing in solid storage; wherein, the framing method is to frame the data in accordance with the AOS frame format.

4. A large-capacity multi-channel storage management system for satellite equipment according to claim 3, characterized in that: The first storage management unit is composed of an interface management module, a first-level FIFO, a first-level data selection module, a plurality of partition FIFOs, a second-level data selection module, a framing module, an ECC encoding module, a second-level FIFO and a persistent storage management module connected in sequence; The process of data storage management performed by the first storage management unit when multi-channel data is input into one interface is as follows: Parsing the multi-channel data received by an interface according to the interface management module, and recording the data partition number and data length obtained by parsing; Writing the parsed multi-channel data into the first-level FIFO, and determining whether the partition FIFO corresponding to each partition number is in a one-frame readable state through the first-level data selection module; if so, taking out the data from the first-level FIFO and storing it in the corresponding partition FIFO; wherein the number of the partition FIFOs depends on the number of data partitions; All partition FIFOs are monitored in real time according to the second-level data selection module. When the storage bytes of a partition FIFO are monitored to reach the set threshold or the partition playback start instruction is received, the data stored in the partition FIFO is taken out and input into the framing module and ECC encoding module in turn for framing and ECC encoding. The encoded data is input into the second-level FIFO for cache and then further input into the storage management module for storage.

5. The large-capacity multi-channel storage management system for satellite equipment according to claim 3, characterized in that: The second storage management unit is composed of a data receiving framing branch corresponding to each interface, a unified Ready cache module, an ECC encoding module, a second-level FIFO, and a persistent storage management module; The process of the second storage management unit performing data storage management when multi-channel data is input into different interfaces is as follows: First, data is received, parsed, and framed according to the data receiving and framing branches corresponding to each interface; Then, the framing data of each interface is input into a Ready cache module for caching processing and the arrival order of the framing data of different interfaces is recorded. The framing data in the Ready cache module is then taken out and input into the ECC encoding module for ECC encoding. The encoded data is input into the second-level FIFO for caching and then further input into the storage management module for storage.

6. The large-capacity multi-channel storage management system for satellite equipment according to claim 5, characterized in that: The data receiving framing branch is divided into a first type of data receiving framing branch and a second type of data receiving framing branch according to the data input speed of each interface; wherein the first type of data receiving framing branch is composed of an interface management module, a first-level FIFO and an interface framing module connected in sequence, and the second type of data receiving framing branch is composed of an interface management module and an interface framing module connected in sequence; The interface framing module in the first-type data receiving framing branch is further connected to the write end of the first-type BRAM to write the framing data into the first-type BRAM for caching, and the read end of the first-type BRAM is connected and interacted with the ECC encoding module in the second storage management unit to read data and perform error correction through the ECC encoding module; Among them, the interface management module in the second-type data receiving framing branch is also connected to the write end of the second-type BRAM, and is used to write the received data into the second-type BRAM for caching. The read end of the second-type BRAM is connected to the interface framing module, and data is read and framed through the interface framing module; the interface framing module in the second-type data receiving framing branch is also connected to the write end of the third-type BRAM, and is used to write the framed data into the third-type BRAM for caching. The read end of the third-type BRAM is connected and interacted with the ECC encoding module in the second storage management unit, and data is read and error corrected through the ECC encoding module.

7. The large-capacity multi-channel storage management system for satellite equipment according to claim 1, characterized in that: The master FPGA also has a time playback function, specifically including: After framing the data in the AOS frame format, the master FPGA replaces the first 4 bytes of the AOS frame format with the time information from the original synchronization header information, and performs data storage management on the framed data after the information is replaced in the order of first performing ECC encoding and then storing in fixed storage; When the master FPGA receives an instruction to replay by time, it parses the time information in the stored data and starts from the stored address 0 and traverses the storage space of the entire load partition with a set step size. If the correct data storage starting address is found within the set start and end time or the search times out but the correct data storage starting address is still not found, the traversal is exited and the data is replayed in chronological order.

8. The large-capacity multi-channel storage management system for satellite equipment according to claim 1, characterized in that: The monitoring FPGA monitors and refreshes the master FPGA, including: The monitoring FPGA monitors the single event upset of the master FPGA in real time. When a single event upset is detected to be abnormal or a single event upset causes a functional abnormality of the master FPGA, the abnormality is repaired by refreshing the master FPGA.

9. The large-capacity multi-channel storage management system for satellite equipment according to claim 1, characterized in that: The system adopts a triple-module redundancy mechanism at the software level to implement code operation.

10. A large-capacity multi-channel storage management method for satellite equipment, characterized in that: The method is implemented based on a large-capacity multi-channel storage management system for satellite equipment according to any one of claims 1 to 9, and the method comprises the following steps: Based on the master FPGA, it performs data storage management, multi-channel data parallel reception based on multi-payload interfaces, satellite service interaction, command analysis, telemetry transmission, backup and recovery of important data, and interaction with the monitoring FPGA, NandFlash group storage unit, and NandFlash important data storage unit; Monitor and refresh the master FPGA according to the monitoring FPGA, and collect single board status quantities; The data received by the master FPGA is stored according to the NandFlash group storage unit; wherein the NandFlash group storage unit includes a plurality of NandFlash groups, each group includes at least two NandFlashes, and each NandFlash group operates independently; The NandFlash important data storage unit stores the status data during system operation and restores the original status data after the system is powered off and restarted; Furthermore, the first storage management unit and the second storage management unit with the ECC function of BRAM in the master FPGA respectively perform storage management on the data written into NandFlash when multi-channel data is input into one interface and when multi-channel data is input into different interfaces.

Images