A task distribution method, electronic device, and storage medium

Abstract

This invention relates to the field of chip design technology, and in particular to a task distribution method, electronic device, and storage medium. It acquires N pipes, each pipe including an arbitrator. The arbitrator includes a first input channel and a second input channel, and the output of the arbitrator is connected to a computing unit. The first input channels of the N pipes are sequentially connected to form a first input channel chain, and the second input channels of the N pipes are sequentially connected to form a second input channel chain. The second input channel chain also includes a cache unit. The task group WG of the i-th user is... i The tasks are sequentially input into the first input channel chain and distributed to the matching computing units. This includes: distributing the task when it matches a computing unit in the first input channel chain, otherwise storing it in the cache unit; and inputting the tasks in the cache unit into the second input channel chain for matching again. This eliminates the need to wait for the previous task to be distributed before distributing, thus improving the task distribution speed.

Description

Technical Field

[0001] This invention relates to the field of chip design technology, and in particular to a task distribution method, electronic device, and storage medium. Background Technology

[0002] In chip design, task allocation mechanisms are crucial for improving overall system performance. A common task allocation method involves all users queuing and waiting to be assigned computing units. The specific allocation mechanism involves selecting computing units from all available units that meet the current task's requirements, and then assigning the task to that unit for processing. These current task requirements are the demands placed on the computing unit by the current task. These requirements may vary depending on the task. For example, the current task requirements might be that the computing unit's processing power matches the task's computational complexity, or that the computing unit's storage capacity can meet the data storage needs during task execution. If the task generates a large amount of intermediate data, the computing unit needs sufficient cache space.

[0003] The above allocation mechanism has the following drawbacks: because all users are queuing, each task allocation requires traversing all computing units to find an object that meets the conditions. This process involves a large number of judgment and filtering operations, resulting in extremely slow task allocation speed. Therefore, an efficient task distribution method is urgently needed. Summary of the Invention

[0004] To address the aforementioned technical problems, the present invention adopts the following technical solution: a task distribution method, the method comprising the following steps:

[0005] S100, obtain N pipes, each pipe including an arbitrator, the arbitrator including a first input channel and a second input channel, the output of the arbitrator connected to a computing unit; wherein, the first input channels of the N pipes are connected in sequence to form a first input channel chain, and the second input channels of the N pipes are connected in sequence to form a second input channel chain; the second input channel chain also includes a cache unit, the cache unit being used to store unassigned tasks from the first input channel chain or the second input channel chain.

[0006] S200, Get the task group WG of the i-th user. i The WG i It includes M tasks for the i-th user, where i and M are both greater than or equal to 1.

[0007] S300, the WG i The tasks in the process are sequentially input into the first input channel chain, and the tasks are distributed to the matching computing units; wherein, the WG i The j-th task i,j The matching steps, where 1≤j≤M, include:

[0008] S310, the task i,j The input channel chain reaches the r-th computing unit AP. r When the first input channel is selected, the AP is determined. r with task i,j If the requirements match, then the task will be... i,j Distributed to AP r If they do not match, the task i,j Continue along the first input channel chain to reach AP r+1 .

[0009] S320, when all N first input channels fail to match, the task... i,j The tasks are stored in the cache unit; the tasks in the cache unit are distributed to the matching computing units through the second input channel chain.

[0010] Furthermore, the present invention also provides a non-transitory computer-readable storage medium storing at least one instruction or at least one program segment, wherein the at least one instruction or the at least one program segment is loaded and executed by a processor to implement the above-described method.

[0011] In addition, the present invention provides an electronic device including a processor and the aforementioned non-transitory computer-readable storage medium.

[0012] The present invention has at least the following beneficial effects:

[0013] This invention provides a task distribution method, electronic device, and storage medium. Through the cooperation of a first input channel chain, a second input channel chain, and a cache unit, a task is distributed when it matches a computing unit in the first input channel chain; otherwise, it is stored in the cache unit. The tasks in the cache unit are then input into the second input channel chain for matching again. This combination eliminates the need to wait for the previous task to be distributed before distributing another, thus improving task distribution speed. Furthermore, the task distribution process does not require selecting one computing unit from all computing units each time; instead, it matches tasks one by one, reducing the computational complexity of the matching process. Attached Figure Description

[0014] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0015] Figure 1A flowchart of a task distribution method provided in an embodiment of the present invention;

[0016] Figure 2 WG provided for embodiments of the present invention i The j-th task i,j Flowchart of matching steps;

[0017] Figure 3 This is a schematic diagram of a structure with N pipes provided in an embodiment of the present invention. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] Unless otherwise defined, all technical and scientific terms used in the embodiments of this invention have the same meaning as commonly understood by those skilled in the art.

[0020] Please see Figure 1 The flowchart illustrates a task distribution method, which includes the following steps:

[0021] S100, obtain N pipes, each pipe including an arbitrator, the arbitrator including a first input channel and a second input channel, the output of the arbitrator connected to a computing unit; wherein, the first input channels of the N pipes are connected in sequence to form a first input channel chain, and the second input channels of the N pipes are connected in sequence to form a second input channel chain; the second input channel chain also includes a cache unit, the cache unit being used to store unassigned tasks from the first input channel chain or the second input channel chain.

[0022] Please see Figure 3 The diagram illustrates the structure of N pipes. Each pipe contains an arbitrator with two input channels: a first input channel and a second input channel. The output of the arbitrator is directly connected to an independent computing unit. Specifically, the arbitrator ARB in the r-th pipe... r It includes two input channels: the first input channel LC r Second input channel HC r ARB r The output is directly connected to the r-th computing unit AP r Where r ranges from 1 to N. The first input channel chain includes {LC1, LC2, ..., LC...} connected in sequence. r ,…,LCN The input to the first input channel chain is the task group input by the user. For example, the input to the first input channel chain is the task group WG of the i-th user. i When a task does not find a matching computation unit in the first input channel chain, it is temporarily stored in the cache unit MEM. The task stored in the cache unit MEM becomes the input to the second input channel chain. The second input channel chain is sequentially connected to {HC1, HC2, ..., HC...} r ,…,HC N ,MEM}, where the input of MEM is the task for which no matching computational unit was found in the first input channel chain and the second input channel chain, and the output of MEM is connected to HC1 of the second input channel chain.

[0023] The cache unit is used to store task data generated by P users. In one embodiment, the cache unit is a first-in-first-out queue, and the capacity of the queue is the capacity of P tasks.

[0024] In one implementation, a computing unit can only process one task at a time. When a computing unit connected to an arbitrator is simultaneously matched with tasks from the first input channel and the second input channel, the task in the second input channel, which was stored in the cache unit waiting after passing through the first input channel chain without being matched, should be prioritized for allocation to avoid timeouts and other factors. Therefore, in one implementation, the arbitrator does not simultaneously authorize the first and second input channels to distribute tasks to the computing unit; the arbitration priority of the second input channel is higher than that of the first input channel. Other types of arbitration strategies also fall within the scope of this invention.

[0025] S200, Get the task group WG of the i-th user. i The WG i It includes M tasks for the i-th user, where i and M are both greater than or equal to 1.

[0026] In one implementation, the task is a thread.

[0027] S300, the WG i The tasks are sequentially input into the first input channel chain, and the tasks are distributed to the matching computing units.

[0028] It should be noted that, under the influence of the clock, tasks in the first input channel chain and the second channel chain cyclically move to the next pipeline every clock cycle. When a task enters the second channel chain from the first input channel chain, it will first enter the buffer unit of the second channel chain for queuing.

[0029] Please refer to Figure 2 The WGi The j-th task i,j The matching steps, where 1≤j≤M, include:

[0030] S310, the task i,j The input channel chain reaches the r-th computing unit AP. r When the first input channel is selected, the AP is determined. r with task i,j If the requirements match, then the task will be... i,j Distributed to AP r If they do not match, the task i,j Continue along the first input channel chain to reach AP r+1 .

[0031] In this invention, for each task, each task needs to be matched sequentially with each computing unit starting from AP1 on the first input channel chain. When the first successfully matched computing unit is found, the current task is distributed to the first matched computing unit. In the existing technology, where all users queue up to wait for computing units to be allocated, each task distribution requires checking the conditions of all computing units and selecting one to distribute the task, resulting in computational complexity and excessively long waiting time. In contrast, this invention only needs to match sequentially when distributing tasks, and distribute the task as soon as a match is successful, without checking all computing units. The computational complexity of the matching process is low, and it can achieve fast task distribution.

[0032] In one implementation, in S310, the task i,j The requirements include AP r The status is available, and when the task is... i,j Distributed to AP r AP r The state is configured to be available after T clock cycles. Directly marking the availability of the current computing unit through its state further improves the system's matching efficiency, thereby accelerating task distribution. In scenarios with a large workload, the task distribution process is continuous, enabling fast task loading and unloading, achieving a pipeline effect. Furthermore, N computing units can achieve parallel processing, improving processing efficiency by N times compared to existing technologies where all users queue and wait sequentially for computing unit allocation. Other types of requirements also fall within the scope of this invention.

[0033] As an example, with T=4, assume that AP1 distributes tasks in the first clock cycle, AP2 in the second, AP3 in the third, and AP4 in the fourth. In the fifth clock cycle, AP1 becomes available again and tasks are redistributed to AP1. In the sixth clock cycle, AP2 becomes available again and tasks are redistributed to AP2. In the seventh clock cycle, AP3 becomes available again and tasks are redistributed to AP3. In the eighth clock cycle, AP4 becomes available again and tasks are redistributed to AP4. In the ninth clock cycle, AP1 becomes available again and tasks are redistributed to AP1, and so on, forming a pipeline effect. Furthermore, in each clock cycle, AP1-AP4 execute their respective tasks, achieving parallel processing.

[0034] In one implementation, T = N. Other values ​​of T also fall within the scope of protection of this invention.

[0035] S320, when all N first input channels fail to match, the task... i,j The tasks are stored in the cache unit; the tasks in the cache unit are distributed to the matching computing units through the second input channel chain.

[0036] It should be noted that in existing technologies where all users queue up to wait for the allocation of computing units, if no suitable computing unit is available, the current task needs to wait for a suitable computing unit to be released before it can be distributed, thus blocking the distribution of subsequent tasks. In this embodiment of the invention, when a task is not distributed in the first input channel chain, it directly enters the cache unit of the second input channel chain and continues to be matched through the second channel chain without waiting, further accelerating the task distribution speed.

[0037] In one implementation, S320 further includes: S321, when the task i,j When all N second input channels in the second input channel chain fail to match, the task i,j The tasks are then stored in the cache unit again. That is, there is no need to wait in the second input channel chain; instead, the undistributed tasks are stored in the cache unit again, ensuring that both the first and second input channel chains are unobstructed channels, guaranteeing the speed of subsequent task distribution, and further accelerating the task distribution speed.

[0038] In one implementation, S320 further includes: S322, when the WG i When the number of tasks entering the second input channel chain is equal to M, then WG is not allowed. i The task input is the first input channel chain, and the t-th user WG is allowed. tInput tasks into the first input channel chain, where t ≠ i, to ensure that users do not interfere with each other. This method allows other users to receive tasks normally even when one user's task blocks the channel chain, thus ensuring a good user experience.

[0039] In summary, this invention provides a task distribution method that, through the cooperation of a first input channel chain, a second input channel chain, and a cache unit, distributes a task when it matches a computing unit in the first input channel chain; otherwise, it is stored in the cache unit. The tasks in the cache unit are then input into the second input channel chain for matching again. This combination eliminates the need to wait for the previous task to be distributed before distributing another, thus improving task distribution speed. Furthermore, the method avoids selecting one computing unit from all available units each time during task distribution; instead, it matches tasks sequentially, reducing the computational complexity of the matching process.

[0040] Embodiments of the present invention also provide a non-transitory computer-readable storage medium that can be disposed in an electronic device to store at least one instruction or at least one program related to implementing a method in the method embodiments, wherein the at least one instruction or the at least one program is loaded and executed by the processor to implement the method provided in the above embodiments.

[0041] Embodiments of the present invention also provide an electronic device, including a processor and the aforementioned non-transitory computer-readable storage medium.

[0042] Embodiments of the present invention also provide a computer program product including program code, which, when the program product is run on an electronic device, causes the electronic device to perform the steps of the methods described above in various exemplary embodiments of the present invention.

[0043] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is used as an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.

[0044] While specific embodiments of the invention have been described in detail by way of example, those skilled in the art should understand that the examples are for illustrative purposes only and not intended to limit the scope of the invention. Those skilled in the art should also understand that various modifications can be made to the embodiments without departing from the scope and spirit of the invention. The scope of this invention is defined by the appended claims.

Claims

1. A task distribution method, characterized in that, The method includes the following steps: S100, acquire N pipes, each pipe including an arbitrator, the arbitrator including a first input channel and a second input channel, the output of the arbitrator connected to a computing unit; wherein, the first input channels of the N pipes are sequentially connected to form a first input channel chain, and the second input channels of the N pipes are sequentially connected to form a second input channel chain; the second input channel chain also includes a cache unit, the cache unit being used to store unassigned tasks from the first input channel chain or the second input channel chain; S200, Get the task group WG of the i-th user. i The WG i This includes M tasks for the i-th user, where i and M are both greater than or equal to 1; S300, the WG i The tasks in the process are sequentially input into the first input channel chain, and the tasks are distributed to the matching computing units; wherein, the WG i The j-th task i,j The matching steps, where 1≤j≤M, include: S310, the task i,j The input channel chain reaches the r-th computing unit AP. r When the first input channel is selected, the AP is determined. r with task i,j If the requirements match, then the task will be... i,j Distributed to AP r If they do not match, the task i,j Continue along the first input channel chain to reach AP r+1 ; S320, when all N first input channels fail to match, the task... i,j The tasks are stored in the cache unit; the tasks in the cache unit are distributed to the matching computing units through the second input channel chain.

2. The method according to claim 1, characterized in that, The S320 also includes: S321, when the task i,j When all N second input channels in the second input channel chain fail to match, the task i,j It is then stored again in the cache unit.

3. The method according to claim 1, characterized in that, The S320 also includes: S322, when the WG i When the number of tasks entering the second input channel chain is equal to M, then WG is not allowed. i The task input is the first input channel chain, and the t-th user WG is allowed. t Input the task into the first input channel chain, t≠i.

4. The method according to claim 1, characterized in that, The arbitrator does not simultaneously authorize the first input channel and the second input channel to distribute tasks to the computing unit, and the arbitration priority of the second input channel is higher than that of the first input channel.

5. The method according to claim 1, characterized in that, In S310, the task i,j The requirements include AP r The status is available, and when the task is... i,j Distributed to AP r AP r The state is configured to be available after T clock cycles.

6. The method according to claim 1, characterized in that, T=N.

7. The method according to claim 1, characterized in that, The task is a thread.

8. The method according to claim 1, characterized in that, The cache unit is a first-in-first-out queue, and the capacity of the queue is the capacity of P tasks.

9. A non-transitory computer-readable storage medium, wherein the storage medium stores at least one instruction or at least one program segment, characterized in that, The at least one instruction or the at least one program segment is loaded and executed by the processor to implement the method as described in any one of claims 1-8.

10. An electronic device, characterized in that, Includes a processor and the non-transitory computer-readable storage medium as described in claim 9.

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