Method and device for realizing anti-refusal relay protection of inter-phase fault in transformer oscillation

Abstract

The invention discloses an implementation method and device for inter-phase fault anti-refusal relay protection in transformer oscillation. The method comprises the following steps: constructing a phase current differential protection mathematical expression and a sequence current differential protection mathematical expression of a transformer based on a transformer differential relay protection expression; constructing a first criterion of transformer relay protection based on the transformer differential relay protection expression; constructing a second criterion of transformer relay protection based on the phase current differential protection mathematical expression and the sequence current differential protection mathematical expression; according to the first criterion and the second criterion, constructing an anti-refusing protection criterion of the transformer; and on the basis of the anti-operation-refusing protection criterion, anti-operation-refusing relay protection of the transformer is realized.

Description

Technical Field

[0001] The present invention relates to the technical field of relay protection, and more particularly to a method and device for implementing anti-rejection relay protection for interphase faults during transformer oscillation. Background Art

[0002] Modern transformer protection has excellent performance, but it can degrade under complex fault conditions. For example, inter-turn faults during oscillation can cause significant fluctuations in braking current, leading to decreased sensitivity.

[0003] The relevant technical specification (20.GB_T 26864-2011 Dynamic Simulation Test of Power System Relay Protection Products) stipulates that transformer protection must operate correctly under various fault types occurring during oscillation and various conversion fault scenarios. In practical applications, these two types of fault scenarios are entirely possible. If differential protection can quickly and sensitively clear small interturn faults in complex scenarios, it can prevent further development of internal faults and further damage and impact on the stable operation of equipment and systems. Therefore, it is necessary to analyze and improve these two complex operating conditions. Summary of the Invention

[0004] In view of the deficiencies in the prior art, the present invention provides a method and device for implementing anti-rejection relay protection for phase-to-phase faults during transformer oscillation.

[0005] According to one aspect of the present invention, a method for implementing interphase fault protection against refusal to operate during transformer oscillation is provided, comprising:

[0006] Based on the transformer differential relay protection expression, the mathematical expression of the transformer phase current differential protection and the mathematical expression of the sequence current differential protection are constructed;

[0007] The first criterion for transformer relay protection is constructed based on the transformer differential relay protection expression;

[0008] The second criterion of transformer relay protection is constructed based on the mathematical expression of phase current differential protection and the mathematical expression of sequence current differential protection;

[0009] Constructing a transformer anti-refusal protection criterion based on the first criterion and the second criterion;

[0010] The transformer's anti-rejection relay protection is realized based on the anti-rejection protection criterion.

[0011] Alternatively, the transformer differential relay protection expression is:

[0012]

[0013] Where, I e is the rated current, Ij is the current on each side of the transformer, I qd is the starting value, I r is the braking current, I d is the differential current, and k is the ratio braking coefficient.

[0014] Optionally, based on the transformer differential relay protection expression, a transformer phase current differential protection mathematical expression and a sequence current differential protection mathematical expression are constructed, including:

[0015] The mathematical expression of phase current differential protection is constructed by subtracting the positive sequence current from the restraining current in the phase current differential protection in the transformer differential relay protection expression.

[0016] The positive sequence current is added to the braking current in the sequence current differential protection in the transformer differential relay protection expression to construct the mathematical expression of the sequence current differential protection.

[0017] Optionally, the mathematical expression of phase current differential protection is:

[0018]

[0019] Where, I e is the rated current, I j is the current on each side of the transformer, I qd is the starting value, I r is the braking current, I d is the differential current, k is the ratio braking coefficient;

[0020] Mathematical expression of sequence current differential protection

[0021]

[0022] Where, I d (2) is the negative sequence differential current; I r (2) is the negative sequence braking current; I j (1) is the positive sequence current on each side of the transformer; I j (2) is the negative sequence current on each side of the transformer.

[0023] Optionally, the first criterion is: d >0.2I e ANDI d >kI r , where I d is the differential current, I e is the rated current, I r is the braking current, and k is the ratio braking coefficient.

[0024] Optionally, the second criterion is: I d >0.2I e AND AND AND Among them I d is the differential current, I e is the rated current, I r is the braking current, I r (1) is the positive sequence braking current.

[0025] Optionally, the anti-rejection protection criterion is: satisfying the first criterion or satisfying the second criterion.

[0026] Optionally, implementing the transformer anti-refusal relay protection based on the anti-refusal protection criterion includes:

[0027] When the anti-rejection protection criterion is met, the transformer's anti-rejection relay protection is started, otherwise the anti-rejection relay protection is not started.

[0028] According to another aspect of the present invention, there is provided a device for implementing relay protection against interphase fault refusal during transformer oscillation, comprising:

[0029] The first building module is used to build a transformer phase current differential protection mathematical expression and a sequence current differential protection mathematical expression based on the transformer differential relay protection expression;

[0030] A second building module is used to build a first criterion for transformer relay protection based on a transformer differential relay protection expression;

[0031] A third building module is used to build a second criterion for transformer relay protection based on a phase current differential protection mathematical expression and a sequence current differential protection mathematical expression;

[0032] A fourth building module is used to build a transformer anti-refusal protection criterion based on the first criterion and the second criterion;

[0033] The protection module is used to implement the anti-rejection relay protection of the transformer based on the anti-rejection protection criterion.

[0034] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the storage medium stores a computer program, and the computer program is used to execute the method according to any one of the above aspects of the present invention.

[0035] According to another aspect of the present invention, an electronic device is provided, comprising: a processor; a memory for storing instructions executable by the processor; and the processor for reading the executable instructions from the memory and executing the instructions to implement the method described in any one of the above aspects of the present invention.

[0036] Therefore, the present invention addresses the issue of delayed action during oscillation by subtracting the positive-sequence component from the braking current of the phase differential element while simultaneously increasing the positive-sequence component by utilizing the braking current of the zero-sequence and negative-sequence differential elements. This improves the sensitivity of the protection when an interturn fault occurs during transformer oscillation, preventing protection failure. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] A more complete understanding of exemplary embodiments of the present invention may be obtained by referring to the following drawings:

[0038] Figure 1 1 is a flow chart of a method for implementing interphase fault protection against refusal to operate relay during transformer oscillation provided by an exemplary embodiment of the present invention;

[0039] Figure 2 This is a schematic diagram of a non-operational low-voltage side BC phase fault in an oscillation region provided by an exemplary embodiment of the present invention;

[0040] Figure 3 is a protection logic block diagram provided by an exemplary embodiment of the present invention;

[0041] Figure 4 is a differential current schematic diagram provided by an exemplary embodiment of the present invention;

[0042] Figure 5 is a schematic diagram of braking current provided by an exemplary embodiment of the present invention;

[0043] Figure 6 This is a comparison diagram of the effects before and after the application of the method provided by the present invention, provided by an exemplary embodiment of the present invention;

[0044] Figure 7 is a relationship diagram of the negative sequence steady-state differential action and braking amount provided by an exemplary embodiment of the present invention;

[0045] Figure 8 1 is a schematic structural diagram of a device for implementing a phase-to-phase fault protection relay during transformer oscillation provided by an exemplary embodiment of the present invention;

[0046] Figure 9 This is a structure of an electronic device provided by an exemplary embodiment of the present invention. DETAILED DESCRIPTION

[0047] Below, the exemplary embodiments according to the present invention will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments of the present invention, and it should be understood that the present invention is not limited to the exemplary embodiments described herein.

[0048] It should be noted that the relative arrangement of components and steps, the numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.

[0049] Those skilled in the art will understand that the terms "first" and "second" in the embodiments of the present invention are only used to distinguish different steps, devices or modules, and neither represent any specific technical meaning nor indicate the necessary logical order between them.

[0050] It should also be understood that, in the embodiments of the present invention, “a plurality of” may refer to two or more than two, and “at least one” may refer to one, two or more than two.

[0051] It should also be understood that any component, data or structure mentioned in the embodiments of the present invention can generally be understood as one or more, unless explicitly limited or otherwise indicated in the context.

[0052] In addition, the term "and / or" in this invention merely describes an association relationship between related objects, indicating that three possible relationships exist. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. Furthermore, the character " / " in this invention generally indicates that the related objects are in an "or" relationship.

[0053] It should also be understood that the description of the various embodiments of the present invention focuses on the differences between the various embodiments, and the same or similar aspects thereof can be referenced with each other. For the sake of brevity, they will not be described one by one.

[0054] At the same time, it should be understood that for the convenience of description, the sizes of the various parts shown in the drawings are not drawn according to the actual proportional relationship.

[0055] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

[0056] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, they should be considered part of the specification.

[0057] It should be noted that like reference numerals and letters refer to like items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0058] Embodiments of the present invention can be applied to electronic devices such as terminal devices, computer systems, and servers, and can operate in conjunction with numerous other general-purpose or specialized computing system environments or configurations. Examples of well-known terminal devices, computing systems, environments, and / or configurations suitable for use with terminal devices, computer systems, servers, and other electronic devices include, but are not limited to, personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, microprocessor-based systems, set-top boxes, programmable consumer electronics, network personal computers, minicomputer systems, mainframe computer systems, and distributed cloud computing technology environments including any of the above.

[0059] Electronic devices such as terminal devices, computer systems, and servers can be described in the general context of computer system-executable instructions (such as program modules) executed by a computer system. Generally, program modules can include routines, programs, object programs, components, logic, data structures, etc., which perform specific tasks or implement specific abstract data types. Computer systems / servers can be implemented in a distributed cloud computing environment, where tasks are performed by remote processing devices linked via a communication network. In a distributed cloud computing environment, program modules can be located on local or remote computing system storage media, including storage devices.

[0060] Exemplary Methods

[0061] Figure 1 This is a flow chart of a method for implementing a phase-to-phase fault protection relay during transformer oscillation provided by an exemplary embodiment of the present invention. This embodiment can be applied to electronic devices, such as Figure 1 As shown, the method 100 for implementing the relay protection against interphase fault refusal during transformer oscillation includes the following steps:

[0062] Step 101: constructing a transformer phase current differential protection mathematical expression and a sequence current differential protection mathematical expression based on a transformer differential relay protection expression;

[0063] Step 102, constructing a first criterion for transformer relay protection based on a transformer differential relay protection expression;

[0064] Step 103: construct a second criterion for transformer relay protection based on the phase current differential protection mathematical expression and the sequence current differential protection mathematical expression;

[0065] Step 104, constructing a transformer anti-refusal protection criterion based on the first criterion and the second criterion;

[0066] Step 105: Implementing the transformer's anti-refusal protection relay based on the anti-refusal protection criterion.

[0067] Specifically, the present invention addresses the problem that protection is easily rejected when an inter-turn fault occurs in a transformer during system oscillation, and proposes a method for preventing rejection of protection during phase-to-phase fault during transformer oscillation. This method can improve the protection sensitivity when an inter-turn fault occurs in the transformer during oscillation and prevent the protection from rejecting.

[0068] To address the problem of delayed action during oscillation, the positive sequence component is subtracted from the braking current of the phase differential element, while the positive sequence component is increased in the braking current of the zero sequence and negative sequence differential elements.

[0069] The general transformer differential relay is implemented as shown in formula (1):

[0070]

[0071] Among them, I e is the rated current, I j is the current on each side of the transformer, I qd is the starting value, I r is the braking current, I d is the differential current, K is the ratio braking coefficient (0.2~0.7, 0.5 is recommended). The transformer differential relay is prone to fail to operate when there is an inter-turn fault during oscillation. Figure 2 shown.

[0072] To improve the sensitivity of the phase current differential to minor faults during full-phase oscillation, the positive-sequence current in the braking current is significantly weakened, forming an "AND" logic output with the negative-sequence differential. To prevent malfunction of the negative-sequence differential due to unbalanced current, the positive-sequence current braking component is added to the braking component of the negative-sequence differential element. This is to reduce the risk of malfunction caused by subtracting the positive-sequence current from the braking current of the phase current differential protection, and to increase the positive-sequence component in the sequence current differential braking current, thereby offsetting and canceling the risk. This protection principle is implemented as shown in Equations (2) and (3):

[0073]

[0074] Where, I d (2) is the negative sequence differential current; I r (2) is the negative sequence braking current; I j (1) is the positive sequence current on each side of the transformer; I j (2) is the negative sequence current on each side of the transformer.

[0075] In equation (2), the first three equations are standard transformer phase current differential protection criterion expressions. In the last two equations, the superscript 1 represents the positive sequence component. Equation (2) is the mathematical implementation of the optimized phase current differential protection, and equation (3) is the mathematical implementation of the optimized sequence current differential protection.

[0076] Protection logic block diagram Figure 3 As shown in the diagram, the first AND gate corresponds to conventional phasor differential protection, which operates in the event of a fault within the normal range. The second AND gate supplements the sensitivity of conventional phasor differential protection during oscillation and heavy load conditions, when the increased braking capacity reduces the sensitivity. Furthermore, to offset the risk of false tripping due to the reduced braking capacity, negative-sequence differential protection is added, and the positive-sequence braking current is incorporated into the braking capacity. The coordinated operation of the various protection functions throughout the logic diagram ensures the effectiveness of the overall differential protection.

[0077] In one embodiment of the present invention, the effectiveness of the proposed algorithm is verified by simulation. The simulation results are as follows: Figure 4-Figure 7 As shown, according to the simulation results and the logic block diagram, it can be seen that when an inter-turn fault occurs during oscillation, the AND gate below in the block diagram acts as an output, thereby improving the sensitivity and reliability of the protection.

[0078] Therefore, the present invention addresses the issue of delayed action during oscillation by subtracting the positive-sequence component from the braking current of the phase differential element while simultaneously increasing the positive-sequence component by utilizing the braking current of the zero-sequence and negative-sequence differential elements. This improves the sensitivity of the protection when an interturn fault occurs during transformer oscillation, preventing protection failure.

[0079] Exemplary devices

[0080] Figure 8 FIG. 1 is a schematic diagram of a structure of a device for implementing a phase-to-phase fault protection relay during transformer oscillation according to an exemplary embodiment of the present invention. Figure 8 As shown, the apparatus 800 includes:

[0081] A first constructing module 810 is configured to construct a transformer phase current differential protection mathematical expression and a sequence current differential protection mathematical expression based on a transformer differential relay protection expression;

[0082] A second building module 820 is used to build a first criterion for transformer relay protection based on the transformer differential relay protection expression;

[0083] A third building module 830 is configured to build a second criterion for transformer relay protection based on a phase current differential protection mathematical expression and a sequence current differential protection mathematical expression;

[0084] A fourth constructing module 840 is configured to construct a transformer anti-refusal protection criterion based on the first criterion and the second criterion;

[0085] The protection module 850 is used to implement the anti-refusal relay protection of the transformer based on the anti-refusal protection criterion.

[0086] Alternatively, the transformer differential relay protection expression is:

[0087]

[0088] Where, I e is the rated current, I j is the current on each side of the transformer, I qd is the starting value, I r is the braking current, I d is the differential current, and k is the ratio braking coefficient.

[0089] Optionally, the first building block 810 includes:

[0090] The first construction submodule is used to construct a mathematical expression of phase current differential protection by subtracting the positive sequence current from the braking current in the phase current differential protection in the transformer differential relay protection expression;

[0091] The second construction submodule is used to add the positive sequence current to the braking current in the sequence current differential protection in the transformer differential relay protection expression, and construct a mathematical expression for the sequence current differential protection.

[0092] Optionally, the mathematical expression of phase current differential protection is:

[0093]

[0094] Where, I e is the rated current, I j is the current on each side of the transformer, I qd is the starting value, I r is the braking current, I d is the differential current, k is the ratio braking coefficient;

[0095] Mathematical expression of sequence current differential protection

[0096]

[0097] Where, I d (2) is the negative sequence differential current; I r (2) is the negative sequence braking current; I j (1) is the positive sequence current on each side of the transformer; I j (2) is the negative sequence current on each side of the transformer.

[0098] Optionally, the first criterion is: d >0.2I e ANDI d >kI r , where I d is the differential current, I eis the rated current, I r is the braking current, and k is the ratio braking coefficient.

[0099] Optionally, the second criterion is: I d >0.2I e AND AND AND Among them I d is the differential current, I e is the rated current, I r is the braking current, I r (1) is the positive sequence braking current.

[0100] Optionally, the anti-rejection protection criterion is: satisfying the first criterion or satisfying the second criterion.

[0101] Optionally, the protection module 850 includes:

[0102] The protection submodule is used to start the transformer's anti-rejection protection relay when the anti-rejection protection criterion is met, otherwise the anti-rejection protection relay is not started.

[0103] Exemplary electronic devices

[0104] Figure 9 This is the structure of an electronic device provided by an exemplary embodiment of the present invention. Figure 9 As shown, the electronic device 90 includes one or more processors 91 and a memory 92 .

[0105] The processor 91 may be a central processing unit (CPU) or other forms of processing units having data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device to perform desired functions.

[0106] The memory 92 may include one or more computer program products, which may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may, for example, include random access memory (RAM) and / or cache memory (cache), etc. The non-volatile memory may, for example, include read-only memory (ROM), a hard disk, a flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and the processor 91 may execute the program instructions to implement the methods of the software programs of the various embodiments of the present invention described above and / or other desired functions. In one example, the electronic device may further include: an input device 93 and an output device 94, which are interconnected via a bus system and / or other forms of connection mechanisms (not shown).

[0107] In addition, the input device 93 may also include, for example, a keyboard, a mouse, and the like.

[0108] The output device 94 can output various information to the outside. The output device 94 can include, for example, a display, a speaker, a printer, a communication network and a remote output device connected thereto.

[0109] Of course, to simplify, Figure 9 Only some of the components related to the present invention in the electronic device are shown, and components such as a bus, an input / output interface, etc. are omitted. In addition, the electronic device may further include any other appropriate components according to specific application conditions.

[0110] Exemplary computer program products and computer-readable storage media

[0111] In addition to the above-mentioned methods and devices, an embodiment of the present invention may also be a computer program product, which includes computer program instructions, which, when executed by a processor, enable the processor to perform the steps of the method according to various embodiments of the present invention described in the above "Exemplary Method" section of this specification.

[0112] The computer program product may be written in any combination of one or more programming languages ​​to implement the operations of embodiments of the present invention, including object-oriented programming languages ​​such as Java, C++, and conventional procedural programming languages ​​such as C or similar programming languages. The program code may be executed entirely on the user's computing device, partially on the user's computing device, as a stand-alone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0113] In addition, an embodiment of the present invention may also be a computer-readable storage medium having computer program instructions stored thereon, which, when executed by a processor, enable the processor to execute the steps of the method according to various embodiments of the present invention described in the above "Exemplary Method" section of this specification.

[0114] The computer-readable storage medium can adopt any combination of one or more readable media. The readable medium can be a readable signal medium or a readable storage medium. The readable storage medium can, for example, include but is not limited to a system, system or device of electricity, magnetism, light, electromagnetic, infrared, or semiconductor, or any combination thereof. More specific examples (non-exhaustive list) of readable storage media include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof.

[0115] The basic principles of the present invention have been described above in conjunction with specific embodiments. However, it should be noted that the advantages, strengths, and effects mentioned in the present invention are merely illustrative and non-limiting, and should not be construed as necessarily possessed by each embodiment of the present invention. Furthermore, the specific details disclosed above are provided for illustrative purposes and to facilitate understanding, and are not intended to be limiting. These details do not necessarily limit the present invention to being implemented using these specific details.

[0116] Each embodiment in this specification is described in a progressive manner, with each embodiment focusing on its differences from the other embodiments. References to the same or similar parts between the various embodiments are sufficient. For system embodiments, since they largely correspond to method embodiments, their description is relatively simple. For relevant parts, references to the description of the method embodiments are sufficient.

[0117] The block diagrams of the devices, systems, equipment, and systems involved in the present invention are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As will be appreciated by those skilled in the art, these devices, systems, equipment, and systems can be connected, arranged, or configured in any manner. Words such as "including," "comprising," "having," and the like are open-ended words, meaning "including but not limited to," and can be used interchangeably therewith. The words "or" and "and" used herein refer to the words "and / or" and can be used interchangeably therewith, unless the context clearly indicates otherwise. The word "such as" used herein refers to the phrase "such as but not limited to," and can be used interchangeably therewith.

[0118] The method and system of the present invention may be implemented in many ways. For example, the method and system of the present invention may be implemented by software, hardware, firmware, or any combination of software, hardware, and firmware. The above sequence of steps for the method is for illustration only, and the steps of the method of the present invention are not limited to the sequence specifically described above, unless otherwise specified. In addition, in some embodiments, the present invention may also be implemented as a program recorded in a recording medium, which includes machine-readable instructions for implementing the method according to the present invention. Thus, the present invention also covers recording media that store programs for executing the method according to the present invention.

[0119] It should also be noted that, in the system, device and method of the present invention, each component or each step can be decomposed and / or recombined. These decompositions and / or recombinations should be regarded as equivalent schemes of the present invention. The above description of the disclosed aspects is provided to enable any technician in this field to make or use the present invention. Various modifications to these aspects will be very obvious to those skilled in the art, and the general principles defined here can be applied to other aspects without departing from the scope of the present invention. Therefore, the present invention is not intended to be limited to the aspects shown here, but according to the widest scope consistent with the principles disclosed here and novel features.

[0120] The above description has been presented for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of the present invention to the forms disclosed herein. Although a number of example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.

Claims

1. A method for implementing interphase fault protection against refusal to operate relay during transformer oscillation, characterized in that: include: Based on the transformer differential relay protection expression, the mathematical expression of the transformer phase current differential protection and the mathematical expression of the sequence current differential protection are constructed; Constructing a first criterion for transformer relay protection based on the transformer differential relay protection expression; Constructing a second criterion for transformer relay protection based on the phase current differential protection mathematical expression and the sequence current differential protection mathematical expression; Constructing an anti-refusal protection criterion for the transformer according to the first criterion and the second criterion; The anti-refusal-operation relay protection of the transformer is implemented based on the anti-refusal-operation protection criterion.

2. The method according to claim 1, characterized in that The transformer differential relay protection expression is: Where, I e is the rated current, I j is the current on each side of the transformer, I qd is the starting value, I r is the braking current, I d is the differential current, and k is the ratio braking coefficient.

3. The method according to claim 1, characterized in that Based on the transformer differential relay protection expression, the transformer phase current differential protection mathematical expression and sequence current differential protection mathematical expression are constructed, including: Subtracting the positive sequence current from the braking current in the phase current differential protection in the transformer differential relay protection expression to construct the phase current differential protection mathematical expression; The positive sequence current is added to the braking current in the sequence current differential protection in the transformer differential relay protection expression to construct the sequence current differential protection mathematical expression.

4. The method according to claim 3, characterized in that The mathematical expression of the phase current differential protection is: Where, I e is the rated current, I j is the current on each side of the transformer, I qd is the starting value, I r is the braking current, I d is the differential current, k is the ratio braking coefficient; Mathematical expression of sequence current differential protection Where, I d (2) is the negative sequence differential current; I r (2) is the negative sequence braking current; I j (1) is the positive sequence current on each side of the transformer; I j (2) is the negative sequence current on each side of the transformer.

5. The method according to claim 1, wherein The first criterion is: d >0.2I e ANDI d >kI r , where I d is the differential current, I e is the rated current, I r is the braking current, and k is the ratio braking coefficient.

6. The method according to claim 1, characterized in that The second criterion is: Among them I d is the differential current, I e is the rated current, I r is the braking current, I r (1) is the positive sequence braking current.

7. The method according to claim 1, characterized in that The anti-rejection protection criterion is: satisfying the first criterion or satisfying the second criterion.

8. The method according to claim 1, characterized in that Implementing the transformer's anti-refusal relay protection based on the anti-refusal protection criterion includes: When the anti-rejection protection criterion is met, the anti-rejection relay protection of the transformer is started, otherwise the anti-rejection relay protection is not started.

9. A device for implementing relay protection against interphase fault during transformer oscillation, characterized in that: include: The first building module is used to build a transformer phase current differential protection mathematical expression and a sequence current differential protection mathematical expression based on the transformer differential relay protection expression; A second building module is used to build a first criterion for transformer relay protection based on the transformer differential relay protection expression; A third building module is configured to build a second criterion for transformer relay protection based on the phase current differential protection mathematical expression and the sequence current differential protection mathematical expression; a fourth building module, configured to build an anti-refusal protection criterion for the transformer according to the first criterion and the second criterion; A protection module is used to implement the anti-refusal relay protection of the transformer based on the anti-refusal protection criterion.

10. A computer-readable storage medium, characterized in that The storage medium stores a computer program, and the computer program is used to execute the method according to any one of claims 1 to 8.

11. An electronic device, characterized in that: The electronic device comprises: processor; a memory for storing instructions executable by the processor; The processor is configured to read the executable instructions from the memory and execute the instructions to implement the method according to any one of claims 1 to 8.

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