Crystalline silicon cell module, preparation method and photovoltaic system

Abstract

The invention discloses a crystalline silicon cell module, a preparation method and a photovoltaic system, and belongs to the technical field of solar cells. The crystalline silicon battery assembly comprises a plurality of crystalline silicon battery pieces, the plurality of crystalline silicon battery pieces comprise a first crystalline silicon battery piece and a second crystalline silicon battery piece, the light facing surface of the first crystalline silicon battery piece is provided with a first connecting piece, and the backlight surface of the second crystalline silicon battery piece is provided with a second connecting piece; the first connecting piece comprises a first electrode grid line, the first electrode grid line is electrically connected with the light-facing surface of the first crystalline silicon battery piece, the second connecting piece comprises a second electrode grid line, the second electrode grid line is electrically connected with the backlight surface of the second crystalline silicon battery piece, and the first connecting piece and the second connecting piece extend in opposite directions so as to be connected with each other; and the first electrode grid line is in contact connection with the second electrode grid line. The electrode grid lines between the two crystal silicon battery pieces are directly connected, so that no welding strip is needed for connection, the shading influence caused by the welding strip can be avoided, and the power of the module is improved.

Description

Technical Field

[0001] The present application belongs to the technical field of solar cells, and in particular relates to a crystalline silicon cell assembly, a preparation method and a photovoltaic system. Background Art

[0002] The metallization of crystalline silicon cells involves printing busbar electrodes, including the busbar and auxiliary grid. The busbar is then soldered to the busbar to interconnect the crystalline silicon cells. Even with busbar-less technology, soldering ribbons are still required to interconnect the crystalline silicon cells. Because the soldering ribbons themselves block light, they can cause optical and power losses in photovoltaic modules containing crystalline silicon cells. Summary of the Invention

[0003] This application aims to solve at least one of the technical problems existing in the prior art. To this end, this application proposes a crystalline silicon cell module, a preparation method, and a photovoltaic system in which the electrode grid lines between two crystalline silicon cell sheets are directly connected, thereby eliminating the need for solder ribbon connection, avoiding the shading effect caused by the solder ribbon, and improving the module power.

[0004] In a first aspect, the present application provides a crystalline silicon cell assembly, comprising a plurality of crystalline silicon cell sheets, each of which has a light-facing surface and a backlight surface disposed opposite to each other, the plurality of crystalline silicon cell sheets comprising a first crystalline silicon cell sheet and a second crystalline silicon cell sheet, the light-facing surface of the first crystalline silicon cell sheet being provided with a first connector, and the backlight surface of the second crystalline silicon cell sheet being provided with a second connector; The first connecting member includes a first electrode grid line, which is electrically connected to the light-facing surface of the first crystalline silicon cell. The second connecting member includes a second electrode grid line, which is electrically connected to the backlight surface of the second crystalline silicon cell. The first connecting member and the second connecting member extend in directions opposite to each other to connect to each other, and the first electrode grid line and the second electrode grid line are in contact and connected.

[0005] According to one embodiment of the present application, the first connecting member extends to the backlight surface of the second crystalline silicon cell, and the first electrode grid line and the second electrode grid line overlap along the thickness direction of the second crystalline silicon cell.

[0006] According to an embodiment of the present application, the first connecting member is bonded to the backlight surface of the second crystalline silicon cell.

[0007] According to one embodiment of the present application, the first connecting member further includes a first light-transmitting base film, the first light-transmitting base film is located on a side of the first electrode grid line away from the first crystalline silicon solar cell, and the first electrode grid line is formed on the first light-transmitting base film; The second connecting member further includes a second light-transmitting base film, which is located on a side of the second electrode grid line away from the second crystalline silicon solar cell, and the second electrode grid line is formed on the second light-transmitting base film.

[0008] According to one embodiment of the present application, at a portion where the first electrode grid line and the second electrode grid line are in contact and connected, the first light-transmitting base film and the second light-transmitting base film are attached to each other and wrap the first electrode grid line and the second electrode grid line.

[0009] According to one embodiment of the present application, the first electrode grid line is laminated to the light-facing surface of the first crystalline silicon cell, the first light-transmitting base film is laminated to the light-facing surface of the first crystalline silicon cell and wraps the first electrode grid line, the second electrode grid line is laminated to the backlight surface of the second crystalline silicon cell, the second light-transmitting base film is laminated to the backlight surface of the second crystalline silicon cell and wraps the second electrode grid line.

[0010] According to one embodiment of the present application, the first light-transmitting base film and / or the second light-transmitting base film include at least one of ethylene-vinyl acetate copolymer, polyolefin elastomer, thermoplastic polyolefin, and polyvinyl butyral, the thickness of the first light-transmitting base film and / or the second light-transmitting base film is 50μm~200μm, and the thickness of the crystalline silicon cell is 100μm~150μm.

[0011] According to one embodiment of the present application, the first electrode grid line and / or the second electrode grid line include a copper grid line and a low-temperature alloy, and the copper grid line is connected to the crystalline silicon cell through the low-temperature alloy.

[0012] According to one embodiment of the present application, the low-temperature alloy includes at least one of tin-bismuth alloy, tin-lead-bismuth alloy, tin-bismuth-silver alloy, and tin-indium alloy, or the melting point of the low-temperature alloy layer is less than or equal to 150°C.

[0013] According to one embodiment of the present application, the first electrode grid line includes a first bus grid line and a plurality of first sub-grid lines arranged at intervals, the first sub-grid lines extending along the arrangement direction of the first crystalline silicon solar cell and the second crystalline silicon solar cell, and the first bus grid line being electrically connected to one end of each first sub-grid line; and / or, The second electrode gate line includes a second bus gate line and a plurality of second sub-gate lines arranged at intervals. The second sub-gate lines extend along the arrangement direction of the first crystalline silicon cell slice and the second crystalline silicon cell slice. The second bus gate line is electrically connected to one end of each second sub-gate line.

[0014] According to one embodiment of the present application, the first bus bar line and the second bus bar line at least partially overlap and contact each other; or, The first busbar line at least partially overlaps and contacts with the plurality of second sub-busbar lines; or, The plurality of first sub-gate lines at least partially overlap and contact the second bus gate lines.

[0015] According to one embodiment of the present application, the first sub-gate line has a width of 5 μm-50 μm and a thickness of 5 μm-50 μm; The first busbar line has a width of 50 μm to 500 μm and a thickness of 5 μm to 50 μm; The first sub-gate line is perpendicular to the first bus gate line; The width of the second sub-gate line is 5 μm-50 μm, and the thickness is 5 μm-50 μm; The second busbar line has a width of 50 μm to 500 μm and a thickness of 5 μm to 50 μm; The second sub-gate line is perpendicular to the second bus gate line.

[0016] According to one embodiment of the present application, a crystalline silicon cell includes a substrate, a front functional layer arranged on the front side of the substrate, a back functional layer arranged on the back side of the substrate, a front light-transmitting conductive film layer arranged on the side of the front functional layer away from the substrate, and a back light-transmitting conductive film layer arranged on the side of the back functional layer away from the substrate.

[0017] In a second aspect, the present application provides a method for preparing a crystalline silicon battery assembly, comprising: Providing a first crystalline silicon cell and a second crystalline silicon cell and a first light-transmitting base film and a second light-transmitting base film; forming patterned first electrode grid lines on the first light-transmitting base film; forming a patterned second electrode grid line on the second light-transmitting base film; Laminating the first electrode grid line to the light-facing surface of the first crystalline silicon cell; Laminating the second electrode grid line to the backlight surface of the second crystalline silicon cell; The first light-transmitting base film and the second light-transmitting base film are extended in directions opposite to each other to be connected to each other, and the first electrode grid line and the second electrode grid line are in contact and connected.

[0018] In a third aspect, the present application provides a photovoltaic system, which includes the crystalline silicon cell assembly according to the aforementioned method, or includes a crystalline silicon cell assembly prepared according to the aforementioned method.

[0019] According to the crystalline silicon cell assembly, preparation method and photovoltaic system of the present application, the electrode grid lines are arranged on the connector, the connection between the two crystalline silicon cell pieces is achieved through the connector, and the electrode grid lines are directly connected, thereby eliminating the need for welding ribbon connection, avoiding the shading effect caused by the welding ribbon, and improving the power of the assembly.

[0020] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become obvious from the description below, or will be learned through practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which: Figure 1 This is one of the structural diagrams of the crystalline silicon battery assembly provided in the embodiment of the present application; Figure 2 This is the second structural diagram of the crystalline silicon battery assembly provided in the embodiment of the present application; Figure 3 This is one of the structural diagrams of the first connecting member provided in the embodiment of the present application; Figure 4 1 is a structural diagram of the second connecting member provided in an embodiment of the present application; Figure 5 This is the second structural diagram of the first connecting member provided in the embodiment of the present application; Figure 6 yes Figure 3 A schematic structural diagram of the first connecting member along the AA section line; Figure 7 Schematic diagram of the contact connection between the first connector and the second connector provided in an embodiment of the present application; Figure 8 Schematic diagram of the structure of the crystalline silicon battery provided in the embodiment of the present application; Figure 9 This is a schematic diagram of the structure of the crystalline silicon solar cell provided in an embodiment of the present application; Figure 10 It is a schematic flow chart of the method for preparing a crystalline silicon battery assembly provided in an embodiment of the present application. DETAILED DESCRIPTION

[0022] Embodiments of the present application are described in detail below, with examples of the embodiments illustrated in the accompanying drawings. In the accompanying drawings, the sizes of layers, regions, and components, as well as their relative sizes, may be exaggerated for clarity. Throughout, the same or similar reference numerals represent the same or similar components or components having the same or similar functions. The embodiments described below with reference to the accompanying drawings are illustrative and intended only to explain the present application, and are not to be construed as limiting the present application.

[0023] It should be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to," or "coupled to" another element or layer, it can be directly on, adjacent to, connected to, or coupled to the other element or layer, or there can be intervening elements or layers. Conversely, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that while the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, or part from another. Thus, without departing from the teachings of the present disclosure, a first element, component, region, layer, or part discussed below may be represented as a second element, component, region, layer, or part. Furthermore, when a second element, component, region, layer, or part is discussed, it does not necessarily mean that the first element, component, region, layer, or part is present in the present disclosure.

[0024] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0025] Crystalline silicon solar cells are currently one of the most mainstream solar cell technologies, accounting for the vast majority of the global solar energy market. They convert sunlight into electricity based on the photoelectric effect of semiconductor materials (such as monocrystalline or multicrystalline silicon). Soldering ribbons are a key material used to connect crystalline silicon cells, typically used to connect multiple cells in series or parallel to form a string. Existing soldering ribbons are primarily made of metals such as copper, tin, and silver. When applied to crystalline silicon cells, they block light, causing optical and power losses in photovoltaic modules containing these cells.

[0026] Reference Figure 1 and Figure 2 , Figure 1 and Figure 2A crystalline silicon cell assembly is shown respectively. In a first aspect of the present application, a crystalline silicon cell assembly is provided, which includes at least one crystalline silicon cell string.

[0027] According to an embodiment of the present application, a crystalline silicon cell assembly includes a plurality of crystalline silicon cell slices, each of which has a light-facing surface and a backlight surface relatively arranged. The plurality of crystalline silicon cell slices include a first crystalline silicon cell slice 101 and a second crystalline silicon cell slice 102. The light-facing surface of the first crystalline silicon cell slice 101 is provided with a first connector 2, and the backlight surface of the second crystalline silicon cell slice 102 is provided with a second connector 3. The first connector 2 includes a first electrode grid line, which is electrically connected to the light-facing surface of the first crystalline silicon cell slice 101. The second connector 3 includes a second electrode grid line, which is electrically connected to the backlight surface of the second crystalline silicon cell slice 102. The first connector 2 and the second connector 3 extend in directions opposite to each other to connect to each other, and the first electrode grid line and the second electrode grid line are in contact and connected.

[0028] The first crystalline silicon cell 101 and the second crystalline silicon cell 102 can be arranged side by side. The light-facing surface of the first crystalline silicon cell 101 and the light-facing surface of the second crystalline silicon cell 102 face the same direction, and the backlight surface of the first crystalline silicon cell 101 and the backlight surface of the second crystalline silicon cell 102 face the same direction.

[0029] The crystalline silicon cell generates current under the action of light, and the electrode grid line is used to collect the current of the crystalline silicon cell, and the first electrode grid line and the second electrode grid line at least partially overlap and contact to achieve connection, so that the first crystalline silicon cell 101 and the second crystalline silicon cell 102 are connected in series, thereby eliminating the need for additional welding ribbons for connection.

[0030] Thus, the crystalline silicon cell module of the embodiment of the present application uses the first connector 2 and the second connector 3 to achieve electrical connection between two adjacent first crystalline silicon cell slices 101 and second crystalline silicon cell slices 102, without the need for soldering ribbons. The first connector 2, except for the first electrode grid lines, can be made of a light-transmitting material, and the second connector 3, except for the second electrode grid lines, can be made of a light-transmitting material. Both the first connector 2 and the second connector 3 are flexible, which can avoid the shading effect caused by the soldering ribbons and improve the module power.

[0031] I understand. Figure 1 and Figure 2 In the embodiment, the light-facing surface of the second crystalline silicon cell 102 may also include the first connector 2, and the backlight surface of the first crystalline silicon cell 101 may also include the second connector 3. Thus, it can be connected to other crystalline silicon cells.

[0032] As an example, Figure 1As shown, the first connecting member 2 extends to the backlight surface of the second crystalline silicon cell 102 , and the first electrode grid line and the second electrode grid line overlap along the thickness direction of the second crystalline silicon cell 102 .

[0033] The contact position between the first electrode grid line and the second electrode grid line is located on the back side of the second crystalline silicon cell 102, and the contact direction is the same as the thickness direction of the second crystalline silicon cell 102. Similarly, the connection direction between the second electrode grid line and the second crystalline silicon cell 102 is the same. Therefore, when the crystalline silicon cell module is packaged, the second connector 3 can be simultaneously attached to the backlight surface of the second crystalline silicon cell 102 and the first connector 2 using a lamination process, which simplifies the process.

[0034] In this example, the first connecting member 2 is bonded to the backlight surface of the second crystalline silicon cell 102 .

[0035] The first connector 2 can be made of an adhesive material and can be bonded to the backlight surface of the second crystalline silicon cell 102 by contacting the backlight surface. Alternatively, the first connector 2 can be provided with an adhesive layer on the side facing the backlight surface of the second crystalline silicon cell 102, and the adhesive layer can be bonded to the backlight surface of the second crystalline silicon cell 102 by contacting the backlight surface of the second crystalline silicon cell 102.

[0036] The first connector 2 is bonded to the backlight surface of the second crystalline silicon cell 102 to form a secure connection with the second crystalline silicon cell 102, thereby ensuring a reliable connection between the first connector 2 and the second connector 3, and improving the reliability of the electrical connection between the first electrode grid line and the second electrode grid line.

[0037] As another example, Figure 2 As shown, the first connector 2 and the second connector 3 both extend between the first crystalline silicon cell 101 and the second crystalline silicon cell 102, and the contact position between the first electrode grid line and the second electrode grid line is located between the first crystalline silicon cell 101 and the second crystalline silicon cell 102. As a result, the entire backlight surface of the second crystalline silicon cell 102 can be connected to the second connector 3, thereby improving the current collection efficiency of the second electrode grid line on the backlight surface of the second crystalline silicon cell 102 and improving module performance.

[0038] Reference Figure 3 and Figure 4 , Figure 3 shows a structure of a first connecting member 2, Figure 4 A structure of the second connecting member 3 is shown.

[0039] In some embodiments, the first connector 2 includes a first light-transmitting base film 23 and a first electrode grid line. The first electrode grid line is in contact with the light-facing surface of the first crystalline silicon cell 101. The first light-transmitting base film 23 is located on a side of the first electrode grid line away from the first crystalline silicon cell 101. The first electrode grid line is formed on the first light-transmitting base film 23.

[0040] The second connecting member 3 includes a second transparent base film 33 and a second electrode grid line. The second electrode grid line is in contact with the backlight surface of the second crystalline silicon cell. The second transparent base film 33 is located on the side of the second electrode grid line away from the second crystalline silicon cell 102. The second electrode grid line is formed on the second transparent base film 33.

[0041] The first electrode grid lines and the second electrode grid lines can be formed on the first light-transmitting base film 23 and the second light-transmitting base film 33 by using a patterned mask + physical vapor deposition, a physical vapor deposition method such as evaporation deposition, sputtering deposition or photoresist patterning + electroplating; and then bonded to the light-facing surface of the first crystalline silicon cell 101 and the backlight surface of the second crystalline silicon cell 102 by lamination or other methods.

[0042] The first transparent base film 23 serves as a carrier for the first electrode grid lines. It is made of a transparent and insulating material, capable of bonding the first electrode grid lines to the first crystalline silicon cell 101. It is flexible and can extend toward the backlight surface of the second crystalline silicon cell 102. The first electrode grid lines extend along with the first transparent base film 23.

[0043] The second light-transmitting base film 33 serves as a carrier for the second electrode grid lines. It is made of a light-transmitting material with insulating properties. It can partially bond the second electrode grid lines to the second crystalline silicon cell 102. It is flexible and can extend toward the light-facing side of the first crystalline silicon cell 101 or bend toward the backlight side of the second crystalline silicon cell 102. The second electrode grid lines extend or bend along with the second light-transmitting base film 33.

[0044] In some embodiments, the thickness of the first light-transmitting base film 23 is 50 μm-200 μm. For example, the thickness of the first light-transmitting base film 23 can be 50 μm, 100 μm, 150 μm, 200 μm, etc. The thickness of the first flexible substrate is controlled within the above range, which is sufficient to support the first electrode grid line, enable the first electrode grid line to be partially bonded to the first crystalline silicon cell 101, and have flexibility to extend toward the backlight surface of the second crystalline silicon cell 102.

[0045] In some embodiments, the thickness of the second light-transmitting base film 33 is 50 μm-200 μm. As an example, the thickness of the second light-transmitting base film 33 can be 50 μm, 100 μm, 150 μm, 200 μm, etc. The thickness of the second light-transmitting base film 33 is controlled within the above range, which is sufficient to support the second electrode grid line and enable the second electrode grid line to be partially bonded to the second crystalline silicon cell 102. The base film 33 is also flexible and can be extended toward the backlight side of the second crystalline silicon cell 102 or bent at the backlight side of the second crystalline silicon cell 102.

[0046] As an example, the first and second light-transmitting base films 23 and 33 may include at least one of ethylene-vinyl acetate copolymer (EVA), polyolefin elastomer (POE), thermoplastic polyolefin (TPO), and polyvinyl butyral (PVB). These polymers are light-transmitting and insulating, capable of bonding the first electrode grid lines to the first crystalline silicon cell 101 and exhibiting flexibility, extending toward the backlight surface of the second crystalline silicon cell 102.

[0047] The thickness of the first crystalline silicon cell 101 and the second crystalline silicon cell 102 can range from 100μm to 150μm. For example, the thickness of the first crystalline silicon cell 101 is 100μm, 110μm, 120μm, 130μm, 150μm, and so on, while the thickness of the second crystalline silicon cell 102 is 100μm, 110μm, 120μm, 130μm, 150μm, and so on. The thickness of the transparent base film and the thickness of the crystalline silicon cell are in the μm range, and the ratio between the two is between 1:(1-3). The transparent base film effectively supports the electrode grid lines and provides protection for the crystalline silicon cell.

[0048] Reference Figure 5 , Figure 5 The structure of the first connecting member 2 is shown. Figure 3 The first electrode grid lines include a first bus grid line 21 and a plurality of first sub-grid lines 22 arranged at intervals. The first sub-grid lines 22 extend along the arrangement direction of the adjacent first crystalline silicon cell 101 and the second crystalline silicon cell 102. The first bus grid line 21 is electrically connected to one end of each first sub-grid line 22. Thus, the first bus grid line 21 electrically connects the plurality of first sub-grid lines 22, playing a busing role. This allows the first bus grid line 21 and the second electrode grid line to at least partially overlap and contact, thereby better achieving interconnection between the first crystalline silicon cell 101 and the second crystalline silicon cell 102.

[0049] Combine Figure 4 The second electrode grid lines include a second bus grid line 31 and a plurality of second sub-grid lines 32 arranged at intervals. The second sub-grid lines 32 extend along the arrangement direction of the adjacent first crystalline silicon solar cells 101 and second crystalline silicon solar cells 102. The second bus grid line 31 is electrically connected to one end of each second sub-grid line 32. Thus, the plurality of second sub-grid lines 32 are electrically connected by the second bus grid line 31, acting as a bus. This allows the second bus grid lines 31 of the first electrode grid line and the second electrode grid line to at least partially overlap and contact, thereby better achieving interconnection between the first crystalline silicon solar cell 101 and the second crystalline silicon solar cell 102.

[0050] The first busbar line 21 at least partially overlaps and contacts the second busbar line 31. Thus, by at least partially overlapping and contacting the first busbar line 21 and the second busbar line 31, the first connector 2 and the second connector 3 are electrically connected, thereby better interconnecting the first crystalline silicon cell 101 and the second crystalline silicon cell 102.

[0051] In some embodiments, the first busbar line 21 at least partially overlaps and contacts the plurality of second sub-busbar lines 32 , thereby achieving interconnection between the first crystalline silicon cell 101 and the second crystalline silicon cell 102 .

[0052] In some embodiments, the plurality of second sub-gate lines 32 at least partially overlap and contact the second bus gate line 31. Thus, the first crystalline silicon cell 101 and the second crystalline silicon cell 102 can be interconnected.

[0053] In some embodiments, the width of the first sub-grid line 22 is 5 μm-50 μm, and the thickness is 5 μm-50 μm. As an example, the width of the first sub-grid line 22 can be 5 μm, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, etc., and the thickness of the first electrode grid line can be 5 μm, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, etc. By controlling the width and thickness of the first sub-grid line 22 within the above range, the current can be fully guided without being too wide to block light, thereby reducing the optical loss and power loss of the crystalline silicon solar cell string.

[0054] It should be noted that the width refers to the dimension in the direction of the plane where the layers of the crystalline silicon solar cell are located, and the thickness refers to the dimension in the direction perpendicular to the plane where the layers of the crystalline silicon solar cell are located.

[0055] In some embodiments, the width of the first busbar line 21 is 50 μm-500 μm, and the thickness is 5 μm-50 μm. As an example, the width of the first busbar line 21 can be 50 μm, 100 μm, 200 μm, 300 μm, 400 μm, 500 μm, etc., and the thickness of the first busbar line 21 can be 5 μm, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, etc. By controlling the width and thickness of the first busbar line 21 within the above ranges, the current of each first sub-busbar line 22 can be collected, which can fully achieve the current diversion function without being too wide to block light, thereby reducing the optical loss and power loss of the crystalline silicon cell string.

[0056] In some embodiments, the first sub-grid lines 22 are perpendicular to the first bus grid lines 21. Thus, the first sub-grid lines 22 can be arranged in parallel, which is beneficial for collecting photogenerated carriers (electrons and holes) and transmitting current to the first bus grid lines 21, thereby improving current collection efficiency, increasing fill factor, improving battery stability, improving photoelectric conversion efficiency, simplifying manufacturing processes, and improving mechanical stability.

[0057] In some embodiments, the width of the second sub-gridline 32 is 5 μm-50 μm, and the thickness is 5 μm-50 μm. As an example, the width of the second sub-gridline 32 can be 5 μm, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, etc., and the thickness of the second electrode gridline can be 5 μm, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, etc. By controlling the width and thickness of the second sub-gridline 32 within the above range, the current can be fully guided without being too wide to block light, thereby reducing the optical loss and power loss of the crystalline silicon solar cell string.

[0058] In some embodiments, the width of the second bus line 31 is 50 μm-500 μm, and the thickness is 5 μm-50 μm. As an example, the width of the second bus line 31 can be 50 μm, 100 μm, 200 μm, 300 μm, 400 μm, 500 μm, etc., and the thickness of the second bus line 31 can be 5 μm, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, etc. By controlling the width and thickness of the second bus line 31 within the above ranges, the current of each second sub-bus line 32 can be collected, which can fully achieve the current diversion function without being too wide to block light, thereby reducing the optical loss and power loss of the crystalline silicon cell string.

[0059] In some embodiments, the second sub-grid lines 32 are perpendicular to the second bus grid lines 31. Thus, the second sub-grid lines 32 can be arranged in parallel, which is beneficial for collecting photogenerated carriers (electrons and holes) and transmitting current to the second bus grid lines 31, thereby improving current collection efficiency, increasing fill factor, improving battery stability, improving photoelectric conversion efficiency, simplifying manufacturing processes, and improving mechanical stability.

[0060] In some embodiments, the first electrode grid lines and / or the second electrode grid lines include copper grid lines and low-temperature alloys, and the copper grid lines are connected to the crystalline silicon cell through the low-temperature alloys.

[0061] The copper grid line can realize the function of low-resistance current transmission, and the low-temperature alloy can realize the contact with the surface of the crystalline silicon cell. In the process of the copper grid line being bonded to the surface of the crystalline silicon cell by heating, the low-temperature alloy melts and then fully infiltrates the velvet surface of the crystalline silicon cell, which can reduce the contact resistance.

[0062] Reference Figure 6 , Figure 6 Shown Figure 3 The structure of a first connector 2 along the AA section line. The first busbar 21 and the first sub-grid 22 in the first electrode grid lines each include a first copper grid line 221 and a first low-temperature alloy layer 222. The first low-temperature alloy layer 222 is located on the side of the first copper grid line 221 away from the first light-transmitting base film 23 and contacts the light-facing surface of the first crystalline silicon cell 101.

[0063] As an example, when preparing the first connecting member 2 , the first low-temperature alloy layer 222 may be stacked on a side of the first copper grid line 221 away from the first light-transmitting base film 23 .

[0064] In another example, when preparing the first connecting member 2 , the first low-temperature alloy layer 222 may also include a surface of the first copper grid line 221 exposed outside the first light-transmitting base film 23 .

[0065] The first copper grid line 221 can realize the function of low-resistance current transmission, and the first low-temperature alloy layer 222 can realize the function of contacting the surface of the first crystalline silicon cell 101. In the process of the first connecting member 2 being bonded to the surface of the first crystalline silicon cell 101 by heating, the first low-temperature alloy layer 222 melts and then fully infiltrates the velvet surface of the first crystalline silicon cell 101, which can reduce the contact resistance.

[0066] According to an embodiment of the present application, the melting point of the first low-temperature alloy layer 222 is less than or equal to 150° C. As an example, the melting point of the first low-temperature alloy layer 222 can be 80° C., 90° C., 100° C., 120° C., 140° C., 150° C., etc. By controlling the melting point of the first low-temperature alloy layer 222 within the above range, the first low-temperature alloy layer 222 is more easily melted during the process of the first connector 2 being attached to the surface of the first crystalline silicon cell 101 by heating, thereby fully infiltrating the velvet surface of the first crystalline silicon cell 101, thereby reducing contact resistance.

[0067] According to an embodiment of the present application, the first low-temperature alloy layer 222 includes at least one of a tin-lead-bismuth alloy and a tin-indium alloy. These alloys contain bismuth or indium and have low melting points. During the heating process of the first connector 2 and the surface of the first crystalline silicon cell 101, the first low-temperature alloy layer 222 melts more easily, thereby fully soaking the textured surface of the first crystalline silicon cell 101 and reducing contact resistance.

[0068] Similarly, according to an embodiment of the present application, the second bus grid line 31 and the second sub-grid line 32 in the second electrode grid line both include a second copper grid line 321 and a second low-temperature alloy layer 322. The second low-temperature alloy layer 322 is located on the side of the second copper grid line 321 away from the second light-transmitting base film 33 and is in contact with the backlight surface of the second crystalline silicon cell 102.

[0069] The second copper grid line 321 can realize the function of low-resistance current transmission, and the second low-temperature alloy layer 322 can realize the function of contacting the surface of the second crystalline silicon cell 102. In the process of the second connecting member 3 being bonded to the surface of the second crystalline silicon cell 102 by heating, the second low-temperature alloy layer 322 melts and then fully infiltrates the velvet surface of the second crystalline silicon cell 102, which can reduce the contact resistance.

[0070] According to an embodiment of the present application, the melting point of the second low-temperature alloy layer 322 is less than or equal to 150° C. As an example, the melting point of the second low-temperature alloy layer 322 can be 80° C., 90° C., 100° C., 120° C., 140° C., 150° C., etc. By controlling the melting point of the second low-temperature alloy layer 322 within the above range, the second low-temperature alloy layer 322 is more easily melted during the process of the second connector 3 being attached to the surface of the second crystalline silicon cell 102 by heating, thereby fully infiltrating the velvet surface of the second crystalline silicon cell 102, thereby reducing contact resistance.

[0071] According to an embodiment of the present application, the second low-temperature alloy layer 322 includes at least one of a tin-lead-bismuth alloy and a tin-indium alloy. These alloys contain bismuth or indium and have low melting points. During the heating process of the second connector 3 and the surface of the second crystalline silicon cell 102, the second low-temperature alloy layer 322 melts more easily, thereby fully soaking the textured surface of the second crystalline silicon cell 102 and reducing contact resistance.

[0072] Reference Figure 7 , Figure 7 The figure shows a schematic structure of the contact connection between the first connector 2 and the second connector 3. In some embodiments, the first light-transmitting base film 23 and the second light-transmitting base film 33 are attached to and wrap around the first and second electrode grid lines at the portion where the first and second electrode grid lines are in contact.

[0073] As shown in the figure, the first low-temperature alloy layer 222 and the second low-temperature alloy layer 322 are in direct contact and laminated, and the first light-transmitting base film 23 and the second light-transmitting base film 33 are in direct contact. Because the low-temperature alloy melts to a certain extent during lamination, the contact surface between the first low-temperature alloy layer 222 and the second low-temperature alloy layer 322 can actually be uneven. Similarly, due to the fluidity of the light-transmitting base film, the contact surface between the first light-transmitting base film 23 and the second light-transmitting base film 33 can actually be uneven.

[0074] The first and second electrode grid lines are formed on the first and second light-transmitting base films 23 and 33, respectively. The top surfaces of the electrode grid lines can be higher than or equal to the surface of the light-transmitting base films. The first and second light-transmitting base films 23 and 33 can be made of a flexible material. When the first and second light-transmitting base films 23 and 33 are attached to each other, the light-transmitting base films have fluidity and flow toward both sides of the electrode grid lines, thereby wrapping around the sides of the electrode grid lines. The opposing surfaces of the first and second electrode grid lines contact each other, improving the reliability of the contact connection.

[0075] In some embodiments, the first electrode grid line is laminated to the light-facing surface of the first crystalline silicon cell 101, the first light-transmitting base film 23 is laminated to the light-facing surface of the first crystalline silicon cell 101 and wraps the first electrode grid line, the second electrode grid line is laminated to the backlight surface of the second crystalline silicon cell 102, the second light-transmitting base film 33 is laminated to the backlight surface of the second crystalline silicon cell 102 and wraps the second electrode grid line.

[0076] When the first light-transmitting base film 23 and the first electrode grid line are attached to the light-facing surface of the first crystalline silicon cell 101, and the second light-transmitting base film 33 and the second electrode grid line are attached to the light-facing surface of the second crystalline silicon cell 102, the light-transmitting base film has fluidity and flows to both sides of the electrode grid line, thereby wrapping the side edges of the electrode grid line, and the electrode grid line contacts the surface of the corresponding crystalline silicon cell, thereby improving the reliability of the contact connection.

[0077] Reference Figure 8 , Figure 8 The structure of a crystalline silicon cell is shown. For ease of illustration, a first connector 2 is provided on the light-facing side of the crystalline silicon cell, and a second connector 3 is provided on the backlight side of the crystalline silicon cell. The first connector 2 includes a first electrode grid line and a first light-transmitting base film 23, while the second connector 3 includes a second electrode grid line and a second light-transmitting base film 33.

[0078] In this embodiment, the crystalline silicon cell includes a substrate 13, a front functional layer 12 arranged on the front side of the substrate 13, a back functional layer 14 arranged on the back side of the substrate 13, a front light-transmitting conductive film layer 11 arranged on the side of the front functional layer 12 away from the substrate 13, and a back light-transmitting conductive film layer 15 arranged on the side of the back functional layer 14 away from the substrate 13.

[0079] The first electrode grid lines are in contact with and connected to the front light-transmitting conductive film layer 11, and the first light-transmitting base film 23 is in contact with and connected to the front light-transmitting conductive film layer 11 and wraps the first electrode grid lines. The second electrode grid lines are in contact with and connected to the back light-transmitting conductive film layer 15, and the second light-transmitting base film 33 is in contact with and connected to the back light-transmitting conductive film layer 15 and wraps the second electrode grid lines.

[0080] When the first connector 2 and the second connector 3 are bonded to the corresponding crystalline silicon cell, heating is used. During the bonding process with the unmetallized surface of the crystalline silicon cell, the low-temperature alloy layer melts, fully infiltrating the velvet surface of the crystalline silicon cell, reducing contact resistance. In addition, during the heating process, the first and second light-transmitting base films 23 and 33 are also tightly bonded to the crystalline silicon cell.

[0081] In this example, substrate 13 may be a silicon wafer. The specific type and dimensions (e.g., thickness, diameter, etc.) of the silicon wafer are not particularly limited and may be selected based on actual needs. For example, substrate 13 may be an n-type single-crystalline silicon wafer with a thickness of 90 μm to 120 μm (e.g., 90 μm, 95 μm, 100 μm, 105 μm, 110 μm, 115 μm, 120 μm, etc.). It is understood that substrate 13 may be a double-sided, clean substrate 13 obtained after double-sided cleaning and polishing to remove organic matter, metallic impurities, and surface damage layers on the substrate 13 surface.

[0082] The front light-transmitting conductive film layer 11 and the back light-transmitting conductive film layer 15 are each independently made of a metal oxide, such as ITO (indium tin oxide), IWO (indium zinc oxide), ICO (indium cerium oxide), or AZO (aluminum-doped zinc oxide). The light-transmitting conductive film layer contacts the electrode grid lines to achieve current collection.

[0083] The specific types of the front functional layer 12 and the back functional layer 14 can be determined based on the specific type of crystalline silicon cell. For example, the front functional layer 12 and the back functional layer 14 can include silicon oxide + phosphorus-doped or boron-doped polycrystalline silicon, or amorphous silicon + phosphorus-doped or boron-doped amorphous / microcrystalline silicon. The front functional layer 12 can be doped with phosphorus, and the back functional layer 14 can be doped with boron. The front functional layer 12 and the back functional layer 14 can also include other non-silicon-based structures, such as molybdenum oxide, tin oxide, etc.

[0084] Reference Figure 9 , Figure 9 The structure of a crystalline silicon cell is shown. In this embodiment, the crystalline silicon cell includes a substrate 13, a first passivation layer 121, a first semiconductor layer 122, a front-side light-transmitting conductive film layer 11, a second passivation layer 141, a second semiconductor layer 142, and a back-side light-transmitting conductive film layer 15. The first passivation layer 121 is formed on the front side of the substrate 13, the first semiconductor layer 122 is formed on the surface of the first passivation layer 121 away from the substrate 13, the front-side light-transmitting conductive film layer 11 is formed on the surface of the first semiconductor layer 122 away from the first passivation layer 121, the second passivation layer 141 is formed on the back side of the substrate 13, the second semiconductor layer 142 is formed on the surface of the second passivation layer 141 away from the substrate 13, and the back-side light-transmitting conductive film layer 15 is formed on the surface of the second semiconductor layer 142 away from the second passivation layer 141.

[0085] When the crystalline silicon cell is connected, the surface of the front transparent conductive film layer 11 away from the first semiconductor layer 122 is connected to the first electrode gate and the first transparent base film 23, and the surface of the back transparent conductive film layer 15 away from the second semiconductor layer 142 is connected to the second electrode gate and the second transparent base film 33.

[0086] The first passivation layer 121 may be an intrinsic amorphous silicon layer. The second passivation layer 141 may also be an intrinsic amorphous silicon layer or a tunneling layer. The first semiconductor layer 122 may include microcrystalline silicon and / or amorphous silicon and have a first doping type, such as N-type. The second semiconductor layer 142 may include polycrystalline silicon, amorphous silicon, and / or microcrystalline silicon and have a first doping type, such as P-type.

[0087] Reference Figure 10 , Figure 10 The process of a method for preparing a crystalline silicon cell module is shown. The second aspect of the present application also provides a method for preparing a crystalline silicon cell module. According to an embodiment of the present application, the method for preparing a crystalline silicon cell module includes steps 10, 20, 30, 40, 50, and 60.

[0088] Step 10: providing a first crystalline silicon cell 101 and a second crystalline silicon cell 102 and a first light-transmitting base film 23 and a second light-transmitting base film 33; Step 20: forming patterned first electrode grid lines on the first light-transmitting base film 23; Step 30: forming a patterned second electrode grid line on the second light-transmitting base film 33; Step 40: Laminating the first electrode grid line to the light-facing surface of the first crystalline silicon cell 101; Step 50: Laminating the second electrode grid line to the backlight surface of the second crystalline silicon cell 102; Step 60: Extend the first light-transmitting base film 23 and the second light-transmitting base film 33 in directions opposite to each other to connect with each other, and the first electrode grid line and the second electrode grid line are in contact and connected.

[0089] It should be noted that the structures of the crystalline silicon cells, the transparent base films and the electrode grid lines mentioned in this embodiment can be specifically referred to the aforementioned embodiments, and will not be described in detail in this embodiment.

[0090] The first electrode grid lines and the second electrode grid lines can be formed on the first and second light-transmitting base films 23 and 33 by patterning a mask and physical vapor deposition, wherein the physical vapor deposition method is evaporation deposition, sputtering deposition, or photoresist patterning and electroplating.

[0091] Laminating the first electrode grid lines to the light-facing surface of the first crystalline silicon cell 101 means laminating the first electrode grid lines and the first light-transmitting base film 23 as a whole to the light-facing surface of the first crystalline silicon cell 101. First, the first electrode grid lines on the first light-transmitting base film 23 are arranged opposite to the light-facing surface of the first crystalline silicon cell 101. Then, a pressure device is used to apply pressure to the first light-transmitting base film 23 and the first crystalline silicon cell 101, so that the first electrode grid lines are in contact with the light-facing surface of the first crystalline silicon cell 101.

[0092] Laminating the second electrode grid lines to the backlight surface of the second crystalline silicon cell 102 means laminating the second electrode grid lines and the second light-transmitting base film 33 as a whole to the backlight surface of the second crystalline silicon cell 102. First, the second electrode grid lines on the second light-transmitting base film 33 are arranged opposite to the backlight surface of the second crystalline silicon cell 102. Then, a pressure device is used to apply pressure to the second light-transmitting base film 33 and the second crystalline silicon cell 102, so that the second electrode grid lines come into contact with the backlight surface of the second crystalline silicon cell 102.

[0093] In some embodiments, the first and second electrode gridlines comprise copper gridlines and a low-temperature alloy. During the bonding process, the first and second electrode gridlines can be heated to melt the low-temperature alloy, thereby fully soaking the velvet surface of the crystalline silicon cell and reducing contact resistance. The low-temperature alloy can have a melting point of less than 150°C, preventing damage to the crystalline silicon cell due to excessive heat during heating.

[0094] It should be noted that, in the direction relative to the first crystalline silicon cell 101 and the second crystalline silicon cell 102, the overall length of the first electrode grid line and the first light-transmitting base film 23 is greater than the length of the first crystalline silicon cell 101, and the overall length of the second electrode grid line and the second light-transmitting base film 33 is greater than the length of the second crystalline silicon cell 102. Therefore, the portion of the first electrode grid line and the first light-transmitting base film 23 that extends beyond the first crystalline silicon cell 101 can be connected to the portion of the second electrode grid line and the second light-transmitting base film 33 that extends beyond the second crystalline silicon cell 102. For specific connection methods, reference can be made to the aforementioned embodiments.

[0095] The first crystalline silicon cell 101 and the second crystalline silicon cell 102 can be arranged side by side. Since the first electrode grid lines are attached to the light-facing side of the first crystalline silicon cell 101, the first electrode grid lines on the first light-transmitting base film 23 face the backlight side. Since the second electrode grid lines are attached to the backlight side of the second crystalline silicon cell 102, the first electrode grid lines on the second light-transmitting base film 33 face the light side. Therefore, when the first and second electrode grid lines are connected, they face each other, allowing for direct connection.

[0096] In addition, after the first crystalline silicon cell 101 and the second crystalline silicon cell 102 are connected via the transparent base film and the electrode grid lines, the crystalline silicon cell assembly needs to be packaged as a whole. This overall package can use insulating material to fill the space around the first crystalline silicon cell 101, the second crystalline silicon cell 102, the first electrode grid lines, the second electrode grid lines, the first transparent base film 23 and the second transparent base film 33, thereby providing support and protection.

[0097] A third aspect of this application also provides a photovoltaic system. According to an embodiment of this application, the photovoltaic system includes the crystalline silicon cell assembly described in the preceding embodiments. The specific structure and principles of the crystalline silicon cell assembly can be referenced in the preceding embodiments, and the corresponding technical effects are achieved. As a result, the photovoltaic power generation system has high power.

[0098] In this document, the terms "comprises", "includes" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, it should be noted that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in the opposite order according to the functions involved. For example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0099] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions, and variations may be made to the embodiments without departing from the principles and intent of the present application, and that the scope of the present application is defined by the claims and their equivalents.

Claims

1. A crystalline silicon battery assembly, characterized in that: The device comprises a plurality of crystalline silicon cell slices, each of which has a light-facing surface and a backlight surface that are oppositely arranged. The plurality of crystalline silicon cell slices include a first crystalline silicon cell slice and a second crystalline silicon cell slice. The light-facing surface of the first crystalline silicon cell slice is provided with a first connector, and the backlight surface of the second crystalline silicon cell slice is provided with a second connector. The first connecting member includes a first electrode grid line, which is electrically connected to the light-facing surface of the first crystalline silicon cell. The second connecting member includes a second electrode grid line, which is electrically connected to the backlight surface of the second crystalline silicon cell. The first connecting member and the second connecting member extend in directions opposite to each other to be connected to each other, and the first electrode grid line and the second electrode grid line are in contact and connected.

2. The crystalline silicon battery assembly according to claim 1, characterized in that: The first connecting member extends to the backlight surface of the second crystalline silicon solar cell, and the first electrode grid line and the second electrode grid line overlap along the thickness direction of the second crystalline silicon solar cell.

3. The crystalline silicon battery assembly according to claim 2, characterized in that: The first connecting member is bonded to the backlight surface of the second crystalline silicon cell.

4. The crystalline silicon cell assembly according to any one of claims 1 to 3, characterized in that: The first connecting member further includes a first light-transmitting base film, the first light-transmitting base film is located on a side of the first electrode grid line away from the first crystalline silicon solar cell, and the first electrode grid line is formed on the first light-transmitting base film; The second connecting member further includes a second light-transmitting base film, the second light-transmitting base film is located on a side of the second electrode grid line away from the second crystalline silicon solar cell, and the second electrode grid line is formed on the second light-transmitting base film.

5. The crystalline silicon battery assembly according to claim 4, characterized in that: At the portion where the first electrode grid lines and the second electrode grid lines are in contact and connected, the first light-transmitting base film and the second light-transmitting base film are attached to each other and wrap the first electrode grid lines and the second electrode grid lines.

6. The crystalline silicon battery assembly according to claim 5, characterized in that: The first electrode grid line is adhered to the light-facing surface of the first crystalline silicon cell, the first light-transmitting base film is adhered to the light-facing surface of the first crystalline silicon cell and wraps the first electrode grid line, the second electrode grid line is adhered to the backlight surface of the second crystalline silicon cell, the second light-transmitting base film is adhered to the backlight surface of the second crystalline silicon cell and wraps the second electrode grid line.

7. The crystalline silicon battery assembly according to claim 4, characterized in that: The first light-transmitting base film and / or the second light-transmitting base film include at least one of ethylene-vinyl acetate copolymer, polyolefin elastomer, thermoplastic polyolefin, and polyvinyl butyral. The thickness of the first light-transmitting base film and / or the second light-transmitting base film is 50 μm~200 μm, and the thickness of the crystalline silicon cell is 100 μm~150 μm.

8. The crystalline silicon cell assembly according to any one of claims 1 to 3, characterized in that: The first electrode grid lines and / or the second electrode grid lines include copper grid lines and low-temperature alloys, and the copper grid lines are connected to the crystalline silicon cell slices through the low-temperature alloys.

9. The crystalline silicon battery assembly according to claim 8, characterized in that: The low-temperature alloy includes at least one of tin-bismuth alloy, tin-lead-bismuth alloy, tin-bismuth-silver alloy, and tin-indium alloy, or the melting point of the low-temperature alloy layer is less than or equal to 150°C.

10. The crystalline silicon cell assembly according to any one of claims 1 to 3, characterized in that: The first electrode grid line includes a first bus grid line and a plurality of first sub-grid lines arranged at intervals, the first sub-grid lines extending along the arrangement direction of the first crystalline silicon solar cell and the second crystalline silicon solar cell, and the first bus grid line is electrically connected to one end of each of the first sub-grid lines; and / or, The second electrode gate line includes a second bus gate line and a plurality of second sub-gate lines arranged at intervals. The second sub-gate lines extend along the arrangement direction of the first crystalline silicon solar cell and the second crystalline silicon solar cell. The second bus gate line is electrically connected to one end of each second sub-gate line.

11. The crystalline silicon battery assembly according to claim 10, characterized in that: The first bus bar line and the second bus bar line at least partially overlap and contact each other; or, The first busbar line at least partially overlaps and contacts with a plurality of the second sub-busbar lines; or, The plurality of first sub-gate lines at least partially overlap and contact the second bus gate lines.

12. The crystalline silicon battery assembly according to claim 10, characterized in that: The width of the first sub-gate line is 5 μm-50 μm, and the thickness is 5 μm-50 μm; The first busbar line has a width of 50 μm to 500 μm and a thickness of 5 μm to 50 μm; The first sub-gate line is perpendicular to the first bus gate line; The second sub-gate line has a width of 5 μm-50 μm and a thickness of 5 μm-50 μm; The second busbar line has a width of 50 μm to 500 μm and a thickness of 5 μm to 50 μm; The second sub-gate line is perpendicular to the second bus gate line.

13. The crystalline silicon cell assembly according to any one of claims 1 to 3, characterized in that: The crystalline silicon cell includes a substrate, a front functional layer arranged on the front side of the substrate, a back functional layer arranged on the back side of the substrate, a front light-transmitting conductive film layer arranged on the side of the front functional layer away from the substrate, and a back light-transmitting conductive film layer arranged on the side of the back functional layer away from the substrate.

14. A method for preparing a crystalline silicon battery assembly, characterized in that: include: Providing a first crystalline silicon cell and a second crystalline silicon cell and a first light-transmitting base film and a second light-transmitting base film; forming patterned first electrode grid lines on the first light-transmitting base film; forming patterned second electrode grid lines on the second light-transmitting base film; Laminating the first electrode grid line to the light-facing surface of the first crystalline silicon cell; Laminating the second electrode grid line to the backlight surface of the second crystalline silicon cell; The first light-transmitting base film and the second light-transmitting base film are extended in directions opposite to each other to be connected to each other, and the first electrode grid lines and the second electrode grid lines are in contact and connected.

15. A photovoltaic system, characterized in that: The photovoltaic system includes the crystalline silicon cell assembly according to any one of claims 1 to 13, or includes the crystalline silicon cell assembly prepared by the preparation method according to claim 14.

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