Photovoltaic cell, preparation method thereof and photovoltaic module
By preparing holes in the doped silicon layer of photovoltaic cells and filling them with metal electrodes, the problem of unclear heavy doping effect in traditional photovoltaic cells is solved, and the conversion efficiency of photovoltaic cells is improved.
Patent Information
- Application Number
- CN202511235427.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-29
- Publication Date
- 2025-09-30
- Estimated Expiration
- 2045-08-29
AI Technical Summary
In the traditional preparation methods of photovoltaic cells, the heavy doping effect is not obvious, resulting in limited improvement in the conversion efficiency of silicon-based photovoltaic cells.
Holes are prepared in the doped silicon layer of the photovoltaic cell, and diffused doping is carried out in the holes through laser opening technology. The holes are filled with metal electrodes to increase the local doping concentration and increase the contact area.
The contact effect between the metal electrode and the doped silicon layer is improved, and the conversion efficiency of the photovoltaic cell is enhanced.
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Figure CN120730879A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of photovoltaic technology, and in particular to a photovoltaic cell and a preparation method thereof, and a photovoltaic module. Background Art
[0002] Silicon-based photovoltaic cells are a widely used type of photovoltaic cell. In silicon-based photovoltaic cells, doping creates P-type silicon and N-type silicon, forming a PN junction at their junction, generating a built-in electric field. Under the influence of this built-in electric field, photogenerated carriers migrate toward the N region, with electrons moving toward the N region and holes toward the P region, thus separating the charge carriers. When the external circuit is closed, the separated electrons and holes flow through the circuit, generating an electric current, thereby converting solar energy into electrical energy.
[0003] To improve the conversion efficiency of silicon-based photovoltaic cells, selective heavy doping can be performed on the doped silicon layer after diffusion doping, forming a heavily doped region at the contact area between the metal electrode and the doped silicon layer. However, due to the low diffusion coefficient of the doping element in silicon, the effect of heavy doping is not significant in traditional photovoltaic cell preparation methods, and the improvement in the conversion efficiency of silicon-based photovoltaic cells is relatively limited. Summary of the Invention
[0004] Based on this, it is necessary to provide a photovoltaic cell and its preparation method, as well as a photovoltaic module. The photovoltaic cell of the present application can effectively improve the heavy doping effect at the gate line contact position, increase the contact area and contact effect between the metal electrode and the high doping concentration area in the doped silicon layer, and thus improve the conversion efficiency of the photovoltaic cell.
[0005] In a first aspect, the present application provides a photovoltaic cell comprising a silicon substrate, a doped silicon layer and a metal electrode, wherein the silicon substrate comprises a first surface and a second surface arranged opposite to each other; the first surface comprises a first region and a second region, and the second surface comprises a third region and a fourth region; the doped silicon layer is arranged on at least one of the first surface and the second surface; the doping concentration of the doped silicon layer located in the first region is higher than the doping concentration of the doped silicon layer located in the second region, and / or the doping concentration of the doped silicon layer located in the third region is greater than the doping concentration of the doped silicon layer located in the fourth region; a plurality of holes are arranged on the surface of the doped silicon layer away from the silicon substrate, and the holes are located in the first region and / or the third region; the metal electrode is electrically connected to the doped silicon layer and the metal electrode fills the holes.
[0006] In some embodiments, the diameter of the pores is 50 nm to 250 nm.
[0007] In some embodiments, the depth of the pores is 20 nm to 500 nm.
[0008] In some embodiments, the plurality of holes are distributed in an array.
[0009] In some embodiments, the distribution density of the holes is 16 / μm 2 ~400 / μm 2 .
[0010] In some embodiments, the doped silicon layer includes a first doped silicon layer located on the first surface and a second doped silicon layer located on the second surface, and the first doped silicon layer and the second doped silicon layer have opposite doping types;
[0011] The doping concentration of the first doped silicon layer located in the first region is 3×10 18 cm -3 ~3×10 19 cm -3 The doping concentration of the first doped silicon layer located in the second region is 1×10 18 cm -3 ~3×10 18 cm -3 ;
[0012] The doping concentration of the second doped silicon layer located in the third region is 3×10 20 cm -3 ~3×10 21 cm -3 The doping concentration of the second doped silicon layer located in the fourth region is 1×10 20 cm -3 ~3×10 20 cm -3 .
[0013] In some embodiments, the thickness of the first doped silicon layer is 0.1 μm to 2 μm.
[0014] In some embodiments, the thickness of the second doped silicon layer is 30 nm to 200 nm.
[0015] In some embodiments, the first surface is sequentially stacked with the first doped silicon layer, the first anti-reflection layer, and the first metal electrode; a plurality of first holes are provided on the surface of the first doped silicon layer away from the silicon substrate; the first metal electrode passes through the first anti-reflection layer and is electrically connected to the first doped silicon layer, and fills each of the first holes;
[0016] A tunneling oxide layer, a second doped silicon layer, a second anti-reflection layer and a second metal electrode are stacked in sequence on the second surface; a plurality of second holes are provided on the surface of the second doped silicon layer away from the silicon substrate; the second metal electrode is electrically connected through the second anti-reflection layer and the second doped silicon layer, and fills each of the second holes.
[0017] In some embodiments, the depth of the first hole accounts for 25% to 80% of the thickness of the first doped silicon layer.
[0018] In some embodiments, the depth of the second hole accounts for 30% to 75% of the thickness of the second doped silicon layer.
[0019] In a second aspect, the present application provides a method for preparing a photovoltaic cell, comprising the following steps:
[0020] Providing a silicon substrate, the silicon substrate comprising a first surface and a second surface disposed opposite to each other; the first surface comprising a first region and a second region, and the second surface comprising a third region and a fourth region;
[0021] forming a plurality of holes on at least one of the first surface and the second surface;
[0022] Diffusion doping is performed on the surface after the hole is formed to form a doped silicon layer, wherein the doping concentration of the doped silicon layer located in the first region is higher than the doping concentration of the doped silicon layer located in the second region, and / or the doping concentration of the doped silicon layer located in the third region is higher than the doping concentration of the doped silicon layer located in the fourth region; the hole is located in the first region and / or the third region;
[0023] A metal electrode is prepared on a surface of the doped silicon layer away from the silicon substrate. The metal electrode is electrically connected to the doped silicon layer and fills each of the holes.
[0024] In some embodiments, forming a plurality of holes on at least one of the first surface and the second surface comprises the following steps:
[0025] A plurality of first holes are formed on the first surface by opening with a first laser.
[0026] In some embodiments, in the first laser drilling: a Bessel beam is used for the first laser drilling; the energy of a single laser pulse is 0.02 μJ to 1.5 μJ; and the diameter of the light spot is 50 nm to 300 nm.
[0027] In some embodiments, in the first laser opening, the pulse frequency is 1 KHz to 1000 KHz; the laser pulse width is 10 fs to 1000 fs; and the laser wavelength is 200 nm to 400 nm.
[0028] In some embodiments, forming a plurality of holes on at least one of the first surface and the second surface comprises the following steps:
[0029] forming an intrinsic silicon layer on the second surface;
[0030] A plurality of second holes are formed on the surface of the intrinsic silicon layer away from the silicon substrate by a second laser drilling.
[0031] In some embodiments, in the second laser drilling: a Bessel beam is used for the second laser drilling; the energy of a single laser pulse is 0.01 μJ to 0.5 μJ; and the diameter of the light spot is 50 nm to 300 nm.
[0032] In some embodiments, in the second laser opening, the pulse frequency is 1 KHz to 300 KHz; the wavelength of the laser is 250 nm to 350 nm; and the pulse width of the laser is 50 fs to 500 fs.
[0033] In some embodiments, the following steps are further included before forming a metal electrode on the surface of the doped silicon layer away from the silicon substrate:
[0034] An anti-reflection layer is formed on the surface of the doped silicon layer away from the silicon substrate.
[0035] In a third aspect, the present application provides a photovoltaic module, comprising:
[0036] cover;
[0037] At least one cell string, the cell string comprising any one of the photovoltaic cells described above, or a photovoltaic cell prepared by any one of the methods for preparing a photovoltaic cell described above; and
[0038] An encapsulation layer is located between the cover plate and the battery string, and the cover plate is connected to the battery string through the encapsulation layer.
[0039] In the above-mentioned photovoltaic cell, a plurality of holes are provided in the area with a higher doping concentration of the doped silicon layer. The metal electrode is electrically connected to the doped silicon layer and the metal electrode fills the holes, which can effectively improve the heavy doping effect of the gate line contact position, increase the contact area and contact effect between the metal electrode and the area with a higher doping concentration in the doped silicon layer, and thereby improve the conversion efficiency of the photovoltaic cell. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] Figure 1 A schematic structural diagram of a photovoltaic cell provided in one embodiment of the present application;
[0041] Figure 2 A schematic diagram of the structure of hole distribution provided in one embodiment of the present application;
[0042] Figure 3 is a schematic structural diagram of forming a first hole on a first surface of a silicon substrate;
[0043] Figure 4 For Figure 3 A schematic structural diagram of preparing a first doped silicon layer based on the method;
[0044] Figure 5 For Figure 4 Schematic diagram of the structure of preparing tunnel oxide layer and intrinsic silicon layer based on the present invention;
[0045] Figure 6 For Figure 5 A schematic diagram of a structure in which a second hole is formed on the basis of
[0046] Figure 7 For Figure 6 Schematic diagram of the structure for preparing the second doped silicon layer based on .
[0047] 10-silicon substrate; 11-first hole; 12-first region; 13-second region; 20-first doped silicon layer; 30-passivation layer; 40-first anti-reflection layer; 50-first metal electrode; 60-tunneling oxide layer; 70'-intrinsic silicon layer; 70-second doped silicon layer; 71-second hole; 80-second anti-reflection layer; 90-second metal electrode. DETAILED DESCRIPTION
[0048] To make the above-mentioned objects, features, and advantages of the present application more clearly understood, the specific embodiments of the present application are described in detail below. The following description sets forth many specific details to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways than those described herein, and those skilled in the art can make similar modifications without violating the scope of the present application. Therefore, the present application is not limited to the specific embodiments disclosed below.
[0049] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application pertains. The terms used herein in the specification of this application are for the purpose of describing specific embodiments only and are not intended to limit this application. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.
[0050] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.
[0051] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of such features. In the description of this application, "plurality" means at least two, for example, two, three, etc., unless otherwise specifically defined.
[0052] In this application, unless otherwise specified or limited, the terms "installed," "connected," "connect," "fixed," etc. should be understood in a broad sense. For example, they can refer to fixed connection, detachable connection, or integration; mechanical connection or electrical connection; direct connection or indirect connection through an intermediate medium; internal communication between two elements or interaction between two elements, unless otherwise specified. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.
[0053] Reference Figure 1 As shown, one embodiment of the present application provides a photovoltaic cell, including a silicon substrate 10, a doped silicon layer and a metal electrode, the silicon substrate 10 includes a first surface and a second surface arranged opposite to each other; the first surface includes a first region 12 and a second region 13, and the second surface includes a third region and a fourth region; the doped silicon layer is arranged on at least one of the first surface and the second surface; the doping concentration of the doped silicon layer located in the first region 12 is higher than the doping concentration of the doped silicon layer located in the second region 13, and / or the doping concentration of the doped silicon layer located in the third region is greater than the doping concentration of the doped silicon layer located in the fourth region; a plurality of holes are provided on the surface of the doped silicon layer away from the silicon substrate 10, and the holes are located in the first region 12 and / or the third region; the metal electrode is electrically connected to the doped silicon layer and the metal electrode fills the holes.
[0054] In the above photovoltaic cell, a plurality of holes are provided in the region with a higher doping concentration of the doped silicon layer, the metal electrode is electrically connected to the doped silicon layer and the metal electrode fills the holes, which can effectively improve the heavy doping effect of the gate line contact position, increase the contact area and contact effect between the metal electrode and the region with a higher doping concentration in the doped silicon layer, and thus improve the conversion efficiency of the photovoltaic cell. It is understandable that in conventional technology, in order to achieve local heavy doping, it may be carried out by increasing the doping temperature or laser heavy doping. However, the above-mentioned method of achieving heavy doping is likely to cause damage to the original film layer. In the photovoltaic cell of the present application, by preparing holes, the doping source will enter the holes during the diffusion doping process, and the film layer near the holes can be heavily doped without changing the original doping process. At the same time, in the subsequent preparation process of the metal electrode, the electrode slurry can also enter the holes and achieve electrical contact with the heavily doped silicon material near the holes, thereby increasing the contact area and contact effect between the metal electrode and the region with a higher doping concentration in the doped silicon layer, and thus improving the conversion efficiency of the photovoltaic cell.
[0055] It can be understood that during the diffusion doping process, the doping source will enter the hole and form enrichment in the hole, which can form an area with a higher doping concentration in the doped silicon layer located at the hole wall and the hole bottom, thereby facilitating a larger contact area between the metal electrode and the doped silicon layer with a higher doping concentration.
[0056] In some embodiments, the diameter of the pores is 50 nm to 250 nm.
[0057] In some embodiments, the depth of the holes is 20 nm to 500 nm.
[0058] It is understood that the diameter of the hole is the average value of any number of holes selected during sampling, and the depth of the hole is the average value of any number of holes selected during sampling. The diameter and depth of the hole can be measured by scanning electron microscopy or optical profilometer measurement. The diameter and depth of the hole can be adjusted according to the material and thickness of the different film layers. The lower limit of the hole diameter is mainly limited by the laser drilling technology. If the hole diameter is too large or the depth is too small, the degree of improvement in the contact area and contact effect between the metal electrode and the region with higher doping concentration in the doped silicon layer is relatively limited. The depth of the hole is mainly limited by the thickness of the film layer. Optionally, the diameter of the hole is 50nm, 80nm, 100nm, 120nm, 150nm, 180nm, 200nm, 220nm or 250nm, or the diameter of the hole can also be within the range between any two of the above diameters. Optionally, the depth of the hole is 20nm, 50nm, 80nm, 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm or 500nm, or the depth of the hole can also be within the range between any two of the above depths.
[0059] In some embodiments, the plurality of holes are distributed in an array.
[0060] Multiple holes are distributed in an array, and the distribution of the doping source is more uniform during the diffusion doping process, which can achieve a more uniform heavy doping effect in the area where the gate line is prepared, and improve the contact area and contact effect between the metal electrode and the area with higher doping concentration in the doped silicon layer.
[0061] In some embodiments, the distribution density of the holes is 16 / μm. 2 ~400 / μm 2 .
[0062] For example, referring to Figure 2 As shown, Figure 2 The figure shows the morphology of an array of holes that can be implemented. When the hole diameter is 50nm and the holes are distributed in an array, the maximum distribution density of the holes is 20×20 per square micron, that is, 400 holes / μm. 2 When the diameter of a single hole is 250nm and the holes are distributed in an array, the maximum distribution density of holes is 4 × 4 holes per square micron, that is, 16 holes / μm. 2 Within the range of the above-mentioned hole distribution density, the contact area and contact effect between the metal electrode and the region with higher doping concentration in the doped silicon layer are improved. Optionally, the hole distribution density is 16 holes / μm 2 , 25 / μm 2 , 36 / μm 2, 64 / μm 2 , 100 / μm 2 , 225 / μm 2 , 324 / μm 2 or 400 / μm 2 Alternatively, the distribution density of the holes may be within the range between any two of the above distribution densities.
[0063] In some embodiments, the doped silicon layer includes a first doped silicon layer 20 located on the first surface and a second doped silicon layer 70 located on the second surface. The first doped silicon layer 20 and the second doped silicon layer 70 have opposite doping types. The doping concentration of the first doped silicon layer 20 located in the first region 12 is 3×10 18 cm -3 ~3×10 19 cm -3 The doping concentration of the first doped silicon layer 20 in the second region 13 is 1×10 18 cm -3 ~3×10 18 cm -3 The doping concentration of the second doped silicon layer 70 located in the third region is 3×10 20 cm -3 ~3×10 21 cm -3 The doping concentration of the second doped silicon layer 70 in the fourth region is 1×10 20 cm -3 ~3×10 20 cm -3 .
[0064] In some embodiments, the doping type of the first doped silicon layer 20 is P-type doping.
[0065] In some embodiments, the doping type of the second doped silicon layer 70 is N-type doping.
[0066] It is understood that in TOPCon cells, an N-type silicon wafer is typically used as the silicon substrate 10, with the doping element including at least one of P, As, Sb, and Bi. P-type doping is performed directly on the front surface of the silicon substrate 10 to form a first doped silicon layer 20. On the back surface of the silicon substrate 10, an intrinsic silicon layer 70' is formed and then N-type doping is performed to form a second doped silicon layer 70. The doping concentration of the first doped silicon layer 20 is typically lower than that of the second doped silicon layer 70.
[0067] Optionally, the doping concentration of the first doped silicon layer 20 located in the first region 12 is 3×10 18 cm -3 , 4×10 18 cm -3, 5×10 18 cm -3 , 6×10 18 cm -3 , 7×10 18 cm -3 , 8×10 18 cm -3 , 9×10 18 cm -3 , 1×10 19 cm -3 , 2×10 19 cm -3 or 3×10 19 cm -3 Alternatively, the doping concentration of the first doped silicon layer 20 located in the first region 12 may also be within a range between any two of the above doping concentrations.
[0068] Optionally, the doping concentration of the first doped silicon layer 20 located in the second region 13 is 1×10 18 cm -3 , 1.2×10 18 cm -3 , 1.5×10 18 cm -3 , 1.8×10 18 cm -3 , 2×10 18 cm -3 , 2.2×10 18 cm -3 , 2.5×10 18 cm -3 , 2.8×10 18 cm -3 or 3×10 18 cm -3 Alternatively, the doping concentration of the first doped silicon layer 20 located in the second region 13 may also be within the range between any two of the above doping concentrations.
[0069] Optionally, the doping concentration of the second doped silicon layer 70 located in the third region is 3×10 20 cm -3 , 4×10 20 cm -3 , 5×10 20 cm -3 , 6×10 20 cm -3 , 7×10 20 cm -3 , 8×10 20 cm -3 , 9×10 20 cm -3, 1×10 21 cm -3 , 2×10 21 cm -3 or 3×10 21 cm -3 Alternatively, the doping concentration of the second doped silicon layer 70 located in the third region may also be within the range between any two of the above doping concentrations.
[0070] Optionally, the doping concentration of the second doped silicon layer 70 located in the fourth region is 1×10 20 cm -3 , 1.2×10 20 cm -3 , 1.5×10 20 cm -3 , 1.8×10 20 cm -3 , 2×10 20 cm -3 , 2.2×10 20 cm -3 , 2.5×10 20 cm -3 , 2.8×10 20 cm -3 or 3×10 20 cm -3 Alternatively, the doping concentration of the second doped silicon layer 70 located in the fourth region may also be within the range between any two of the above doping concentrations.
[0071] In some embodiments, the thickness of the first doped silicon layer 20 is 0.1 μm to 2 μm.
[0072] Optionally, the thickness of the first doped silicon layer 20 is 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm, 1 μm, 1.2 μm, 1.4 μm, 1.6 μm, 1.8 μm or 2 μm, or the thickness of the first doped silicon layer 20 may be within the range between any two of the above thicknesses.
[0073] In some embodiments, the thickness of the second doped silicon layer 70 is 30 nm to 200 nm.
[0074] Optionally, the thickness of the second doped silicon layer 70 is 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 120nm, 140nm, 160nm, 180nm or 200nm, or the thickness of the second doped silicon layer 70 may also be within the range between any two of the above thicknesses.
[0075] In some embodiments, a first doped silicon layer 20, a first anti-reflection layer 40, and a first metal electrode 50 are sequentially stacked on the first surface. A first hole 11 is provided on the surface of the first doped silicon layer 20 away from the silicon substrate 10. The first metal electrode 50 is electrically connected to the first doped silicon layer 20 through the first anti-reflection layer 40 and fills each first hole 11. A tunneling oxide layer 60, a second doped silicon layer 70, a second anti-reflection layer 80, and a second metal electrode 90 are sequentially stacked on the second surface. A second hole 71 is provided on the surface of the second doped silicon layer 70 away from the silicon substrate 10. The second metal electrode 90 is electrically connected to the second anti-reflection layer 80 and the second doped silicon layer 70 and fills each second hole 71.
[0076] Refer again Figure 1 As shown, taking the TOPCon battery as an example, the battery structure of the present application can simultaneously form holes on the front and back of the battery, while increasing the contact area and contact effect of the metal electrodes on the front and back of the battery and the areas with higher doping concentrations in the doped silicon layer.
[0077] In some embodiments, the photovoltaic cell further includes a passivation layer 30 , which is located between the first doped silicon layer 20 and the first anti-reflection layer 40 .
[0078] In some embodiments, the material of the passivation layer 30 includes SiO x 、SiO x :N, HfO2, ZrO2 and AlO x At least one of .
[0079] In some embodiments, the material of the first anti-reflection layer 40 includes TiN, SiO x , MgF2 and SiN x At least one of .
[0080] In some embodiments, the material of the second anti-reflection layer 80 includes TiN, SiO x , MgF2 and SiN x At least one of .
[0081] In some embodiments, the material of the tunnel oxide layer 60 includes SiO x .
[0082] In some embodiments, the depth of the first hole 11 accounts for 25% to 80% of the thickness of the first doped silicon layer 20 .
[0083] Within the range of the ratio of the depth of the first hole 11 to the thickness of the first doped silicon layer 20, the effect of local heavy doping is better, the effect of improving the contact between the gate line and the heavily doped area is better, and it is convenient to achieve a higher conversion efficiency of the photovoltaic cell. At the same time, it can also avoid the puncture of the metal paste caused by the excessive ratio of the depth of the first hole 11 to the thickness of the first doped silicon layer 20. Optionally, the ratio of the depth of the first hole 11 to the thickness of the first doped silicon layer 20 is 25%, 30%, 35%, 40%, 45%, 50%, 55%, 60%, 65%, 70%, 75% or 80%, or the ratio of the depth of the first hole 11 to the thickness of the first doped silicon layer 20 can also be within the range between any two of the above ratios.
[0084] In some embodiments, the depth of the second hole 71 accounts for 30% to 75% of the thickness of the second doped silicon layer 70 .
[0085] Within the range of the ratio of the depth of the second hole 71 to the thickness of the second doped silicon layer 70, the effect of local heavy doping is better, the effect of improving the contact between the gate line and the heavily doped area is better, and it is convenient to achieve a higher conversion efficiency of the photovoltaic cell. At the same time, it can also avoid the puncture of the metal paste caused by the excessive ratio of the depth of the second hole 71 to the thickness of the second doped silicon layer 70. Optionally, the ratio of the depth of the second hole 71 to the thickness of the second doped silicon layer 70 is 30%, 35%, 40%, 45%, 50%, 55%, 60%, 65%, 70% or 75%, or the ratio of the depth of the second hole 71 to the thickness of the second doped silicon layer 70 can also be within the range between any two of the above ratios.
[0086] Another embodiment of the present application provides a method for preparing a photovoltaic cell, comprising the following steps:
[0087] A silicon substrate 10 is provided, wherein the silicon substrate 10 includes a first surface and a second surface disposed opposite to each other; the first surface includes a first region 12 and a second region 13, and the second surface includes a third region and a fourth region;
[0088] forming a plurality of holes on at least one of the first surface and the second surface;
[0089] Diffusion doping is performed on the surface after the hole is formed to form a doped silicon layer, wherein the doping concentration of the doped silicon layer located in the first region 12 is higher than the doping concentration of the doped silicon layer located in the second region 13, and / or the doping concentration of the doped silicon layer located in the third region is higher than the doping concentration of the doped silicon layer located in the fourth region; the hole is located in the first region 12 and / or the third region;
[0090] A metal electrode is formed on the surface of the doped silicon layer away from the silicon substrate 10 . The metal electrode is electrically connected to the doped silicon layer and fills the holes.
[0091] After the holes are formed, diffusion doping is performed on the surface of the silicon substrate 10. During the diffusion doping process, the dopant source enters the holes and concentrates within them, enabling heavy doping of the film layer near the holes without changing the original doping process. When a metal electrode is formed on the surface of the doped silicon layer away from the silicon substrate 10, the electrode slurry enters the holes and, through sintering, forms a metal-semiconductor contact with the heavily doped regions on the hole sidewalls and bottom. This increases the contact area and effectiveness between the metal electrode and the highly doped regions of the doped silicon layer, thereby improving the conversion efficiency of the photovoltaic cell.
[0092] It should be noted that when using electrode slurry to prepare metal electrodes through sintering, the width of the metal electrode should at least ensure that it covers the width of the area where the holes are formed. Due to the certain fluidity of the electrode slurry, the width of the prepared metal electrode may also be greater than the width of the area where the holes are formed.
[0093] In some embodiments, forming a plurality of holes on at least one of the first surface and the second surface comprises the following steps:
[0094] A plurality of first holes 11 are formed on the first surface by a first laser drilling process.
[0095] In some embodiments, the first surface is a suede surface.
[0096] It is understood that the first surface can first be textured to form a pyramid texture surface, and then a plurality of first holes 11 can be formed on the first surface by a first laser drilling, and then diffusion doping can be performed. Typically, the height and width of the pyramids are in the range of 1µm to 10µm. The size of the holes in this application is much smaller than the size of the pyramids. That is, when the texture surface is drilled by laser, it can be understood that holes are drilled on the sidewalls of the pyramids along the thickness direction of the silicon substrate.
[0097] In some embodiments, the first laser aperture is performed using a Bessel beam.
[0098] In some embodiments, the energy of a single laser pulse of the first laser opening is 0.02 μJ to 1.5 μJ.
[0099] In some embodiments, the frequency of the pulse of the first laser opening is 1 KHz to 1000 KHz.
[0100] In some embodiments, the pulse width of the laser used for the first laser aperture is 10 fs to 1000 fs.
[0101] In some embodiments, the wavelength of the laser used for the first laser drilling is 200 nm to 400 nm.
[0102] In some embodiments, the diameter of the spot of the first laser aperture is 50 nm to 300 nm.
[0103] In some embodiments, forming a plurality of holes on at least one of the first surface and the second surface comprises the following steps:
[0104] forming an intrinsic silicon layer 70 ′ on the second surface of the silicon substrate 10 ;
[0105] A plurality of second holes 71 are formed on the surface of the intrinsic silicon layer 70 ′ away from the silicon substrate 10 by a second laser drilling.
[0106] In some embodiments, the second laser aperture is performed using a Bessel beam.
[0107] In some embodiments, the energy of a single laser pulse of the second laser opening is 0.01 μJ to 0.5 μJ.
[0108] In some embodiments, the frequency of the second laser opening pulse is 1 KHz to 300 KHz.
[0109] In some embodiments, the pulse width of the laser used for the second laser aperture is 50 fs to 500 fs.
[0110] In some embodiments, the wavelength of the laser used for the second laser drilling is 250 nm to 350 nm.
[0111] In some embodiments, the diameter of the spot of the second laser aperture is 50 nm to 300 nm.
[0112] It is understandable that for TOPCon cells, holes are prepared on the front side of the silicon substrate 10 by directly laser drilling on the silicon substrate 10, while holes are prepared on the back side of the silicon substrate 10 by first preparing the intrinsic silicon layer 70' and then laser drilling on the surface of the intrinsic silicon layer 70'. Therefore, the process parameters for the first laser drilling and the second laser drilling may be different. The truncated Bessel beam is an approximately non-diffracting beam, and the light intensity remains essentially unchanged over a long distance. By shaping the incident laser into a Bessel beam using components such as an aconic lens and a spatial light modulator, a focused light field with a small focal spot and a long focal depth can be obtained, enabling laser drilling with a controllable aspect ratio.
[0113] Optionally, the energy of a single laser pulse of the first laser opening is 0.02 μJ, 0.05 μJ, 0.1 μJ, 0.2 μJ, 0.5 μJ, 0.8 μJ, 1 μJ, 1.2 μJ or 1.5 μJ, or the energy of a single laser pulse of the first laser opening may be within the range between any two of the above energies.
[0114] Optionally, the frequency of the pulse of the first laser opening is 1 KHz, 2 KHz, 5 KHz, 10 KHz, 20 KHz, 50 KHz, 100 KHz, 200 KHz, 500 KHz, 800 KHz or 1000 KHz, or the frequency of the pulse of the first laser opening can also be within the range between any two of the above frequencies.
[0115] Optionally, the pulse width of the laser for the first laser opening is 10 fs, 20 fs, 50 fs, 100 fs, 200 fs, 500 fs, 800 fs or 1000 fs, or the pulse width of the laser for the first laser opening can also be within the range between any two of the above pulse widths.
[0116] Optionally, the wavelength of the laser for the first laser opening is 200nm, 220nm, 240nm, 260nm, 280nm, 300nm, 320nm, 340nm, 360nm, 370nm or 400nm, or the wavelength of the laser for the first laser opening can also be within the range between any two of the above wavelengths.
[0117] Optionally, the diameter of the light spot of the first laser opening is 50nm, 80nm, 100nm, 120nm, 150nm, 180nm, 200nm, 220nm, 250nm, 280nm or 300nm, or the diameter of the light spot of the first laser opening can also be within the range between any two of the above diameters.
[0118] Optionally, the energy of a single laser pulse of the second laser opening is 0.01 μJ, 0.02 μJ, 0.05 μJ, 0.08 μJ, 0.1 μJ, 0.2 μJ, 0.3 μJ, 0.4 μJ or 0.5 μJ, or the energy of a single laser pulse of the second laser opening may be within the range between any two of the above energies.
[0119] Optionally, the frequency of the second laser opening pulse is 1 KHz, 2 KHz, 5 KHz, 10 KHz, 20 KHz, 50 KHz, 100 KHz, 150 KHz, 200 KHz, 250 KHz or 300 KHz, or the frequency of the second laser opening pulse can also be within the range between any two of the above frequencies.
[0120] Optionally, the pulse width of the laser for the second laser opening is 50fs, 100fs, 150fs, 200fs, 250fs, 300fs, 350fs, 400fs, 450fs or 500fs, or the pulse width of the laser for the second laser opening can also be within the range between any two of the above pulse widths.
[0121] Optionally, the wavelength of the laser for the second laser opening is 250nm, 260nm, 270nm, 280nm, 290nm, 300nm, 310nm, 320nm, 330nm, 340nm or 350nm, or the wavelength of the laser for the second laser opening can also be within the range between any two of the above wavelengths.
[0122] Optionally, the diameter of the light spot of the second laser opening is 50 nm, 80 nm, 100 nm, 150 nm, 200 nm, 250 nm or 300 nm, or the diameter of the light spot of the second laser opening may also be within the range between any two of the above diameters.
[0123] In some embodiments, the following steps are further included before forming the metal electrode on the surface of the doped silicon layer away from the silicon substrate 10:
[0124] An anti-reflection layer is formed on the surface of the doped silicon layer away from the silicon substrate 10 .
[0125] In some embodiments, a method for preparing a photovoltaic cell comprises the following steps:
[0126] S10 : forming a first hole 11 on the first surface of the silicon substrate 10 .
[0127] Reference Figure 3 As shown, Figure 3 FIG. 1 is a schematic structural diagram of forming a first hole 11 on the first surface of a silicon substrate 10 .
[0128] S20 : performing a first diffusion doping on the first surface of the silicon substrate 10 to prepare a first doped silicon layer 20 .
[0129] Reference Figure 4 As shown, Figure 4 For Figure 3 Schematic diagram of the structure of preparing the first doped silicon layer 20 based on.
[0130] S30 : sequentially forming a tunneling oxide layer 60 and an intrinsic silicon layer 70 ′ on the second surface of the silicon substrate 10 .
[0131] Reference Figure 5 As shown, Figure 5 For Figure 4 Schematic diagram of the structure of preparing the tunnel oxide layer 60 and the intrinsic silicon layer 70' based on the present invention.
[0132] S40 : forming a second hole 71 on the surface of the intrinsic silicon layer 70 ′ away from the silicon substrate 10 .
[0133] Reference Figure 6 As shown, Figure 6 For Figure 5 Schematic diagram of the structure of forming the second hole 71 on the basis of.
[0134] S50: performing a second doping operation on the intrinsic silicon layer 70 ′ to form a second doped silicon material layer.
[0135] Reference Figure 7 As shown, Figure 7 For Figure 6 Schematic diagram of the structure of preparing the second doped silicon layer 70 based on the above.
[0136] S60 : sequentially forming a passivation layer 30 and a first anti-reflection layer 40 on the surface of the first doped silicon layer 20 .
[0137] S70 : forming a first metal electrode 50 on the surface of the first anti-reflection layer 40 . The first metal electrode 50 penetrates the first anti-reflection layer 40 and contacts the first doped silicon layer 20 , and fills each first hole 11 .
[0138] S80 : preparing a second anti-reflection layer 80 on the surface of the second anti-reflection layer 80 .
[0139] S90 : forming a second metal electrode 90 on the surface of the second anti-reflection layer 80 . The second metal electrode 90 penetrates the second anti-reflection layer 80 and contacts the second doped silicon layer 70 , and fills each second hole 71 .
[0140] Refer again Figure 1 As shown, Figure 1 Schematic diagram of the structure of the photovoltaic cell after the first metal electrode 50 and the second metal electrode 90 are prepared.
[0141] Another embodiment of the present application provides a photovoltaic module, comprising:
[0142] cover;
[0143] At least one battery string, the battery string comprising any of the above photovoltaic cells, or a photovoltaic cell prepared by any of the above methods for preparing a photovoltaic cell; and
[0144] The encapsulation layer is located between the cover plate and the battery string, and the cover plate is connected to the battery string through the encapsulation layer.
[0145] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0146] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent. It should be noted that a person skilled in the art could make several modifications and improvements without departing from the spirit of the present application, all of which fall within the scope of protection of the present application. Therefore, the scope of protection of the patent in this application shall be based on the appended claims, and the specification and drawings may be used to interpret the claims.
Claims
1. A photovoltaic cell, characterized in that: It includes a silicon substrate, a doped silicon layer and a metal electrode, wherein the silicon substrate includes a first surface and a second surface arranged opposite to each other; the first surface includes a first area and a second area, and the second surface includes a third area and a fourth area; the doped silicon layer is arranged on at least one of the first surface and the second surface; the doping concentration of the doped silicon layer located in the first area is higher than the doping concentration of the doped silicon layer located in the second area, and / or the doping concentration of the doped silicon layer located in the third area is greater than the doping concentration of the doped silicon layer located in the fourth area; a plurality of holes are provided on the surface of the doped silicon layer away from the silicon substrate, and the holes are located in the first area and / or the third area; the metal electrode is electrically connected to the doped silicon layer and the metal electrode fills the holes.
2. The photovoltaic cell according to claim 1, characterized in that The diameter of the pores is 50 nm to 250 nm; and / or, The depth of the holes is 20 nm to 500 nm; and / or, The distribution density of the holes is 16 / μm 2 ~400 / μm 2 .
3. The photovoltaic cell according to claim 1, characterized in that The plurality of holes are distributed in an array.
4. The photovoltaic cell according to any one of claims 1 to 3, characterized in that The doped silicon layer includes a first doped silicon layer located on the first surface and a second doped silicon layer located on the second surface, wherein the first doped silicon layer and the second doped silicon layer have opposite doping types; The doping concentration of the first doped silicon layer located in the first region is 3×10 18 cm -3 ~3×10 19 cm -3 The doping concentration of the first doped silicon layer located in the second region is 1×10 18 cm -3 ~3×10 18 cm -3 ; The doping concentration of the second doped silicon layer located in the third region is 3×10 20 cm -3 ~3×10 21 cm -3 The doping concentration of the second doped silicon layer located in the fourth region is 1×10 20 cm -3 ~3×10 20 cm -3 .
5. The photovoltaic cell according to claim 4, characterized in that The thickness of the first doped silicon layer is 0.1 μm to 2 μm; and / or, The thickness of the second doped silicon layer is 30 nm to 200 nm.
6. The photovoltaic cell according to claim 4, characterized in that The first surface is sequentially stacked with a first doped silicon layer, a first anti-reflection layer, and a first metal electrode; a plurality of first holes are provided on a surface of the first doped silicon layer away from the silicon substrate; the first metal electrode passes through the first anti-reflection layer and is electrically connected to the first doped silicon layer, and fills each of the first holes; A tunneling oxide layer, a second doped silicon layer, a second anti-reflection layer and a second metal electrode are stacked in sequence on the second surface; a plurality of second holes are provided on the surface of the second doped silicon layer away from the silicon substrate; the second metal electrode is electrically connected through the second anti-reflection layer and the second doped silicon layer, and fills each of the second holes.
7. The photovoltaic cell according to claim 6, characterized in that The depth of the first hole accounts for 25% to 80% of the thickness of the first doped silicon layer; and / or, The depth of the second hole accounts for 30% to 75% of the thickness of the second doped silicon layer.
8. A method for preparing a photovoltaic cell, characterized in that: The steps include: Providing a silicon substrate, the silicon substrate comprising a first surface and a second surface disposed opposite to each other; the first surface comprising a first region and a second region, and the second surface comprising a third region and a fourth region; forming a plurality of holes on at least one of the first surface and the second surface; Diffusion doping is performed on the surface after the hole is formed to form a doped silicon layer, wherein the doping concentration of the doped silicon layer located in the first region is higher than the doping concentration of the doped silicon layer located in the second region, and / or the doping concentration of the doped silicon layer located in the third region is higher than the doping concentration of the doped silicon layer located in the fourth region; the hole is located in the first region and / or the third region; A metal electrode is prepared on a surface of the doped silicon layer away from the silicon substrate. The metal electrode is electrically connected to the doped silicon layer and fills each of the holes.
9. The method for preparing a photovoltaic cell according to claim 8, wherein: Forming a plurality of holes on at least one of the first surface and the second surface comprises the following steps: A plurality of first holes are formed on the first surface by opening with a first laser.
10. The method for preparing a photovoltaic cell according to claim 9, wherein: In the first laser drilling: a Bessel beam is used for the first laser drilling; the energy of a single laser pulse is 0.02 μJ to 1.5 μJ; and the diameter of the light spot is 50 nm to 300 nm.
11. The method for preparing a photovoltaic cell according to claim 9, wherein: In the first laser opening, the pulse frequency is 1KHz-1000KHz; the laser pulse width is 10fs-1000fs; and the laser wavelength is 200nm-400nm.
12. The method for preparing a photovoltaic cell according to claim 8, wherein: Forming a plurality of holes on at least one of the first surface and the second surface comprises the following steps: forming an intrinsic silicon layer on the second surface; A plurality of second holes are formed on the surface of the intrinsic silicon layer away from the silicon substrate by a second laser drilling.
13. The method for preparing a photovoltaic cell according to claim 12, wherein: In the second laser drilling: a Bessel beam is used for the second laser drilling; the energy of a single laser pulse is 0.01 μJ to 0.5 μJ; and the diameter of the light spot is 50 nm to 300 nm.
14. The method for preparing a photovoltaic cell according to claim 12, wherein: In the second laser opening, the pulse width of the laser is 50 fs to 500 fs; the wavelength of the laser is 250 nm to 350 nm; and the pulse frequency is 1 KHz to 300 KHz.
15. A photovoltaic module, characterized in that: include: cover; At least one cell string, the cell string comprising the photovoltaic cell according to any one of claims 1 to 7, or a photovoltaic cell prepared by the method for preparing a photovoltaic cell according to any one of claims 8 to 14; as well as An encapsulation layer is located between the cover plate and the battery string, and the cover plate is connected to the battery string through the encapsulation layer.
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