Encoding apparatus, system, method for transmission identifier

Abstract

The embodiment of the disclosure provides a kind of encoding device, system, method of transmission identifier, the embodiment of the disclosure is applied to the data transmission between the master port and slave port of AXI4 protocol, master port connects single external host, slave port connects single external slave machine, device includes: lookup table module, for storing the mapping information of M-bit transmission identifier of master port and N-bit transmission identifier of slave port, dynamically update the allocation and release of transmission identifier;Mapping module is used for according to mapping information, the mapping processing of M-bit transmission identifier and N-bit transmission identifier between master port and slave port, M and N are natural numbers.The embodiment of the disclosure solves the problems of low transmission identifier management efficiency, high critical path delay, large storage overhead and other problems existing when traditional AXI4 bus is accessed by multiple master devices concurrently, without changing the premise of AXI4 protocol standard, significantly improve the bus performance, applicable to the chip design of strict low delay, high bandwidth requirement.

Description

TECHNICAL FIELD

[0001] Embodiments of the present disclosure relate to the technical field of system on chip, and particularly relate to a coding device, system and method for transmission identifier. BACKGROUND

[0002] AMBA AXI4 protocol is a high-performance on-chip bus standard, which is widely used in SoC design to connect modules such as processors, memory controllers, DMA, accelerators, etc. In the AXI4 protocol, the transaction transmission identifier (ID) is used to identify different transmission transactions to ensure that transactions with the same transmission identifier are completed in order, and transactions with different transmission identifiers can be executed out of order. However, as the complexity of SoC increases, concurrent access of multiple master devices leads to transmission identifier management becoming a performance bottleneck, especially in high-bandwidth, low-latency applications, the traditional transmission identifier encoding method may not meet the demand. SUMMARY

[0003] Therefore, the present disclosure provides a coding device, system and method for transmission identifier to at least solve or alleviate the above problems.

[0004] According to a first aspect of the present disclosure, a coding device for transmission identifier is provided, which is applied to data transmission between a master port and a slave port of AXI4 protocol, the master port is connected to a single external host, and the slave port is connected to a single external slave. The device comprises: a lookup table module for storing mapping information of M-bit transmission identifiers of the master port and N-bit transmission identifiers of the slave port, and dynamically updating allocation and release of the transmission identifiers; and a mapping module for performing mapping processing of the M-bit transmission identifiers and the N-bit transmission identifiers between the master port and the slave port according to the mapping information, wherein M and N are natural numbers.

[0005] According to a second aspect of the present disclosure, a coding system for transmission identifier is provided, which comprises: the coding device of the first aspect, and a master port and a slave port applied to data transmission of AXI4 protocol, the master port is connected to a single external host, and the slave port is connected to a single external slave.

[0006] According to a third aspect of the present disclosure, a coding method for transmission identifier is provided, which comprises: storing mapping information of M-bit transmission identifiers of a master port and N-bit transmission identifiers of a slave port, and dynamically updating allocation and release of the transmission identifiers; and performing mapping processing of the M-bit transmission identifiers and the N-bit transmission identifiers between the master port and the slave port according to the mapping information, wherein M and N are natural numbers.

[0007] According to the encoding scheme of the transmission identifier provided by the embodiment of the present disclosure, the mapping information of the M-bit transmission identifier of the master port and the N-bit transmission identifier of the slave port is stored, and the allocation and release of the transmission identifier are dynamically updated. According to the mapping information, the encoding processing of the M-bit transmission identifier and the N-bit transmission identifier between the master port and the slave port is performed, and M and N are natural numbers. The embodiment of the present disclosure solves the problems of low transmission identifier management efficiency, high critical path delay, and large storage overhead of the conventional AXI4 bus in the concurrent access of multiple master devices, significantly improves the bus performance without changing the AXI4 protocol standard, and is suitable for chip design with strict requirements for low delay and high bandwidth. BRIEF DESCRIPTION OF DRAWINGS

[0008] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or the prior art, the drawings needed to be used in the embodiments or prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments described in the present disclosure, and other drawings can also be obtained by those skilled in the art according to these drawings.

[0009] Figure 1 is a schematic diagram of a transmission identifier encoding device according to an embodiment of the present disclosure;

[0010] Figure 2 is a schematic diagram of a transmission identifier encoding device according to another embodiment of the present disclosure;

[0011] Figure 3 is a flowchart of the processing flow of the first mapping unit of a transmission identifier encoding device according to another embodiment of the present disclosure;

[0012] Figure 4 is a flowchart of the processing flow of the second mapping unit of a transmission identifier encoding device according to another embodiment of the present disclosure;

[0013] Figure 5 is a schematic diagram of a lookup table module of a transmission identifier encoding device according to another embodiment of the present disclosure;

[0014] Figure 6 is a schematic diagram of a transmission identifier encoding system according to another embodiment of the present disclosure;

[0015] Figure 7 is a flowchart of a transmission identifier encoding method according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0016] Embodiments of the present disclosure will be described below in greater detail with reference to the accompanying drawings. While certain embodiments of the present disclosure are shown in the drawings, it is understood that the present disclosure can be embodied in various forms and should not be construed as being limited to the embodiments set forth herein, but rather, the embodiments are provided so as to more completely and thoroughly understand the present disclosure. It is understood that the drawings and embodiments of the present disclosure are for exemplary purposes only and are not intended to limit the scope of protection of the present disclosure.

[0017] It should be noted that the titles of any sections / sub-sections provided herein are not limiting. Various embodiments are described throughout this document and any type of embodiment can be included under any section / sub-section. Furthermore, embodiments described in any section / sub-section can be combined with any other embodiments described in the same section / sub-section and / or different section / sub-section in any manner.

[0018] In the description of embodiments of the present disclosure, the term "includes" and its conjugates are open-ended, meaning "including but not limited to". The term "based on" is intended to mean "based, at least in part, on" which is not to be construed in an exclusive or exhaustive sense. The term "one embodiment" or "an embodiment" is intended to mean "at least one embodiment". The term "some embodiments" is intended to mean "at least some embodiments". Other explicitly and implicitly recited definitions can be found in the detailed description section. The terms "first", "second", etc. can refer to different or the same objects. Other explicit and implicit recited definitions can be found in the detailed description section.

[0019] Data of users, acquisition and / or use of data, etc. can be involved in embodiments of the present disclosure. These aspects all comply with corresponding laws and regulations and relevant provisions. In embodiments of the present disclosure, all collection, acquisition, processing, processing, forwarding, use, etc. of data are performed on the premise that the user is aware of and confirms. Accordingly, when implementing embodiments of the present disclosure, the type of data or information that can be involved, the use range, the use scenario, etc. should be notified to the user and the authorization of the user should be obtained in a proper manner according to relevant laws and regulations. The specific notification and / or authorization manner can vary according to the actual situation and application scenario, and the scope of the present disclosure is not limited in this aspect.

[0020] In the present specification and embodiments, if personal information processing is involved, it will be processed on the premise of legality (for example, obtaining the consent of the subject of personal information, or being necessary for the performance of a contract, etc.), and only within the prescribed or agreed range. Users refuse to process personal information other than the necessary information required for basic functions, which will not affect the user's use of basic functions.

[0021] First, some of the nouns or terms that appear in the process of describing embodiments of the present disclosure are applicable to the following explanations.

[0022] Primary Port: The port of the Master, which is the side that initiates the data transfer request, such as the processor (CPU), DMA controller, etc. The Master sends addresses, control signals, and write data to the Slave through the Primary Port, or receives read data from the Slave.

[0023] Secondary Port: The port of the Slave, which is the side that responds to the Master's request, such as the memory controller, peripherals, etc. The Slave receives the Master's addresses, control signals, and write data through the Secondary Port, and sends read data and response signals to the Master.

[0024] Transaction ID: A unique identifier assigned by the Master to each transaction. It is used to distinguish different transactions and ensure that the response of each transaction can be correctly returned to the Master.

[0025] The main features of the conventional AXI4 transaction ID encoding method include:

[0026] Transaction ID bit width expansion: The Master generates a transaction ID with a narrow bit width (e.g., 2-4 bits), and the Interconnect expands the transaction ID bit width (e.g., 6-8 bits) during transmission to support more concurrent transactions.

[0027] Address decoding in the Interconnect: In the traditional architecture, the address decoding logic is located in the Interconnect Matrix, which is used to select the target Slave.

[0028] In-order dependency cache: Transactions with the same transaction ID must be returned in order, and transactions with different transaction IDs can be returned out of order, but the cache mechanism in the Interconnect is needed to manage the order.

[0029] However, the conventional AXI4 transaction ID encoding method has the following defects:

[0030] Low efficiency of transaction ID expansion: The bit width of the transaction ID is expanded step by step (e.g., 2 bits from the Master to 6 bits from the Interconnect), which leads to complex transaction ID management and may introduce redundant encoding.

[0031] Lack of flexible transaction ID encoding strategy: The Master number and Slave address mapping are not fully utilized for optimization, resulting in low efficiency of transaction ID encoding.

[0032] To overcome the above-mentioned defects, the embodiment of the disclosure stores the mapping information of the M-bit transmission identifier of the master port and the N-bit transmission identifier of the slave port through the lookup table module 101, and the lookup table module 101 dynamically updates the allocation and release of the transmission identifier. The mapping module 102 encodes the M-bit transmission identifier and the N-bit transmission identifier between the master port and the slave port according to the mapping information. The embodiment of the disclosure solves the problems of low transmission identifier management efficiency, high critical path delay, and large storage overhead of the conventional AXI4 bus in the concurrent access of multiple master devices. Without changing the AXI4 protocol standard, the bus performance is significantly improved, and it is suitable for chip design with strict requirements for low delay and high bandwidth.

[0033] The encoding scheme of the transmission identifier provided by the embodiment of the disclosure is described in detail below with reference to the accompanying drawings.

[0034] Encoding apparatus

[0035] Referring to Figure 1 , the embodiment of the disclosure provides an encoding device of a transmission identifier, which is applied to data transmission between a master port and a slave port of an AXI4 protocol. The master port is connected to a single external host, and the slave port is connected to a single external slave.

[0036] The device comprises:

[0037] The lookup table module 101 is configured to store mapping information of an M-bit transmission identifier of a master port and an N-bit transmission identifier of a slave port, and dynamically update allocation and release of the transmission identifier.

[0038] The mapping module 102 is configured to perform mapping processing of the M-bit transmission identifier and the N-bit transmission identifier between the master port and the slave port according to the mapping information, and M and N are natural numbers.

[0039] The embodiment of the disclosure reconstructs the transmission identifier mapping logic through the lookup table module 101 and the mapping module 102, solves the problem of resource waste caused by transmission identifier bit width redundancy in a multi-device system, optimizes the bus resource allocation and data transmission efficiency under the multi-master multi-slave architecture, and is suitable for bus performance improvement of artificial intelligence chips, multi-core processors, and high-bandwidth storage systems.

[0040] In some specific implementations of the embodiment of the disclosure, referring to Figure 2 , the mapping module 102 comprises:

[0041] The first mapping unit 1021 is configured to map the M-bit transmission identifier to the N-bit transmission identifier in the read address channel or the write address channel, and attach the mapped N-bit transmission identifier to the payload for sending to the slave port.

[0042] The second mapping unit 1022 is configured to map the N-bit transmission identifier back to the corresponding M-bit transmission identifier in the read response channel or the write response channel, and attach the mapped M-bit transmission identifier to the payload for sending to the host port.

[0043] Specifically, referring to Figure 3 The processing flow of the first mapping unit 1021 in the embodiment of the present disclosure includes:

[0044] In step 301, the payload with the M-bit transmission identifier is received from the host through the host port, and it is determined whether the M-bit transmission identifier has been allocated with the corresponding N-bit transmission identifier by querying the mapping information of the lookup table module 101.

[0045] In step 302, if not, an unallocated N-bit transmission identifier is selected, and the M-bit transmission identifier is allocated to the N-bit transmission identifier.

[0046] In step 303, if yes, the above step is skipped, the allocated N-bit transmission identifier is attached to the payload, and the payload is transmitted to the slave through the slave port.

[0047] Specifically, referring to Figure 4 The processing flow of the second mapping unit 1022 in the embodiment of the present disclosure includes:

[0048] In step 401, the payload with the N-bit transmission identifier is received from the slave through the slave port, and it is determined whether the N-bit transmission identifier has been allocated with the corresponding M-bit transmission identifier by querying the mapping information of the lookup table module 101.

[0049] In step 402, the allocated M-bit transmission identifier is attached to the payload, and the payload is transmitted to the host through the host port.

[0050] In some specific implementations of the embodiment of the present disclosure, the specific case of the lookup table module 101 storing the mapping information of the M-bit transmission identifier and the N-bit transmission identifier of the slave port is as follows:

[0051] When M is greater than N, the lookup table module 101 supports the following allocation mode:

[0052] Dynamic allocation mode, dynamically allocating and releasing the N-bit transmission identifier corresponding to the M-bit transmission identifier during the running process;

[0053] Hash allocation mode, determining the N-bit transmission identifier corresponding to the M-bit transmission identifier through exclusive or operation.

[0054] Specifically, if the lookup table module 101 supports the dynamic allocation mode, the lookup table module 101 is configured to:

[0055] The index bit width is set as IDXW, the low IDXW bits of the N-bit transmission identifier are taken as the index, and the storage structure of the mapping information is divided into 2 IDXW groups.

[0056] Each group includes a plurality of storage rows, and each storage row stores the mapping relationship between the M-bit transmission identifier and the N-bit transmission identifier and the allocation state of the N-bit transmission identifier.

[0057] In the embodiment of the present disclosure, the index bit width is set as IDXW, and the storage structure of the mapping information is divided into 2 IDXW groups, and each storage row stores the encoding relationship between the M-bit transmission identifier and the N-bit transmission identifier and the allocation state thereof, so that the mapping relationship and the allocation state are quickly found through the index structure, the lookup delay is reduced, and the speed and efficiency of transaction processing are improved.

[0058] The storage row includes:

[0059] A first field that stores the transmission identifier remaining after the low IDXW bits of the N-bit transmission identifier are removed;

[0060] A second field that stores the M-bit transmission identifier corresponding to the N-bit transmission identifier in the mapping information after the low IDXW bits are removed;

[0061] A third field that stores the allocation state (ostd) of the N-bit transmission identifier of the storage row in the mapping information.

[0062] In the embodiment of the present disclosure, the first field only stores the transmission identifier remaining after the low IDXW bits are removed (the low IDXW bits can be obtained through the index); the second field only stores the M-bit transmission identifier after the low IDXW bits are removed, so that the occupation of the storage resource is reduced.

[0063] If the third field is equal to a first value, it indicates that the N-bit transmission identifier of the storage row is not allocated or has been released; if the third field is greater than the first value, it indicates that the N-bit transmission identifier of the storage row has been allocated to the M-bit transmission identifier.

[0064] For example, the first value can be set as 0.

[0065] In the embodiment of the present disclosure, the allocation state of the N-bit transmission identifier of the storage row in the mapping information is obtained through the third field, so that the management of whether the N-bit transmission identifier is allocated or released can be realized.

[0066] In some specific implementations of the embodiment of the present disclosure, referring to Figure 5 , the lookup table module 101 includes:

[0067] The allocation unit 1011 is configured to receive an M-bit transmission identifier from the host port and select an N-bit transmission identifier which has not been allocated, store the transmission identifier obtained by removing low IDXW bits of the M-bit transmission identifier in the second field of the storage row corresponding to the N-bit transmission identifier, and set the third field of the storage row from the first value to a value greater than the first value.

[0068] For example, the lookup table module 101 selects an N-bit transmission identifier which has not been allocated from top to bottom in the order of the storage rows.

[0069] The release unit 1012 is configured to receive an N-bit transmission identifier from the slave port, set the third field of the storage row in which the N-bit transmission identifier is located from a value greater than the first value to the first value, and update the transmission identifier stored in the second field of the storage row obtained by removing low IDXW bits of the M-bit transmission identifier until the N-bit transmission identifier is allocated again.

[0070] The update unit 1013 is configured to update the third field from the first value to a value greater than the first value or from a value greater than the first value to the first value.

[0071] The following describes the allocation, release and update of the dynamic update of the transmission identifier by the lookup table module 101 in the embodiments of the present disclosure in detail through flow operations.

[0072] For example, the first value is set to 0 in the embodiments of the present disclosure.

[0073] For each storage row (i.e. each N-bit transmission identifier), there are the following three operations:

[0074] 1) M-bit transmission identifier allocation corresponding to the N-bit transmission identifier.

[0075] When receiving an M-bit transmission identifier which has not been allocated from the host port, the lookup table module 101 selects the first N-bit transmission identifier which has not been allocated from top to bottom.

[0076] The index of the storage row is the low IDXW bits of the N-bit transmission identifier, and the transmission identifier obtained by removing the low IDXW bits of the N-bit transmission identifier is stored in the first field of the storage row.

[0077] The M-bit transmission identifier obtained by removing the low IDXW bits is filled in the second field of the storage row, and the allocation state of the third field is changed from 0 to a value greater than 1.

[0078] 2) Release of the N-bit transmission identifier.

[0079] When receiving an N-bit transmission identifier from the slave port and the third field of the storage row of the N-bit transmission identifier is equal to 1, the lookup table module 101 changes the allocation state of the third field from 1 to 0.

[0080] The lookup table module 101 does not update the transmission identifier of M bits stored in the second field of the storage row after removing the low IDXW bits, until the transmission identifier of M bits stored in the second field of the storage row is updated after the storage row is allocated again.

[0081] 3) Update of the N-bit transmission identifier.

[0082] The third field is operated by 1 or -1.

[0083] For example, when a transaction is completed, the third field is -1; when a new transaction uses the mapping, the third field is +1.

[0084] The embodiments of the present disclosure can support multiple concurrent transactions by mapping and managing the transmission identifier, improve system performance, and effectively track the status of each transaction through the third field count, to ensure the correct completion of the transaction.

[0085] In some specific implementations of the embodiments of the present disclosure, if the lookup table module supports the hash allocation mode, the lookup table module 101 sets the third field corresponding to the N-bit transmission identifier that is not allocated or has been released to be equal to the first value, and sets the third field of the storage row where the corresponding N-bit transmission identifier is located from the first value to be greater than the first value after determining the N-bit transmission identifier corresponding to the M-bit transmission identifier through the XOR operation.

[0086] Encoding system for transmission identifiers

[0087] Referring to Figure 6 The embodiments of the present disclosure also provide a transmission identifier encoding system, which comprises the encoding device 601 of any of the above and a master port 602 and a slave port 603 for data transmission in the AXI4 protocol, wherein the master port is connected to a single external host, and the slave port is connected to a single external slave.

[0088] According to the transmission identifier encoding scheme provided by the embodiments of the present disclosure, the mapping information of the M-bit transmission identifier of the master port and the N-bit transmission identifier of the slave port is stored, and the allocation and release of the transmission identifier is dynamically updated. According to the mapping information, the embodiments of the present disclosure perform the encoding processing of the M-bit transmission identifier and the N-bit transmission identifier between the master port and the slave port, and M and N are natural numbers. The embodiments of the present disclosure solve the problems of low transmission identifier management efficiency, high critical path delay, and large storage overhead of the conventional AXI4 bus in the concurrent access of multiple master devices, significantly improve the bus performance without changing the AXI4 protocol standard, and are suitable for chip design with strict requirements for low delay and high bandwidth.

[0089] Method for encoding transmission identifiers

[0090] Figure 7 A flow chart of a method for encoding a transmission identifier is shown, which can be performed by the encoding apparatus in the above-mentioned embodiments. As shown in the figure, the method comprises the following steps: Figure 7

[0091] In step 701, mapping information of M-bit transmission identifiers of master ports and N-bit transmission identifiers of slave ports is stored, and allocation and release of the transmission identifiers are dynamically updated.

[0092] In step 702, according to the mapping information, M-bit transmission identifiers and N-bit transmission identifiers are mapped between master ports and slave ports, M and N being natural numbers.

[0093] According to the encoding scheme of the transmission identifier provided by the embodiments of the present disclosure, mapping information of M-bit transmission identifiers of master ports and N-bit transmission identifiers of slave ports is stored, and allocation and release of the transmission identifiers are dynamically updated. According to the mapping information, M-bit transmission identifiers and N-bit transmission identifiers are encoded between master ports and slave ports, M and N being natural numbers. The embodiments of the present disclosure solve the problems of low transmission identifier management efficiency, high critical path delay, and large storage overhead of the conventional AXI4 bus in multi-master concurrent access, significantly improve the bus performance without changing the AXI4 protocol standard, and are suitable for chip design with strict requirements for low delay and high bandwidth.

[0094] It should be understood that the details of the timestamp synchronization method have been described in detail in the above-mentioned embodiments of the timestamp synchronization apparatus, with reference to the structural schematic diagram, and the specific process can be referred to the description in the above-mentioned embodiments of the timestamp synchronization apparatus, which will not be described here.

[0095] It should be understood that each of the embodiments in the specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment mainly describes the difference from other embodiments. Especially, for the method embodiments, since they are basically similar to the methods described in the device and system embodiments, the description is relatively simple, and the relevant parts can be referred to the description of other embodiments.

[0096] It should be understood that the above describes specific embodiments of the present disclosure. Other embodiments are within the scope of the claims. In some cases, the actions or steps recited in the claims can be performed in an order different than the order in which they are recited, and still achieve desirable results. In addition, the processes depicted in the figures do not necessarily require the particular order shown, or sequential order, to achieve the desired results. In some implementations, multitasking and parallel processing can be advantageous. ​

[0097] It should be understood that an element described or shown herein as being part of one embodiment can be combined with another embodiment to form yet another embodiment. It should also be understood that, unless clearly indicated to the contrary, number designations such as "first," "second," and the like can be modified in any permissible way. For example, a "first" element can also be termed a "second" element or a "third" element. Such changes and stylistic variations of this patent document, as well as others, can be made without changing its underlying essence.

[0098] It is also to be understood that the terminology and phraseology employed herein are for the purpose of description and the specification will be respected as but one possible embodiment. The use of such terms and expressions should not be taken to exclude any equivalent or analogous elements or limit the scope of the claims to functions described. It is recognized that modifications can be made in the various elements and their arrangement without departing from the spirit and scope of the claims. Other modifications, changes and substitutions are also possible. Accordingly, the claims are not to be regarded as limited to the precise structure described and shown as these can vary in accordance with the practical requirements of the particular case at hand.

Claims

1. An encoding device of a transmission identifier, applied to data transmission between a master port and a slave port of an AXI4 protocol, the master port being connected to a single external host, and the slave port being connected to a single external slave, the device comprising: a lookup table module, configured to store mapping information of an M-bit transmission identifier of the master port and an N-bit transmission identifier of the slave port, and dynamically update allocation and release of the transmission identifier; the lookup table module comprising: a plurality of storage rows, each of the storage rows comprising a third field configured to store an allocation state of the N-bit transmission identifier, and an update unit configured to count the third field, when a transaction is completed, the third field being decremented by 1; when a new transaction uses the mapping, the third field being incremented by 1; and a mapping module, configured to perform mapping processing of the M-bit transmission identifier and the N-bit transmission identifier between the master port and the slave port according to the mapping information, the M and N being natural numbers. The mapping module comprises: a first mapping unit, configured to map the M-bit transmission identifier into the N-bit transmission identifier in a read address channel or a write address channel, and attach the mapped N-bit transmission identifier to a payload to send to the slave port; and a second mapping unit, configured to map the N-bit transmission identifier back to the corresponding M-bit transmission identifier in a read response channel or a write response channel, and attach the mapped M-bit transmission identifier to the payload to send to the master port. The first mapping unit is specifically configured to: if the N-bit transmission identifier corresponding to the M-bit transmission identifier is stored in the lookup table module, attach the corresponding N-bit transmission identifier to the payload to send to the slave port; and if the N-bit transmission identifier corresponding to the M-bit transmission identifier is not stored in the lookup table module, allocate an unallocated N-bit transmission identifier to the M-bit transmission identifier, and attach the allocated N-bit transmission identifier to the payload to send to the slave port. The second mapping unit is specifically configured to: query the M-bit transmission identifier corresponding to the N-bit transmission identifier stored in the lookup table module, and attach the corresponding M-bit transmission identifier to the payload to send to the master port. When the M is greater than the N, the lookup table module supports one of the following allocation modes: a dynamic allocation mode, dynamically allocating and releasing the N-bit transmission identifier corresponding to the M-bit transmission identifier during running; and a hash allocation mode, determining the N-bit transmission identifier corresponding to the M-bit transmission identifier through exclusive or operation.

2. The apparatus of claim 1, wherein, If the lookup table module supports the dynamic allocation mode, the lookup table module is configured to: the storage row further comprises: a first field, configured to store a transmission identifier remaining after removing IDXW bits of the N-bit transmission identifier; and a second field, configured to store the M-bit transmission identifier corresponding to the N-bit transmission identifier in the mapping information after removing IDXW bits. ​ ​ 3. The apparatus of claim 2, wherein, ​ ​ ​ ​ ​ 4. The apparatus of any one of claims 1-3, wherein, ​ ​ ​ 5. The apparatus of claim 4, wherein, ​ The index bit width is set as IDXW, the low IDXW bits of the N-bit transmission identifier are taken as an index, and the storage structure of the mapping information is divided into 2 IDXW groups; each group includes a plurality of storage rows, and each storage row stores a mapping relationship between the M-bit transmission identifier and the N-bit transmission identifier.

6. The apparatus of claim 5, wherein, ​ ​ ​ 7. The apparatus of claim 6, wherein, If the third field is equal to the first value, it indicates that the N-bit transmission identifier of the storage row is not allocated or has been released; if the third field is greater than the first value, it indicates that the N-bit transmission identifier of the storage row has been allocated to the M-bit transmission identifier.

8. The apparatus of claim 7, wherein, The lookup table module further comprises: an allocation unit configured to receive the M-bit transmission identifier from the master port and select an unallocated N-bit transmission identifier, store the transmission identifier obtained by removing low IDXW bits of the M-bit transmission identifier in the second field of the storage row corresponding to the N-bit transmission identifier, and set the third field of the storage row from the first value to a value greater than the first value; a release unit configured to receive the N-bit transmission identifier from the slave port, set the third field of the storage row in which the N-bit transmission identifier is located from a value greater than the first value to the first value, and update the transmission identifier stored in the second field of the storage row until the N-bit transmission identifier is allocated again; the update unit sets the third field from the first value to a value greater than the first value or from a value greater than the first value to the first value.

9. The apparatus of claim 4, wherein, If the lookup table module supports the hash allocation mode, the lookup table module sets the third field corresponding to the unallocated or released N-bit transmission identifier to be equal to the first value, determines the corresponding N-bit transmission identifier of the M-bit transmission identifier through exclusive-OR operation, and sets the third field of the storage row in which the corresponding N-bit transmission identifier is located from the first value to a value greater than the first value.

10. An encoding system for transmitting an identifier, comprising: The device of any one of claims 1-9, and the master port and the slave port applied to AXI4 protocol for data transmission, the master port being connected to a single external host, and the slave port being connected to a single external slave.

11. A method for encoding transmission identifiers, the method comprising: storing mapping information of M-bit transmission identifiers of a master port and N-bit transmission identifiers of a slave port, and dynamically updating allocation and release of the transmission identifiers; wherein the mapping information is stored in a plurality of storage rows, each of the storage rows comprising a third field for storing an allocation state of the N-bit transmission identifier; and an update unit is configured to count the third field, the third field being decremented by 1 when a transaction is completed, and the third field being incremented by 1 when a new transaction uses the mapping; performing mapping processing of the M-bit transmission identifiers and the N-bit transmission identifiers between the master port and the slave port according to the mapping information, the M and N being natural numbers.

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