Closed loop control method and system for power driving and protection
By constructing a voltage feedback circuit and dynamic impedance matching using a high-speed operational amplifier, and monitoring load current and temperature in real time, the output distortion and stability problems of traditional power amplifier systems under load fluctuations are solved, achieving rapid protection and signal optimization.
Patent Information
- Application Number
- CN202511142332.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-15
- Publication Date
- 2026-01-23
- Estimated Expiration
- 2045-08-15
AI Technical Summary
Traditional power amplifier systems face challenges in output distortion and stability under dynamic load impedance fluctuations. Mechanical matching mechanisms have slow response times, comparator-based overcurrent protection circuits have detection delays, and the impact of temperature on the gain link is not considered, leading to easy failure of power transistors.
A voltage feedback circuit is constructed using a high-speed operational amplifier to monitor the load current in real time and trigger short-circuit protection. Inrush current is limited by soft-start control, dynamic impedance matching is performed by obtaining the phase information of the load reflection coefficient, the power transistor temperature is monitored and the resistance value of the feedback network is dynamically adjusted, and the VSWR and temperature compensation are optimized.
It achieves short-circuit protection with millisecond-level response, reduces the risk of power transistor burnout due to overload, avoids power supply surge damage, optimizes VSWR and output signal stability, extends power transistor lifespan, and solves signal reflection problems over a wide impedance range.
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Figure CN120750316B_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the technical field of power electronics, specifically relating to a closed-loop control method and system for power drive and protection. Background Technology
[0002] Power amplifier systems face challenges in output distortion and stability under dynamic load impedance fluctuations (e.g., 50Ω-10kΩ). Traditional solutions employ fixed impedance matching networks combined with discrete current-limiting protection circuits, which suffer from three major technical bottlenecks: ① The response time of mechanical matching mechanisms generally exceeds 100ms, making them unsuitable for high-frequency load changes; ② Overcurrent protection circuits based on comparators have a detection delay of 5-10µs, which can cause the power transistor to exceed its safe operating range and fail when a short circuit occurs in the high-speed operational amplifier of the closed-loop power amplifier; ③ The effect of temperature on the gain link is not considered, and the temperature coefficient of ±2000ppm / ℃ for the power transistor's β value will cause output amplitude fluctuations, exacerbating nonlinear distortion.
[0003] In recent years, wide-bandgap semiconductor devices have become widely used. Although SiC / GaN power transistors possess high-frequency characteristics, they are more sensitive to reflected power caused by impedance mismatch. Experiments show that when the standing wave ratio (VSWR) exceeds 1.5:1, the VSWR effect can cause the junction temperature to rise sharply by more than 30°C, significantly reducing device lifetime.
[0004] Therefore, there is an urgent need to develop a new type of drive system that integrates dynamic impedance matching, fast power protection and temperature compensation in order to overcome the performance bottleneck under load fluctuation scenarios. Summary of the Invention
[0005] This application proposes a closed-loop control method and system for power drive and protection to address the deficiencies of the prior art.
[0006] According to a first aspect of the embodiments of this application, a closed-loop control method for power drive and protection is provided, comprising:
[0007] A voltage feedback circuit is constructed using a high-speed operational amplifier, and a closed-loop gain structure is formed through the feedback network of the voltage feedback circuit.
[0008] The load current at the output of the voltage feedback circuit is monitored in real time. When the load current exceeds a first set threshold, a protection mechanism is triggered to shut down the output stage to perform short-circuit protection.
[0009] Surge suppression is performed by limiting the power-on inrush current through a soft-start control circuit.
[0010] The phase information of the load reflection coefficient is obtained, and the inductor / capacitor combination of the variable dynamic impedance matching network is selected by looking up the phase information in a table. The inductor / capacitor parameters are switched by relays to optimize the transmission standing wave ratio between the power amplifier output and the load.
[0011] Monitor the temperature of the power transistor heatsink and dynamically adjust the resistance value of the feedback network based on the temperature deviation to perform over-temperature protection;
[0012] The short-circuit protection, over-temperature protection, and surge suppression are executed in a coordinated manner according to priority.
[0013] In some embodiments, forming a closed-loop gain structure through the feedback network of the voltage feedback circuit includes:
[0014] The feedback network is constructed based on a closed-loop gain structure with deep negative feedback, using metal film resistors and precision resistors.
[0015] The closed-loop gain is calculated using the following formula:
[0016]
[0017] in, This represents the closed-loop gain value. This indicates the resistance value of the metal film resistor. This indicates the resistance value of the precision resistor.
[0018] In some implementations, the real-time monitoring of the load current at the output of the voltage feedback circuit, and triggering a protection mechanism to shut down the output stage when the load current exceeds a first set threshold to perform short-circuit protection, includes:
[0019] The load current is monitored in real time by a bidirectional current sensor, and the load current flows through a sampling resistor to generate a differential voltage;
[0020] The differential voltage is amplified by the internal amplifier of the bidirectional current sensor and then output to the comparator;
[0021] When the amplified differential voltage exceeds the threshold voltage of the comparator, the output switching signal triggers a microcontroller interrupt.
[0022] After the microcontroller responds to the interrupt, it shuts down the output stage of the amplifier within a preset time through the pulse width modulation controller to perform short-circuit protection.
[0023] In some implementations, the differential voltage is calculated using the following formula:
[0024]
[0025] in, This represents the differential voltage. This indicates the load current. This indicates the resistance value of the sampling resistor.
[0026] In some implementations, limiting the power-on inrush current via a soft-start control circuit to perform surge suppression includes:
[0027] The source current of an external field-effect transistor is detected by a hot-swap controller;
[0028] When powered on, the internal current source of the hot-swap controller charges the capacitor of the current sensing pin to form a ramp current, and controls the gate voltage of the field-effect transistor to gradually rise through the ramp current to generate the surge current.
[0029] Limit the surge current to a specific percentage of the rated value;
[0030] When an overcurrent fault is detected, the hot-swap controller triggers a hiccup mode, which restarts the power link every preset period until the fault is cleared.
[0031] If no overcurrent fault is detected, maintain the current operating state.
[0032] In some implementations, the phase information of the load reflection coefficient is the phase value of the load reflection coefficient, and the phase information lookup table is a preset phase interval mapping table. The steps of obtaining the phase information of the load reflection coefficient, selecting the inductor / capacitor combination of the variable dynamic impedance matching network according to the phase information lookup table, and switching the inductor / capacitor parameters via relays to optimize the transmission standing wave ratio (VSWR) between the power amplifier output and the load include:
[0033] The reflected signal between the output of the power amplifier and the load is acquired using a dual directional coupler.
[0034] The phase value of the reflection coefficient of the reflected signal is extracted using a phase detector;
[0035] Based on the phase value, the corresponding inductor / capacitor combination number of the variable dynamic impedance matching network is matched in the preset phase interval mapping table. The phase interval mapping table is pre-calibrated by a vector network analyzer and is used to store the mapping relationship between the phase interval and the inductor / capacitor combination of the variable dynamic impedance matching network.
[0036] The parameters of the variable dynamic impedance matching network are switched independently by at least four sets of relays, wherein the first set of relays is used to control the on and off of the main inductor, the second and third sets of relays are used to control the on and off of the two sets of parallel capacitors respectively, and the fourth set of relays is used to control the on and off of the series inductor.
[0037] Within the response bandwidth, optimize the transmission standing wave ratio (VSWR) between the power amplifier output and the load to below a specific value.
[0038] In some implementations, monitoring the temperature of the power transistor heatsink and dynamically adjusting the resistance value of the feedback network based on the temperature deviation to perform over-temperature protection includes:
[0039] A platinum resistance temperature sensor is mounted on the heat sink of the power transistor, and three sets of wires are electrically connected to the platinum resistance temperature sensor through a bridge structure to eliminate lead resistance error. The resistance of the first set of wires is included in the high-side bias circuit, the resistance of the second set of wires is isolated by the high input impedance of the instrumentation amplifier, and the resistance of the third set of wires is self-compensated by the bridge.
[0040] Based on the linear relationship between the resistance of the platinum resistance temperature sensor and the operating temperature, the real-time temperature is converted into a voltage signal.
[0041] The operating temperature range is divided into preset intervals, and the compensation coefficient is dynamically calculated using a linear interpolation algorithm according to the interval where the real-time temperature is located.
[0042] The resistance value of the feedback network is adjusted in real time by a digital potentiometer to compensate for the gain caused by temperature deviation.
[0043] When the temperature deviation exceeds the second set threshold, the heat dissipation device is activated and the output power is reduced.
[0044] In some implementations, the gain for compensating for temperature deviations is calculated using the following formula:
[0045]
[0046] in, Indicates real-time temperature The corresponding actual gain, Indicates reference temperature The corresponding initial gain, This represents the compensation coefficient.
[0047] In some implementations, the priority level is such that the short-circuit protection priority is higher than the over-temperature protection priority, and the over-temperature protection priority is higher than the surge suppression priority.
[0048] According to a second aspect of this application, an adaptive power drive and protection system is provided, comprising:
[0049] The feedback circuit construction module is used to construct a voltage feedback circuit using a high-speed operational amplifier, and to form a closed-loop gain structure through the feedback network of the voltage feedback circuit.
[0050] The short-circuit protection processing module is used to monitor the load current at the output terminal of the voltage feedback circuit in real time. When the load current exceeds a first set threshold, the protection mechanism is triggered to shut down the output stage to perform short-circuit protection.
[0051] The surge suppression processing module is used to limit the power-on surge current through a soft-start control circuit in order to perform surge suppression;
[0052] The VSWR optimization module is used to obtain the phase information of the load reflection coefficient, select the inductor / capacitor combination of the variable dynamic impedance matching network according to the phase information, and switch the inductor / capacitor parameters through relays to optimize the transmission VSWR between the power amplifier output and the load.
[0053] A temperature protection processing module is used to monitor the temperature of the power transistor heatsink and dynamically adjust the resistance value of the feedback network based on the temperature deviation to perform over-temperature protection.
[0054] The collaborative execution control module is used to perform collaborative control of the short-circuit protection, the over-temperature protection, and the surge suppression according to priority.
[0055] The beneficial effects of the closed-loop control method and system for power drive and protection in the embodiments of this application include at least the following:
[0056] The feedback network of the voltage feedback circuit in this application stabilizes the power amplifier gain, effectively suppressing nonlinear distortion of the audio signal and forming a closed-loop gain structure. Combined with a current monitoring mechanism, it provides a hardware foundation for short-circuit protection, reducing the risk of power transistor burnout due to overload. By executing the fast shutdown output stage for short-circuit protection, it can respond in milliseconds when the load current exceeds the threshold, preventing power device breakdown. Through coordinated priority control, other operations can be interrupted with the highest priority, ensuring the core safety of the system. Soft-start control of the power-on current based on surge suppression avoids power supply surges damaging input stage devices. The mutually exclusive layout with short-circuit protection provides independent protection for vulnerable links in the power supply chain, reducing false triggering interference. Dynamic impedance matching... The phase detection and lookup table switching in the optimization process can match the variable dynamic impedance matching parameters in real time based on the reflected phase, reducing the VSWR to close to 1:1; direct relay control establishes a mechanically delay-free switching topology, solving the signal reflection problem over a wide impedance range (50Ω–10kΩ); dynamic adjustment of the feedback resistor in over-temperature compensation and protection can compensate for gain deviations caused by temperature drift, maintaining the amplitude stability of the output signal; a graded power reduction strategy can reduce output power and force heat dissipation when the temperature exceeds the limit, extending the life of the power transistor; based on the priority of graded collaborative control, responses can be ordered according to the severity of the fault, maximizing the effectiveness of critical protection; and multi-directional action mutual exclusion and linkage avoid the superposition and deterioration of multiple faults. Attached Figure Description
[0057] Figure 1 This is a schematic flowchart of the closed-loop control method for power drive and protection according to an embodiment of this application.
[0058] Figure 2 This is a schematic diagram of the closed-loop control system for power drive and protection according to an embodiment of this application.
[0059] Figure 3 This is a circuit diagram of the operational amplifier in an embodiment of this application;
[0060] Figure 4 This is a circuit diagram of the relevant output stage in an embodiment of this application;
[0061] Figure 5 This is a circuit diagram of the relevant power supply protection unit in an embodiment of this application;
[0062] Figure 6 This is a circuit diagram of the relevant phase detector in an embodiment of this application;
[0063] Figure 7 The circuit diagrams for the relevant variable dynamic impedance matching network and system control in the embodiments of this application are shown below.
[0064] Figure 8 This is a circuit diagram of the relevant temperature sampling and signal conditioning in an embodiment of this application;
[0065] Figure 9 This is a circuit diagram of the relevant gain compensation in an embodiment of this application;
[0066] Figure 10 The circuit diagram of the temperature-controlled fan in the embodiment of this application is shown below;
[0067] Figure 11 This is a circuit diagram of a thermal protection relay according to an embodiment of this application. Detailed Implementation
[0068] To enable those skilled in the art to better understand the technical solution of this application, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0069] The embodiments of this application will be described in further detail below with reference to the accompanying drawings and examples. The detailed description of the following embodiments and the accompanying drawings are used to illustrate the principles of this application by way of example, but should not be used to limit the scope of this application, that is, this application is not limited to the described embodiments.
[0070] This application provides a closed-loop control method for power drive and protection, which is executed by a closed-loop control system for power drive and protection. (See attached diagram.) Figure 1 As shown, the method includes the following steps 110-160.
[0071] Step 110: A voltage feedback circuit is constructed using a high-speed operational amplifier, and a closed-loop gain structure is formed through the feedback network of this voltage feedback circuit.
[0072] The embodiments of this application preferably employ a high-speed operational amplifier to construct a voltage feedback circuit.
[0073] Among them, the voltage feedback circuit can be configured with a peak current detection unit and a power supply protection unit. The peak current detection unit can achieve ±250mA threshold monitoring through a bidirectional current sensor, and the power supply protection unit can include a hot-swappable controller to limit the surge current to ≤120% of the rated value.
[0074] In some implementations, the feedback network of the voltage feedback circuit forms a closed-loop gain structure, including: the feedback network with a deep negative feedback closed-loop gain structure built based on metal film resistors and precision resistors.
[0075] For example, the closed-loop gain is calculated using the following formula:
[0076]
[0077] in, This represents the closed-loop gain value. This indicates the resistance value of the metal film resistor. This indicates the resistance value of the precision resistor.
[0078] For example, the feedback network consists of a metal film resistor ( ) and precision resistors ( If the composition is such that the corresponding closed-loop gain is... A deep negative feedback structure.
[0079] Step 120: Monitor the load current at the output of the voltage feedback circuit in real time. When the load current exceeds the first set threshold, trigger the protection mechanism to shut down the output stage to perform short-circuit protection.
[0080] In some implementations, the real-time monitoring of the load current at the output of the voltage feedback circuit, and the triggering of a protection mechanism to shut down the output stage when the load current exceeds a first set threshold to perform short-circuit protection, includes: real-time monitoring of the load current via a bidirectional current sensor, the load current flowing through a sampling resistor to generate a differential voltage; the differential voltage being amplified by an internal amplifier of the bidirectional current sensor and output to a comparator; when the amplified differential voltage exceeds the threshold voltage of the comparator, an output switching signal triggers a microcontroller (MCU) interrupt; after the microcontroller responds to the interrupt, it shuts down the output stage of the amplifier within a preset time via a pulse width modulation (PWM) controller to perform short-circuit protection.
[0081] For example, the differential voltage is calculated using the following formula:
[0082]
[0083] in, This indicates the differential voltage. This indicates the load current. This indicates the resistance value of the sampling resistor.
[0084] For example, this output stage monitors the load current in real time via a bidirectional current sensor. When the load current... Flow through sampling resistor (In low-inductance package) a differential voltage is generated. The voltage is then amplified by an internal amplifier with a gain of G=50 and output to a comparator. The comparator threshold voltage... Corresponding current threshold When an overcurrent is detected, the comparator output switching signal triggers a microprocessor interrupt, and the pulse width modulation controller shuts down the output stage within 800ns.
[0085] In some implementations, protection is triggered when the load current exceeds a ±250mA threshold.
[0086] In one exemplary embodiment, the short-circuit protection mechanism employs a graded response strategy: when a short circuit is detected at the output terminal, the current sensor triggers a protection signal within 800ns, and the pulse width modulation controller immediately shuts down the output stage; after the fault is cleared, the microcontroller confirms the state recovery via a 200us software delay, with the overall recovery time controlled within 1ms. This embodiment integrates hardware and software redundancy to achieve thermal protection. For example, at the hardware level, the fan is directly driven by a comparator; at the software level, the output power is dynamically adjusted based on the temperature integral value. When the heatsink temperature exceeds 75°C, the drive amplitude is automatically reduced. The downtime under short-circuit conditions is shortened by 90% compared to traditional solutions (conventional solutions >10ms).
[0087] Step 130: Limit the power-on surge current through the soft-start control circuit to perform surge suppression.
[0088] In some implementations, limiting power-on inrush current via a soft-start control circuit to perform surge suppression includes: detecting the source current of an external field-effect transistor (MOSFET) via a hot-swap controller; upon power-on, the internal current source of the hot-swap controller charges the current sensing (CS) pin capacitor to form a ramp current, and controls the gate voltage of the MOSFET to gradually rise via the ramp current to generate the inrush current; limiting the inrush current to a specific percentage of its rated value; when an overcurrent fault is detected, the hot-swap controller triggers a hiccup mode, performing a power link restart every preset period until the fault is cleared; when no overcurrent fault is detected, the current operating state is maintained.
[0089] For example, the hot-swap controller achieves soft-start by detecting the source current of the external field-effect transistor. Upon power-up, the internal current source of the hot-swap controller charges the capacitor of the current-sensing pin, creating a ramp current that gradually increases the gate voltage of the external field-effect transistor, limiting the inrush current to within 120% of the rated value (i.e., using a hot-swap controller for soft-start limits the instantaneous power-up current to ≤120% of the rated value). When an overcurrent fault is detected, the controller triggers a hiccup mode, attempting to restart every 12ms until the fault is resolved.
[0090] Step 140: Obtain the phase information of the load reflection coefficient, select the inductor / capacitor (L / C) combination of the variable dynamic impedance matching (LC) network by looking up the phase information, and switch the inductor / capacitor parameters by relay to optimize the transmission standing wave ratio between the power amplifier output and the load.
[0091] In some implementations, the phase information of the load reflection coefficient is the phase value of the load reflection coefficient, and the phase information is looked up in a preset phase interval mapping table.
[0092] In some implementations, the process of acquiring the phase information of the load reflection coefficient, selecting the inductor / capacitor combination of the variable dynamic impedance matching network based on the phase information, and switching the inductor / capacitor parameters via relays to optimize the transmission standing wave ratio (VSWR) between the power amplifier output and the load includes: acquiring the reflected signal between the power amplifier output and the load using a dual directional coupler; extracting the phase value of the reflection coefficient of the reflected signal using a phase detector; matching the corresponding inductor / capacitor combination number of the variable dynamic impedance matching network in a preset phase interval mapping table based on the phase value, wherein the phase interval mapping table is pre-calibrated by a vector network analyzer to store the mapping relationship between phase intervals and inductor / capacitor combinations of the variable dynamic impedance matching network; independently switching the parameters of the variable dynamic impedance matching network using at least four sets of relays, wherein the first set of relays controls the on / off state of the main inductor, the second and third sets of relays control the on / off state of two sets of parallel capacitors respectively, and the fourth set of relays controls the on / off state of the series inductor; and optimizing the VSWR between the power amplifier output and the load to below a specific ratio within the response bandwidth.
[0093] This step in this application is related to the phase detector, the variable dynamic impedance matching network, and the microprocessor control unit. The reflection coefficient (based on the phase difference between the incident and reflected waves) is obtained through a dual directional coupler, and the parameters of the variable dynamic impedance matching network are selected by looking up a table to achieve a standing wave ratio (VSWR) of less than 1.2:1 within a 10MHz bandwidth. The phase detector in this application has an accuracy of ±0.5°, corresponding to a reflection coefficient... The measurement error shall not exceed 0.09.
[0094] For example, the topology of a variable dynamic impedance matching network can adopt a π-type network (two parallel capacitors sandwiching a series inductor), and different inductor / capacitor combinations can be switched by four sets of relays (K1-K4). Among them, the first set of relays K1 controls the main inductor L1 (10uH), the second set of relays K2 controls the parallel capacitor C1 (100pF), the third set of relays K3 controls the parallel capacitor C2 (1nF), and the fourth set of relays K4 controls the series inductor L2 (1uH).
[0095] For example, the coverage range of impedance switches can be determined based on the following formula. Verification:
[0096] ;
[0097] Based on the parallel / series resonance condition and the following formula, calculate the impedance range corresponding to each of the above combinations:
[0098] When K1 is closed and K2-K4 are open, then:
[0099] ;
[0100] When K1-K4 are fully closed, the equivalent ,but:
[0101] ;
[0102] Based on the above combination of switch states, it can cover a range of 50Ω-10kΩ, with a matching response time of ≤15ms. This coverage and response time meet the dynamic response requirements of the audio frequency band (20kHz), breaking through the response bottleneck of traditional mechanical matching devices (conventional solutions >100ms). Actual tests of the embodiments of this application show that the standing wave ratio remains stable within a 10MHz bandwidth.
[0103] For example, the standing wave ratio of this application The following formula was used to calculate:
[0104]
[0105] Based on the derivation of the above formula, the embodiments of this application can ensure that the VSWR is stable below 1.2:1 after matching (Γ<0.09).
[0106] In some implementations, the method further includes establishing an impedance-phase relationship calibration, including: using a vector network analyzer (VNA) at a frequency of 10 MHz to sequentially measure the parameter S11 corresponding to each variable dynamic impedance matching combination; extracting the phase angle θ=arg(S11) of the reflection coefficient Γ, and establishing a mapping table between the variable dynamic impedance matching combination number and the phase angle θ; and back-calculating the equivalent electrical length using the formula θ=2π×2d / λ (d is the transmission line length, λ is the wavelength).
[0107] In some implementations, the lookup table generation method includes: dividing the phase angle θ into 10° step intervals, with the error of the corresponding reflection coefficient Γ controlled to be less than or equal to 0.015 (according to the Smith chart transformation relationship); and storing the optimal variable dynamic impedance matching combination encoding corresponding to each interval into the flash memory of the microprocessor.
[0108] Step 150: Monitor the temperature of the power transistor heatsink and dynamically adjust the resistance value of the feedback network based on the temperature deviation to perform over-temperature protection.
[0109] In some implementations, monitoring the power transistor heatsink temperature and dynamically adjusting the resistance value of the feedback network based on temperature deviation to perform over-temperature protection includes: mounting a platinum resistance temperature sensor on the power transistor heatsink and electrically connecting the platinum resistance temperature sensor to three sets of wires via a bridge structure to eliminate lead resistance errors. The resistance of the first set of wires is included in the high-side bias circuit, the resistance of the second set of wires is isolated by the high input impedance of the instrumentation amplifier, and the resistance of the third set of wires is self-compensated by the bridge. Based on the linear relationship between the resistance value of the platinum resistance temperature sensor and the operating temperature, the real-time temperature is converted into a voltage signal. The operating temperature range is divided into preset intervals, and a compensation coefficient is dynamically calculated using a linear interpolation algorithm according to the interval in which the real-time temperature falls. The resistance value of the feedback network is adjusted in real-time via a digital potentiometer to compensate for the gain of the temperature deviation. When the temperature deviation exceeds a second preset threshold, the cooling device is activated and the output power is reduced.
[0110] For example, the gain for compensating for the temperature deviation is calculated using the following formula:
[0111]
[0112] in, Indicates real-time temperature The corresponding actual gain, Indicates reference temperature The corresponding initial gain, Represents the compensation coefficient, preferably =±5ppm / ℃. The microprocessor uses the SPI interface to adjust the temperature deviation ( The resistance of the digital potentiometer is dynamically adjusted, and the voltage division ratio of the feedback network is dynamically adjusted to offset the gain drift caused by the change in the feedback coefficient of the power transistor with temperature (typically -2000ppm / ℃). The reference temperature is preferably 25℃.
[0113] For example, this step in this application relates to an integrated temperature sensor and a digital potentiometer, and uses a platinum resistance temperature sensor (PT100) to sample the temperature of the power transistor heatsink. Gain compensation of ±5ppm / ℃ is achieved by adjusting the feedback network resistor. The temperature sampling circuit is laid out as a three-wire connection, preferably using a bridge structure, with fixed balancing resistors R1 and R2 = 1kΩ, and the sensor's equivalent resistance R3 = the platinum resistance temperature sensor's R... PT100 + Lead resistance R L Eliminate lead resistance R using an instrumentation amplifier L Impact: The resistance R of the first wire L1 Taking into account high-side bias; resistance R of the second wire L2 The resistor isolates the amplifier from the high input impedance of the instrumentation amplifier; the resistance R of the third wire L3 Self-compensation through bridge structure.
[0114] In some implementations, temperature and voltage The conversion formula is as follows:
[0115]
[0116] in,
[0117] ,
[0118] ;
[0119] This represents the standard compensation coefficient based on a platinum resistance temperature sensor.
[0120] In some implementations, the linear interpolation algorithm is preferably a piecewise linear interpolation algorithm, the segmentation strategy of which is to divide 0-50℃ into 5 intervals (each interval being 10℃), and store the endpoint temperature T of each interval. i and the corresponding compensation coefficient K i , where i is the interval index.
[0121] In some implementations, when the real-time temperature T is located at [T j T j+1 When the interval is j (where j is the interval index), the compensation coefficient is dynamically calculated using a linear interpolation algorithm. The formula is as follows:
[0122]
[0123] In some embodiments, this step of the present application also includes short-circuit protection logic. When a short circuit is detected at the output terminal, the pulse width modulation controller shuts off the output stage within 800 ns, and automatically restores power supply within 1 ms after the fault is cleared.
[0124] In some implementations, the fan is activated and the output power is reduced when the temperature of the power transistor heatsink exceeds 75°C.
[0125] Step 160: Perform coordinated control of the short-circuit protection, the over-temperature protection, and the surge suppression according to priority.
[0126] In some implementations, the microprocessor performs a graded response based on three fault types: short-circuit protection, over-temperature protection, and surge suppression. The priority level is such that short-circuit protection has a higher priority than over-temperature protection, and over-temperature protection has a higher priority than surge suppression.
[0127] In some implementations, the overall system performance is calculated and verified using the following closed-loop error suppression formula:
[0128]
[0129] in, This represents the open-loop gain (=10000). This represents the rate of change of load impedance (200:1), the theoretical load regulation. The harmonic distortion (THD+N) can reach 0.0012%. Combined with the real-time correction capability of the dynamic matching network, the measured load regulation rate is better than 0.1%, and the harmonic distortion (THD+N) reaches 0.0043% at full power output of 20kHz (eigenvalue 0.0003% plus feedback network nonlinearity). The proposed embodiment has been verified in precision testing equipment, solving the technical bottleneck of signal distortion >20% in the traditional solution within the 50Ω-10kΩ load range, and meeting the stringent requirements of various standards for harmonic distortion of audio equipment.
[0130] The feedback network of the voltage feedback circuit in this application stabilizes the power amplifier gain, effectively suppressing nonlinear distortion of the audio signal and forming a closed-loop gain structure. Combined with a current monitoring mechanism, it provides a hardware foundation for short-circuit protection, reducing the risk of power transistor burnout due to overload. By executing the fast shutdown output stage for short-circuit protection, it can respond in milliseconds when the load current exceeds the threshold, preventing power device breakdown. Through coordinated priority control, other operations can be interrupted with the highest priority, ensuring the core safety of the system. Soft-start control of the power-on current based on surge suppression avoids power supply surges damaging input stage devices. The mutually exclusive layout with short-circuit protection provides independent protection for vulnerable links in the power supply chain, reducing false triggering interference. Dynamic impedance matching... The phase detection and lookup table switching in the optimization process can match the variable dynamic impedance matching parameters in real time based on the reflected phase, reducing the VSWR to close to 1:1; direct relay control establishes a mechanically delay-free switching topology, solving the signal reflection problem over a wide impedance range (50Ω–10kΩ); dynamic adjustment of the feedback resistor in over-temperature compensation and protection can compensate for gain deviations caused by temperature drift, maintaining the amplitude stability of the output signal; a graded power reduction strategy can reduce output power and force heat dissipation when the temperature exceeds the limit, extending the life of the power transistor; based on the priority of graded collaborative control, responses can be ordered according to the severity of the fault, maximizing the effectiveness of critical protection; and multi-directional action mutual exclusion and linkage avoid the superposition and deterioration of multiple faults.
[0131] See attached document Figure 2 As shown in the embodiments of this application, a closed-loop control system for power drive and protection is also disclosed, including: a feedback circuit construction module 210, a short-circuit protection processing module 220, a surge suppression processing module 230, a standing wave ratio optimization module 240, a temperature protection processing module 250, and a cooperative execution control module 260.
[0132] The feedback circuit construction module 210 is used to construct a voltage feedback circuit using a high-speed operational amplifier, and to form a closed-loop gain structure through the feedback network of the voltage feedback circuit.
[0133] The short-circuit protection processing module 220 is used to monitor the load current at the output terminal of the voltage feedback circuit in real time. When the load current exceeds a first set threshold, a protection mechanism is triggered to shut down the output stage to perform short-circuit protection.
[0134] The surge suppression processing module 230 is used to limit the power-on surge current through a soft-start control circuit to perform surge suppression.
[0135] The VSWR optimization module 240 is used to obtain the phase information of the load reflection coefficient, select the inductor / capacitor combination of the variable dynamic impedance matching network according to the phase information, and switch the inductor / capacitor parameters through a relay to optimize the transmission VSWR between the power amplifier output and the load.
[0136] The temperature protection processing module 250 is used to monitor the temperature of the power transistor heatsink and dynamically adjust the resistance value of the feedback network based on the temperature deviation to perform over-temperature protection.
[0137] The collaborative execution control module 260 is used to perform collaborative control of the short-circuit protection, the over-temperature protection and the surge suppression according to priority.
[0138] In one specific embodiment, this application's implementation is based on a proven engineering practice and is divided into four stages: hardware setup, software development, system integration and testing. The following uses a typical application scenario (audio power amplifier device) as an example to illustrate the specific implementation process according to stages one through three.
[0139] Phase 1, hardware setup, includes the following sub-phases 1)-3).
[0140] 1) Assembly of closed-loop power amplifier unit.
[0141] See attached document Figure 3 As shown, a voltage feedback circuit is constructed using a high-speed operational amplifier. It is first soldered onto a four-layer printed circuit board (PCB), consisting of signal layer, power layer, ground layer, and auxiliary layer. The following high-frequency routing principles are followed during layout: input traces are shorter than 5mm to suppress parasitic inductance, and the feedback resistor (R...)... f =1kΩ) and gain resistor (R g=100Ω) uses a 0.1% metal film precision resistor, and a 10uF ceramic capacitor + 0.1uF film capacitor are connected in parallel on the power supply pin for filtering. Specifically, INF1 is the bayonet nut connector BNC RF input interface; RF8 is a 49.9Ω / 1% precision resistor for input impedance matching; RF9 is a 100Ω / 0.1% precision resistor for signal sampling and feedback path; RF10 is a 1kΩ / 0.1% precision resistor for closed-loop feedback network; CF6 is a 10uF / 25V electrolytic capacitor for power supply decoupling; CF7 is a 0.1uF / 25V ceramic capacitor for high-frequency noise suppression; UF2 is a high-speed operational amplifier for core signal processing. Its circuit principle is as follows: the input signal is connected through the BNC interface INF1, and after impedance matching by the 49.9Ω resistor RF8, it forms a voltage divider network with the 100Ω resistor RF9, attenuating the signal and applying it to the non-inverting input of the operational amplifier UF2. The feedback network consists of a 1kΩ resistor RF10, connected to the inverting input and output to form a closed-loop negative feedback, fixing the amplification factor at 11 times (1+1kΩ / 100Ω). The power supply section uses two stages of decoupling with a 10uF electrolytic capacitor CF6 and a 0.1uF ceramic capacitor CF7 to eliminate high-frequency noise. The entire circuit uses ground (GND) as a reference to achieve stable, high-precision small-signal amplification.
[0142] See attached document Figure 4 As shown, the output stage is configured with a bidirectional current sensor, whose sampling resistor R S =0.1Ω requires a low-inductance package, and the output signal is connected to a comparator to detect the ±250mA threshold. Specifically, INA138 is a three-terminal adjustable precision instrumentation amplifier; LMV721 is a general-purpose dual-supply operational amplifier (UF3, UF4); RF11-RF16 are precision metal film resistors (resistance value and accuracy are marked); C1-C2 are ceramic bypass capacitors; LED_RED is a red light-emitting diode; DF1 is a fast recovery diode; Load is the load interface. Its circuit principle is as follows: This circuit realizes differential voltage detection and level conversion functions. The input signal IN is sent to the inverting input of INA138 through a precision voltage divider network composed of RF11-RF13. The detection threshold can be set by adjusting the resistance value of RF13. The output signal of INA138 drives a voltage follower composed of UF3, whose output provides a bias reference for UF4 and also indicates the working status through LED_RED (lit up when forward conduction). The UF4 amplifier forms an inverting amplifier circuit that amplifies the difference between the input signal and the reference level, ultimately outputting the signal through the OUT terminal. Capacitors C1 and C2 respectively perform power supply decoupling and signal coupling, while diode DF1 prevents overload of the negative half-cycle signal. The entire circuit employs a dual power supply structure to ensure the linearity and stability of signal processing.
[0143] See attached document Figure 5As shown, the power supply protection unit uses a controller to drive an N-channel external field-effect transistor. A 10Ω resistor is connected in series with the gate to suppress oscillation, and a 100nF absorption capacitor is connected in parallel between the source and drain. Specifically, PVR is a precision adjustable resistor; CF1-CF5 are electrolytic / ceramic filter capacitors (with rated voltage and capacitance values marked); RF1-RF7 are precision metal film resistors (with resistance values and accuracy marked); QF1 is a fast-blow fuse; MOSFET-N is an N-channel power MOSFET; and UF1 is a PWM controller chip. Its circuit principle is as follows: This circuit is a step-down DC-DC converter with overcurrent protection. The input power supply sets the reference voltage via PVR, and provides feedback reference to the LM5069 through a voltage divider network composed of RF1-RF3. The internal oscillator of UF1 generates a fixed-frequency PWM signal, driving the gate of MOSFET-N and controlling its conduction period. QF1 acts as an overcurrent fuse protection element, quickly cutting off the circuit when the load current exceeds the threshold. RF4-RF6 form a slope compensation network to improve the duty cycle linearity. CF2-CF5 form a multi-stage filtering structure, with CF4-CF5 constituting a π-type filter to suppress high-frequency ripple. RF7 and CF3 form a soft-start circuit to prevent inrush current damage to components during startup. The entire system stabilizes the output voltage Vout through closed-loop feedback and features UVLO undervoltage lockout and PGD power status indication functions, ensuring reliable operation under a wide range of input conditions.
[0144] 2) Implementation by dynamic impedance matching unit.
[0145] See attached document Figure 6As shown, this unit consists of a phase detector, a dual directional coupler, and a variable dynamic impedance matching network with relay switching. First, a dual directional coupler with a coupling coefficient of 30dB and a frequency coverage of DC-50MHz is fabricated on a high-frequency printed circuit board. It is then soldered onto an independent daughterboard, with its RF input connected to a 50Ω matching resistor and its LO terminal connected to a reference signal (from the signal source synchronization signal). Specifically, INP1 / INP2 are BNC RF input interfaces; RP1 / RP2 are precision metal film resistors (resistance and accuracy are marked); CP1-CP7 are ceramic filter capacitors (capacitance and withstand voltage are marked); RP3-RP8 are precision fine-tuning resistors (resistance and accuracy are marked); UP1 is an RF amplitude detection chip; and Header2×2 are dual-channel output connectors. The circuit principle is as follows: This circuit is an RF signal amplitude detection module. The input signal (INP1 / INP2) is connected via the BNC interface, and impedance matching and signal attenuation are achieved through RP1 / RP2. CP1-CP4 form a π-type filter network to suppress out-of-band interference. The AD8302 chip (UP1) is the core detection unit. Its INPA / INPB differential inputs receive the processed signal, and an internal logarithmic detector linearly converts the RF signal amplitude into a DC voltage output. The outputs (OUTP1 / OUTP2) use an RP4-RP8 resistor network for gain adjustment, and CP5-CP7 capacitors for low-pass filtering and power supply decoupling. This design employs a fully differential architecture to suppress common-mode noise and is suitable for high-precision amplitude monitoring in the 50MHz to 4GHz frequency band. The output voltage exhibits a logarithmic linear relationship with the input power.
[0146] See attached document Figure 7As shown, the variable dynamic impedance matching network is controlled by four sets of relays, each corresponding to a specific impedance range (50-200Ω, 200-1kΩ, 1k-5kΩ, 5k-10kΩ). The inductance value is calibrated using a vector network analyzer (VNA), and the capacitors are made of materials that ensure temperature stability. The microprocessor drives the relays via optocouplers to control signal isolation transmission. Specifically, IN is the signal input port; OUT is the signal output port; UP2 / UP3 / UP5 are LTV-356T-C opto-isolators; DP1 / DP2 / DP4 are IN4148 high-speed switching diodes; QP1 / QP2 / QP4 are NPN power transistors; JP1 / JP2 / JP4 are Relay-NO normally open relay modules; LP1 / LP2 / LP4 are wire-wound power inductors; RP9-RP16 are precision metal film resistors; CP8-CP11 are ceramic filter capacitors; and GPIO1-GPIO4 are the microcontroller's digital control interfaces. The circuit principle is as follows: This circuit is a four-channel opto-isolated relay driver module. The input signal (IN) is processed through three independent control loops: the digital signals of GPIO1-GPIO4 sequentially trigger the optocouplers UP2 / UP3 / UP5. After the internal phototransistors are turned on, they provide bias current to the bases of QP1 / QP2 / QP4 through the RP9-RP12 resistor network. When the transistors are saturated and conducting, the relay coils (JP1 / JP2 / JP4) are energized and their normally open contacts close to connect the load at the OUT terminal. The intermediate UP4 circuit acts as an auxiliary drive unit, adjusting the base voltage of Q3 (2SD882) through the voltage divider of resistors RP13-RP16 to enhance the driving capability of the relay coil. The inductors LP1-LP4 and capacitors CP8-CP11 form a π-type filter network to suppress high-frequency switching noise.
[0147] 3) Temperature compensation unit integration.
[0148] See attached document Figure 8As shown, the temperature sampling circuit uses a platinum resistance thermometer mounted on the power transistor's heatsink, with a three-wire connection to eliminate the influence of wire resistance. The signal conditioning section uses an instrumentation amplifier with a gain set to 10, and the output is connected to the analog-to-digital converter channel of the temperature sensor. Specifically, BS-12-B3AA003 is a pressure sensor; PT100 is a platinum resistance temperature sensor; RB3-RB7 are precision metal film resistors (resistance and accuracy are indicated); CB2-CB4 are ceramic filter capacitors (capacitance and withstand voltage are indicated); UB2AD620 is a high-precision instrumentation amplifier; MAX6611 (UB3) is a temperature-compensated voltage reference chip; BB1 is a fuse / fuse protection element; and GPIO is the microcontroller's digital control interface. The circuit principle is as follows: this circuit realizes the dual-parameter detection function of temperature and pressure. The bridge network on the left is composed of the BS-12-B3AA003 pressure sensor and the PT100 platinum resistance thermometer, forming a full bridge connection through resistors RB3-RB6. When temperature or pressure changes, the bridge arm resistance imbalance generates a weak differential voltage. This voltage is amplified by the AD620 (UB2) high-precision instrumentation amplifier and output to the MAX6611 (UB3) for temperature compensation and reference calibration. The UB3 integrates a bandgap reference source, with its REF pin outputting a stable reference voltage and the SHDN# pin controlled by GPIO for standby management. Capacitors CB2-CB4 respectively perform power supply decoupling, signal coupling, and output filtering functions.
[0149] See attached document Figure 9 As shown, the gain compensation unit uses a digital potentiometer configured in variable feedback resistor mode, and its control terminal is adjusted by the microprocessor via the I2C interface. Specifically, UB1 is a digital potentiometer chip; CB1 is a 1uF / 25V ceramic filter capacitor; RB1 / RB2 are 1KΩ metal film resistors (accuracy specified); GPIO1 / GPIO2 are the microcontroller's digital interface; the circuit interface is the power and ground connection terminals. Its circuit principle is as follows: This circuit is an I²C bus controllable digital potentiometer application module. The AD5272 chip (UB1) is the core control unit, achieving bidirectional communication with the microcontroller through the SCL (GPIO1) and SDA (GPIO2) pins. RB1 / RB2 act as I²C bus pull-up resistors, ensuring the signal lines remain high in the idle state. The CB1 capacitor is connected between VDD and ground to suppress power supply ripple and stabilize the internal reference voltage. An external capacitor for the EXT_CAP pin is optional to optimize dynamic response characteristics.
[0150] See attached document Figure 10-11 As shown, the cooling system includes a temperature-controlled fan (12V / 0.3A) and a thermal protection relay. When the temperature exceeds 75°C, the microprocessor triggers the fan and reduces its output power. For details, please refer to the attached diagram. Figure 10As shown, GPIO is the microcontroller's digital output pin; RB9 is a metal film current-limiting resistor (47Ω); QB1 is a 2SD882NPN power transistor; DB1 is an IN4148 fast recovery diode; RB8 is a collector resistor (36Ω); the fan is a DC motor load; and Header2 is a power connector. The circuit principle is as follows: This circuit is a DC fan drive control module. The microcontroller's GPIO output signal drives the base of QB1 through the RB9 current-limiting resistor. When the GPIO output is high, QB1 is saturated and conducts. The VCC power supply forms a loop through RB8, the collector-emitter junction of QB1, and the fan, driving the fan to rotate. The DB1 diode is connected in series across the fan to absorb the back EMF spike voltage of the motor, protecting QB1 from transient overvoltage damage. In addition to current limiting, RB8 can also suppress high-frequency noise during motor commutation. The Header2 interface is used to connect an external fan power supply, achieving hardware isolation and flexible wiring. This design uses digital control to regulate fan start and stop for equipment heat dissipation management. For details, refer to the attached diagram. Figure 11 As shown, GPIO is the microcontroller's digital output pin; RB10 is a metal film current-limiting resistor (200Ω); QB2 is a 2SD882NPN power transistor; DB2IN4148 is a fast recovery diode; JB1Relay-NC is a normally closed relay module; and Header2 is a power connector. Circuit principle: This circuit is a relay-controlled switch module. The microcontroller's GPIO output signal drives the base of QB2 through the RB10 current-limiting resistor. When the GPIO output is high, QB2 is saturated and conducts, and the +5V power supply powers the relay coil (JB1) through the collector-emitter junction of QB2. After the relay is energized, its normally closed contact opens, disconnecting Header2 from the circuit. When the GPIO output is low or no power is supplied, QB2 is cut off, the relay releases, the contacts return to the closed state, and Header2 is connected to the circuit. The DB2 diode is connected in parallel across the relay coil to absorb the reverse induced electromotive force during power-off, preventing QB2 from being damaged by overvoltage. This design achieves circuit switching through digital control and features electrical isolation and overvoltage protection.
[0151] Phase Two, the software development phase, includes the following sub-phases 4)-6).
[0152] 4) Impedance matching algorithm development
[0153] The microprocessor's main program employs a state machine architecture, encompassing states such as initialization, matching detection, parameter adjustment, and protection response. The core algorithm, based on phase detection data, rapidly matches impedance using a lookup table method.
[0154] During calibration, a vector network analyzer is used to measure the impedance-phase relationship of each variable dynamic impedance matching combination beforehand, and a lookup table is established. Specifically, based on Smith's circle theory and the reflection coefficient model, the impedance-phase characteristics of the variable dynamic impedance matching combination are calibrated using a vector network analyzer, and a lookup table is established to achieve rapid matching. The system employs a π-type variable dynamic impedance matching network (4 sets of relay-switched inductor / capacitor combinations), covering an impedance range of 50Ω-10kΩ. Its theoretical basis is the phase-impedance mapping relationship and the following reflection coefficient formula:
[0155]
[0156] In the specific implementation process, the high-frequency printed circuit board with the welded variable dynamic impedance matching network is first SOLT calibrated. Vector network analyzer parameters (10MHz bandwidth, 101 scan points) are set, and relay combinations are activated group by group. S11 parameters are recorded, and the real part R and imaginary part X of the impedance for each combination are calculated. After verifying the impedance coverage range using a Smith chart, the 0°-360° phase is divided into 10° step intervals. The optimal variable dynamic impedance matching combination is matched using the least squares method with reference to the following formula:
[0157] ;
[0158] The final mapping relationship between the phase interval and the variable dynamic impedance matching code is stored in the microprocessor Flash. Key technologies include three-wire PT100 temperature measurement to eliminate wire error, phase detection accuracy of ±0.5°, and microprocessor response time <15ms. In actual measurements, the standing wave ratio was optimized from 2.1:1 to 1.15:1, and the reflected power ratio was reduced to 0.5%, meeting the stringent requirements of industry standards for audio equipment.
[0159] During real-time calculation, the following formula is used for calculation. Terminal output voltage and Relationship between terminal reference voltage phases:
[0160] ,
[0161] Microprocessor based on phase angle relationship Choose the optimal variable dynamic impedance matching combination by referring to the table.
[0162] During the dynamic optimization process, when it is detected When the change exceeds 5°, a secondary matching process is initiated to avoid accidental triggering.
[0163] 5) Development of temperature compensation algorithm, which preferably adopts piecewise linear interpolation.
[0164] During the temperature acquisition process, temperature data is read every 100ms, and the current temperature T is obtained after moving average filtering.
[0165] During gain correction, the compensation coefficient is calculated using the following formula:
[0166] ;
[0167] in, =5×10 -6 / ℃, =25℃.
[0168] During potentiometer control, the compensation coefficient is converted into a digital address (0-1023) and written to the register via I2C.
[0169] 6) In the power protection logic design, the interrupt priority mechanism is preferred.
[0170] During overcurrent protection, the detection signal is connected to the comparator, the threshold is set to 250mV (corresponding to 250mA), and the interrupt response time is <1us.
[0171] During the short circuit handling process, after the microprocessor detects the overcurrent signal, it immediately shuts down the pulse width modulation output and records the fault code, and attempts to automatically recover after 1ms.
[0172] During the over-temperature protection process, the temperature data is updated every 500ms. When the temperature exceeds the limit (75℃), the fan is triggered and the output is reduced to 50%.
[0173] Phase 3, System Integration and Testing Verification, includes the following sub-phases 7-9).
[0174] 7) Hardware function verification.
[0175] During the closed-loop amplifier test, a 1kHz sine wave (1Vpp) was input, and the load was switched to 50Ω / 8Ω / 600Ω. The output waveform was observed with an oscilloscope, confirming that the harmonic distortion (THD) was <0.005%.
[0176] During the commissioning of the dynamic matching network, a vector network analyzer was used to scan a 50Ω-10kΩ load to verify that the standing wave ratio was <1.2:1 (reflection coefficient Γ<0.09).
[0177] During the temperature compensation calibration process, the system is placed in a temperature chamber (0-50℃ cycle) and the output amplitude changes at different temperatures are recorded to ensure that the drift is ≤0.02% / ℃.
[0178] 8) Overall performance test.
[0179] During the load regulation test, with an input voltage of 220V±10% and the load switched from 50Ω to 10kΩ, the multimeter monitored an output voltage fluctuation of <0.1%.
[0180] During the short-circuit protection response process, the output terminal is artificially short-circuited, and the oscilloscope captures the protection action time (shutdown < 800ns, recovery < 1ms).
[0181] During the long-term stability test, after 72 hours of continuous operation, infrared thermal imaging showed that the power tube temperature rise was less than 15°C.
[0182] 9) Deployment in practical application scenarios (implementation of this application in audio power amplifier equipment).
[0183] During multi-speaker switching, when the user switches between 8Ω / 4Ω / 600Ω speakers, the dynamic matching network completes parameter adjustment within 15ms, reducing the harmonic distortion (THD) from 22% in the traditional solution to 0.0045%.
[0184] In the application of radio frequency signal sources, during 10MHz carrier testing, the VSWR was optimized to 1.15:1, the reflection loss was improved by 9.5dB, and the power transistor junction temperature decreased by 28℃.
[0185] The embodiments of this application have been experimentally verified, and all core performance indicators meet the design requirements. The load regulation rate is less than 0.1% (measured at 0.08%), the total harmonic distortion (THD+N) is 0.0043% at full power output of 20kHz, the short-circuit protection recovery time is controlled within 1ms, the dynamic impedance matching network optimizes the voltage standing wave ratio (VSWR) to 1.15:1 (reflection coefficient Γ=0.07), and the temperature compensation circuit ensures that the system gain drift is ≤0.02% / ℃.
[0186] This application addresses the technical challenge of signal distortion exceeding 20% caused by load impedance fluctuations (50Ω-10kΩ). Measured data from the aforementioned specific embodiments show: load regulation <0.1% (due to the combined effect of a 20MHz closed-loop gain bandwidth and a 15ms dynamic matching response time); harmonic distortion <0.005%@20kHz (calculated using an 80dB open-loop gain combined with deep negative feedback); and short-circuit protection recovery time <1ms (comparator response time 800ns and microprocessor reset delay 200ns). This application can solve the signal distortion and device reliability problems caused by dynamic changes in load impedance in audio power amplifiers, RF signal sources, and precision testing equipment. By integrating closed-loop control, dynamic impedance matching, and temperature compensation technologies, it achieves high-precision power transmission under a wide range of loads, encompassing power amplifier design, automatic control algorithms, and thermal management technologies.
[0187] This application employs a three-stage architecture to achieve high-precision power transmission: the first stage is based on a closed-loop power amplifier unit, which achieves ±250mA peak limiting and <100ns overcurrent protection through current detection; the second stage is based on a dynamic impedance matching unit, which uses a phase detection and relay-switched variable dynamic impedance matching network to optimize the VSWR to <1.2:1 within a 10MHz bandwidth; the third stage is based on a temperature compensation unit, which achieves ±5ppm / ℃ gain stability through PT100 temperature measurement and digital potentiometer adjustment. Actual measurements show a load regulation rate of <0.1%, harmonic distortion of <0.005%@20kHz (open-loop gain 80dB + deep negative feedback suppression), and short-circuit protection recovery time of <1ms (comparator response 800ns + MCU reset 200ns). This application addresses the signal distortion problem caused by large-range load impedance fluctuations by constructing a three-stage architecture of closed-loop control, dynamic matching, and temperature compensation to achieve high-precision power transmission. In particular, a high-speed operational amplifier is used to construct a closed-loop power amplification unit. This high-speed operational amplifier has a slew rate of 2000V / µs and an open-loop gain of 80dB. A peak current detection unit and a power supply protection unit are configured in the voltage feedback circuit. The peak current detection uses a bidirectional current sensor to monitor the load current. When the output current exceeds the ±250mA threshold, the pulse width modulation controller shuts down the output stage within 100ns. This response speed is lower than the maximum transient current duration allowed in the safe operating area (SOA) (typically 500ns). The power supply protection unit integrates a hot-swappable controller, achieving soft-start through an external MOSFET, limiting the inrush current to within 120% of the rated value, and preventing damage to the power transistors during power-on.
[0188] This application embodiment possesses load fluctuation suppression capability. Through the synergistic effect of closed-loop control and dynamic matching network, the system maintains stable output within a load range of 50Ω-10kΩ. The closed-loop gain error formula shows that when the open-loop gain T = 80dB (10000), even if the load impedance changes by a factor of 200 (… =200:1), with a theoretical error of only 0.0012%. Actual measurement data shows that under input voltage fluctuation of 220V±10%, the load regulation rate reaches 0.08%, an improvement of two orders of magnitude compared to traditional solutions. This embodiment improves signal fidelity; the dynamic impedance matching network optimizes the VSWR from 2.1:1 in the conventional solution to 1.15:1, reducing the reflected power ratio from 11% to 0.5%. Combined with an 80dB open-loop gain and deep negative feedback (feedback coefficient β=0.1), the total harmonic distortion is expanded from the device intrinsic value of 0.0003% to 0.0043% (including feedback network nonlinearity error). This performance is nearly three times better than the industry standard limit (0.01%), meeting the requirements of high-fidelity audio equipment. This embodiment establishes a fast power protection mechanism; short-circuit protection uses a current sensor (response time 800ns) linked with a pulse width modulation controller to cut off the output stage within 800us. After the fault is cleared, the MCU confirms the recovery of the status via a 200µs software delay, with an overall recovery time of <1ms, which is 90% shorter than the traditional discrete component solution (5-10ms). The thermal protection function is linked to a digital potentiometer via a PT100 platinum resistance thermometer (0.1℃ resolution), automatically reducing output power when the heatsink temperature exceeds 75℃, effectively preventing device overheating failure. This application's embodiment enhances temperature stability; the temperature compensation algorithm is based on the gain-temperature characteristic formula. ,in =±5ppm / ℃ (combined temperature coefficient of digital potentiometer and temperature measurement error). Experiments show that under ambient temperature variations of 0-50℃, the system gain drift is ≤0.02% / ℃, which is 10 times better than the uncompensated state (power transistor β temperature coefficient -2000ppm / ℃ corresponds to 0.2% / ℃).
[0189] It is understood that the above embodiments are merely exemplary implementations used to illustrate the principles of this application, and this application is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and substance of this application, and these modifications and improvements are also considered to be within the scope of protection of this application.
Claims
1. A method of closed loop control of power drive and protection, characterized by, The application relates to a power amplifier, which comprises the following parts: a voltage feedback type circuit is constructed by using a high-speed operational amplifier, and a closed-loop gain structure is formed through a feedback network of the voltage feedback type circuit; a load current at an output end of the voltage feedback type circuit is monitored in real time, and a protection mechanism is triggered to turn off an output stage when the load current exceeds a first set threshold value, so that short circuit protection is performed; a soft start control circuit is used to limit a power-on inrush current, so that inrush suppression is performed; phase information of a load reflection coefficient is obtained, an inductance / capacitance combination of a variable dynamic impedance matching network is selected according to the phase information, and a relay is used to switch inductance / capacitance parameters, so that a transmission standing wave ratio between a power amplifier output end and the load is optimized; a power tube fin temperature is monitored, and a resistance value of the feedback network is dynamically adjusted based on a temperature deviation, so that over-temperature protection is performed; priority is given to the cooperative control of the short circuit protection, the over-temperature protection and the inrush suppression; wherein the monitoring of the power tube fin temperature and the dynamic adjustment of the resistance value of the feedback network based on the temperature deviation to perform the over-temperature protection comprises the following steps: a platinum resistance temperature sensor is attached to the power tube fin, and three groups of wires are electrically connected to the platinum resistance temperature sensor through a bridge structure to eliminate lead resistance error, wherein the resistance of the first group of wires is taken into account in a high-end bias loop, the resistance of the second group of wires is isolated by the high input impedance of an amplifier, and the resistance of the third group of wires is self-compensated through the bridge; the real-time temperature is converted into a voltage signal based on the linear relationship between the resistance value of the platinum resistance temperature sensor and the working temperature; the working temperature range is divided into preset intervals, and a compensation coefficient is dynamically calculated by using a linear interpolation algorithm according to the interval in which the real-time temperature is located; the resistance value of the feedback network is adjusted in real time through a digital potentiometer, which is used to compensate the gain of the temperature deviation; when the temperature deviation exceeds a second set threshold value, a heat dissipation device is started and the output power is reduced; the gain of the compensation temperature deviation is calculated by the following formula: wherein, represents a real-time temperature a corresponding actual gain, represents a reference temperature a corresponding initial gain, represents a compensation factor.
2. The power drive and protected closed loop control method of claim 1, wherein, the feedback network of the voltage feedback type circuit forms a closed-loop gain structure through the feedback network of the voltage feedback type circuit; the feedback network with deep negative feedback is built based on a metal film resistor and a precision resistor; the closed-loop gain is calculated by the following formula: wherein, represents a closed loop gain value, represents a resistance value of the metal film resistor, represents a resistance value of the precision resistor.
3. The power drive and protected closed loop control method of claim 1, wherein, the load current at the output end of the voltage feedback type circuit is monitored in real time, and a protection mechanism is triggered to turn off an output stage when the load current exceeds a first set threshold value, so that short circuit protection is performed; the load current is monitored in real time through a bidirectional current sensor, and the load current flows through a sampling resistor to generate a differential voltage; the differential voltage is amplified by an internal amplifier of the bidirectional current sensor and then output to a comparator; when the amplified differential voltage exceeds the threshold voltage of the comparator, a jump signal is output to trigger a microcontroller interruption; after the microcontroller responds to the interruption, the output stage of the amplifier is turned off within a preset time through a pulse width modulation controller, so that short circuit protection is performed.
4. The power drive and protected closed loop control method of claim 3, wherein, the differential voltage is calculated by the following formula: wherein, denotes the differential voltage, denotes the load current, denotes the resistance value of the sampling resistor.
5. The method of power drive and protection closed loop control of claim 1, wherein, the soft start control circuit is used to limit the power-on inrush current, so that inrush suppression is performed; a hot plug controller is used to detect the source current of an external field effect transistor; When powered on, an internal current source of the hot plug controller charges a current sensing pin capacitor to form a ramp current, and controls the gate voltage of the field effect transistor to gradually rise through the ramp current, to generate the inrush current; The inrush current is limited within 120% of the rated value; When an overcurrent fault is detected, the hot plug controller triggers a hiccup mode, and performs a restart power link every preset period until the fault is resolved; When it is detected that no overcurrent fault occurs, the current operating state is maintained.
6. The method of claim 1, wherein the phase information of the load reflection coefficient is a phase value of the load reflection coefficient, and the phase information lookup table is a pre-defined phase interval mapping table. The phase information of the load reflection coefficient is obtained, and an inductance / capacitance combination of the variable dynamic impedance matching network is selected according to the phase information, and the inductance / capacitance parameters are switched through relays to optimize the transmission VSWR between the power amplifier output end and the load, which comprises: The reflection signals between the power amplifier output end and the load are collected through double directional couplers; The phase value of the reflection coefficient of the reflection signals is extracted by using a phase detector; According to the phase value, the number of the inductance / capacitance combination of the variable dynamic impedance matching network corresponding to the preset phase interval mapping table is matched, wherein the phase interval mapping table is pre-calibrated by a vector network analyzer, and is used to store the mapping relationship between the phase interval and the inductance / capacitance combination of the variable dynamic impedance matching network; The parameters of the variable dynamic impedance matching network are independently switched through at least four groups of relays, wherein the first group of relays is used to control the on-off of the main inductor, the second group of relays and the third group of relays are used to control the on-off of the two groups of parallel capacitors respectively, and the fourth group of relays is used to control the on-off of the series inductor; Within the response bandwidth, the transmission VSWR between the power amplifier output end and the load is optimized to be below 1.2:
1.
7. The method of power drive and protection closed loop control of claim 1, wherein, The priority level is that the short circuit protection priority is higher than the over-temperature protection priority, and the over-temperature protection priority is higher than the inrush suppression priority.
8. A closed loop control system for power driving and protection, characterized by, It comprises: A feedback circuit building module is configured to build a voltage feedback type circuit by using a high-speed operational amplifier, and to form a closed-loop gain structure through a feedback network of the voltage feedback type circuit; A short circuit protection processing module is configured to monitor a load current of an output end of the voltage feedback type circuit in real time, and to trigger a protection mechanism to turn off an output stage when the load current exceeds a first set threshold, so as to perform short circuit protection; An inrush suppression processing module is configured to limit an inrush current by a soft start control circuit, so as to perform inrush suppression; A VSWR optimization module is configured to obtain phase information of a load reflection coefficient, to select an inductance / capacitance combination of a variable dynamic impedance matching network according to the phase information, and to switch inductance / capacitance parameters through relays, so as to optimize the transmission VSWR between a power amplifier output end and the load; A temperature protection processing module is configured to monitor a power tube heat sink temperature, and to dynamically adjust a resistance value of the feedback network based on a temperature deviation, so as to perform over-temperature protection; A cooperative execution control module is configured to perform cooperative control of the short circuit protection, the over-temperature protection and the inrush suppression according to the priority. The monitoring the temperature of the power tube heat sink and dynamically adjusting the resistance value of the feedback network based on the temperature deviation to perform over-temperature protection comprises: a platinum resistance temperature sensor is attached to the power tube heat sink, and three groups of wires are electrically connected to the platinum resistance temperature sensor through a bridge structure to eliminate lead resistance error, wherein the resistance of the first group of wires is included in the high-end bias loop, the resistance of the second group of wires is isolated by the high input impedance of the amplifier, and the resistance of the third group of wires is self-compensated through the bridge; the real-time temperature is converted into a voltage signal based on the linear relationship between the resistance value of the platinum resistance temperature sensor and the working temperature; the working temperature range is divided into preset intervals, and a compensation coefficient is dynamically calculated by a linear interpolation algorithm according to the interval in which the real-time temperature is located; the resistance value of the feedback network is adjusted in real time through a digital potentiometer to compensate for the gain of the temperature deviation; when the temperature deviation exceeds a second set threshold, the heat dissipation device is started and the output power is reduced; and the gain of the compensation temperature deviation is calculated by the following formula: wherein, represents a real-time temperature corresponding actual gain, represents a reference temperature corresponding initial gain, represents a compensation coefficient.
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Closed-loop control system and method for medical heat sealing machine, electronic equipment and medium
CN116811266A