A wideband injection-locked frequency divider based on three-point injection

Abstract

This invention discloses a broadband injection-locked divider based on three-point injection, relating to the field of radio frequency integrated circuit technology. It addresses the technical problems of insufficient actual locking bandwidth and decreased operating frequency caused by existing single-point or dual-node injection methods. The broadband injection-locked divider based on three-point injection of this invention includes a first ring resonator unit and a second ring resonator unit; wherein... n The first ring vibration unit is connected in series to form a chain structure. n The second ring resonator is an odd number greater than or equal to 3; the second ring resonator is configured with a direct injection unit, a tail current injection unit, and a cross-coupled inverter injection unit; the differential output terminal of the chain structure is connected to the differential input terminal of the second ring resonator; a first signal is injected through the direct injection unit, the tail current injection unit, and / or the cross-coupled inverter injection unit; the second ring resonator receives the second signal from the first ring resonator and converts it into a four-way frequency divider signal through the second ring resonator.

Description

Technical Field

[0001] This invention relates to the field of radio frequency integrated circuit technology, and more specifically, to a broadband injection-locked quad divider based on three-point injection. Background Technology

[0002] Frequency dividers are key modules in radio frequency and millimeter-wave communication systems, used to divide high-frequency signals to lower frequencies for subsequent signal processing. In systems such as phase-locked loops, frequency synthesizers, and wireless transceivers, the performance of frequency dividers directly affects the system's frequency stability, phase noise, and power consumption. Among them, injection-locked frequency dividers have become the preferred solution for high-frequency applications due to their advantages such as low power consumption, low phase noise, and high operating frequency.

[0003] In existing technologies, injection-locked frequency dividers based on LC resonant cavities, while possessing high-frequency operation capabilities and low phase noise characteristics, suffer from a narrow bandwidth due to the Q value of the resonant cavity. Furthermore, the on-chip integrated inductor occupies a significant chip area, hindering miniaturization requirements. In contrast, ring oscillator-based frequency dividers, with their inductor-free design, excel in both compact size and wide locking range. However, their inherent multi-stage inverter cascade structure leads to a significant increase in power consumption, particularly in high-frequency millimeter-wave applications. Current mainstream ring oscillator injection-locked frequency dividers often employ single-point or dual-node injection schemes, such as direct gate injection or tail current injection, using one or two injection nodes to couple external signals to extend the locking range. However, these methods still suffer from the following drawbacks: Firstly, single-point injection has limited synchronization efficiency, making it difficult to fully excite the oscillator's harmonic response, resulting in insufficient actual locking bandwidth. Secondly, while dual-node injection can enhance injection strength, its bandwidth expansion effect is limited. Further bandwidth enhancement often requires increasing the injector size, leading to a decrease in operating frequency. Summary of the Invention

[0004] The purpose of this invention is to provide a broadband injection-locked divider based on three-point injection, which solves the technical problems of insufficient actual locking bandwidth caused by the single-point or dual-node injection methods used in existing ring oscillator injection-locked dividers, and the decrease in operating frequency due to the need for additional injector size. In view of this, the invention achieves this through the following solution.

[0005] This invention provides a broadband injection-locked quad divider based on three-point injection, comprising:

[0006] First ring vibration unit, n The first ring vibration unit is connected in series to form a chain structure;

[0007] The second ring resonator unit is configured with a direct injection unit, a tail current injection unit, and a cross-coupled inverter injection unit; the differential output terminal of the chain structure is connected to the differential input terminal of the second ring resonator unit.

[0008] A first signal is injected through the direct injection unit, the tail current injection unit, and / or the cross-coupled inverter injection unit; the second ring resonator unit receives a second signal from the first ring resonator unit, which is converted into a third signal by the second ring resonator unit, and the third signal is a frequency divider signal;

[0009] in, n It is an odd number greater than or equal to 3.

[0010] Compared with the prior art, in the broadband injection-locked divider based on three-point injection of the present invention, multiple first ring resonator units are connected in series to form a chain structure, and the first ring resonator units are interconnected with the second ring resonator units through differential output terminals; the second ring resonator unit is configured with a direct injection unit, a tail current injection unit, and a cross-coupled inverter injection unit; a first signal can be injected into the direct injection unit, the tail current injection unit, and / or the cross-coupled inverter injection unit, while the second ring resonator unit receives a second signal from the first ring resonator unit, and the second signal is converted into a divider-by-four third signal by the second ring resonator unit, thereby dividing the high-frequency second signal into a lower-frequency third signal. In the above technical solution, the first signal injection is performed through three methods: direct injection unit, tail current injection unit, and cross-coupled inverter injection unit, which improves the injection strength and thus expands the locking bandwidth. The signal injection method of the cross-coupled inverter injection unit can directly utilize the cross-coupled inverter structure in the negative resistance unit to achieve injection, which can further increase the total injection current. Compared with the existing dual-node injection, the present invention does not increase the injector size, and therefore does not cause a decrease in operating frequency, thus meeting the requirements of ultra-wideband and high frequency simultaneously. Through the above technical solution of the present invention, the technical problems of insufficient actual locking bandwidth caused by the single-point or dual-node injection method used in the existing ring oscillator injection locking frequency divider, and the decrease in operating frequency caused by the need to increase the injector size, are solved.

[0011] Furthermore, in the broadband injection-locked divider based on three-point injection of the present invention, the first output terminal of the direct injection unit is connected to the first output terminal of the cross-coupled inverter injection unit, and the second output terminal of the direct injection unit is connected to the second output terminal of the cross-coupled inverter injection unit; the common source node of the cross-coupled inverter injection unit is connected to the tail current injection unit.

[0012] Furthermore, in the broadband injection-locked quad divider based on three-point injection of the present invention, the direct injection unit includes a first NMOS transistor, a first capacitor, and a first resistor;

[0013] The first terminal of the first capacitor is connected to the first injection signal, and the first terminal of the second resistor is connected to the bias voltage;

[0014] The gate terminal of the first NMOS transistor is connected to the second terminal of the first capacitor and the first terminal of the first resistor. The drain terminal of the first NMOS transistor is connected to the first output terminal of the direct injection unit, and the source terminal of the first NMOS transistor is connected to the second output terminal of the direct injection unit.

[0015] Furthermore, in the broadband injection-locked divider based on three-point injection of the present invention, the tail current injection unit includes a fourteenth NMOS transistor, a second capacitor, and a second resistor.

[0016] The first terminal of the second capacitor is connected to the first injection signal, and the second terminal of the second resistor is connected to the bias voltage.

[0017] The gate terminal of the fourteenth NMOS transistor is connected to the second terminal of the second capacitor and the first terminal of the second resistor. The drain terminal of the fourteenth NMOS transistor is connected to the common source node, and the source terminal of the fourteenth NMOS transistor is connected to the power supply ground terminal.

[0018] Furthermore, in the broadband injection-locked divider based on three-point injection of the present invention, the cross-coupled inverter injection unit includes a fourth PMOS transistor, a fifth PMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, an eighth PMOS transistor, a ninth PMOS transistor, a tenth NMOS transistor, and an eleventh NMOS transistor.

[0019] The gate of the fourth PMOS transistor is connected to the gate of the seventh NMOS transistor; the source of the fourth PMOS transistor is connected to the power supply terminal; and the drain of the fourth PMOS transistor is connected to the source of the fifth PMOS transistor. The gate of the fifth PMOS transistor is connected to the second injection signal, and the drain of the fifth PMOS transistor is connected to the drain of the sixth NMOS transistor. The gate of the sixth NMOS transistor is connected to the third injection signal, and the source of the sixth NMOS transistor is connected to the drain of the seventh NMOS transistor. The source terminal of the eleventh NMOS transistor is connected; the gate terminal of the eighth PMOS transistor is connected to the gate terminal of the eleventh NMOS transistor, the source terminal of the eighth PMOS transistor is connected to the power supply terminal, and the drain terminal of the eighth PMOS transistor is connected to the source terminal of the ninth PMOS transistor; the gate terminal of the ninth PMOS transistor is connected to the third injection signal, and the drain terminal of the ninth PMOS transistor is connected to the drain terminal of the tenth NMOS transistor; the gate terminal of the tenth NMOS transistor is connected to the third injection signal, and the source terminal of the tenth NMOS transistor is connected to the drain terminal of the eleventh NMOS transistor.

[0020] Furthermore, in the broadband injection-locked quad divider based on three-point injection of the present invention, the second ring resonator unit further includes a second PMOS transistor, a third NMOS transistor, a twelfth PMOS transistor, and a thirteenth NMOS transistor;

[0021] The gate of the second PMOS transistor is connected to the gate of the third NMOS transistor, the drain of the second PMOS transistor is connected to the drain of the third NMOS transistor, and the source of the second PMOS transistor is connected to the source of the twelfth PMOS transistor; the source of the third NMOS transistor is connected to the source of the thirteenth NMOS transistor; the gate of the twelfth PMOS transistor is connected to the gate of the thirteenth NMOS transistor, and the drain of the twelfth PMOS transistor is connected to the drain of the thirteenth NMOS transistor.

[0022] Furthermore, in the broadband injection-locked divider based on three-point injection of the present invention, the first ring resonator unit includes a fifteenth PMOS transistor, a sixteenth NMOS transistor, a seventeenth PMOS transistor, an eighteenth NMOS transistor, a nineteenth PMOS transistor, a twentieth NMOS transistor, a twenty-first PMOS transistor, and a twenty-second NMOS transistor.

[0023] The gate of the fifteenth PMOS transistor is connected to the gate of the sixteenth NMOS transistor. The source of the fifteenth PMOS transistor is connected to the source of the seventeenth PMOS transistor, the nineteenth PMOS transistor, and the twenty-first PMOS transistor, and the connection point is connected to the power supply terminal. The drain of the fifteenth PMOS transistor is connected to the drain of the sixteenth NMOS transistor, the drain of the seventeenth PMOS transistor, the drain of the eighteenth NMOS transistor, the gate of the nineteenth PMOS transistor, and the gate of the twentieth NMOS transistor. The source of the sixteenth NMOS transistor is connected to the source of the eighteenth NMOS transistor, the source of the twentieth NMOS transistor, and the source of the twenty-second NMOS transistor, and the connection point is connected to the power supply ground terminal. The gate of the seventeenth PMOS transistor is connected to the gate of the eighteenth NMOS transistor, the drain of the nineteenth PMOS transistor, the drain of the twentieth NMOS transistor, the drain of the twenty-first PMOS transistor, and the drain of the twenty-second NMOS transistor. The gate of the twenty-first PMOS transistor is connected to the gate of the twenty-second NMOS transistor.

[0024] Furthermore, in the broadband injection-locked quad divider based on three-point injection of the present invention, the first ring resonator unit is provided with a first input terminal, a second input terminal, a first output terminal, and a second output terminal;

[0025] Specifically, the connection point between the gate of the fifteenth PMOS transistor and the gate of the sixteenth NMOS transistor serves as the first input terminal of the first ring resonator unit; the connection point between the gate of the twenty-first PMOS transistor and the gate of the twenty-second NMOS transistor serves as the second input terminal of the first ring resonator unit; the connection point between the gate of the seventeenth PMOS transistor and the gate of the eighteenth NMOS transistor, the drain of the nineteenth PMOS transistor, the drain of the twentieth NMOS transistor, the drain of the twenty-first PMOS transistor, and the drain of the twenty-second NMOS transistor serves as the first output terminal of the first ring resonator unit; and the connection point between the drain of the fifteenth PMOS transistor and the drain of the sixteenth NMOS transistor, the drain of the seventeenth PMOS transistor, the drain of the eighteenth NMOS transistor, the gate of the nineteenth PMOS transistor, and the gate of the twentieth NMOS transistor serves as the second output terminal of the first ring resonator unit.

[0026] Furthermore, in the broadband injection-locked quad divider based on three-point injection of the present invention, the second ring resonator unit is provided with a first input terminal, a second input terminal, a first output terminal, and a second output terminal;

[0027] Wherein: the gate terminal of the second PMOS transistor is connected to the gate terminal of the third NMOS transistor, and the connection point is used as the first input terminal of the second ring oscillator unit; the gate terminal of the twelfth PMOS transistor is connected to the gate terminal of the thirteenth NMOS transistor, and the connection point is used as the second input terminal of the second ring oscillator unit; the drain terminal of the first NMOS transistor is connected to the drain terminals of the ninth, tenth, twelfth, and thirteenth NMOS transistors, and the connection point is used as the first output terminal of the second ring oscillator unit; the source terminal of the first NMOS transistor is connected to the drain terminals of the second, third, fifth, and sixth NMOS transistors, the gate terminal of the eighth PMOS transistor, and the gate terminal of the eleventh NMOS transistor, and the connection point is used as the second output terminal of the second ring oscillator unit.

[0028] Furthermore, in the broadband injection-locked quad divider based on three-point injection of the present invention, the first ring resonator unit includes a first-stage first ring resonator unit, a second-stage first ring resonator unit, and a third-stage first ring resonator unit;

[0029] The first output terminal of the first-stage first-ring vibration unit is connected to the first input terminal of the second-stage first-ring vibration unit, and the second output terminal of the first-stage first-ring vibration unit is connected to the second input terminal of the second-stage first-ring vibration unit; the first output terminal of the second-stage first-ring vibration unit is connected to the first input terminal of the third-stage first-ring vibration unit, and the second output terminal of the second-stage first-ring vibration unit is connected to the second input terminal of the third-stage first-ring vibration unit; the first output terminal of the third-stage first-ring vibration unit is connected to the first input terminal of the second-ring vibration unit, and the second output terminal of the third-stage first-ring vibration unit is connected to the second input terminal of the second-ring vibration unit; the first output terminal of the second-ring vibration unit is connected to the second input terminal of the first-stage first-ring vibration unit, and the second output terminal of the second-ring vibration unit is connected to the first input terminal of the first-stage first-ring vibration unit. Attached Figure Description

[0030] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this invention, illustrate exemplary embodiments of the invention and are used to explain the invention, but do not constitute an undue limitation of the invention. In the drawings:

[0031] Figure 1 This is a schematic diagram of the broadband injection-locked frequency divider based on three-point injection of the present invention.

[0032] Figure 2 This is a schematic diagram of the structure of the first ring vibration unit in this invention;

[0033] Figure 3 This is a schematic diagram of the structure of the second ring vibration unit in this invention;

[0034] Figure 4 This is a schematic diagram of the simulation results of the locking range in Simulation 1 of this invention.

[0035] Figure label:

[0036] Figures 1 to 3 In the diagram, M1 is the first NMOS transistor; M2 is the second PMOS transistor; M3 is the third NMOS transistor; M4 is the fourth PMOS transistor; M5 is the fifth PMOS transistor; M6 is the sixth NMOS transistor; M7 is the seventh NMOS transistor; M8 is the eighth PMOS transistor; M9 is the ninth PMOS transistor; M10 is the tenth NMOS transistor; M11 is the eleventh NMOS transistor; M12 is the twelfth PMOS transistor; M13 is the thirteenth NMOS transistor; M14 is the fourteenth NMOS transistor; M15 is the fifteenth PMOS transistor; M16 is the sixteenth NMOS transistor; M17 is the tenth NMOS transistor. 7. PMOS transistor; M18. 18th NMOS transistor; M19. 19th PMOS transistor; M20. 20th NMOS transistor; M21. 21st PMOS transistor; M22. 22nd NMOS transistor; INJ_S. First injection signal; INJ_N. Second injection signal; INJ_P. Third injection signal; CLK_P. First input / first output terminal; CLK_N. Second input / second output terminal; VBIAS1. First bias voltage; VBIAS2. Second bias voltage; VDD. Power supply voltage; C1. First capacitor; C2. Second capacitor; R1. First resistor; R2. Second resistor. Detailed Implementation

[0037] To make the technical problems to be solved, the technical solutions, and the beneficial effects of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present invention and are not intended to limit the present invention.

[0038] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0039] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified. "Several" means one or more, unless otherwise explicitly specified.

[0040] In existing technologies, injection-locked frequency dividers based on LC resonant cavities, while possessing high-frequency operation capabilities and low phase noise characteristics, suffer from a narrow bandwidth due to the Q value of the resonant cavity. Furthermore, the on-chip integrated inductor occupies a significant chip area, hindering miniaturization requirements. In contrast, ring oscillator-based frequency dividers, with their inductor-free design, excel in both compact size and wide locking range. However, their inherent multi-stage inverter cascade structure leads to a significant increase in power consumption, particularly in high-frequency millimeter-wave applications. Current mainstream ring oscillator injection-locked frequency dividers often employ single-point or dual-node injection schemes, such as direct gate injection or tail current injection, using one or two injection nodes to couple external signals to extend the locking range. However, these methods still suffer from the following drawbacks: Firstly, single-point injection has limited synchronization efficiency, making it difficult to fully excite the oscillator's harmonic response, resulting in insufficient actual locking bandwidth. Secondly, while dual-node injection can enhance injection strength, its bandwidth expansion effect is limited. Further bandwidth enhancement often requires increasing the injector size, leading to a decrease in operating frequency.

[0041] Please see Figures 1 to 4 To address the aforementioned technical problems, this invention provides a broadband injection-locked quad divider based on three-point injection, comprising a first ring resonator unit and a second ring resonator unit; wherein:

[0042] n The first ring resonator units are connected in series to form a chain structure; the second ring resonator unit is configured with a direct injection unit, a tail current injection unit, and a cross-coupled inverter injection unit; the differential output terminal of the chain structure is connected to the differential input terminal of the second ring resonator unit; a first signal is injected through the direct injection unit, the tail current injection unit, and / or the cross-coupled inverter injection unit; the second ring resonator unit receives a second signal from the first ring resonator unit, which is converted into a third signal by the second ring resonator unit, and the third signal is a frequency-divided signal; wherein... n It is an odd number greater than or equal to 3.

[0043] In the broadband injection-locked divider based on three-point injection of the present invention, multiple first ring resonator units are connected in series to form a chain structure, and the first ring resonator units are interconnected with the second ring resonator units through differential output terminals; the second ring resonator unit is configured with a direct injection unit, a tail current injection unit, and a cross-coupled inverter injection unit; a first signal can be injected into the direct injection unit, the tail current injection unit, and / or the cross-coupled inverter injection unit, while the second ring resonator unit receives a second signal from the first ring resonator unit, and the second signal is converted into a divider-by-four third signal by the second ring resonator unit, thereby dividing the high-frequency second signal into a lower-frequency third signal. In the above technical solution, the first signal injection is performed through three methods: direct injection unit, tail current injection unit, and cross-coupled inverter injection unit, which improves the injection strength and thus expands the locking bandwidth. The signal injection method of the cross-coupled inverter injection unit can directly utilize the cross-coupled inverter structure in the negative resistance unit to achieve injection, which can further increase the total injection current. Compared with the existing dual-node injection, the present invention does not increase the injector size, and therefore does not cause a decrease in operating frequency, thus meeting the requirements of ultra-wideband and high frequency simultaneously. Through the above technical solution of the present invention, the technical problems of insufficient actual locking bandwidth caused by the single-point or dual-node injection method used in the existing ring oscillator injection locking frequency divider, and the decrease in operating frequency caused by the need to increase the injector size, are solved.

[0044] As one possible implementation, in the broadband injection-locked divider based on three-point injection of the present invention, the first output terminal of the direct injection unit is connected to the first output terminal of the cross-coupled inverter injection unit, and the second output terminal of the direct injection unit is connected to the second output terminal of the cross-coupled inverter injection unit. The common source node of the cross-coupled inverter injection unit is connected to the tail current injection unit. With this technical solution, the present invention can achieve deep synergy of the three-point injection structure through specific circuit connection relationships, and further optimize high-frequency performance and energy efficiency while maintaining ultra-wideband locking capability. In other embodiments of the present invention, each stage of the ring resonator unit (the first ring resonator unit and the second ring resonator unit) is directly interconnected with the differential input terminal of the next stage ring resonator unit through the differential output terminal, and finally the final stage ring resonator unit (the second ring resonator unit) outputs the divider signal. The existing ring resonator unit is composed of cross-coupled CMOS inverters, forming a closed-loop positive feedback oscillation circuit. The present invention introduces three injection methods in the broadband injection-locked divider, namely direct injection, tail current injection and cross-coupled inverter injection, which can simultaneously meet the requirements of ultra-wideband and high frequency.

[0045] Please see Figure 3As one possible implementation, in the broadband injection-locked quad divider based on three-point injection of the present invention, the direct injection unit includes a first NMOS transistor M1, a first capacitor, and a first resistor; the first terminal of the first capacitor is connected to the first injection signal INJ_S, and the first terminal of the first resistor is connected to the first bias voltage VBIAS1; the gate terminal of the first NMOS transistor M1 is connected to the second terminal of the first capacitor and the second terminal of the first resistor, the drain terminal of the first NMOS transistor M1 is connected to the first output terminal of the direct injection unit, and the source terminal of the first NMOS transistor M1 is connected to the second output terminal of the direct injection unit. With this technical solution, the first capacitor is connected in series in the injection signal path, blocking the DC component and allowing only the high-frequency injection signal (the first signal) to pass through, avoiding DC bias conflicts affecting the oscillator operating point and ensuring the intrinsic frequency stability of the ring oscillator unit; the first resistor biases the gate to a fixed voltage Vbias, forming a high-pass network with the capacitor, which can ensure the lossless passage of the target frequency band (such as millimeter wave) signal while suppressing low-frequency noise. The first NMOS transistor M1 can use the minimum channel length (e.g., L=28nm in a 28nm process), with its drain and source directly connected to the differential output terminal to avoid introducing additional parasitic capacitance. In other embodiments of the present invention, the direct injection method is implemented through a direct injection module. For example, the direct injection module is implemented by the first NMOS transistor M1. Specifically, the drain of the first NMOS transistor M1 is connected to the first output terminal, and the source is connected to the second output terminal, forming a common-source amplifier structure. The gate receives the single-ended injection signal INJ_S through the first DC blocking capacitor, i.e., through the first capacitor C1, and is connected to the DC bias voltage, i.e., through the first bias resistor R1, i.e., through the first bias voltage VBIAS1, forming a direct modulation path for the high-frequency signal. At the same time, an RC filter network is added to the direct injection path to optimize noise performance.

[0046] Please see Figure 3In one possible implementation, the broadband injection-locked quad divider based on three-point injection of the present invention includes a fourteenth NMOS transistor M14, a second capacitor C2, and a second resistor R2; the first terminal of the second capacitor C2 is connected to the first injection signal INJ_S, and the first terminal of the second resistor R2 is connected to the second bias voltage VBIAS2; the gate terminal of the fourteenth NMOS transistor M14 is connected to the second terminal of the second capacitor C2 and the second terminal of the second resistor, the drain terminal of the fourteenth NMOS transistor M14 is connected to the common source node, and the source terminal of the fourteenth NMOS transistor M14 is connected to the power supply ground terminal. In the case of this technical solution, the core of the tail current injection unit or tail current injection module is the fourteenth NMOS transistor M14. Specifically, the source of this transistor (i.e., the fourteenth NMOS transistor M14) is directly grounded, and the four transistors connected to the drain form a common source node. The gate receives the injection signal INJ_S through the second DC blocking capacitor, i.e., through the second capacitor C2. At the same time, it is connected to the second bias voltage VBIAS2 through the second bias resistor, i.e., through the second resistor R2. This structure changes the AC impedance of the common source node by modulating the transconductance value gm of the fourteenth NMOS transistor M14, and expands the low-frequency locking range by utilizing the nonlinear characteristics of the transistor.

[0047] Please see Figure 3As one possible implementation, in the broadband injection-locked quad divider based on three-point injection of the present invention, the cross-coupled inverter injection unit includes a fourth PMOS transistor M4, a fifth PMOS transistor M5, a sixth NMOS transistor M6, a seventh NMOS transistor M7, an eighth PMOS transistor M8, a ninth PMOS transistor M9, a tenth NMOS transistor M10, and an eleventh NMOS transistor M11; the gate terminal of the fourth PMOS transistor M4 is connected to the gate terminal of the seventh NMOS transistor M7, the source terminal of the fourth PMOS transistor M4 is connected to the power supply terminal, and the drain terminal of the fourth PMOS transistor M4 is connected to the source terminal of the fifth PMOS transistor M5; the gate terminal of the fifth PMOS transistor M5 is connected to the second injection signal INJ_N, and the drain terminal of the fifth PMOS transistor M5 is connected to the drain terminal of the sixth NMOS transistor M6; the sixth NMOS transistor M6... The gate of the sixth NMOS transistor M6 is connected to the third injection signal INJ_P. The source of the sixth NMOS transistor M6 is connected to the drain of the seventh NMOS transistor M7, and the source of the seventh NMOS transistor M7 is connected to the source of the eleventh NMOS transistor M11. The gate of the eighth PMOS transistor M8 is connected to the gate of the eleventh NMOS transistor M11. The source of the eighth PMOS transistor M8 is connected to the power supply terminal. The drain of the eighth PMOS transistor M8 is connected to the source of the ninth PMOS transistor M9. The gate of the ninth PMOS transistor M9 is connected to the third injection signal INJ_P. The drain of the ninth PMOS transistor M9 is connected to the drain of the tenth NMOS transistor M10. The gate of the tenth NMOS transistor M10 is connected to the third injection signal INJ_P. The source of the tenth NMOS transistor M10 is connected to the drain of the eleventh NMOS transistor M11. In this technical solution, the cross-coupled inverter is implemented by a cross-coupled structure of two differential input stages. The gates and drains of the two stages are cross-interconnected to form a positive feedback loop, and the outputs generate complementary four-way frequency divider signals respectively. Furthermore, the injection signal of the cross-coupled inverter is a pair of differential injection signals with equal amplitude and opposite phase, which directly drive the gate of the transistor to realize the injection of mid-frequency signals. At the same time, the transistor located at the top receives the direct injection signal through its gate and works in conjunction with the injection signal of the middle cross-coupled pair to directly drive the phase lock of the oscillator.

[0048] Please see Figure 3In one possible implementation, the broadband injection-locked quad divider based on three-point injection of the present invention further includes a second PMOS transistor M2, a third NMOS transistor M3, a twelfth PMOS transistor M12, and a thirteenth NMOS transistor M13 in the second ring oscillator unit; the drain terminal of the second PMOS transistor M2 is connected to the source terminal of the first NMOS transistor M1, the gate terminal of the second PMOS transistor M2 is connected to the gate terminal of the third NMOS transistor M3, and the source terminal of the second PMOS transistor M2 is connected to the source terminal of the fourth PMOS transistor M4 and the thirteenth NMOS transistor M13. The source terminals of two PMOS transistors, M12 and M13, are connected; the drain terminal of the third NMOS transistor, M3, is connected to the source terminal of the first NMOS transistor, M1; the source terminal of the third NMOS transistor, M3, is connected to the source terminal of the seventh NMOS transistor, M7; the drain terminal of the twelfth PMOS transistor, M12, is connected to the drain terminal of the thirteenth NMOS transistor, M13; the gate terminal of the twelfth PMOS transistor, M12, is connected to the gate terminal of the thirteenth NMOS transistor, M13; and the source terminal of the thirteenth NMOS transistor, M13, is connected to the drain terminal of the fourteenth NMOS transistor, M14. Using this technical solution, the second ring oscillator unit, by combining direct injection, tail injection, and cross-coupled inverter injection, achieves a wider locking range and a higher operating frequency compared to existing injection-locked frequency dividers, significantly improving the overall performance of the circuit.

[0049] Please see Figure 2In one possible implementation, the broadband injection-locked quad divider based on three-point injection of the present invention includes a first ring resonator unit comprising a fifteenth PMOS transistor M15, a sixteenth NMOS transistor M16, a seventeenth PMOS transistor M17, an eighteenth NMOS transistor M18, a nineteenth PMOS transistor M19, a twentieth NMOS transistor M20, a twenty-first PMOS transistor M21, and a twenty-second NMOS transistor M22. The gate terminal of the fifteenth PMOS transistor M15 is connected to the gate terminal of the sixteenth NMOS transistor M16. The source terminal of the fifteenth PMOS transistor M15 is connected to the source terminals of the seventeenth PMOS transistor M17, the nineteenth PMOS transistor M19, and the twenty-first PMOS transistor M21, and the connection point is connected to the power supply terminal. The drain terminal of the fifteenth PMOS transistor M15 is connected to the drain terminal of the sixteenth NMOS transistor M16. The drain terminal of the seventeenth PMOS transistor M17, the drain terminal of the eighteenth NMOS transistor M18, the gate terminal of the nineteenth PMOS transistor M19, and the gate terminal of the twentieth NMOS transistor M20 are connected; the source terminal of the sixteenth NMOS transistor M16 is connected to the source terminal of the eighteenth NMOS transistor M18, the source terminal of the twentieth NMOS transistor M20, and the source terminal of the twenty-second NMOS transistor M22, and the connection is connected to the power supply ground terminal; the gate terminal of the seventeenth PMOS transistor M17 is connected to the gate terminal of the eighteenth NMOS transistor M18, the drain terminal of the nineteenth PMOS transistor M19, the drain terminal of the twentieth NMOS transistor M20, the drain terminal of the twenty-first PMOS transistor M21, and the drain terminal of the twenty-second NMOS transistor M22; the gate terminal of the twenty-first PMOS transistor M21 is connected to the gate terminal of the twenty-second NMOS transistor M22. In this technical solution, multiple first ring resonator units are composed of cross-coupled CMOS inverters, forming a closed-loop positive feedback oscillation circuit. The oscillation frequency is determined by the transistor transconductance and node parasitic capacitance. There are no external signal injection ports inside the unit.

[0050] Please see Figure 2In one possible implementation, in the broadband injection-locked quad divider based on three-point injection of the present invention, the first ring resonator unit is provided with a first input terminal, a second input terminal, a first output terminal, and a second output terminal; wherein, the gate terminal of the fifteenth PMOS transistor M15 is connected to the gate terminal of the sixteenth NMOS transistor M16, and the connection point serves as the first input terminal of the first ring resonator unit; the gate terminal of the twenty-first PMOS transistor M21 is connected to the gate terminal of the twenty-second NMOS transistor M22, and the connection point serves as the second input terminal of the first ring resonator unit; the gate terminal of the seventeenth PMOS transistor M17 is connected to the gate terminal of the eighteenth NMOS transistor M18, The drain terminals of the nineteenth PMOS transistor M19, the twentieth NMOS transistor M20, the twenty-first PMOS transistor M21, and the twenty-second NMOS transistor M22 are connected, and the connection point serves as the first output terminal of the first ring resonator unit. The drain terminals of the fifteenth PMOS transistor M15, the sixteenth NMOS transistor M16, the seventeenth PMOS transistor M17, the eighteenth NMOS transistor M18, the gate terminals of the nineteenth PMOS transistor M19 and the twentyth NMOS transistor M20 are connected, and the connection point serves as the second output terminal of the first ring resonator unit. Using this technical solution, the first and second ring resonator units can be connected through the first input terminals, second input terminals, first output terminals, and second output terminals of multiple first ring resonator units to form the broadband injection-locked quad divider based on three-point injection of this invention.

[0051] Please see Figure 3In one possible implementation, in the broadband injection-locked quad divider based on three-point injection of the present invention, the second ring resonator unit is provided with a first input terminal, a second input terminal, a first output terminal, and a second output terminal; wherein: the gate terminal of the second PMOS transistor M2 is connected to the gate terminal of the third NMOS transistor M3, and the connection point is used as the first input terminal of the second ring resonator unit; the gate terminal of the twelfth PMOS transistor M12 is connected to the gate terminal of the thirteenth NMOS transistor M13, and the connection point is used as the second input terminal of the second ring resonator unit; the drain terminal of the first NMOS transistor M1 is connected to the ninth PMOS transistor... The drain terminals of transistors M9, M10, M12, and M13 are connected to form the first output terminal of the second ring resonator. Similarly, the source terminal of NMOS transistor M1 is connected to the drain terminals of PMOS transistors M2, M3, M5, M6, M8, and M11, and the gate terminal of M11 serves as the second output terminal of the second ring resonator. Using this technical solution, the second ring resonator can be connected to the first ring resonator via its first input terminal, second input terminal, first output terminal, and second output terminal to form the broadband injection-locked quad divider based on three-point injection of this invention.

[0052] As one possible implementation, in the broadband injection-locked quad divider based on three-point injection of the present invention, the first ring resonator unit includes a first-stage first ring resonator unit, a second-stage first ring resonator unit, and a third-stage first ring resonator unit. The first output terminal of the first-stage first ring resonator unit is connected to the first input terminal of the second-stage first ring resonator unit, and the second output terminal of the first-stage first ring resonator unit is connected to the second input terminal of the second-stage first ring resonator unit. The first output terminal of the second-stage first ring resonator unit is connected to the first input terminal of the third-stage first ring resonator unit, and the second output terminal of the second-stage first ring resonator unit is connected to the second input terminal of the third-stage first ring resonator unit. The first output terminal of the second ring resonator unit is connected to the second input terminal of the second ring resonator unit, and the second output terminal of the third-stage first ring resonator unit is connected to the second input terminal of the second ring resonator unit. The first output terminal of the second ring resonator unit is connected to the second input terminal of the first-stage first ring resonator unit, and the second output terminal of the second ring resonator unit is connected to the first input terminal of the first-stage first ring resonator unit. Using this technical solution, the frequency locking range of the divider is extended by increasing the injection intensity, and the influence of parasitic capacitance is not introduced.

[0053] Furthermore, simulation experiments were conducted on the broadband injection-locked quad divider based on three-point injection described above. The simulation results are available in the attached document. Figure 4.

[0054] Specifically, the components used in the simulation experiment of this invention are manufactured using SMIC 40nm RF CMOS technology. A complete four-way divider circuit was built on the Cadence IC617 simulation platform under a Linux system environment. The simulation was performed using the Spectre RF simulation tool, with the power supply voltage VDD set to 1.2V, the operating temperature to 27℃, the first bias voltage VBIAS1 to 0.75V, and the second bias voltage VBIAS2 to 0.65V.

[0055] Simulation 1: Under standard operating conditions, using the Spectre RF simulation tool, the output port was set at the differential output terminal of the broadband injection-locked quad divider of this invention, and a frequency range sweep simulation was performed. The results are as follows: Figure 4 As shown, Figure 4 The simulation graph shows the locking range in Simulation 1. The horizontal axis represents the input signal frequency in GHz, and the vertical axis represents the input power in dBm. The simulation results show that when the input power is 0 dBm, the locking range is 2.12-29.20 GHz.

[0056] Simulation 2: To verify the functionality of the circuit unit corresponding to the three-point injection, a simulation comparing injection efficiency was specifically designed. While maintaining a constant total injection power, the lock-in range was simulated for single injection path and three-point combined injection. The results show that the lock-in range is 82.8% when using direct injection alone, 64.5% for tail injection, and ±50.2% for cross-coupled inverter injection; while the lock-in range expands to 172.5% with three-point combined injection, verifying the significant advantages of multi-path collaborative injection.

[0057] Simulation 3: Transient simulation analysis of startup characteristics was performed. The input signal was applied at 5ns, and the results showed that the circuit completed initial locking within 15ns and reached a fully stable state within 35ns.

[0058] Simulation results demonstrate that the proposed broadband injection-locked divider based on three-point injection achieves an ultra-wide locking range and excellent phase noise performance while maintaining low power consumption and low voltage. These superior performance indicators fully validate the technical advantages of the three-point injection architecture, providing a high-performance frequency conversion solution for millimeter-wave communication systems.

[0059] In the description of the above embodiments, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0060] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A broadband injection-locked quad divider based on three-point injection, characterized in that, include: First ring vibration unit, n The first ring vibration unit is connected in series to form a chain structure; The second ring resonator unit is configured with a direct injection unit, a tail current injection unit, and a cross-coupled inverter injection unit; the differential output terminal of the chain structure is connected to the differential input terminal of the second ring resonator unit. A first signal is injected through the direct injection unit, the tail current injection unit, and / or the cross-coupled inverter injection unit; the second ring resonator unit receives a second signal from the first ring resonator unit, which is converted into a third signal by the second ring resonator unit, and the third signal is a frequency divider signal; in, n An odd number greater than or equal to 3; The first output terminal of the direct injection unit is connected to the first output terminal of the cross-coupled inverter injection unit, and the second output terminal of the direct injection unit is connected to the second output terminal of the cross-coupled inverter injection unit; the common source node of the cross-coupled inverter injection unit is connected to the tail current injection unit. The direct injection unit includes a first NMOS transistor, a first capacitor, and a first resistor; the first terminal of the first capacitor is connected to a first injection signal, and the second terminal of the first resistor is connected to a bias voltage; the gate terminal of the first NMOS transistor is connected to the second terminal of the first capacitor and the first terminal of the first resistor, the drain terminal of the first NMOS transistor is connected to the first output terminal of the direct injection unit, and the source terminal of the first NMOS transistor is connected to the second output terminal of the direct injection unit. The tail current injection unit includes a fourteenth NMOS transistor, a second capacitor, and a second resistor; the first terminal of the second capacitor is connected to a first injection signal, and the second terminal of the second resistor is connected to a bias voltage; the gate terminal of the fourteenth NMOS transistor is connected to the second terminal of the second capacitor and the first terminal of the second resistor, the drain terminal of the fourteenth NMOS transistor is connected to a common source node, and the source terminal of the fourteenth NMOS transistor is connected to the power supply ground. The cross-coupled inverter injection unit includes a fourth PMOS transistor, a fifth PMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, an eighth PMOS transistor, a ninth PMOS transistor, a tenth NMOS transistor, and an eleventh NMOS transistor. The gate of the fourth PMOS transistor is connected to the gate of the seventh NMOS transistor, the source of the fourth PMOS transistor is connected to a power supply, and the drain of the fourth PMOS transistor is connected to the source of the fifth PMOS transistor. The gate of the fifth PMOS transistor is connected to a second injection signal, and the drain of the fifth PMOS transistor is connected to the drain of the sixth NMOS transistor. The gate of the sixth NMOS transistor is connected to a third injection signal. The source terminal of the NMOS transistor is connected to the drain terminal of the seventh NMOS transistor, and the source terminal of the seventh NMOS transistor is connected to the source terminal of the eleventh NMOS transistor; the gate terminal of the eighth PMOS transistor is connected to the gate terminal of the eleventh NMOS transistor, the source terminal of the eighth PMOS transistor is connected to the power supply terminal, and the drain terminal of the eighth PMOS transistor is connected to the source terminal of the ninth PMOS transistor; the gate terminal of the ninth PMOS transistor is connected to the third injection signal, and the drain terminal of the ninth PMOS transistor is connected to the drain terminal of the tenth NMOS transistor; the gate terminal of the tenth NMOS transistor is connected to the third injection signal, and the source terminal of the tenth NMOS transistor is connected to the drain terminal of the eleventh NMOS transistor.

2. The broadband injection-locked quad divider based on three-point injection according to claim 1, characterized in that, The second ring resonator unit also includes a second PMOS transistor, a third NMOS transistor, a twelfth PMOS transistor, and a thirteenth NMOS transistor; The gate of the second PMOS transistor is connected to the gate of the third NMOS transistor, the drain of the second PMOS transistor is connected to the drain of the third NMOS transistor, and the source of the second PMOS transistor is connected to the source of the twelfth PMOS transistor; the source of the third NMOS transistor is connected to the source of the thirteenth NMOS transistor; the gate of the twelfth PMOS transistor is connected to the gate of the thirteenth NMOS transistor, and the drain of the twelfth PMOS transistor is connected to the drain of the thirteenth NMOS transistor.

3. The broadband injection-locked quad divider based on three-point injection according to claim 2, characterized in that, The first ring resonator unit includes a fifteenth PMOS transistor, a sixteenth NMOS transistor, a seventeenth PMOS transistor, an eighteenth NMOS transistor, a nineteenth PMOS transistor, a twentieth NMOS transistor, a twenty-first PMOS transistor, and a twenty-second NMOS transistor; The gate of the fifteenth PMOS transistor is connected to the gate of the sixteenth NMOS transistor. The source of the fifteenth PMOS transistor is connected to the source of the seventeenth PMOS transistor, the nineteenth PMOS transistor, and the twenty-first PMOS transistor, and the connection point is connected to the power supply terminal. The drain of the fifteenth PMOS transistor is connected to the drain of the sixteenth NMOS transistor, the drain of the seventeenth PMOS transistor, the drain of the eighteenth NMOS transistor, the gate of the nineteenth PMOS transistor, and the gate of the twentieth NMOS transistor. The source of the sixteenth NMOS transistor is connected to the source of the eighteenth NMOS transistor, the source of the twentieth NMOS transistor, and the source of the twenty-second NMOS transistor, and the connection point is connected to the power supply ground terminal. The gate of the seventeenth PMOS transistor is connected to the gate of the eighteenth NMOS transistor, the drain of the nineteenth PMOS transistor, the drain of the twentieth NMOS transistor, the drain of the twenty-first PMOS transistor, and the drain of the twenty-second NMOS transistor; the gate of the twenty-first PMOS transistor is connected to the gate of the twenty-second NMOS transistor.

4. The broadband injection-locked quad divider based on three-point injection according to claim 3, characterized in that, The first ring vibration unit is provided with a first input terminal, a second input terminal, a first output terminal, and a second output terminal; Specifically, the connection point between the gate of the fifteenth PMOS transistor and the gate of the sixteenth NMOS transistor serves as the first input terminal of the first ring resonator unit; the connection point between the gate of the twenty-first PMOS transistor and the gate of the twenty-second NMOS transistor serves as the second input terminal of the first ring resonator unit; the connection point between the gate of the seventeenth PMOS transistor and the gate of the eighteenth NMOS transistor, the drain of the nineteenth PMOS transistor, the drain of the twentieth NMOS transistor, the drain of the twenty-first PMOS transistor, and the drain of the twenty-second NMOS transistor serves as the first output terminal of the first ring resonator unit; and the connection point between the drain of the fifteenth PMOS transistor and the drain of the sixteenth NMOS transistor, the drain of the seventeenth PMOS transistor, the drain of the eighteenth NMOS transistor, the gate of the nineteenth PMOS transistor, and the gate of the twentieth NMOS transistor serves as the second output terminal of the first ring resonator unit.

5. The broadband injection-locked quad divider based on three-point injection according to claim 4, characterized in that, The second ring resonator is provided with a first input terminal, a second input terminal, a first output terminal, and a second output terminal; Wherein: the gate terminal of the second PMOS transistor is connected to the gate terminal of the third NMOS transistor, and the connection point is used as the first input terminal of the second ring oscillator unit; the gate terminal of the twelfth PMOS transistor is connected to the gate terminal of the thirteenth NMOS transistor, and the connection point is used as the second input terminal of the second ring oscillator unit; the drain terminal of the first NMOS transistor is connected to the drain terminals of the ninth, tenth, twelfth, and thirteenth NMOS transistors, and the connection point is used as the first output terminal of the second ring oscillator unit; the source terminal of the first NMOS transistor is connected to the drain terminals of the second, third, fifth, and sixth NMOS transistors, the gate terminal of the eighth PMOS transistor, and the gate terminal of the eleventh NMOS transistor, and the connection point is used as the second output terminal of the second ring oscillator unit.

6. The broadband injection-locked quad divider based on three-point injection according to claim 5, characterized in that, The first ring vibration unit includes a first-stage first ring vibration unit, a second-stage first ring vibration unit, and a third-stage first ring vibration unit; The first output terminal of the first-stage first ring resonator is connected to the first input terminal of the second-stage first ring resonator, and the second output terminal of the first-stage first ring resonator is connected to the second input terminal of the second-stage first ring resonator. The first output terminal of the second-stage first ring resonator is connected to the first input terminal of the third-stage first ring resonator, and the second output terminal of the second-stage first ring resonator is connected to the second input terminal of the third-stage first ring resonator; the first output terminal of the third-stage first ring resonator is connected to the first input terminal of the second ring resonator, and the second output terminal of the third-stage first ring resonator is connected to the second input terminal of the second ring resonator; the first output terminal of the second ring resonator is connected to the second input terminal of the first-stage first ring resonator, and the second output terminal of the second ring resonator is connected to the first input terminal of the first-stage first ring resonator.

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