Preparation method of shield gate groove type power device

By forming an etching window in a shielded gate trench power device and protecting the upper part of the trench sidewall, ion implantation is performed only on the lower part of the sidewall, thus solving the problem of impurity concentration distribution variation in the existing technology and achieving precise control of the electric field distribution and performance improvement.

CN120751723AActive Publication Date: 2025-10-03HANGZHOU FULLSEMI SEMICON CO LTD
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Patent Information

Application Number
CN202511266291.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-09-05
Publication Date
2025-10-03
Estimated Expiration
2045-09-05

AI Technical Summary

Technical Problem

In the existing technology for preparing shielded gate trench power devices, high-energy general injection causes changes in the impurity concentration distribution in the channel and body regions above the epitaxial layer, affecting the device's turn-on threshold and making it difficult to accurately control the electric field distribution at the bottom of the trench.

Method used

An etching window is formed at the bottom of the trench, the first film layer is removed through an etching process, and the first film layer of the trench sidewall is etched from the bottom upward to a set height. The second film layer is used to protect the upper part of the trench sidewall to avoid ion injection. Ion injection is only performed on the lower part of the trench sidewall to achieve local charge compensation.

Benefits of technology

Without affecting the impurity concentration distribution on the upper part of the epitaxial layer, the electric field distribution at the bottom of the trench can be precisely controlled to reduce the electric field peak and improve device performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a preparation method of a shield gate groove type power device, another preparation method of the shield gate groove type power device, a semiconductor structure for the shield gate groove type power device and the shield gate groove type power device. The preparation method of the shield gate trench type power device comprises the following steps: providing a semiconductor substrate on which a trench structure is formed; forming a first oxide layer on the surface of the groove; forming a composite layer on the surface of the first oxide layer; the composite layer at least comprises a first film layer and a second film layer; removing part of the second film layer at the bottom of the groove until the first film layer is exposed, and forming an etching window at the bottom of the groove; removing the first film layer at the bottom of the groove through an etching process, and upwards etching the first film layer on the side wall of the groove from the bottom to a set height; removing the residual second film layer; and carrying out ion implantation on a set position of the region of the side wall of the groove after the first film layer is removed. The electric field distribution at the bottom of the groove can be accurately regulated and controlled.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and specifically to a method for preparing a shielded gate trench type power device, another method for preparing a shielded gate trench type power device, a semiconductor structure for a shielded gate trench type power device, and a shielded gate trench type power device. Background Art

[0002] The SGT MOSFET (Shielded Gate Trench Metal-Oxide-Semiconductor Field-Effect Transistor) is a power device designed for high-voltage and high-performance applications. In traditional manufacturing processes, high-energy blanket implantation is typically used to implant P-type impurity ions (such as aluminum or boron) into the trench bottom to achieve local charge compensation, thereby reducing the peak electric field at the trench bottom. While this method improves the electric field distribution, the indiscriminate implantation also implants P-type impurities into the channel and body regions above the epitaxial layer, beyond the trench bottom. This causes variations in the impurity concentration distribution in the channel and body regions above the epitaxial layer, thus affecting the device's turn-on threshold.

[0003] Therefore, how to precisely control the electric field distribution at the bottom of the trench without affecting the impurity concentration distribution in the channel and body regions above the epitaxial layer has become a technical problem that needs to be solved urgently. Summary of the Invention

[0004] This application provides a method for fabricating a shielded gate trench power device, another method for fabricating a shielded gate trench power device, a semiconductor structure for a shielded gate trench power device, and a shielded gate trench power device, which can precisely control the electric field distribution at the bottom of the trench without affecting the impurity concentration distribution in the channel and body regions above the epitaxial layer. The specific solution is as follows: In a first aspect, an embodiment of the present application provides a method for manufacturing a shielded gate trench power device, comprising: Providing a semiconductor substrate having a trench structure formed therein; forming a first oxide layer on the surface of the groove; forming a composite layer on the surface of the first oxide layer; the composite layer comprises at least a first film layer and a second film layer, the first film layer and the second film layer are made of different materials, and the first film layer is located between the first oxide layer and the second film layer; removing a portion of the second film layer at the bottom of the trench until the first film layer is exposed, thereby forming an etching window at the bottom of the trench; By means of an etching process, the first film layer at the bottom of the trench is removed, and the first film layer on the sidewall of the trench is etched upward from the bottom to a set height; removing the remaining second film layer; Ion implantation is performed on a set position of the area on the sidewall of the trench after the first film layer is removed.

[0005] Optionally, the composite layer further includes a third film layer, the third film layer is located between the first oxide layer and the first film layer, and the third film layer and the first film layer are made of different materials.

[0006] Optionally, before performing ion implantation on a set position of the area on the sidewall of the trench after the first film layer is removed, the method further includes: The third film layer located on the surface of the first oxide layer below the remaining first film layer is removed.

[0007] Optionally, forming a composite layer on the surface of the first oxide layer includes: forming a first nitride layer on the surface of the first oxide layer; forming a second oxide layer on a surface of the first nitride layer; A second nitride layer is formed on the surface of the second oxide layer to form a NON composite layer; wherein the first film layer is the second oxide layer, and the second film layer is the second nitride layer.

[0008] Optionally, forming a composite layer on the surface of the first oxide layer includes: forming a first film layer on the surface of the first oxide layer, wherein the first film layer is a non-oxidation layer; A second film layer is formed on the surface of the first film layer.

[0009] Optionally, removing a portion of the second film layer at the bottom of the groove to expose the first film layer includes: A portion of the second film layer at the bottom of the trench is removed by dry etching until the first film layer is exposed.

[0010] Optionally, removing the first film layer at the bottom of the trench and etching the first film layer on the sidewall of the trench from the bottom upward to a set height includes: The first film layer at the bottom of the trench is removed by wet etching, and the first film layer on the sidewall of the trench is etched upward from the bottom to a set height by wet etching.

[0011] Optionally, the third film layer located on the surface of the first oxide layer below the remaining first film layer includes: The third film layer located on the surface of the first oxide layer below the remaining first film layer is removed by wet etching.

[0012] Optionally, the set height is calculated in the following manner: Obtaining an implantation angle to be implanted, a diameter of an implantation region to be formed, and a maximum implantation depth of the sidewall region located below the remaining first film layer; The set height is determined according to the angle to be injected, the diameter of the injection area and the maximum injection depth.

[0013] Optionally, when the composite layer includes the first film layer, the second film layer, and the third film layer, the set height is determined according to the angle to be injected, the diameter of the injection area, and the maximum injection depth, and is achieved by the following formula: in, To set the height, is the angle to be injected, is the diameter of the injection area, is the sum of the thicknesses of the third film layer and the first film layer, is the maximum injection depth.

[0014] Optionally, when the composite layer includes the first film layer, the second film layer, and the third film layer, obtaining the angle to be implanted for the ion implantation in the remaining sidewall region below the first film layer includes: The angle to be implanted is determined according to the maximum implantation depth, the distance between the first oxide layers formed on the left and right sidewalls of the trench, and the sum of the thicknesses of the third film layer and the first film layer.

[0015] Optionally, the angle to be implanted is determined according to the maximum implantation depth, the distance between the first oxide layers formed on the left and right sidewalls of the trench, and the sum of the thicknesses of the third film layer and the first film layer, and is implemented by the following formula: in, is the angle to be injected, is the distance between the first oxide layers formed on the left and right side walls of the trench, is the sum of the thicknesses of the third film layer and the first film layer, is the maximum injection depth.

[0016] Optionally, after the ion implantation, the following steps are further included: The semiconductor substrate is subjected to an annealing process.

[0017] Optionally, after the ion implantation, the following steps are further included: The remaining composite layer and the first oxide layer are removed.

[0018] Optionally, the thickness of the first oxide layer is 200Å~1000Å.

[0019] Optionally, the thickness of the first nitride layer and the second nitride layer is 200A~500A; the thickness of the second oxide layer is 500A~2500A.

[0020] In a second aspect, embodiments of the present application provide another method for preparing a shielded gate trench power device, comprising: Providing a semiconductor substrate having a trench structure formed therein; forming a first oxide layer on the surface of the groove; forming a shielding layer on the upper portion of the sidewall of the trench and outside the first oxide layer; Ion implantation is performed on a predetermined position of a lower portion of the trench sidewall where the shielding layer is not formed.

[0021] In a third aspect, the present application further provides a semiconductor structure for a shielded gate trench power device, comprising: a semiconductor substrate having a trench structure formed therein; An oxide layer is formed on the surface of the groove; A shielding layer is formed on the upper surface of the oxide layer; the shielding layer is used to protect the upper portion of the trench sidewall from ion injection.

[0022] In a fourth aspect, an embodiment of the present application further provides a shielded gate trench power device, which is prepared by the method described in the first aspect or the second aspect.

[0023] Compared with the prior art, this application has the following advantages: The method for preparing a shielded gate trench power device provided in an embodiment of the present application includes: providing a semiconductor substrate, wherein a trench is formed in the semiconductor substrate; forming a first oxide layer on the surface of the trench; forming a composite layer on the surface of the first oxide layer; the composite layer includes at least a first film layer and a second film layer, the first film layer and the second film layer are made of different materials, and the first film layer is located between the first oxide layer and the second film layer; removing a portion of the second film layer at the bottom of the trench to expose the first film layer, and forming an etching window at the bottom of the trench, so that the first film layer can be removed from the bottom upward through the etching window formed at the bottom; removing the first film layer at the bottom of the trench by an etching process, and etching the first film layer of the trench sidewall from the bottom upward. The film layer is extended to a set height, and the first film layer is protected by the second film layer. The first film layer can be etched from the bottom to the top without affecting the side wall of the first film layer; the remaining second film layer is removed, so that the first oxide layer at the lower part of the groove side wall (below the set height) is exposed in the groove, and the first oxide layer at the upper part of the groove side wall (that is, above the set height) is still covered by the first film layer, so that the upper part of the groove side wall can be effectively protected, and ions are avoided from being injected into the upper part of the groove side wall when ion injection is performed through the groove side wall; ion injection is performed on the set position of the area after the first film layer is removed from the groove side wall, so as to realize local charge compensation, reduce the electric field peak at the bottom of the groove, and accurately control the electric field distribution at the bottom of the groove. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 This is a flow chart of a method for preparing a shielded gate trench power device provided in the first embodiment of the present application.

[0025] Figure 2 It is a schematic diagram of a semiconductor substrate provided in the method for preparing a shielded gate trench power device provided in an embodiment of the present application.

[0026] Figure 3 It is a schematic diagram of forming a first oxide layer on the substrate surface and the trench surface in the method for preparing a shielded gate trench power device provided in an embodiment of the present application.

[0027] Figure 4 It is a schematic diagram of forming a first film layer on the surface of the first oxide layer in the method for preparing a shielded gate trench power device provided in an embodiment of the present application.

[0028] Figure 5 This is a schematic diagram of forming a second film layer on the surface of a first film layer in the method for preparing a shielded gate trench power device provided in an embodiment of the present application.

[0029] Figure 6 This is a schematic diagram of forming a third film layer on the surface of the first oxide layer in the method for preparing a shielded gate trench power device provided in an embodiment of the present application.

[0030] Figure 7 This is a schematic diagram of forming a first film layer on the surface of a third film layer in the method for preparing a shielded gate trench power device provided in an embodiment of the present application.

[0031] Figure 8 This is a schematic diagram of forming a second film layer on the surface of a first film layer in the method for preparing a shielded gate trench power device provided in an embodiment of the present application.

[0032] Figure 9 This is a schematic diagram of an example of removing part of the second film layer at the bottom of the trench in the method for preparing a shielded gate trench power device provided in an embodiment of the present application.

[0033] Figure 10 This is a schematic diagram of an example of removing the first film layer in the method for preparing a shielded gate trench power device provided in an embodiment of the present application.

[0034] Figure 11 This is a schematic diagram of removing the remaining second film layer in the method for preparing a shielded gate trench power device provided in an embodiment of the present application.

[0035] Figure 12 It is a schematic diagram of an example of ion implantation in the method for preparing a shielded gate trench power device provided in an embodiment of the present application.

[0036] Figure 13 This is a schematic diagram of another example of removing part of the second film layer at the bottom of the trench in the method for preparing a shielded gate trench power device provided in an embodiment of the present application.

[0037] Figure 14 This is a schematic diagram of another example of removing the first film layer in the method for preparing a shielded gate trench power device provided in an embodiment of the present application.

[0038] Figure 15 This is a schematic diagram of removing the remaining second film layer and the third film layer located on the surface of the first oxide layer below the remaining first film layer in the method for preparing the shielded gate trench power device provided in an embodiment of the present application.

[0039] Figure 16 It is a schematic diagram of another example of ion implantation in the method for preparing a shielded gate trench power device provided in an embodiment of the present application.

[0040] Figure 17 It is a schematic diagram of a calculation method for setting the height in the method for preparing a shielded gate trench power device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0041] The following description sets forth many specific details to facilitate a thorough understanding of the present application. However, the present application can be implemented in many other ways than those described herein, and those skilled in the art can make similar generalizations without violating the scope of the present application. Therefore, the present application is not limited to the specific implementations disclosed below.

[0042] It should be noted that the terms "first", "second", "third", etc. in the claims, description and drawings of the present application are used to distinguish similar objects and are not used to describe a specific order or sequence. The data used in this way are interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in a sequence other than that illustrated or described herein. In addition, the terms "including", "having" and their variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0043] It should be understood that in the embodiments of the present application, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" is merely a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the previous and subsequent associated objects are in an "or" relationship. "Including A, B and / or C" means including any one, any two, or any three of A, B, and C.

[0044] It should be understood that in the embodiments of the present application, "B corresponding to A," "B corresponding to A," "A corresponds to B," or "B corresponds to A" means that B is associated with A and B can be determined based on A. Determining B based on A does not mean determining B based solely on A; B can also be determined based on A and / or other information.

[0045] In the related art, for SGT MOSFET, in order to fully realize the device's voltage resistance potential, in addition to the methods mentioned in the background technology, the following methods will also be adopted: first, after forming the field oxide, fill the photoresist and etch the photoresist to the target depth; then, partially etch the upper field oxide to the target thickness; finally, remove the photoresist and fill the polysilicon again.

[0046] However, in the above method, since the adhesion between the photoresist and the side wall of the oxide layer is often not strong enough, when etching the photoresist, the chemical solution may penetrate along the gap between the photoresist and the oxide layer to places that should not be corroded, resulting in abnormal and unstable morphology, affecting device performance.

[0047] Based on the above issues, in order to reduce process complexity and manufacturing costs while improving the field strength distribution and overall performance of SGT MOSFET devices, the first embodiment of this application provides a method for preparing a shielded gate trench power device. The method for preparing a shielded gate trench power device provided in the first embodiment of this application is used to prepare a shielded gate trench power device (also known as an SGT MOSFET).

[0048] The technical solution of the present application is described in detail below through specific embodiments. It should be noted that the following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0049] The following, combined Figures 1 to 16 The present invention introduces a method for preparing a shielded gate trench power device provided in an embodiment of the present application.

[0050] like Figure 1 , which is a flow chart of a method for preparing a shielded gate trench power device provided by the present application, including the following steps S101 to S107.

[0051] Step S101: providing a semiconductor substrate, wherein a trench is formed in the semiconductor substrate.

[0052] In semiconductor manufacturing, a semiconductor substrate refers to the fundamental material used to fabricate semiconductor devices. Semiconductor substrates can include, but are not limited to, pure single-crystalline silicon (Si), gallium arsenide (GaAs), gallium nitride (GaN), and silicon carbide (SiC). The choice of semiconductor substrate material can be tailored to specific needs during the fabrication process.

[0053] like Figure 2 , which is a schematic diagram of a semiconductor substrate provided in the method for preparing a shielded gate trench power device provided in an embodiment of the present application, wherein the semiconductor substrate may include an epitaxial layer 02 and a substrate layer 01 , wherein a trench 03 is formed in the epitaxial layer 02 .

[0054] In a specific implementation, a trench may be formed in a semiconductor substrate to be processed where no trench is formed by the following steps: etching the epitaxial layer 02 of the semiconductor substrate to be processed to form a trench 03 .

[0055] An epitaxial layer is a new material layer with a specific doping concentration and crystal structure grown on an original semiconductor substrate through a process called epitaxial growth (epitaxy, or simply Epi). This process allows the composition, thickness, and doping type and concentration of the new layer to be controlled to achieve specific electrical properties. The epitaxial layer can be atomically matched to the substrate, forming a continuous crystal structure. The epitaxial layer can be made of the same material as the substrate (homoepitaxy) or a different material (heteroepitaxy); specifically, the epitaxial layer can be based on silicon or silicon carbide.

[0056] It should be noted that the epitaxial layer, which supports the device's current transmission, typically has higher purity and fewer defects than the original substrate. Through epitaxial growth, the dopant type and concentration in the epitaxial layer can be precisely controlled, thereby customizing the desired electrical properties. For example, in a power MOSFET, the breakdown voltage and on-resistance can be optimized by adjusting the doping of the epitaxial layer. Furthermore, during the epitaxial growth process, materials with different doping concentrations or types can be grown layer by layer as needed to form complex multilayer structures. This capability is crucial for the manufacture of high-performance integrated circuits (ICs) and power devices. In other embodiments, the trenches may not be formed in the epitaxial layer.

[0057] Step S102: forming a first oxide layer on the surface of the trench.

[0058] Specifically, thermal oxidation or chemical vapor deposition can be performed to form a first oxide layer on the surface of the groove and the surface of the substrate. The thickness of the first oxide layer is 200 Å to 1000 Å.

[0059] like Figure 3 As shown, a first oxide layer 04 is formed on the surface of the epitaxial layer 02 and the surface of the trench 03 .

[0060] The oxide layer refers to a layer of insulating material (usually silicon dioxide) grown or deposited on the surface of the trench (the inner surface of the trench) and the surface of the epitaxial layer after the trench is etched on the semiconductor substrate. ).

[0061] It should be noted that the oxide layer, as a dielectric, provides the necessary electrical isolation between the gate and the channel, which can prevent current from flowing directly from the gate of the subsequently formed device to the source or drain, and helps to control and manage the current through the channel, ensuring that current flows only under appropriate voltage conditions. This oxide layer is generally called a field oxide layer, or field oxide for short. In addition, the formation of an oxide layer inside the trench can help optimize the electric field distribution in the channel region. Especially in high-voltage applications, good electric field management can increase the breakdown voltage and enhance the reliability and performance of the device. Typically, the thickness of the oxide layer is adjusted to increase the breakdown voltage, optimize the electric field distribution, and enhance the reliability of the device.

[0062] Specifically, an oxide layer can be formed on the trench sidewalls and the upper surface of the epitaxial layer by methods such as thermal oxidation or chemical vapor deposition (CVD). Thermal oxidation is a method of growing silicon dioxide (SiO2) by exposing the substrate to oxygen or water vapor in a high temperature environment. ) process, thermal oxidation includes dry oxygen oxidation and wet oxygen oxidation. Dry oxygen oxidation refers to the use of pure oxygen as an oxidant to generate a high-quality, dense oxide layer. Wet oxygen oxidation refers to the use of water vapor to react with silicon to generate an oxide layer. The growth rate of wet oxygen oxidation is faster than that of dry oxygen oxidation, but the density of the oxide layer is lower than that of dry oxygen oxidation. Chemical vapor deposition is a technology that uses chemical reactions to deposit thin films on the surface of a substrate.

[0063] It should be noted that if dry oxygen oxidation is selected as the thermal oxidation method in the present application, the oxidation temperature is generally between 900°C and 1100°C, and the oxidation time depends on the thickness of the oxide layer to be generated. For example, it may take about 2 hours to grow a 100-nanometer-thick oxide layer by dry oxygen oxidation at 1000°C. If wet oxygen oxidation is selected as the thermal oxidation method in the present application, the oxidation temperature is generally between 700°C and 1000°C, and the oxidation time also depends on the thickness of the oxide layer to be generated. However, the speed of wet oxygen oxidation is greater than that of dry oxygen oxidation. For example, it may take about 10 to 15 minutes to grow a 100-nanometer-thick oxide layer by wet oxygen oxidation at 1000°C. It should be noted that the oxidation temperature and oxidation time herein are merely examples and are not intended to limit the present application.

[0064] Step S103: forming a composite layer on the surface of the first oxide layer.

[0065] This step is used to form a composite layer on the surface of the first oxide layer, and the composite layer is used to form a shielding layer on the upper part of the side wall of the groove and outside the first oxide layer in the subsequent step, thereby protecting the upper part of the side wall of the groove by the shielding layer to avoid ion injection into the upper part of the side wall of the groove.

[0066] The composite layer includes at least a first film layer and a second film layer. That is, the composite layer can be a two-layer structure, or a three-layer structure, or a four-layer structure. The first film layer and the second film layer are made of different materials. For example, the first film layer is an oxide layer, and the second film layer is a nitride layer or other non-oxide layer. For another example, the first film layer is a nitride layer or other non-oxide layer, and the second film layer is an oxide layer. The first film layer is located between the first oxide layer and the second film layer.

[0067] In an optional embodiment, the composite layer has a two-layer structure, that is, the composite layer includes only the first film layer and the second film layer. The first film layer and the first oxide layer are made of different materials, that is, the first film layer is a non-oxidized layer. In this way, the first oxide layer will not be affected when a portion of the first film layer is subsequently removed.

[0068] Specifically, the composite layer may be formed by the following steps: forming a first film layer on the surface of the first oxide layer, where the first film layer is a non-oxide layer; and forming a second film layer on the surface of the first film layer.

[0069] The following is combined with Figure 4 and attached Figure 5 The process steps of the two-layer composite layer are introduced: Figure 4 As shown, after forming the first oxide layer 04 on the surface of the trench 03 and the surface of the epitaxial layer 02, a nitride layer 05-1 (ie, the first film layer) can be formed on the surface of the first oxide layer 04 by chemical vapor deposition; thereafter, as shown in FIG. Figure 5 As shown, chemical vapor deposition can be used to form an oxide layer 06-1 (i.e., the second film layer) on the surface of the nitride layer 05-1 (i.e., the surface of the first film layer). In this way, a composite layer 10 consisting of the nitride layer 05-1 and the oxide layer 06-1 is formed on the surface of the oxide layer on the surface of the groove.

[0070] In this way, a first film layer which is a non-oxide layer and a second film layer which is made of a material different from that of the first film layer are sequentially formed on the surface of the first oxide layer. In this way, in subsequent steps, the first film layer can be protected by the second film layer. Moreover, since the first film layer is a non-oxide layer, the first film layer on the lower surface of the side wall of the trench can be removed without affecting the first oxide layer of the side wall of the trench, so as to form a shielding layer on the upper part of the side wall of the trench and outside the first oxide layer, thereby avoiding the injection of ions into the upper part of the side wall of the trench.

[0071] In another optional embodiment, the composite layer has a three-layer structure, that is, in addition to the first film layer and the second film layer, the composite layer also includes a third film layer. The third film layer is located between the first oxide layer and the first film layer, and the third film layer and the first film layer are made of different materials. In addition, the third film layer and the first oxide layer are also made of different materials, that is, the third film layer is a non-oxidized layer. In this way, the subsequent removal of part of the third film layer will not affect the first oxide layer.

[0072] Specifically, the composite layer can be formed by the following steps: forming a first nitride layer on the surface of the first oxide layer; forming a second oxide layer on the surface of the first nitride layer; and forming a second nitride layer on the surface of the second oxide layer to form a NON composite layer; wherein the first film layer is the second oxide layer, and the second film layer is the second nitride layer. The thickness of the first nitride layer and the second nitride layer is 200Å to 500Å, and the thickness of the second oxide layer is 500Å to 2500Å.

[0073] The following is combined with Figure 6 , Attachment Figure 7 and attached Figure 8 The process steps of the three-layer composite layer are introduced: Figure 6 As shown, after forming the first oxide layer 04 on the surface of the trench 03 and the surface of the epitaxial layer 02, a first nitride layer 07 (ie, the third film layer) can be formed on the surface of the first oxide layer 04 by chemical vapor deposition; thereafter, as shown in FIG. Figure 7 As shown, chemical vapor deposition can be used to form a second oxide layer 05-2 (ie, a first film layer) on the surface of the first nitride layer 07; then, as shown in FIG. Figure 8 As shown, a second nitride layer 06-2 (also known as a second film layer) can be formed on the surface of the second oxide layer 05-2 by chemical vapor deposition. In this way, a NON composite layer 10 consisting of the first nitride layer 07, the second oxide layer 05-2, and the second nitride layer 06-2 is formed on the oxide layer surface of the groove surface.

[0074] In this way, by sequentially forming a third film layer, which is a non-oxidized layer, a first film layer made of a material different from the third film layer, and a second film layer made of a material different from the first film layer, on the surface of the first oxide layer, the first film layer can be protected by the second film layer in subsequent steps. Furthermore, because the first film layer and the third film layer are made of different materials, the first film layer on the lower surface of the sidewall of the trench can be removed without affecting the third film layer. Furthermore, the third film layer can protect the first oxide layer on the sidewall of the trench from being affected, thereby forming a shielding layer on the upper portion of the sidewall of the trench, outside the first oxide layer, thereby preventing ion injection into the upper portion of the sidewall of the trench.

[0075] Step S104: removing a portion of the second film layer at the bottom of the trench until the first film layer is exposed, and forming an etching window at the bottom of the trench.

[0076] This step is used to remove part of the second film layer at the bottom of the trench to form an etching window at the bottom, providing a basis for subsequently removing the first film layer covered by the second film layer from the bottom through the etching window.

[0077] The composite layer formed on the surface of the first oxide layer is Figure 5 When the composite layer of the two-layer structure shown in Figure 9 As shown, dry etching or wet etching can be used to remove a portion of the oxide layer 06 - 1 (ie, the second film layer) at the bottom of the trench until the nitride layer 05 - 1 (ie, the first film layer) is exposed.

[0078] The composite layer formed on the surface of the first oxide layer is Figure 8 When the composite layer of the three-layer structure shown in Figure 13 As shown, dry etching or wet etching may be used to remove a portion of the second nitride layer 06 - 2 (ie, the second film layer) at the bottom of the trench until the second oxide layer 05 - 2 (ie, the first film layer) is exposed.

[0079] In this way, by forming an etching window at the bottom of the trench, the first film layer covered by the second film layer is exposed, which facilitates the removal of the first film layer starting from the bottom of the trench in the subsequent steps, and the first film layer on the upper part of the trench side wall is protected from being removed by the unremoved second film layer, thereby forming a shielding layer on the upper part of the trench side wall and outside the first oxide layer. In this way, the upper part of the trench side wall is protected by the shielding layer to avoid ion injection into the upper part of the trench side wall.

[0080] Step S105: removing the first film layer at the bottom of the trench through an etching process, and etching the first film layer on the sidewall of the trench upward from the bottom to a set height.

[0081] This step is used to remove the first film layer at the bottom of the trench to expose the lower surface of the first film layer on the trench sidewalls. The lower surface of the first film layer on the trench sidewalls is then etched upward from the bottom to a set height so that the first oxide layer on the lower portion of the trench sidewalls is not covered by the first film layer, providing a foundation for exposing the first oxide layer on the lower portion of the trench sidewalls in the trench in subsequent steps. In addition, the first oxide layer on the upper portion of the trench sidewalls is kept covered by the first film layer, thereby preventing ion injection into the upper portion of the trench sidewalls.

[0082] The composite layer formed on the surface of the first oxide layer is Figure 5 When the composite layer of the two-layer structure shown in Figure 10 As shown, wet etching can be used to remove the nitride layer 05-1 (ie, the first film layer) at the bottom of the trench 03, and wet etching can be used to etch the nitride layer 05-1 (ie, the first film layer) on the sidewall of the trench 03 from the bottom upward to a set height.

[0083] The composite layer formed on the surface of the first oxide layer is Figure 8 When the composite layer of the three-layer structure shown in Figure 14As shown, wet etching can be used to remove the second oxide layer 05-2 (ie, the first film layer) at the bottom of the trench 03, and wet etching can be used to etch the second oxide layer 05-2 (ie, the first film layer) on the sidewall of the trench 03 from the bottom upward to a set height.

[0084] It should be noted that if the second film layer is not formed on the surface of the first film layer, then when the first film layer on the trench sidewall is etched upward from the bottom, since the sidewall surface of the first film layer has no protective layer, the exposed sidewall of the first film layer above the set height will also be etched, resulting in an uneven thickness of the first film layer. The first film layer in some areas above the set height is thinner or even completely removed. In this way, when ion implantation is subsequently performed through the trench sidewall, ions will also be implanted in the upper part of the trench sidewall. This will cause the impurity concentration distribution in the channel and body regions above the epitaxial layer to change, thereby affecting the turn-on threshold of the device. In contrast, in the embodiment of the present application, since only a portion of the second film layer at the bottom of the trench is removed in step S105, when the first film layer on the trench sidewall is etched upward from the bottom, the unremoved second film layer will protect the sidewall of the first film layer, effectively preventing the sidewall of the first film layer above the set height from being etched, thus preventing the first film layer above the set height from having an uneven thickness or even being completely removed. This allows a uniform shielding layer to be formed above the set height of the trench sidewall, effectively protecting the upper portion of the trench sidewall and preventing ions from being injected into the upper portion of the trench sidewall during ion implantation. In this way, the electric field distribution at the bottom of the trench can be precisely controlled without affecting the impurity concentration distribution in the channel and body regions above the epitaxial layer.

[0085] Step S106: removing the remaining second film layer.

[0086] This step is used to remove the remaining second film layer so that the first oxide layer at the lower portion of the trench sidewall is exposed in the trench, thereby providing a basis for ion implantation at a set position at the lower portion of the trench sidewall.

[0087] The composite layer formed on the surface of the first oxide layer is Figure 5 When the composite layer of the two-layer structure shown in FIG. 1 is formed, only the remaining second film layer needs to be removed to expose the first oxide layer at the bottom of the trench sidewall in the trench. Figure 11 As shown, the remaining oxide layer 06 - 1 (ie, the second film layer) may be removed by wet etching, so that the first oxide layer 04 at the lower portion of the sidewall of the trench 03 is exposed in the trench 03 .

[0088] The composite layer formed on the surface of the first oxide layer is Figure 8In the case of the three-layer composite layer shown, since a third film layer is formed on the surface of the first oxide layer, after removing the remaining second film layer, the surface of the first oxide layer below the trench sidewall is still covered with the third film layer. Therefore, it is also necessary to remove the third film layer located on the surface of the first oxide layer below the remaining first film layer. Figure 15 As shown, wet etching can be used to remove the remaining second nitride layer 06-2 (i.e., the second film layer), and wet etching can be used to remove the first nitride layer 07 (i.e., the third film layer) on the surface of the first oxide layer 04 below the remaining second oxide layer 05-2 (i.e., the first film layer), so that the first oxide layer 04 at the lower portion of the sidewall of the trench 03 is exposed in the trench 03.

[0089] Thus, when the composite layer is composed of a first film layer and a second film layer, since the first film layer of the trench sidewall is etched upward from the bottom to a set height in step S105, and the remaining second film layer is removed in step S106, the first oxide layer at the lower portion of the trench sidewall (below the set height) can be exposed in the trench; when the composite layer is composed of a first film layer, a second film layer, and a third film layer, since the first film layer of the trench sidewall is etched upward from the bottom to a set height in step S105, the remaining second film layer is removed in step S106, and the third film layer located on the surface of the first oxide layer below the remaining first film layer is also removed, the first oxide layer at the lower portion of the trench sidewall (below the set height) can be exposed in the trench. In this way, ion implantation can be performed at a set position at the lower portion of the trench sidewall.

[0090] Step S107 : performing ion implantation on a set position of the area on the sidewall of the trench after the first film layer is removed.

[0091] This step is used to perform ion implantation at the lower part of the trench sidewall (i.e., below the set height) to achieve local charge compensation, reduce the electric field peak at the bottom of the trench, and precisely control the electric field distribution at the bottom of the trench.

[0092] Ion implantation is a key technology in semiconductor manufacturing, used to precisely introduce impurity atoms into semiconductor materials to alter their electrical properties. In this embodiment, in addition to implanting ions at designated locations on the trench sidewalls after the first film layer has been removed, ion implantation can also be performed at the trench bottom.

[0093] The composite layer formed on the surface of the first oxide layer is Figure 5 When the composite layer of the two-layer structure shown in Figure 12 As shown, the direction of ion injection is from B1 to A1, the angle to be injected is the angle a formed by the line segment B1A1 and the line segment A1C1, and the injection area is the area shown in 08.

[0094] The composite layer formed on the surface of the first oxide layer is Figure 8 When the composite layer of the three-layer structure shown in Figure 16 As shown, the direction of ion injection is from B2 to A2, the angle to be injected is the angle a formed by the line segment B2A2 and the line segment A2C2, and the injection area is the area shown in 08.

[0095] In an embodiment of the present application, the set height can be calculated in the following manner: obtain the angle to be injected, the diameter of the injection area to be formed and the maximum injection depth of the side wall area located below the remaining first film layer for ion injection; determine the set height based on the angle to be injected, the diameter of the injection area and the maximum injection depth.

[0096] The angle to be injected is Figure 12 and Figure 16 The angle a in the injection area to be formed is Figure 12 and Figure 16 In the area shown in Figure 08, the maximum injection depth is Figure 12 and Figure 16 The depth shown in d2 is set to Figure 12 and Figure 16 The depth shown by d1.

[0097] The setting height is determined according to the angle to be injected, the diameter of the injection area and the maximum injection depth, which can be achieved through trigonometric function relationship. Figure 17 As shown, triangle D1E1F1 is similar to triangle D2E2F2, so the length of D1E1 / the length of E1F1 = the length of D2E2 / the length of E2F2, and the length of D1E1 is , the length of E1F1 is , the length of D2E2 is , the length of E2F2 is Therefore, the set height can be calculated by the following formula (1): Formula (1) in, To set the height, is the angle to be injected, is the diameter of the injection area, is the maximum injection depth, and the composite layer formed on the surface of the first oxide layer is Figure 5 When the composite layer of the two-layer structure shown in Figure 12 As shown, is the thickness of the nitride layer 05-1 (ie, the first film layer); the composite layer formed on the surface of the first oxide layer is Figure 8 When the composite layer of the three-layer structure shown in Figure 16 As shown, It is the sum of the thicknesses of the first nitride layer 07 (ie, the third film layer) and the second oxide layer 05 - 2 .

[0098] The angle to be injected can also be calculated by trigonometric function relationship. Specifically, the composite layer formed on the surface of the first oxide layer is Figure 5 When the composite layer of the two-layer structure shown in Figure 12 As shown, is the distance between the outer side walls of the first oxide layer 04 formed on the left and right side walls of the trench, is the thickness of the nitride layer 05-1 (i.e. the first film layer). It can be seen that the length of the side B1C1 in the triangle A1B1C1 is , the length of side A1C1 in triangle A1B1C1 is Similarly, the composite layer formed on the surface of the first oxide layer is Figure 8 When the composite layer of the three-layer structure shown in Figure 16 As shown, is the distance between the outer side walls of the first oxide layer 04 formed on the left and right side walls of the trench, is the sum of the thickness of the first nitride layer 07 (also known as the third film layer) and the second oxide layer 05-2. It can be seen that the length of the side B1C1 in the triangle A1B1C1 is , the length of side A1C1 in triangle A1B1C1 is .

[0099] Therefore, the injection angle can be calculated by the following formula (2): Formula (2) in, is the angle to be injected, is the distance between the first oxide layers formed on the left and right side walls of the trench, is the maximum injection depth, and the composite layer formed on the surface of the first oxide layer is Figure 5 When the composite layer of the two-layer structure shown is is the thickness of the first film layer; the composite layer formed on the surface of the first oxide layer is Figure 8 When the composite layer of the three-layer structure shown is is the sum of the thicknesses of the first and third film layers.

[0100] After ion implantation, the semiconductor substrate may be annealed to repair implantation damage.

[0101] Specifically, the annealing temperature and time can be determined based on the type of dopant used (such as boron, phosphorus, etc.) and the desired electrical properties. Typically, this temperature range is between 400°C and 1100°C. In one implementation, the substrate can be heated to a set temperature, held for a period of time, and then rapidly cooled. This allows the annealing process to be completed in a shorter time, helping to reduce impurity diffusion while achieving a higher activation rate. In another implementation, the substrate can be placed in a high-temperature furnace and slowly heated, maintained, and cooled over a longer period of time.

[0102] After the semiconductor substrate is annealed, the remaining composite layer and the first oxide layer may be removed, and then a normal process may be performed. Specifically, first, a field oxide layer is grown or deposited through thermal oxidation or chemical vapor deposition (CVD) process to achieve electrical isolation between devices; then, polysilicon is deposited in the specified area and doped to form a source polysilicon connection layer to reduce the contact resistance of the source region and improve the electrical performance; then, an inter-gate oxide layer (such as high-quality thermal oxidation or high dielectric constant material) is sequentially constructed in the gate region as an insulating medium between the gate and other regions; then, polysilicon is deposited to form a gate electrode that controls the conduction and shutdown of the channel; then, through photolithography and ion implantation processes, P-type or N-type impurities are implanted in appropriate areas respectively to form a body region and a source region; then, a dielectric layer (such as silicon oxide or silicon nitride) is deposited and photolithography and etching are performed to etch contact holes so that the subsequent metal interconnection layer can establish an electrical connection with the electrode through the contact hole; finally, a metal layer (such as aluminum or copper) is deposited and photolithography and etching are performed to form metal electrodes for the gate, source and drain.

[0103] It can be seen that the preparation method of the shielded gate trench power device provided in the embodiment of the present application includes: providing a semiconductor substrate, in which a groove is formed; forming a first oxide layer on the surface of the groove; forming a composite layer on the surface of the first oxide layer; the composite layer includes at least a first film layer and a second film layer, the first film layer and the second film layer are made of different materials, and the first film layer is located between the first oxide layer and the second film layer; removing part of the second film layer at the bottom of the groove to expose the first film layer, and forming an etching window at the bottom of the groove, so that the first film layer can be removed from the bottom upward through the etching window formed at the bottom; removing the first film layer at the bottom of the groove through an etching process, and etching the sidewalls of the groove from the bottom upward. The first film layer is extended to a set height, and the second film layer is used to protect the first film layer. The first film layer can be etched from the bottom to the top without affecting the side wall of the first film layer; the remaining second film layer is removed, so that the first oxide layer at the lower part of the groove side wall (below the set height) is exposed in the groove, and the first oxide layer at the upper part of the groove side wall (i.e., above the set height) is still covered by the first film layer. In this way, the upper part of the groove side wall can be effectively protected, and ions are prevented from being injected into the upper part of the groove side wall when ion injection is performed through the groove side wall; ion injection is performed on the set position of the area after the first film layer is removed from the groove side wall, thereby realizing local charge compensation, reducing the electric field peak at the bottom of the groove, and accurately controlling the electric field distribution at the bottom of the groove.

[0104] The second embodiment of the present application provides another method for preparing a shielded gate trench-type power device, which includes: providing a semiconductor substrate having a trench structure formed therein; forming a first oxide layer on the surface of the trench; forming a shielding layer on the upper part of the side wall of the trench and outside the first oxide layer; and performing ion implantation on a set position of an area on the lower part of the side wall of the trench where the shielding layer is not formed.

[0105] In the method provided in the second embodiment of the present application, "providing a semiconductor substrate, wherein a trench structure is formed in the semiconductor substrate; forming a first oxide layer on the surface of the trench" can specifically refer to steps S101 and S102 in the method for preparing a shielded gate trench type power device provided in the first embodiment of the present application. In the method provided in the second embodiment of the present application, "forming a shielding layer on the upper part of the sidewall of the trench and outside the first oxide layer" can be attached. Figure 11 The remaining nitride layer 05-1 (ie, the first film layer) shown in the figure can also be a single layer structure. Figure 15The composite layer shown is composed of the remaining first nitride layer 07 (also known as the third film layer) and the remaining second oxide layer 05-2 (also known as the first film layer). Regarding the method for manufacturing the shielded gate trench power device provided in the second embodiment of the present application, please refer to the detailed description of the method for manufacturing the shielded gate trench power device provided in the first embodiment of the present application, and will not be repeated here.

[0106] It can be seen that the second embodiment of the present application provides another method for preparing a shielded gate trench power device, which can protect the upper part of the trench side wall through the shielding layer formed on the upper part of the trench side wall and outside the first oxide layer, and prevent ions from being injected into the upper part of the trench side wall when ion injection is performed through the trench side wall; ion injection is performed on the set position of the area where the shielding layer is not formed in the lower part of the trench side wall, thereby realizing local charge compensation, reducing the electric field peak at the bottom of the trench, and accurately controlling the electric field distribution at the bottom of the trench.

[0107] The third embodiment of the present application provides a semiconductor structure for a shielded gate trench power device, comprising: a semiconductor substrate having a trench structure formed therein; an oxide layer formed on the surface of the trench; a shielding layer formed on the upper surface of the oxide layer; the shielding layer is used to protect the upper portion of the trench sidewall from ion injection.

[0108] The semiconductor structure for shielded gate trench power device provided in the third embodiment of the present application can be referred to in the attached Figure 11 or Figure 15 In this embodiment, the shielding layer formed on the upper surface of the oxide layer may be an attached Figure 11 The remaining nitride layer 05-1 (ie, the first film layer) may also be a single-layer structure formed by attaching Figure 15 The remaining first nitride layer 07 (i.e., the third film layer) and the remaining second oxide layer 05-2 (i.e., the first film layer) are shown as a two-layer structure. The semiconductor structure for the shielded gate trench power device in the third embodiment of the present application can be prepared by the method for preparing the shielded gate trench power device provided in the first embodiment of the present application or the method for preparing the shielded gate trench power device provided in the second embodiment of the present application. For details, please refer to the detailed description of the method for preparing the shielded gate trench power device provided in the first embodiment of the present application and the method for preparing the shielded gate trench power device provided in the second embodiment of the present application, which will not be repeated here.

[0109] In this way, when ions are implanted into the lower portion of the trench sidewall, the upper portion of the trench sidewall can be protected from being implanted with ions.

[0110] It can be seen that the semiconductor structure for shielded gate trench power devices provided in the third embodiment of the present application has a shielding layer formed on the upper surface of the oxide layer. In this way, when ion implantation is performed on the lower part of the trench sidewall, the upper part of the trench sidewall can be protected from ion implantation.

[0111] The fourth embodiment of the present application provides a shielded gate trench type power device, which can be prepared by the preparation method of the shielded gate trench type power device provided by the first embodiment of the present application or the preparation method of the shielded gate trench type power device provided by the second embodiment of the present application. For details, please refer to the detailed introduction of the preparation method of the shielded gate trench type power device provided by the first embodiment of the present application and the preparation method of the shielded gate trench type power device provided by the second embodiment of the present application, which will not be repeated here.

[0112] Although the present application is disclosed as above with the preferred embodiments, it is not intended to limit the present application. Any person skilled in the art may make possible changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be based on the scope defined by the claims of the present application.

Claims

1. A method for preparing a shielded gate trench power device, characterized in that: include: providing a semiconductor substrate having a trench formed therein; forming a first oxide layer on the surface of the groove; forming a composite layer on the surface of the first oxide layer; The composite layer comprises at least a first film layer and a second film layer, the first film layer and the second film layer are made of different materials, and the first film layer is located between the first oxide layer and the second film layer; removing a portion of the second film layer at the bottom of the trench until the first film layer is exposed, thereby forming an etching window at the bottom of the trench; By means of an etching process, the first film layer at the bottom of the trench is removed, and the first film layer on the sidewall of the trench is etched upward from the bottom to a set height; removing the remaining second film layer; Ion implantation is performed on a set position of the area on the sidewall of the trench after the first film layer is removed.

2. The method according to claim 1, characterized in that The composite layer further includes a third film layer, which is located between the first oxide layer and the first film layer. The third film layer and the first film layer are made of different materials.

3. The method according to claim 2, characterized in that Before performing ion implantation on a set position of the area on the sidewall of the trench after the first film layer is removed, the method further includes: The third film layer located on the surface of the first oxide layer below the remaining first film layer is removed.

4. The method according to claim 1, wherein The forming of a composite layer on the surface of the first oxide layer comprises: forming a first nitride layer on the surface of the first oxide layer; forming a second oxide layer on a surface of the first nitride layer; A second nitride layer is formed on the surface of the second oxide layer to form a NON composite layer; wherein the first film layer is the second oxide layer, and the second film layer is the second nitride layer.

5. The method according to claim 1, wherein The forming of a composite layer on the surface of the first oxide layer comprises: forming a first film layer on the surface of the first oxide layer, wherein the first film layer is a non-oxidation layer; A second film layer is formed on the surface of the first film layer.

6. The method according to claim 1, wherein The step of removing a portion of the second film layer at the bottom of the groove until the first film layer is exposed comprises: A portion of the second film layer at the bottom of the trench is removed by dry etching until the first film layer is exposed.

7. The method according to claim 3, characterized in that The removing of the first film layer at the bottom of the trench and etching the first film layer on the sidewall of the trench upward from the bottom to a set height includes: The first film layer at the bottom of the trench is removed by wet etching, and the first film layer on the sidewall of the trench is etched upward from the bottom to a set height by wet etching.

8. The method according to claim 3, characterized in that The removing of the third film layer located on the surface of the first oxide layer below the remaining first film layer comprises: The third film layer located on the surface of the first oxide layer below the remaining first film layer is removed by wet etching.

9. The method according to claim 1, characterized in that The set height is calculated as follows: Obtaining an implantation angle to be implanted, a diameter of an implantation region to be formed, and a maximum implantation depth of the sidewall region located below the remaining first film layer; The set height is determined according to the angle to be injected, the diameter of the injection area and the maximum injection depth.

10. The method according to claim 9, characterized in that In the case where the composite layer includes the first film layer, the second film layer, and the third film layer, the set height is determined according to the angle to be injected, the diameter of the injection area, and the maximum injection depth, and is achieved by the following formula: in, To set the height, is the angle to be injected, is the diameter of the injection area, is the sum of the thicknesses of the third film layer and the first film layer, is the maximum injection depth.

11. The method according to claim 9, characterized in that In a case where the composite layer includes the first film layer, the second film layer, and the third film layer, obtaining an injection angle for ion injection to be performed on the remaining sidewall region below the first film layer includes: The angle to be implanted is determined according to the maximum implantation depth, the distance between the first oxide layers formed on the left and right sidewalls of the trench, and the sum of the thicknesses of the third film layer and the first film layer.

12. The method according to claim 11, characterized in that The angle to be implanted is determined according to the maximum implantation depth, the distance between the first oxide layers formed on the left and right sidewalls of the trench, and the sum of the thicknesses of the third film layer and the first film layer, and is achieved by the following formula: in, is the angle to be injected, is the distance between the first oxide layers formed on the left and right side walls of the trench, is the sum of the thicknesses of the third film layer and the first film layer, is the maximum injection depth.

13. The method according to claim 1, wherein After ion implantation, it also includes: The semiconductor substrate is subjected to an annealing process.

14. The method according to claim 1, wherein After ion implantation, it also includes: The remaining composite layer and the first oxide layer are removed.

15. The method according to claim 1, wherein The thickness of the first oxide layer is 200 Å to 1000 Å.

16. The method according to claim 4, characterized in that The thickness of the first nitride layer and the second nitride layer is 200A~500A; the thickness of the second oxide layer is 500A~2500A.

17. A method for preparing a shielded gate trench power device, characterized in that: include: Providing a semiconductor substrate having a trench structure formed therein; forming a first oxide layer on the surface of the groove; forming a shielding layer on the upper portion of the sidewall of the trench and outside the first oxide layer; Ion implantation is performed on a predetermined position of a lower portion of the trench sidewall where the shielding layer is not formed.

18. A semiconductor structure for a shielded gate trench power device, characterized in that: include: a semiconductor substrate having a trench structure formed therein; An oxide layer is formed on the surface of the groove; A shielding layer is formed on the upper surface of the oxide layer; The shielding layer is used to protect the upper portion of the trench sidewall from ion implantation.

19. A shielded gate trench power device, characterized in that: It is prepared by the method according to any one of claims 1 to 17.

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