A method for manufacturing a shielded gate trench power device

By using a composite film structure and precise ion implantation technology in shielded gate trench power devices, the problem of uneven electric field distribution in traditional processes has been solved, enabling precise control of the electric field and improvement of device performance.

CN120751723BActive Publication Date: 2025-11-18HANGZHOU FULLSEMI SEMICON CO LTD
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Patent Information

Application Number
CN202511266291.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-09-05
Publication Date
2025-11-18
Estimated Expiration
2045-09-05

AI Technical Summary

Technical Problem

In the traditional shielded gate trench MOSFET manufacturing process, high-energy injection causes changes in the impurity concentration distribution in the channel and body regions above the epitaxial layer, affecting the device turn-on threshold and making it difficult to precisely control the electric field distribution at the bottom of the trench.

Method used

A composite film structure is adopted, forming an etching window at the bottom of the trench. The film at the bottom of the trench is removed by etching process and the sidewalls are etched upwards. The protective film layer is used to prevent ion implantation on the upper part of the sidewalls, and ion implantation is only performed on the lower part of the sidewalls to precisely control the electric field distribution.

Benefits of technology

Without affecting the impurity concentration distribution on the upper part of the epitaxial layer, the peak electric field at the bottom of the trench is effectively reduced, thereby improving device performance and reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a preparation method of a shield gate trench power device, another preparation method of a shield gate trench power device, a semiconductor structure for the shield gate trench power device, and the shield gate trench power device. The preparation method of the shield gate trench power device comprises the following steps: providing a semiconductor substrate formed with a trench structure; forming a first oxide layer on the surface of the trench; forming a composite layer on the surface of the first oxide layer; the composite layer at least comprises a first film layer and a second film layer; removing part of the second film layer at the bottom of the trench to expose the first film layer, and forming an etching window at the bottom of the trench; removing the first film layer at the bottom of the trench by an etching process, and etching the first film layer on the sidewall of the trench upward to a set height from the bottom; removing the remaining second film layer; and performing ion implantation on a set position of the region of the sidewall of the trench after the first film layer is removed. The application can accurately control the electric field distribution at the bottom of the trench.
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Description

Technical Field

[0001] This application relates to the field of semiconductor technology, specifically to a method for fabricating a shielded gate trench power device, another method for fabricating a shielded gate trench power device, a semiconductor structure for a shielded gate trench power device, and a shielded gate trench power device. Background Technology

[0002] SGT MOSFET (Shielded Gate Trench Metal-Oxide-Semiconductor Field-Effect Transistor) is a power device designed for high-voltage and high-efficiency applications. In traditional manufacturing processes, high-energy blanket implantation is typically used to implant P-type impurity ions (such as aluminum or boron) into the bottom of the trench to achieve local charge compensation, thereby reducing the peak electric field at the bottom of the trench. While this method improves the electric field distribution, its indiscriminate implantation means that regions above the trench, such as the channel and body regions, are also implanted with P-type impurities. This leads to variations in the impurity concentration distribution in the channel and body regions above the epitaxial layer, thus affecting the device's turn-on threshold.

[0003] Therefore, how to precisely control the electric field distribution at the bottom of the trench without affecting the impurity concentration distribution in the upper channel and body regions of the epitaxial layer has become an urgent technical problem to be solved. Summary of the Invention

[0004] This application provides a method for fabricating a shielded gate trench power device, another method for fabricating a shielded gate trench power device, a semiconductor structure for a shielded gate trench power device, and a shielded gate trench power device, which can precisely control the electric field distribution at the bottom of the trench without affecting the impurity concentration distribution in the channel and body region above the epitaxial layer. The specific solution is as follows:

[0005] In a first aspect, embodiments of this application provide a method for fabricating a shielded gate trench power device, comprising:

[0006] A semiconductor substrate is provided, wherein a trench structure is formed in the semiconductor substrate;

[0007] A first oxide layer is formed on the surface of the trench;

[0008] A composite layer is formed on the surface of the first oxide layer; the composite layer includes at least a first film layer and a second film layer, the first film layer and the second film layer are made of different materials, and the first film layer is located between the first oxide layer and the second film layer;

[0009] Remove a portion of the second film layer at the bottom of the trench to expose the first film layer, thereby forming an etching window at the bottom of the trench;

[0010] The first film layer at the bottom of the trench is removed by an etching process, and the first film layer on the sidewall of the trench is etched upward from the bottom to a set height.

[0011] Remove the remaining second film layer;

[0012] Ion implantation is performed at a predetermined location in the area where the first film layer has been removed from the sidewall of the trench.

[0013] Optionally, the composite layer further includes a third film layer located between the first oxide layer and the first film layer, wherein the third film layer and the first film layer are made of different materials.

[0014] Optionally, before performing ion implantation at a predetermined location in the region where the first film layer has been removed from the trench sidewall, the method further includes:

[0015] Remove the third film layer located on the surface of the first oxide layer below the remaining first film layer.

[0016] Optionally, forming a composite layer on the surface of the first oxide layer includes:

[0017] A first nitride layer is formed on the surface of the first oxide layer;

[0018] A second oxide layer is formed on the surface of the first nitride layer;

[0019] A second nitride layer is formed on the surface of the second oxide layer to form a NON composite layer; wherein, the first film layer is the second oxide layer and the second film layer is the second nitride layer.

[0020] Optionally, forming a composite layer on the surface of the first oxide layer includes:

[0021] A first film layer is formed on the surface of the first oxide layer, wherein the first film layer is a non-oxide layer;

[0022] A second film layer is formed on the surface of the first film layer.

[0023] Optionally, removing a portion of the second film layer at the bottom of the trench to expose the first film layer includes:

[0024] Dry etching is used to remove part of the second film layer at the bottom of the trench until the first film layer is exposed.

[0025] Optionally, removing the first film layer at the bottom of the trench and etching the first film layer on the trench sidewalls from the bottom upwards to a set height includes:

[0026] The first film layer at the bottom of the trench is removed by wet etching, and the first film layer on the sidewall of the trench is etched from the bottom upwards to a set height by wet etching.

[0027] Optionally, the third film layer located on the surface of the first oxide layer below the remaining first film layer includes:

[0028] The third film layer, located on the surface of the first oxide layer below the remaining first film layer, is removed by wet etching.

[0029] Optionally, the set height is calculated in the following way:

[0030] Obtain the implantation angle, the diameter of the implantation region to be formed, and the maximum implantation depth of the sidewall region located below the remaining first film layer for ion implantation.

[0031] The set height is determined based on the injection angle, the diameter of the injection area, and the maximum injection depth.

[0032] Optionally, when the composite layer includes the first film layer, the second film layer, and the third film layer, the determination of the set height based on the injection angle, the injection region diameter, and the maximum injection depth is achieved by the following formula:

[0033] in, To set the height, The angle to be injected, The diameter of the injection region. The sum of the thicknesses of the third film layer and the first film layer. The maximum injection depth.

[0034] Optionally, when the composite layer includes the first film layer, the second film layer, and the third film layer, obtaining the implantation angle of the remaining sidewall region below the first film layer for ion implantation includes:

[0035] The injection angle is determined based on the maximum injection depth, the distance between the first oxide layers formed on the left and right sidewalls of the trench, and the sum of the thicknesses of the third film layer and the first film layer.

[0036] Optionally, the injection angle is determined based on the maximum injection depth, the distance between the first oxide layers formed on the left and right sidewalls of the trench, and the sum of the thicknesses of the third film layer and the first film layer, using the following formula:

[0037]

[0038] in, The angle to be injected, The distance between the first oxide layers formed on the left and right sidewalls of the trench. The sum of the thicknesses of the third film layer and the first film layer. The maximum injection depth.

[0039] Optionally, after ion implantation, the following may also be included:

[0040] The semiconductor substrate is annealed.

[0041] Optionally, after ion implantation, the following may also be included:

[0042] Remove the remaining composite layer and the first oxide layer.

[0043] Optionally, the thickness of the first oxide layer is 200 Å to 1000 Å.

[0044] Optionally, the thickness of the first nitrided layer and the second nitrided layer is 200 Å to 500 Å; the thickness of the second oxide layer is 500 Å to 2500 Å.

[0045] Secondly, embodiments of this application provide another method for fabricating a shielded gate trench type power device, including:

[0046] A semiconductor substrate is provided, wherein a trench structure is formed in the semiconductor substrate;

[0047] A first oxide layer is formed on the surface of the trench;

[0048] A shielding layer is formed on the upper part of the sidewall of the trench, outside the first oxide layer;

[0049] Ion implantation is performed at designated locations in the lower part of the trench sidewall where the shielding layer has not been formed.

[0050] Thirdly, this application also provides a semiconductor structure for shielding gate trench power devices, comprising:

[0051] A semiconductor substrate in which a trench structure is formed;

[0052] An oxide layer is formed on the surface of the trench;

[0053] A shielding layer is formed on the upper surface of the oxide layer; the shielding layer is used to protect the upper part of the trench sidewall from ion implantation.

[0054] Fourthly, embodiments of this application also provide a shielded gate trench type power device, which is prepared by the method described in the first or second aspect.

[0055] Compared with the prior art, this application has the following advantages:

[0056] The method for fabricating a shielded gate trench power device provided in this application includes: providing a semiconductor substrate in which trenches are formed; forming a first oxide layer on the surface of the trenches; forming a composite layer on the surface of the first oxide layer; the composite layer includes at least a first film layer and a second film layer, the first film layer and the second film layer being made of different materials, the first film layer being located between the first oxide layer and the second film layer; removing a portion of the second film layer at the bottom of the trench to expose the first film layer; forming an etching window at the bottom of the trench, such that the first film layer can be removed from the bottom upwards through the etching window formed at the bottom; and removing the first film layer at the bottom of the trench through an etching process, and etching the first film layer on the trench sidewalls from the bottom upwards. The first oxide layer is etched from bottom to top without affecting the sidewalls of the first oxide layer after the second oxide layer is removed to a set height. This exposes the lower part (below the set height) of the first oxide layer in the trench sidewall while keeping the upper part (above the set height) of the first oxide layer covered by the first oxide layer. This effectively protects the upper part of the trench sidewall and prevents ions from being implanted into the upper part of the trench sidewall during ion implantation. Ion implantation is then performed at a set location in the area of ​​the trench sidewall after the first oxide layer is removed to achieve local charge compensation, reduce the peak electric field at the bottom of the trench, and precisely control the electric field distribution at the bottom of the trench. Attached Figure Description

[0057] Figure 1 This is a flowchart of the fabrication method of the shielded gate trench power device provided in the first embodiment of this application.

[0058] Figure 2 This is a schematic diagram of the semiconductor substrate provided in the fabrication method of the shielded gate trench power device provided in the embodiments of this application.

[0059] Figure 3 This is a schematic diagram of the formation of a first oxide layer on the substrate surface and the trench surface in the fabrication method of the shielded gate trench power device provided in the embodiments of this application.

[0060] Figure 4 This is a schematic diagram of the formation of a first film layer on the surface of the first oxide layer in the fabrication method of the shielded gate trench power device provided in the embodiments of this application.

[0061] Figure 5 This is a schematic diagram of the formation of a second film layer on the surface of the first film layer in the fabrication method of the shielded gate trench power device provided in the embodiments of this application.

[0062] Figure 6This is a schematic diagram of the formation of a third film layer on the surface of the first oxide layer in the fabrication method of the shielded gate trench power device provided in the embodiments of this application.

[0063] Figure 7 This is a schematic diagram of the formation of the first film layer on the surface of the third film layer in the fabrication method of the shielded gate trench power device provided in the embodiments of this application.

[0064] Figure 8 This is a schematic diagram of the formation of a second film layer on the surface of the first film layer in the fabrication method of the shielded gate trench power device provided in the embodiments of this application.

[0065] Figure 9 This is a schematic diagram of an example of removing a portion of the second film layer at the bottom of the trench in the fabrication method of the shielded gate trench power device provided in this application embodiment.

[0066] Figure 10 This is a schematic diagram illustrating an example of removing the first film layer in the fabrication method of the shielded gate trench power device provided in this application embodiment.

[0067] Figure 11 This is a schematic diagram of removing the remaining second film layer in the fabrication method of the shielded gate trench power device provided in the embodiments of this application.

[0068] Figure 12 This is a schematic diagram of an example of ion implantation in the fabrication method of the shielded gate trench power device provided in the embodiments of this application.

[0069] Figure 13 This is a schematic diagram of another example of removing a portion of the second film layer at the bottom of the trench in the fabrication method of the shielded gate trench power device provided in the embodiments of this application.

[0070] Figure 14 This is a schematic diagram of another example of removing the first film layer in the fabrication method of the shielded gate trench power device provided in the embodiments of this application.

[0071] Figure 15 This is a schematic diagram of the process of fabricating a shielded gate trench power device provided in this application, in which the remaining second film layer and the third film layer located on the surface of the first oxide layer below the remaining first film layer are removed.

[0072] Figure 16 This is a schematic diagram of another example of ion implantation in the fabrication method of the shielded gate trench power device provided in the embodiments of this application.

[0073] Figure 17 This is a schematic diagram illustrating the calculation method for setting the height in the fabrication method of the shielded gate trench type power device provided in the embodiments of this application. Detailed Implementation

[0074] Many specific details are set forth in the following description to provide a full understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of this application; therefore, this application is not limited to the specific embodiments disclosed below.

[0075] It should be noted that the terms "first," "second," "third," etc., in the claims, specification, and drawings of this application are used to distinguish similar objects and are not used to describe a specific order or sequence. Such data are interchangeable where appropriate so that the embodiments of this application described herein can be implemented in a sequence other than that shown or described herein. Furthermore, the terms "comprising," "having," and their variations are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products, or apparatuses.

[0076] It should be understood that in the embodiments of this application, "at least one" means one or more, and "more than one" means two or more. "And / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. The character " / " generally indicates that the related objects before and after it are in an "or" relationship. "Contains A, B and / or C" means containing any one, two, or three of A, B, and C.

[0077] It should be understood that in the embodiments of this application, "B corresponding to A", "B corresponding to A", "A corresponds to B" or "B corresponds to A" means that B is associated with A, and B can be determined based on A. Determining B based on A does not mean that B is determined solely based on A; B can also be determined based on A and / or other information.

[0078] In related technologies, for SGT MOSFETs, in order to fully utilize the device's voltage withstand potential, in addition to the methods mentioned in the background technology, the following methods are also used: First, after forming the field oxide, photoresist is filled and etched to the target depth; then, the upper field oxide is partially etched to the target thickness; finally, the photoresist is removed and polysilicon is filled again.

[0079] However, in the above methods, the adhesion between the photoresist and the sidewalls of the oxide layer is often not strong enough. As a result, when etching the photoresist, the solution may seep through the gap between the photoresist and the oxide layer into areas that should not be etched, resulting in abnormal and unstable morphology and affecting device performance.

[0080] To address the aforementioned issues and improve the field strength distribution and overall performance of SGT MOSFET devices while reducing process complexity and manufacturing costs, the first embodiment of this application provides a method for fabricating a shielded gate trench power device. The method for fabricating a shielded gate trench power device provided in the first embodiment of this application is used to fabricate shielded gate trench power devices (i.e., SGT MOSFETs).

[0081] The technical solution of this application will be described in detail below through specific embodiments. It should be noted that the following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0082] The following, combined with Figures 1-16 This application describes a method for fabricating a shielded trench power device according to embodiments of the present application.

[0083] like Figure 1 The diagram shows a flowchart of the fabrication method of the shielded gate trench power device provided in this application, including the following steps S101 to S107.

[0084] Step S101: Provide a semiconductor substrate in which trenches are formed.

[0085] In semiconductor manufacturing, a semiconductor substrate refers to the basic material used to fabricate semiconductor devices. Semiconductor substrates can include, but are not limited to, pure single-crystal silicon (Si), gallium arsenide (GaAs), gallium nitride (GaN), and silicon carbide (SiC). The material of the semiconductor substrate can be selected according to actual needs during the fabrication process.

[0086] like Figure 2 The diagram shown is a schematic diagram of the semiconductor substrate provided in the fabrication method of the shielded gate trench power device provided in the embodiment of this application. The semiconductor substrate may include an epitaxial layer 02 and a substrate layer 01, wherein a trench 03 is formed in the epitaxial layer 02.

[0087] In a specific implementation, trenches can be formed in a semiconductor substrate to be processed that has not yet formed trenches by the following steps: etching the epitaxial layer 02 of the semiconductor substrate to be processed to form trench 03.

[0088] An epitaxial layer refers to a new material layer with a specific doping concentration and crystal structure grown on a raw semiconductor substrate through a process called epitaxy (or simply Epi). This process allows control over the composition, thickness, doping type, and concentration of the new layer, thereby achieving specific electrical properties. The epitaxial layer can be matched to the substrate at the atomic level, forming a continuous crystal structure. The epitaxial layer can be the same material as the substrate (homogeneous epitaxy) or a different material (heterogeneous epitaxy); specifically, the epitaxial layer can be silicon-based or silicon carbide-based.

[0089] It should be noted that the epitaxial layer, used to support current transport in the device, typically has higher purity and fewer defects than the original substrate. Through epitaxial growth, the type and concentration of dopants in the epitaxial layer can be precisely controlled, thereby customizing the desired electrical characteristics. For example, in power MOSFETs, the breakdown voltage and on-resistance can be optimized by adjusting the doping of the epitaxial layer. Furthermore, during the epitaxial process, materials with different doping concentrations or types can be grown layer by layer as needed to form complex multilayer structures. This capability is crucial for manufacturing high-performance integrated circuits (ICs) and power devices. In other embodiments, the trench may not be formed in the epitaxial layer.

[0090] Step S102: Form a first oxide layer on the surface of the trench.

[0091] Specifically, thermal oxidation or chemical vapor deposition can be performed to form a first oxide layer on the surface of the trench and the surface of the substrate. The thickness of the first oxide layer is 200 Å to 1000 Å.

[0092] like Figure 3 As shown, a first oxide layer 04 is formed on the surface of the epitaxial layer 02 and the surface of the trench 03.

[0093] The oxide layer refers to the layer of insulating material (usually silicon dioxide) grown or deposited on the surface of the trenches (the inner surface of the trenches) and the surface of the epitaxial layer after trenches have been etched into the semiconductor substrate. ).

[0094] It's important to note that the oxide layer, acting as a dielectric, provides essential electrical isolation between the gate and the channel. It prevents current from flowing directly from the gate to the source or drain of subsequently formed devices, helping to control and manage the current flowing through the channel and ensuring that current only flows under appropriate voltage conditions. This oxide layer is generally called a field oxide layer, or simply field oxide. Furthermore, forming an oxide layer inside the trench helps optimize the electric field distribution in the channel region. Especially in high-voltage applications, good electric field management can improve breakdown voltage and enhance device reliability and performance. Typically, adjusting the oxide layer thickness is used to improve breakdown voltage, optimize electric field distribution, and enhance device reliability.

[0095] Specifically, oxide layers can be formed on the trench sidewalls and the upper surface of the epitaxial layer using methods such as thermal oxidation or chemical vapor deposition (CVD). Thermal oxidation, in particular, involves growing silicon dioxide by exposing the substrate to a high-temperature environment of oxygen or water vapor. The process of thermal oxidation includes dry oxidation and wet oxidation. Dry oxidation refers to the use of pure oxygen as an oxidant to generate a high-quality, dense oxide layer. Wet oxidation refers to the use of water vapor to react with silicon to generate an oxide layer. The growth rate of wet oxidation is faster than that of dry oxidation, but the oxide layer density is lower than that of dry oxidation. Chemical vapor deposition is a technique that uses chemical reactions to deposit thin films on the surface of a substrate.

[0096] It should be noted that if dry oxidation is selected in this application, the oxidation temperature is typically between 900°C and 1100°C, and the oxidation time depends on the thickness of the oxide layer to be formed. For example, growing a 100-nanometer-thick oxide layer at 1000°C using dry oxidation may take approximately 2 hours. If wet oxidation is selected in this application, the oxidation temperature is typically between 700°C and 1000°C, and the oxidation time also depends on the thickness of the oxide layer to be formed. However, the rate of wet oxidation is greater than that of dry oxidation. For example, growing a 100-nanometer-thick oxide layer at 1000°C using wet oxidation may take approximately 10 to 15 minutes. It should be noted that the oxidation temperature and time mentioned here are merely examples and are not intended to limit this application.

[0097] Step S103: Form a composite layer on the surface of the first oxide layer.

[0098] This step is used to form a composite layer on the surface of the first oxide layer. This composite layer is used to form a shielding layer on the upper part of the sidewall of the trench outside the first oxide layer in a subsequent step, thereby protecting the upper part of the sidewall of the trench from ion implantation.

[0099] The composite layer comprises at least a first film layer and a second film layer; that is, the composite layer can be a two-layer structure, a three-layer structure, a four-layer structure, etc. The first film layer and the second film layer are made of different materials. For example, the first film layer is an oxide layer, and the second film layer is a nitride layer or other non-oxide layer; or, for example, the first film layer is a nitride layer or other non-oxide layer, and the second film layer is an oxide layer. The first film layer is located between the first oxide layer and the second film layer.

[0100] In one optional embodiment, the composite layer has a two-layer structure, that is, the composite layer includes only the first film layer and the second film layer. The first film layer and the first oxide layer are made of different materials, that is, the first film layer is a non-oxide layer. In this way, the first oxide layer will not be affected when the first film layer is partially removed subsequently.

[0101] Specifically, the composite layer can be formed by the following steps: forming a first film layer on the surface of the first oxide layer, wherein the first film layer is a non-oxide layer; and forming a second film layer on the surface of the first film layer.

[0102] The following is in conjunction with the appendix Figure 4 and attached Figure 5 The process steps for the two-layer composite layer are described below: Figure 4 As shown, after forming the first oxide layer 04 on the surface of trench 03 and epitaxial layer 02, a nitride layer 05-1 (i.e., the first film layer) can be formed on the surface of the first oxide layer 04 by chemical vapor deposition; subsequently, as... Figure 5 As shown, an oxide layer 06-1 (i.e., a second film layer) can be formed on the surface of the nitride layer 05-1 (i.e., the surface of the first film layer) by chemical vapor deposition. In this way, a composite layer 10 consisting of the nitride layer 05-1 and the oxide layer 06-1 is formed on the surface of the oxide layer on the trench surface.

[0103] Thus, by sequentially forming a first film layer, which is a non-oxidized layer, and a second film layer, which is made of a different material from the first film layer, on the surface of the first oxide layer, the second film layer can protect the first film layer in subsequent steps. Furthermore, since the first film layer is a non-oxidized layer, the first film layer on the lower surface of the trench sidewall can be removed without affecting the first oxide layer on the trench sidewall, thereby forming a shielding layer on the upper part of the trench sidewall outside the first oxide layer, thus preventing ion implantation on the upper part of the trench sidewall.

[0104] In another optional embodiment, the composite layer has a three-layer structure, meaning that in addition to the first and second film layers, the composite layer also includes a third film layer. The third film layer is located between the first oxide layer and the first film layer, and the third film layer is made of a different material than the first film layer. Furthermore, the third film layer is also made of a different material than the first oxide layer; that is, the third film layer is a non-oxidizing layer. Thus, subsequent removal of part of the third film layer will not affect the first oxide layer.

[0105] Specifically, the composite layer can be formed through the following steps: forming a first nitride layer on the surface of the first oxide layer; forming a second oxide layer on the surface of the first nitride layer; forming a second nitride layer on the surface of the second oxide layer, thus forming a NON composite layer; wherein the first film layer is the second oxide layer, and the second film layer is the second nitride layer. The thicknesses of the first and second nitride layers are 200 Å to 500 Å, and the thickness of the second oxide layer is 500 Å to 2500 Å.

[0106] The following is in conjunction with the appendix Figure 6 Appendix Figure 7 and attached Figure 8 The process steps for the three-layer composite layer are described below: Figure 6 As shown, after forming the first oxide layer 04 on the surface of trench 03 and epitaxial layer 02, a first nitride layer 07 (i.e., the third film layer) can be formed on the surface of the first oxide layer 04 by chemical vapor deposition; subsequently, as... Figure 7 As shown, a second oxide layer 05-2 (i.e., the first film layer) can be formed on the surface of the first nitride layer 07 using chemical vapor deposition; subsequently, as... Figure 8 As shown, a second nitride layer 06-2 (i.e., a second film layer) can be formed on the surface of the second oxide layer 05-2 by chemical vapor deposition. In this way, a NON composite layer 10 composed of a first nitride layer 07, a second oxide layer 05-2, and a second nitride layer 06-2 is formed on the surface of the oxide layer on the trench surface.

[0107] Thus, by sequentially forming a third film layer (a non-oxide layer), a first film layer of a different material from the third film layer, and a second film layer of a different material from the first film layer on the surface of the first oxide layer, the first film layer can be protected by the second film layer in subsequent steps. Furthermore, because the first and third film layers are of different materials, the first film layer on the lower surface of the trench sidewall can be removed without affecting the third film layer. Moreover, the third film layer protects the first oxide layer on the trench sidewall from being affected, forming a shielding layer on the upper part of the trench sidewall, outside the first oxide layer, thereby preventing ion implantation on the upper part of the trench sidewall.

[0108] Step S104: Remove a portion of the second film layer at the bottom of the trench to expose the first film layer, forming an etching window at the bottom of the trench.

[0109] This step is used to remove part of the second film layer at the bottom of the trench to form an etching window at the bottom, which provides a basis for subsequent removal of the first film layer covered by the second film layer from the bottom through the etching window.

[0110] The composite layer formed on the surface of the first oxide layer is Figure 5 When a composite layer with a two-layer structure is shown, such as Figure 9 As shown, dry etching or wet etching can be used to remove part of the oxide layer 06-1 (i.e., the second film layer) at the bottom of the trench until the nitride layer 05-1 (i.e., the first film layer) is exposed.

[0111] The composite layer formed on the surface of the first oxide layer is Figure 8 When a three-layer composite layer is shown, such as Figure 13 As shown, a portion of the second nitride layer 06-2 (i.e., the second film layer) at the bottom of the trench can be removed by dry etching or wet etching until the second oxide layer 05-2 (i.e., the first film layer) is exposed.

[0112] Thus, by forming an etching window at the bottom of the trench, the first film layer covered by the second film layer is exposed, making it easier to remove the first film layer from the bottom of the trench in subsequent steps. The unremoved second film layer protects the upper part of the first film layer on the trench sidewall from being removed, thereby forming a shielding layer on the upper part of the trench sidewall outside the first oxide layer. In this way, the shielding layer protects the upper part of the trench sidewall, preventing ion implantation on the upper part of the trench sidewall.

[0113] Step S105: Remove the first film layer at the bottom of the trench by etching process, and etch the first film layer on the sidewall of the trench from the bottom upward to a set height.

[0114] This step removes the first film layer at the bottom of the trench to expose the lower surface of the first film layer on the trench sidewalls. The lower surface of the first film layer on the trench sidewalls is then etched upwards to a predetermined height. This ensures that the lower portion of the first oxide layer on the trench sidewalls is not covered by the first film layer, providing a basis for exposing the lower portion of the first oxide layer in the trench in subsequent steps. Furthermore, the upper portion of the first oxide layer on the trench sidewalls remains covered by the first film layer, thereby preventing ion implantation into the upper part of the trench sidewalls.

[0115] The composite layer formed on the surface of the first oxide layer is Figure 5 When a composite layer with a two-layer structure is shown, such as Figure 10 As shown, the bottom nitride layer 05-1 (i.e., the first film layer) of the trench 03 can be removed by wet etching, and the nitride layer 05-1 (i.e., the first film layer) of the sidewall of the trench 03 can be etched from the bottom up to a set height by wet etching.

[0116] The composite layer formed on the surface of the first oxide layer is Figure 8 When a three-layer composite layer is shown, such as Figure 14As shown, the second oxide layer 05-2 (i.e., the first film layer) at the bottom of the trench 03 can be removed by wet etching, and the second oxide layer 05-2 (i.e., the first film layer) on the sidewall of the trench 03 can be etched from the bottom upwards to a set height by wet etching.

[0117] It should be noted that if a second film layer is not formed on the surface of the first film layer, when etching the first film layer on the trench sidewalls from bottom to top, since the sidewalls of the first film layer lack a protective layer, the exposed sidewalls above the set height will also be etched, resulting in uneven thickness of the first film layer. In some areas above the set height, the first film layer will be thinner or even completely removed. Consequently, during subsequent ion implantation through the trench sidewalls, ions will also be implanted into the upper part of the trench sidewalls. This will cause changes in the impurity concentration distribution in the channel and body regions above the epitaxial layer, thereby affecting the device's turn-on threshold. In contrast, in this embodiment, since only a portion of the second film layer at the bottom of the trench is removed in step S105, the remaining second film layer protects the sidewalls of the first film layer when etching the first film layer from the bottom upwards. This effectively prevents the sidewalls of the first film layer above the set height from being etched, avoiding uneven thickness or even complete removal of the first film layer above the set height. This results in a uniformly shaped shielding layer forming above the set height of the trench sidewall, effectively protecting the upper part of the trench sidewall and preventing ion implantation into the upper part of the trench sidewall during ion implantation. Thus, the electric field distribution at the bottom of the trench can be precisely controlled without affecting the impurity concentration distribution in the channel and body regions above the epitaxial layer.

[0118] Step S106: Remove the remaining second film layer.

[0119] This step is used to remove the remaining second film layer to expose the first oxide layer at the bottom of the trench sidewall in the trench, thereby providing a basis for ion implantation at a predetermined location at the bottom of the trench sidewall.

[0120] The composite layer formed on the surface of the first oxide layer is Figure 5 When using a composite layer with a two-layer structure as shown, only the remaining second film layer needs to be removed to expose the first oxide layer at the bottom of the trench sidewall. (See attached image.) Figure 11 As shown, the remaining oxide layer 06-1 (i.e., the second film layer) can be removed by wet etching so that the first oxide layer 04 at the bottom of the sidewall of the trench 03 is exposed in the trench 03.

[0121] The composite layer formed on the surface of the first oxide layer is Figure 8In the case of the three-layer composite layer shown, since a third film layer is formed on the surface of the first oxide layer, after removing the remaining second film layer, the surface of the first oxide layer at the lower part of the trench sidewall is still covered by a third film layer. Therefore, it is also necessary to remove the third film layer located on the surface of the first oxide layer below the remaining first film layer. Figure 15 As shown, the remaining second nitride layer 06-2 (i.e., the second film layer) can be removed by wet etching, and the first nitride layer 07 (i.e., the third film layer) located on the surface of the first oxide layer 04 below the remaining second oxide layer 05-2 (i.e., the first film layer) can be removed by wet etching, so that the first oxide layer 04 at the bottom of the sidewall of the trench 03 is exposed in the trench 03.

[0122] Thus, when the composite layer consists of a first film layer and a second film layer, since the first film layer on the trench sidewall is etched from the bottom upwards to a set height in step S105, and the remaining second film layer is removed in step S106, the lower part of the trench sidewall (below the set height) of the first oxide layer is exposed in the trench. When the composite layer consists of a first film layer, a second film layer, and a third film layer, since the first film layer on the trench sidewall is etched from the bottom upwards to a set height in step S105, and the remaining second film layer is removed in step S106, and the third film layer located on the surface of the first oxide layer below the remaining first film layer is also removed, the lower part of the trench sidewall (below the set height) of the first oxide layer is exposed in the trench. In this way, ion implantation can be performed at a set position on the lower part of the trench sidewall.

[0123] Step S107: Perform ion implantation at a predetermined location in the area where the first film layer has been removed from the trench sidewall.

[0124] This step is used to perform ion implantation in the lower part of the trench sidewall (i.e., below the set height) to achieve local charge compensation, reduce the electric field peak at the bottom of the trench, and precisely control the electric field distribution at the bottom of the trench.

[0125] Ion implantation is a key technology in semiconductor manufacturing, used to precisely introduce impurity atoms into the interior of semiconductor materials to alter their electrical properties. In this embodiment, in addition to performing ion implantation at designated locations on the trench sidewalls after the first film layer has been removed, ion implantation can also be performed at the bottom of the trench.

[0126] The composite layer formed on the surface of the first oxide layer is Figure 5 When a composite layer with a two-layer structure is shown, such as Figure 12 As shown, the direction of ion implantation is from B1 to A1, the angle to be implanted is the angle α formed by line segment B1A1 and line segment A1C1, and the implantation area is the area shown in 08.

[0127] The composite layer formed on the surface of the first oxide layer is Figure 8 When a three-layer composite layer is shown, such as Figure 16 As shown, the direction of ion implantation is from B2 to A2, the angle to be implanted is the angle α formed by line segment B2A2 and line segment A2C2, and the implantation area is the area shown in 08.

[0128] In this embodiment of the application, the set height can be calculated in the following way: obtain the injection angle, the diameter of the injection area to be formed, and the maximum injection depth of the sidewall region to be implanted with ions located below the remaining first film layer; determine the set height based on the injection angle, the injection area diameter, and the maximum injection depth.

[0129] The angle to be injected is: Figure 12 and Figure 16 The included angle α in the figure, the injection region to be formed is Figure 12 and Figure 16 The maximum injection depth in the region shown in Figure 08 is Figure 12 and Figure 16 The depth shown in d2 is set to a height of Figure 12 and Figure 16 The depth shown in d1.

[0130] The set height is determined based on the injection angle, the diameter of the injection area, and the maximum injection depth, which can be achieved using trigonometric functions. For example... Figure 17 As shown, triangles D1E1F1 and D2E2F2 are similar. Therefore, the length of D1E1 / the length of E1F1 = the length of D2E2 / the length of E2F2. The length of D1E1 is... The length of E1F1 is The length of D2E2 is The length of E2F2 is Therefore, the set height can be calculated using the following formula (1):

[0131] Formula (1)

[0132] in, To set the height, The angle to be injected, The diameter of the injection region. The composite layer formed on the surface of the first oxide layer at the maximum implantation depth is... Figure 5 When a composite layer with a two-layer structure is shown, such as Figure 12 As shown, The thickness of the nitride layer 05-1 (i.e., the first film layer); the composite layer formed on the surface of the first oxide layer is... Figure 8 When a three-layer composite layer is shown, such as Figure 16 As shown, It is the sum of the thicknesses of the first nitrided layer 07 (i.e., the third film layer) and the second oxide layer 05-2.

[0133] The injection angle can also be calculated using trigonometric functions. Specifically, the composite layer formed on the surface of the first oxide layer is... Figure 5 When a composite layer with a two-layer structure is shown, such as Figure 12 As shown, The distance between the outer sidewalls of the first oxide layer 04 formed on the left and right sidewalls of the trench. Let B1 be the thickness of nitride layer 05-1 (i.e., the first film layer). It can be seen that the length of side B1C1 in triangle A1B1C1 is... In triangle A1B1C1, the length of side A1C1 is... Similarly, the composite layer formed on the surface of the first oxide layer is... Figure 8 When a three-layer composite layer is shown, such as Figure 16 As shown, The distance between the outer sidewalls of the first oxide layer 04 formed on the left and right sidewalls of the trench. The sum of the thicknesses of the first nitride layer 07 (i.e., the third film layer) and the second oxide layer 05-2 shows that the length of side B1C1 in triangle A1B1C1 is... In triangle A1B1C1, the length of side A1C1 is... .

[0134] Therefore, the injection angle can be calculated using the following formula (2):

[0135] Formula (2)

[0136] in, The angle to be injected, The distance between the first oxide layers formed on the left and right sidewalls of the trench. The composite layer formed on the surface of the first oxide layer at the maximum implantation depth is... Figure 5 When the two-layer structure shown is a composite layer, The thickness of the first film layer; the composite layer formed on the surface of the first oxide layer is... Figure 8 When the three-layer composite layer is shown, It is the sum of the thicknesses of the first and third film layers.

[0137] After ion implantation, the semiconductor substrate can be annealed to repair implantation damage.

[0138] Specifically, the annealing temperature and time can be determined based on the type of dopant used (such as boron, phosphorus, etc.) and the required electrical properties. Typically, this temperature range is between 400°C and 1100°C. In one implementation, the substrate can be heated to a set temperature, held for a period of time, and then rapidly cooled. This allows the annealing process to be completed in a shorter time, helping to reduce impurity diffusion while achieving a higher activation rate. In another implementation, the substrate can be placed in a high-temperature furnace, where it is slowly heated, held, and cooled over a longer period.

[0139] After annealing the semiconductor substrate, the remaining composite layer and the first oxide layer can be removed, and then normal processes can be performed. Specifically, firstly, a field oxide layer is grown or deposited using thermal oxidation or chemical vapor deposition (CVD) processes to achieve electrical isolation between devices. Next, polysilicon is deposited and doped in designated areas to form a source polysilicon interconnect layer, reducing source contact resistance and improving electrical performance. Then, an inter-gate oxide layer (e.g., using high-quality thermal oxidation or high-dielectric-constant materials) is sequentially constructed in the gate region as an insulating medium between the gate and other regions. Following this, polysilicon is deposited to form the gate electrode that controls channel on / off. Next, P-type or N-type impurities are implanted in appropriate areas using photolithography and ion implantation processes to form the body and source regions. Then, a dielectric layer (e.g., silicon oxide or silicon nitride) is deposited and photolithographically and etched to create contact holes, allowing subsequent metal interconnect layers to establish electrical connections with the electrodes through these holes. Finally, a metal layer (e.g., aluminum or copper) is deposited, and photolithography and etching are used to form the gate, source, and drain metal electrodes.

[0140] As can be seen, the method for fabricating a shielded gate trench power device provided in this application includes: providing a semiconductor substrate in which trenches are formed; forming a first oxide layer on the surface of the trenches; forming a composite layer on the surface of the first oxide layer; the composite layer includes at least a first film layer and a second film layer, the first film layer and the second film layer being made of different materials, the first film layer being located between the first oxide layer and the second film layer; removing a portion of the second film layer at the bottom of the trench to expose the first film layer; forming an etching window at the bottom of the trench, so that the first film layer can be removed from the bottom upwards through the etching window formed at the bottom; removing the first film layer at the bottom of the trench through an etching process, and etching the trench sidewalls from the bottom upwards. The first film layer is etched to a set height, and the first film layer is protected by a second film layer. The first film layer can be etched from bottom to top without affecting the sidewalls of the first film layer. The remaining second film layer is removed, so that the lower part of the first oxide layer of the trench sidewall (below the set height) is exposed in the trench, while the upper part of the first oxide layer of the trench sidewall (above the set height) is still covered by the first film layer. This effectively protects the upper part of the trench sidewall and prevents ions from being implanted into the upper part of the trench sidewall during ion implantation. Ion implantation is performed at a set position in the area of ​​the trench sidewall after the first film layer is removed, thereby achieving local charge compensation, reducing the electric field peak at the bottom of the trench, and precisely controlling the electric field distribution at the bottom of the trench.

[0141] The second embodiment of this application provides another method for fabricating a shielded gate trench power device. The method includes: providing a semiconductor substrate in which a trench structure is formed; forming a first oxide layer on the surface of the trench; forming a shielding layer on the upper part of the sidewall of the trench, outside the first oxide layer; and performing ion implantation on a predetermined position in a region on the lower part of the sidewall of the trench where the shielding layer is not formed.

[0142] The method provided in the second embodiment of this application, which includes "providing a semiconductor substrate, wherein a trench structure is formed in the semiconductor substrate; forming a first oxide layer on the surface of the trench," can specifically refer to steps S101 and S102 in the method for fabricating a shielded gate trench power device provided in the first embodiment of this application. The method provided in the second embodiment of this application, which includes "forming a shielding layer on the upper part of the sidewall of the trench, outside the first oxide layer," can be an appendix. Figure 11 The remaining nitride layer 05-1 (i.e., the first film layer) shown in the diagram, a single-layer structure, can also be an attachment. Figure 15The composite layer shown consists of the remaining first nitride layer 07 (i.e., the third film layer) and the remaining second oxide layer 05-2 (i.e., the first film layer). For details regarding the fabrication method of the shielded gate trench type power device provided in the second embodiment of this application, please refer to the detailed description of the fabrication method of the shielded gate trench type power device provided in the first embodiment of this application; it will not be repeated here.

[0143] As can be seen, the second embodiment of this application provides another method for fabricating a shielded trench power device, which can protect the upper part of the trench sidewall by forming a shielding layer outside the first oxide layer on the upper part of the trench sidewall, thus preventing ions from being implanted into the upper part of the trench sidewall during ion implantation; and performing ion implantation at a predetermined position in the lower part of the trench sidewall where the shielding layer is not formed, thereby achieving local charge compensation, reducing the electric field peak at the bottom of the trench, and precisely controlling the electric field distribution at the bottom of the trench.

[0144] The third embodiment of this application provides a semiconductor structure for a shielded gate trench power device, comprising: a semiconductor substrate in which a trench structure is formed; an oxide layer formed on the surface of the trench; and a shielding layer formed on the upper surface of the oxide layer; the shielding layer is used to protect the upper part of the trench sidewall from ion implantation.

[0145] The semiconductor structure for shielded gate trench power devices provided in the third embodiment of this application can be referred to the appendix. Figure 11 or Figure 15 In this embodiment, the shielding layer formed on the upper surface of the oxide layer can be an attachment. Figure 11 The remaining nitride layer 05-1 (i.e., the first film layer) shown can also be a single-layer structure formed by attaching... Figure 15 The remaining first nitride layer 07 (i.e., the third film layer) and the remaining second oxide layer 05-2 (i.e., the first film layer) constitute a two-layer structure. The semiconductor structure for the shielded gate trench power device in the third embodiment of this application can be prepared using the preparation method of the shielded gate trench power device provided in the first embodiment of this application or the preparation method of the shielded gate trench power device provided in the second embodiment of this application. For details, please refer to the detailed descriptions of the preparation methods of the shielded gate trench power device provided in the first embodiment and the second embodiment of this application; these will not be repeated here.

[0146] In this way, when ion implantation is performed on the lower part of the trench sidewall, the upper part of the trench sidewall can be protected from ion implantation.

[0147] As can be seen, the semiconductor structure for shielded gate trench power devices provided in the third embodiment of this application has a shielding layer formed on the upper surface of the oxide layer, so that when ion implantation is performed on the lower part of the trench sidewall, the upper part of the trench sidewall can be protected from ion implantation.

[0148] The fourth embodiment of this application provides a shielded gate trench type power device, which can be prepared by the preparation method of the shielded gate trench type power device provided in the first embodiment of this application or the preparation method of the shielded gate trench type power device provided in the second embodiment of this application. For details, please refer to the detailed description of the preparation method of the shielded gate trench type power device provided in the first embodiment of this application and the preparation method of the shielded gate trench type power device provided in the second embodiment of this application, which will not be repeated here.

[0149] Although this application discloses preferred embodiments as described above, it is not intended to limit this application. Any person skilled in the art can make possible changes and modifications without departing from the spirit and scope of this application. Therefore, the scope of protection of this application should be determined by the scope defined in the claims of this application.

Claims

1. A method for fabricating a shielded gate trench type power device, characterized in that, include: A semiconductor substrate is provided, wherein trenches are formed in the semiconductor substrate; A first oxide layer is formed on the surface of the trench; A composite layer is formed on the surface of the first oxide layer; The composite layer includes at least a first film layer and a second film layer, the first film layer and the second film layer are made of different materials, and the first film layer is located between the first oxide layer and the second film layer; Remove a portion of the second film layer at the bottom of the trench to expose the first film layer, thereby forming an etching window at the bottom of the trench; The first film layer at the bottom of the trench is removed by an etching process, and the sidewall of the first film layer is protected by the remaining second film layer. The first film layer on the sidewall of the trench is etched from the bottom upwards to a set height. Remove the remaining second film layer so that the first oxide layer below the set height of the trench sidewall is exposed in the trench, while keeping the first oxide layer above the set height of the trench sidewall covered by the first film layer; Ion implantation is performed at a predetermined location in the area where the first film layer has been removed from the sidewall of the trench.

2. The method according to claim 1, characterized in that, The composite layer further includes a third film layer, which is located between the first oxide layer and the first film layer, and the third film layer is made of a different material than the first film layer.

3. The method according to claim 2, characterized in that, Before performing ion implantation at a predetermined location in the region where the first film layer has been removed from the trench sidewall, the method further includes: Remove the third film layer located on the surface of the first oxide layer below the remaining first film layer.

4. The method according to claim 1, characterized in that, The formation of a composite layer on the surface of the first oxide layer includes: A first nitride layer is formed on the surface of the first oxide layer; A second oxide layer is formed on the surface of the first nitride layer; A second nitride layer is formed on the surface of the second oxide layer to form a NON composite layer; wherein, the first film layer is the second oxide layer and the second film layer is the second nitride layer.

5. The method according to claim 1, characterized in that, The formation of a composite layer on the surface of the first oxide layer includes: A first film layer is formed on the surface of the first oxide layer, wherein the first film layer is a non-oxide layer; A second film layer is formed on the surface of the first film layer.

6. The method according to claim 1, characterized in that, The step of removing a portion of the second membrane layer at the bottom of the trench to expose the first membrane layer includes: Dry etching is used to remove part of the second film layer at the bottom of the trench until the first film layer is exposed.

7. The method according to claim 3, characterized in that, The step of removing the first film layer at the bottom of the trench and etching the first film layer on the trench sidewalls from the bottom upwards to a set height includes: The first film layer at the bottom of the trench is removed by wet etching, and the first film layer on the sidewall of the trench is etched from the bottom upwards to a set height by wet etching.

8. The method according to claim 3, characterized in that, The removal of the third film layer located on the surface of the first oxide layer beneath the remaining first film layer includes: The third film layer, located on the surface of the first oxide layer below the remaining first film layer, is removed by wet etching.

9. The method according to claim 1, characterized in that, The set height is calculated in the following way: Obtain the implantation angle, the diameter of the implantation region to be formed, and the maximum implantation depth of the sidewall region located below the remaining first film layer for ion implantation. The set height is determined based on the injection angle, the diameter of the injection area, and the maximum injection depth.

10. The method according to claim 9, characterized in that, When the composite layer includes the first film layer, the second film layer, and the third film layer, the determination of the set height based on the injection angle, the injection region diameter, and the maximum injection depth is achieved by the following formula: in, To set the height, The angle to be injected, The diameter of the injection region. The sum of the thicknesses of the third film layer and the first film layer. The maximum injection depth.

11. The method according to claim 9, characterized in that, When the composite layer includes the first film layer, the second film layer, and the third film layer, obtaining the implantation angle for ion implantation in the sidewall region located below the remaining first film layer includes: The injection angle is determined based on the maximum injection depth, the distance between the first oxide layers formed on the left and right sidewalls of the trench, and the sum of the thicknesses of the third film layer and the first film layer.

12. The method according to claim 11, characterized in that, The injection angle is determined based on the maximum injection depth, the distance between the first oxide layers formed on the left and right sidewalls of the trench, and the sum of the thicknesses of the third film layer and the first film layer, using the following formula: in, The angle to be injected, The distance between the first oxide layers formed on the left and right sidewalls of the trench. The sum of the thicknesses of the third film layer and the first film layer. The maximum injection depth.

13. The method according to claim 1, characterized in that, Following ion implantation, the following is also included: The semiconductor substrate is annealed.

14. The method according to claim 1, characterized in that, Following ion implantation, the following is also included: Remove the remaining composite layer and the first oxide layer.

15. The method according to claim 1, characterized in that, The thickness of the first oxide layer is 200 Å to 1000 Å.

16. The method according to claim 4, characterized in that, The thickness of the first nitrided layer and the second nitrided layer is 200 Å to 500 Å; the thickness of the second oxide layer is 500 Å to 2500 Å.

17. A shielded grid trench type power device, characterized in that, It is prepared by the method described in any one of claims 1 to 16.

Citation Information

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