Semiconductor device and method of manufacturing the same
By using a lattice-shaped or staggered connection layer formed by a second material with high elastic modulus and high thermal conductivity in a semiconductor device, combined with a first material with low elastic modulus and low thermal conductivity, the heat dissipation and reliability problems of the adhesive when the proportion of high thermal conductivity material increases are solved, and efficient thermal management and stability of the adhesive layer are achieved.
Patent Information
- Application Number
- CN202480014879.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-07-31
- Filing Date
- 2024-02-22
- Publication Date
- 2025-10-03
AI Technical Summary
In the prior art, when the proportion of high thermal conductivity materials in semiconductor devices increases, the elastic modulus of the adhesive decreases, resulting in reduced heat dissipation and easy peeling under stress, affecting thermal conductivity and reliability.
Multiple second parts formed of a second material with a high elastic modulus and high thermal conductivity are used to connect the semiconductor chip and the substrate, combined with the first part formed of a first material with a low elastic modulus and low thermal conductivity to form an adhesive layer. The second part is formed in a grid or staggered shape by screen printing to ensure heat dissipation and the elasticity of the adhesive layer.
The heat dissipation of semiconductor devices and the elasticity of the adhesive layer are improved, peeling of the adhesive layer is suppressed, reliability under temperature cycles and humidity changes is ensured, and efficient thermal management is achieved.
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Figure CN120752747A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a semiconductor device and a method for manufacturing the same.
[0002] This application claims priority based on Japanese Patent Application No. 2023-124814 filed in Japan on July 31, 2023, the contents of which are incorporated herein by reference. Background Art
[0003] In semiconductor devices where a semiconductor chip is mounted on a substrate such as a lead frame, the semiconductor chip and substrate are bonded together using an adhesive such as a die attach material. To maximize the characteristics of the semiconductor chip, heat generated during operation must be efficiently dissipated. Therefore, adhesives are formed by blending highly thermally conductive materials such as silver fillers with resin materials such as epoxy and acrylic resins.
[0004] By increasing the proportion of high thermal conductivity material in the adhesive, the heat dissipation of the action heat in the semiconductor chip is improved. The substrate expands due to the heat transferred from the semiconductor chip, but the resin material in the adhesive has a low elastic modulus and can therefore extend to follow the expansion of the substrate. If the proportion of the resin material with a low elastic modulus in the adhesive becomes smaller and the proportion of the high thermal conductivity material with a high elastic modulus becomes larger, it will be difficult to extend to follow the expansion of the substrate. In this case, the adhesive may peel off due to stress during moisture absorption reflow soldering and temperature cycle testing. If an air layer is generated on the surface of the substrate due to the peeling of the adhesive, the thermal conductivity may be reduced.
[0005] Prior art literature
[0006] Patent Literature
[0007] Patent Document 1: Japanese Patent No. 6360157 Summary of the Invention
[0008] Problems to be solved by the invention
[0009] An object of the present invention is to provide a semiconductor device capable of suppressing a decrease in thermal conductivity and a method for manufacturing the same.
[0010] Means for solving problems
[0011] A semiconductor device according to an embodiment includes a semiconductor chip, a substrate, and an adhesive layer. The substrate supports the semiconductor chip. The adhesive layer is disposed between the semiconductor chip and the substrate. The adhesive layer bonds the semiconductor chip to the substrate. The adhesive layer includes a first portion and a plurality of second portions. The first portion is formed from a first material. The plurality of second portions are formed from a second material. The second material has a larger elastic modulus and higher thermal conductivity than the first material. The plurality of second portions are located within the first portion. The plurality of second portions are in contact with and connected to the semiconductor chip and the substrate, respectively. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] Figure 1 It is a cross-sectional view showing the semiconductor device according to the first embodiment.
[0013] Figure 2 It is a plan view showing the semiconductor device according to the first embodiment.
[0014] Figure 3 It is a diagram showing the procedure of the method for manufacturing the semiconductor device according to the first embodiment.
[0015] Figure 4 It is a diagram showing the procedure of the method for manufacturing the semiconductor device according to the first embodiment.
[0016] Figure 5 It is a diagram showing the procedure of the method for manufacturing the semiconductor device according to the first embodiment.
[0017] Figure 6 It is a diagram showing the procedure of the method for manufacturing the semiconductor device according to the first embodiment.
[0018] Figure 7 It is a diagram showing the procedure of the method for manufacturing the semiconductor device according to the first embodiment.
[0019] Figure 8 It is a diagram showing the procedure of the method for manufacturing the semiconductor device according to the first embodiment.
[0020] Figure 9 It is a diagram showing the procedure of the method for manufacturing the semiconductor device according to the first embodiment.
[0021] Figure 10 It is a diagram showing the procedure of the method for manufacturing the semiconductor device according to the first embodiment.
[0022] Figure 11 It is a plan view showing a semiconductor device according to a second embodiment.
[0023] Figure 12 It is a plan view showing a semiconductor device according to a third embodiment. DETAILED DESCRIPTION
[0024] Hereinafter, a semiconductor device and a method for manufacturing the same according to an embodiment will be described with reference to the drawings.
[0025] In the following description, components having the same or similar functions are denoted by the same reference numerals, and repeated description of these components may be omitted.
[0026] (First embodiment)
[0027] Hereinafter, the configuration of the semiconductor device in the first embodiment will be described.
[0028] Figure 1 is a cross-sectional view of the semiconductor device 1 .
[0029] like Figure 1 As shown, the semiconductor device 1 includes a semiconductor chip 2, a substrate 3, and an adhesive layer 10. As an example, the substrate 3 is a lead frame electrically connected to the semiconductor chip 2 by wire bonding.
[0030] The lead frame 3 supports the semiconductor chip 2. The lead frame 3 is formed of, for example, copper.
[0031] In the following description, the direction in which the semiconductor chip 2, adhesive layer 10, and substrate 3 are stacked is referred to as the vertical direction. The side in the vertical direction where the semiconductor chip 2 is arranged is referred to as the "upper side." The side in the vertical direction where the lead frame 3 is arranged is referred to as the "lower side." The direction perpendicular to the vertical direction is referred to as the horizontal direction. In the horizontal direction, "left side" and "right side" are used as appropriate.
[0032] In addition, upper side, lower side, left side and right side are only names used to describe the relative positional relationship of each part, and the actual configuration relationship may be a configuration relationship other than the configuration relationship represented by these names.
[0033] Adhesive layer 10 is disposed between semiconductor chip 2 and lead frame 3. Adhesive layer 10 bonds semiconductor chip 2 to lead frame 3. Adhesive layer 10 is, for example, a die attach material. Adhesive layer 10 includes a first portion 11 and a second portion 12. First portion 11 is formed from a first material. The first material is a material with a low elastic modulus and low thermal conductivity. Examples of the first material include epoxy resin and acrylic resin.
[0034] Figure 2 It is a top view of the semiconductor device 1 .
[0035] like Figure 2As shown, the adhesive layer 10 is formed in a horizontal direction over a larger area than the semiconductor chip 2. The first portion 11 in the adhesive layer 10 is formed in a horizontal direction over a larger area than the semiconductor chip 2.
[0036] The second portion 12 is located within the first portion 11. Multiple second portions 12 are provided. In a plan view, multiple rows of second portions 12 are spaced apart in the vertical direction, and multiple rows are spaced apart in the horizontal direction. In this embodiment, the longitudinal positions of the second portions 12 in adjacent rows are the same. That is, in a plan view along the direction in which the semiconductor chips 2 and lead frames 3 are arranged, the second portions 12 are arranged in a grid pattern.
[0037] The second portion 12 is in contact with the semiconductor chip 2 and the lead frame 3. The second portion 12 is in contact with the lower surface 2a of the semiconductor chip 2 from the bottom. The second portion 12 is in contact with the upper surface 3a of the lead frame 3 from the top. The second portion 12 connects the semiconductor chip 2 and the lead frame 3.
[0038] The second portion 12 is formed from a second material. The second material has a greater elastic modulus and higher thermal conductivity than the first material. Examples of the second material include metals with high thermal conductivity and ceramic materials such as aluminum nitride. In this embodiment, the second material includes metal particles. The inclusion of metal particles in the second material allows for efficient heat dissipation from the semiconductor chip 2 to the lead frame 3.
[0039] The metal with high thermal conductivity is not particularly limited, and examples thereof include gold, silver, copper, and aluminum. The second material of the embodiment contains silver nanoparticles ranging from a few nanometers to several thousand nanometers. The second portion 12 is formed by heating and solidifying the second material, which is a paste containing a binder of silver nanoparticles.
[0040] The plurality of second portions 12 are each columnar and extend in the vertical direction, connecting the semiconductor chip 2 to the lead frame 3. The second portion 12 is columnar and extends in the vertical direction, connecting the semiconductor chip 2 to the lead frame 3. This allows the semiconductor chip 2 to be connected to the lead frame 3 with the shortest distance. The plurality of second portions 12 connect the semiconductor chip 2 to the lead frame 3 with the shortest distance, thereby improving heat dissipation from the semiconductor chip 2 to the lead frame 3 via the plurality of second portions 12.
[0041] In the semiconductor device 1 of the embodiment, heat dissipation from the semiconductor chip 2 to the lead frame 3 is improved, thereby enabling a reduction in the proportion of the second portion 12 in the adhesive layer 10. This reduction in the proportion of the second portion 12 in the adhesive layer 10 increases the proportion of the first portion 11 formed of a first material having a lower elastic modulus than the second portion 12. In the semiconductor device 1 of the embodiment, the increased proportion of the first portion 11 in the adhesive layer 10 allows the adhesive layer 10 to expand in response to the expansion of the lead frame 3 caused by heat transferred from the semiconductor chip.
[0042] The plurality of second portions 12 are each cylindrical with a circular cross-section. Since the plurality of second portions 12 are cylindrical with a circular cross-section, when the first portion 11 is formed by coating the first material around the plurality of second portions 12, the fluidity of the first material can be improved compared to, for example, a case where the second portions 12 are prismatic with a rectangular cross-section.
[0043] The diameter of each of the plurality of second portions 12 is preferably 100 μm or more, or 200 μm or more.
[0044] If the diameter of the plurality of second portions 12 is less than 100 μm, the strength when the semiconductor chip 2 is mounted and the bending strength when the first material is applied around the second portions 12 may be insufficient. Furthermore, if the diameter of the plurality of second portions 12 is less than 100 μm, heat dissipation from the semiconductor chip 2 to the lead frame 3 may be insufficient due to the small cross-sectional area.
[0045] When the diameter of the plurality of second portions 12 exceeds 200 μm, there is a possibility that the first portion 11 is prevented from extending in response to the expansion of the lead frame 3 due to the heat transferred from the semiconductor chip.
[0046] By setting the diameters of multiple second parts 12 to be greater than 100 μm and greater than 200 μm respectively, the strength when the semiconductor chip 2 is mounted, the bending strength when the first material is coated around the second part 12, the heat dissipation from the semiconductor chip 2 to the lead frame 3, and the extension of the first part 11 following the expansion of the lead frame 3 can be ensured.
[0047] The total area of the plurality of second portions 12 in contact with the semiconductor chip 2 is preferably not less than 1 / 8 and not more than 1 / 4 of the area of the surface of the semiconductor chip 2 facing the adhesive layer 10 .
[0048] If the total area of the second portions 12 is less than 1 / 8 of the area of the surface of the semiconductor chip 2 facing the adhesive layer 10 , heat dissipation from the semiconductor chip 2 to the lead frame 3 may become insufficient.
[0049] If the total area of second portions 12 exceeds 1 / 4 of the area of the surface of semiconductor chip 2 facing adhesive layer 10 , first portion 11 may be prevented from extending to follow the expansion of lead frame 3 due to heat transferred from the semiconductor chip.
[0050] By making the total area of the second portion 12 greater than or equal to 1 / 8 and less than or equal to 1 / 4 of the area of the surface of the semiconductor chip 2 facing the adhesive layer 10 , heat dissipation from the semiconductor chip 2 to the lead frame 3 and the extension of the first portion 11 following the expansion of the lead frame 3 can be ensured.
[0051] The thermal conductivity is 429 W / m·K when the area of the second portion 12 is equal to the area of the surface of the semiconductor chip 2 facing the adhesive layer 10. The desired thermal conductivity is approximately 50 W / m·K to 100 W / m·K.
[0052] By setting the total area of the plurality of second portions 12 in contact with the semiconductor chip 2 to be 1 / 8 to 1 / 4 of the area of the surface of the semiconductor chip 2 facing the adhesive layer 10 , the desired thermal conductivity of 50 to 100 W / m·K can be ensured.
[0053] In the semiconductor device 1 of the embodiment, the second portion 12 directly connects the semiconductor chip 2 to the lead frame 3, thereby improving heat dissipation. In the semiconductor device 1 of the embodiment, the first portion 11 having a low elastic modulus is disposed around the second portion 12. This allows the device to absorb stress caused by the difference in linear expansion coefficient between the semiconductor chip 2 and the lead frame 3 during moisture absorption reflow soldering and temperature cycle testing, thereby suppressing delamination.
[0054] Next, refer to Figures 3 to 10 A method for manufacturing the above-mentioned semiconductor device 1 will be described. Figures 3 to 10 It is a diagram showing the procedure of the method for manufacturing the semiconductor device 1 in the first embodiment.
[0055] The method for manufacturing a semiconductor device 1 includes the following steps: forming an adhesive layer 10 on a leadframe 3, the adhesive layer 10 having a first portion 11 formed from a first material and a plurality of second portions 12 formed from a second material having a greater elastic modulus and higher thermal conductivity than the first material; and mounting a semiconductor chip 2 on the side of the adhesive layer 10 opposite the leadframe 3. Forming the adhesive layer 10 includes applying the second material onto the leadframe 3 to form the plurality of second portions 12 in contact with the leadframe 3; and applying the first material onto the leadframe 3 to form the first portion 11 in contact with the leadframe 3, with the plurality of second portions 12 located within the first portion 11. Mounting the semiconductor chip 2 includes placing the semiconductor chip 2 in contact with the first portion 11 and the second portion 12, and connecting the semiconductor chip 2 to the leadframe 3 via the first and second portions 11 and 12.
[0056] In the method for manufacturing the semiconductor device 1 of the embodiment, there is no particular limitation on the method for forming the adhesive layer 10. In this embodiment, as a method for forming the adhesive layer 10, a procedure of sequentially forming the second portion 12 and the first portion 11 by screen printing will be described.
[0057] In the step of forming the adhesive layer 10, the second portion 12 is formed by screen printing. Figure 3 As shown, the process includes: placing a first screen plate 20A on the upper surface 3 a of the lead frame 3 ; molding the second portion 12 using the first screen plate 20A; and semi-curing the molded second portion 12 .
[0058] The first screen plate 20A has a first mesh hole 22 for forming the second part 12. The thickness of the first screen plate 20A is the same as the length of the second part 12 in the vertical direction. The first mesh hole 22 extends in the vertical direction and has a circular cross-sectional shape. The inner diameter of the first mesh hole 22 is the same as the outer diameter of the second part 12. Figure 4 As shown, the first mesh holes 22 are arranged in a lattice pattern corresponding to the positions and sizes of the second portion 12 .
[0059] When the second portion 12 is formed by screen printing, first, the second material 22P in a paste form is supplied to a position on the upper surface of the first screen plate 20A, for example, to the right of the first mesh openings 22 .
[0060] Next, the scraper 30 is moved from the right side of the second material 22P to the left along the upper surface of the first screen plate 20A. As a result, the paste-like second material 22P extruded by the scraper 30 is sequentially inserted from the first screen holes 22 at the right end to the first screen holes 22 at the left end, thereby forming the second material 22P.
[0061] Then, by removing the first screen plate 20A relative to the lead frame 3, as shown in FIG. Figure 5as well as Figure 6 As shown, a lead frame 3 is obtained in which a plurality of second portions 12 are arranged in a lattice pattern. The lower ends of the plurality of second portions 12 are in contact with the upper surface 3 a of the lead frame 3 and are formed into a cylindrical shape extending upward.
[0062] The second portion 12 formed by screen printing is semi-cured. In the semi-curing process, the lead frame 3 with the second portion 12 formed thereon is heated in an oven at 100°C, for example. Semi-curing the second portion 12 can prevent deformation when the first portion 11 is subsequently formed.
[0063] Furthermore, when the second portion 12 formed by screen printing is completely cured, if the upper surface of the second portion 12 is not flat when the semiconductor chip 2 is mounted on the second portion 12 in a subsequent step, sufficient contact with the semiconductor chip 2 may not be achieved, resulting in insufficient bonding. Therefore, when the semiconductor chip 2 is mounted on the second portion 12, the second portion 12 is semi-cured so that the upper surface of the second portion 12 is aligned with the semiconductor chip 2.
[0064] Next, in the step of forming the adhesive layer 10, the first portion 11 is formed by screen printing. Figure 7 As shown, the process includes: placing a second screen plate 20B on the upper surface 3 a of the lead frame 3 ; and forming the first portion 11 using the second screen plate 20B.
[0065] The second screen plate 20B has second mesh holes 21 for forming the first portion 11. The thickness of the second screen plate 20B is slightly thicker than the length of the second portion 12 in the vertical direction. By making the thickness of the second screen plate 20B slightly thicker than the length of the second portion 12 in the vertical direction, when the scraper 30 is moved along the upper surface of the second screen plate 20B, it is possible to avoid interference between the scraper 30 and the second portion 12. The second mesh holes 21 extend in the vertical direction, as shown in FIG. Figure 8 As shown, the cross-sectional shape is rectangular. The size of the inner circumference of the second mesh hole 21 is the same as the size of the outer circumference of the first part 11.
[0066] When the first portion 11 is formed by screen printing, first, the paste-like first material 21P is supplied to the upper surface of the second screen plate 20B, for example, to the right of the second mesh openings 21 .
[0067] Next, the scraper 30 is moved from the right side of the first material 21P to the left along the upper surface of the second screen plate 20B. Thus, the paste-like first material 21P squeezed out by the scraper 30 is sequentially inserted from the right end to the left end of the second mesh 21 to be molded.
[0068] Then, by removing the second screen plate 20B relative to the lead frame 3, as shown in FIG. Figure 9 as well as Figure 10 As shown, the lead frame 3 is obtained, in which the first portion 11 formed of the first material is arranged on the upper surface 3 a , and the second portion 12 is located inside the first portion 11 .
[0069] In the step of mounting the semiconductor chip 2 in the method for manufacturing the semiconductor device 1, the first portion 11 and the second portion 12 formed by screen printing are as follows: Figure 1 As shown, the semiconductor chip 2 is mounted in contact with the first portion 11 and the second portion 12. When the semiconductor chip 2 is mounted on the first portion 11 and the second portion 12, they are pressed with a force of, for example, about 1N to 10N.
[0070] like Figure 9 As shown, by making the thickness of the second screen plate 20B slightly thicker than the length of the first portion 11 , a thin film portion of the first portion 11 exists on the upper side of the second portion 12 .
[0071] Here, the first portion 11 is in a pre-cured state, and the second portion 12 is in a semi-cured state. Therefore, when the semiconductor chip 2 is pressed against the first and second portions 11, the film portion of the first portion 11 above the second portion 12 is squeezed out from above the second portion 12.
[0072] After the film portion of first portion 11 is squeezed out, semiconductor chip 2 contacts the upper end of second portion 12. Second portion 12 is in a semi-cured state, but not yet fully cured. Therefore, when semiconductor chip 2 is pressed, the upper end surface adheres to the semiconductor chip 2. This ensures that second portion 12 connects semiconductor chip 2 to lead frame 3 in a fully bonded state. Consequently, heat generated by semiconductor chip 2 is efficiently dissipated to lead frame 3 via second portion 12.
[0073] The step of fully curing the molded first portion 11 and second portion 12 is to heat the semiconductor device 1 formed by mounting the semiconductor chip 2 on the adhesive layer 10 at 200 to 250° C. in an oven, for example. This completes the method for manufacturing the semiconductor device 1 .
[0074] According to at least one embodiment described above, by having a plurality of second parts 12 formed of a second material having a larger elastic modulus and a higher thermal conductivity than the first material, located inside the first part 11 and connected to the semiconductor chip 2 and the lead frame 3 respectively, the first part 11 absorbs the stress caused by the difference in linear expansion coefficient between the semiconductor chip 2 and the lead frame 3 during hygroscopic reflow soldering and temperature cycle testing, thereby suppressing peeling and thereby suppressing the decrease in thermal conductivity.
[0075] In addition, according to at least one embodiment, by having a structure in which multiple second parts 12 are arranged in a grid shape at intervals when viewed along the direction in which the semiconductor chip 2 and the lead frame 3 are arranged, the heat generated by the semiconductor chip 2 can be dissipated to the lead frame 3 over a larger range in the semiconductor chip 2 and evenly.
[0076] In addition, according to at least one embodiment, the plurality of second portions each have a columnar structure connecting the semiconductor chip 2 and the lead frame 3 , thereby connecting the semiconductor chip 2 and the lead frame 3 at the shortest distance and improving heat dissipation from the semiconductor chip 2 to the lead frame 3 .
[0077] In addition, according to at least one embodiment, by having multiple second parts 12 each having a cylindrical shape, when the first part 11 is formed by coating the first material around the multiple second parts 12, the fluidity of the first material can be improved, for example, compared to the case where the second part 12 is a prism with a rectangular cross-section.
[0078] In addition, according to at least one embodiment, by having a configuration in which the total area of multiple second parts 12 connected to the semiconductor chip 2 is greater than 1 / 8 and less than 1 / 4 of the area of the surface of the semiconductor chip 2 opposite to the adhesive layer 10, heat dissipation from the semiconductor chip 2 to the lead frame 3 and the extension of the first part 11 following the expansion of the lead frame 3 can be ensured.
[0079] Furthermore, according to at least one embodiment, each of the plurality of second portions 12 has a structure including metal particles, thereby enabling efficient heat dissipation from the semiconductor chip 2 to the lead frame 3 .
[0080] In addition, according to at least one embodiment, the step of forming the second part 12 includes a step of semi-curing the second material after applying the second material to the lead frame 3, so that when the first part 11 is formed later, deformation of the second part 12 can be suppressed, and the second part 12 can be connected to the semiconductor chip 2 and the lead frame 3 in a fully bonded state, and the heat generated by the semiconductor chip 2 can be efficiently dissipated to the lead frame 3 via the second part 12.
[0081] Furthermore, according to at least one embodiment, by having a configuration in which the first portion 11 and the second portion 12 are formed separately by screen printing, the first portion 11 and the second portion 12 can be easily formed separately, and by using the same printing method, production efficiency can be improved.
[0082] (Second embodiment)
[0083] Hereinafter, the configuration of the semiconductor device 1 in the second embodiment will be described.
[0084] Figure 11 It is a plan view showing a semiconductor device 1 according to a second embodiment.
[0085] In this figure, Figures 1 to 10 The same components as those of the semiconductor device 1 according to the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.
[0086] The second embodiment differs from the above-described first embodiment in the arrangement and configuration of the second portion 12 .
[0087] like Figure 11 As shown, multiple rows of second portions 12 are spaced apart in the vertical direction when viewed from above, and multiple rows are spaced apart in the horizontal direction. In this embodiment, the longitudinal positions of the second portions 12 in adjacent rows are offset by half a pitch. In other words, the second portions 12 are arranged in a staggered pattern when viewed from above along the direction in which the semiconductor chips 2 and lead frames 3 are arranged.
[0088] The other configurations are the same as those of the semiconductor device 1 in the first embodiment.
[0089] According to at least one embodiment described above, in addition to achieving the same functions and effects as the semiconductor device 1 in the first embodiment, the plurality of second portions 12 are arranged in a staggered pattern, thereby reducing the maximum spacing between the second portions 12. Therefore, according to this embodiment, heat generated by the semiconductor chip 2 can be dissipated more uniformly over a wide area within the semiconductor chip 2 to the lead frame 3.
[0090] (Third embodiment)
[0091] Hereinafter, the configuration of the semiconductor device 1 in the third embodiment will be described.
[0092] Figure 12 It is a plan view showing a semiconductor device 1 according to a third embodiment.
[0093] In this figure, Figures 1 to 10 The same components as those of the semiconductor device 1 according to the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.
[0094] The third embodiment differs from the above-described first embodiment in the configuration of the second portion 12 .
[0095] like Figure 12 As shown, the plurality of second portions 12 are each in the shape of a prism with a rectangular cross section.
[0096] The other configurations are the same as those of the semiconductor device 1 in the above-described first embodiment.
[0097] According to at least one embodiment described above, in addition to achieving the same functions and effects as the semiconductor device 1 in the first embodiment, by having a plurality of second portions 12 in a prism-shaped configuration with a rectangular cross section, the second portions 12 can be efficiently arranged relative to the semiconductor chip 2, which is rectangular in plan view. Therefore, according to this embodiment, heat generated by the semiconductor chip 2 can be dissipated more uniformly over a wide area within the semiconductor chip 2 to the lead frame 3.
[0098] This embodiment includes the following additional aspects.
[0099] (Note 1)
[0100] A semiconductor device comprising:
[0101] semiconductor chips;
[0102] a substrate supporting the semiconductor chip; and
[0103] an adhesive layer disposed between the semiconductor chip and the substrate to bond the semiconductor chip to the substrate;
[0104] The adhesive layer has:
[0105] a first portion formed of a first material; and
[0106] A plurality of second parts are formed of a second material, are located inside the first part, and are respectively connected to the semiconductor chip and the substrate. Compared with the first material, the second material has a larger elastic modulus and a higher thermal conductivity.
[0107] (Note 2)
[0108] The semiconductor device according to Supplementary Note 1,
[0109] When viewed along the direction in which the semiconductor chip and the substrate are arranged, the plurality of second portions are arranged in a lattice pattern at intervals.
[0110] (Note 3)
[0111] The semiconductor device according to Supplementary Note 1 or Supplementary Note 2,
[0112] Each of the plurality of second portions is in a column shape and connects the semiconductor chip to the substrate.
[0113] (Note 4)
[0114] The semiconductor device according to Supplementary Note 3,
[0115] The second parts are each cylindrical.
[0116] (Note 5)
[0117] The semiconductor device according to any one of Supplementary Notes 1 to 4,
[0118] The total area of the plurality of second portions in contact with the semiconductor chip is not less than 1 / 8 and not more than 1 / 4 of the area of the surface of the semiconductor chip facing the adhesive layer.
[0119] (Note 6)
[0120] The semiconductor device according to Supplementary Note 5,
[0121] The plurality of second portions respectively include metal particles.
[0122] (Note 7)
[0123] A method for manufacturing a semiconductor device comprises the following steps:
[0124] forming an adhesive layer on the substrate, the adhesive layer having a first portion formed of a first material and a plurality of second portions formed of a second material, the second material having a larger elastic modulus and a higher thermal conductivity than the first material; and
[0125] A semiconductor chip is mounted on the side of the adhesive layer opposite to the substrate.
[0126] The step of forming the adhesive layer comprises the following steps:
[0127] applying the second material to the substrate to form a plurality of second portions in contact with the substrate; and
[0128] The first material is applied to the substrate to form the first portion in contact with the substrate, and the plurality of second portions are located inside the first portion.
[0129] The steps of mounting the semiconductor chip include the following steps:
[0130] The semiconductor chip is in contact with the first portion and the second portion, and is connected to the substrate via the first portion and the second portion.
[0131] (Note 8)
[0132] According to the method for manufacturing a semiconductor device according to Supplementary Note 7,
[0133] The step of forming the second portion includes the step of semi-curing the second material after applying the second material to the substrate.
[0134] (Note 9)
[0135] The method for manufacturing a semiconductor device according to Supplementary Note 7 or Supplementary Note 8,
[0136] When viewed along the direction in which the semiconductor chip and the substrate are arranged, the plurality of second portions are arranged in a lattice pattern at intervals.
[0137] (Note 10)
[0138] The method for manufacturing a semiconductor device according to any one of Supplementary Notes 7 to 9,
[0139] The first portion and the second portion are formed by screen printing respectively.
[0140] (Note 11)
[0141] The method for manufacturing a semiconductor device according to any one of Supplementary Notes 7 to 10,
[0142] The plurality of second portions are each formed into a columnar shape.
[0143] (Note 12)
[0144] The method for manufacturing a semiconductor device according to Supplementary Note 11,
[0145] The plurality of second portions are each formed into a cylindrical shape.
[0146] While several embodiments of the present invention have been described, these embodiments are provided as examples and are not intended to limit the scope of the invention. These embodiments may be implemented in various other ways, and various omissions, substitutions, and modifications may be made without departing from the spirit of the invention. These embodiments and their variations are intended to be included within the scope and spirit of the invention, and are also intended to be included within the invention set forth in the claims and their equivalents.
[0147] Description of reference numerals:
[0148] 1 ... semiconductor device, 2 ... semiconductor chip, 3 ... lead frame (substrate), 10 ... adhesive layer, 11 ... first portion, 12 ... second portion.
Claims
1. A semiconductor device comprising: semiconductor chips; a substrate supporting the semiconductor chip; as well as an adhesive layer disposed between the semiconductor chip and the substrate to bond the semiconductor chip to the substrate; The adhesive layer has: a first portion formed of a first material; as well as A plurality of second parts are formed of a second material, are located inside the first part, and are respectively connected to the semiconductor chip and the substrate. Compared with the first material, the second material has a larger elastic modulus and a higher thermal conductivity.
2. The semiconductor device according to claim 1, When viewed along the direction in which the semiconductor chip and the substrate are arranged, the plurality of second portions are arranged in a lattice pattern at intervals.
3. The semiconductor device according to claim 1 or 2, Each of the plurality of second portions is in a column shape and connects the semiconductor chip to the substrate.
4. The semiconductor device according to claim 3, The second parts are each cylindrical.
5. The semiconductor device according to claim 1 or 2, The total area of the plurality of second portions in contact with the semiconductor chip is not less than 1 / 8 and not more than 1 / 4 of the area of the surface of the semiconductor chip facing the adhesive layer.
6. The semiconductor device according to claim 5, The plurality of second portions respectively include metal particles.
7. A method for manufacturing a semiconductor device, comprising the following steps: forming an adhesive layer on the substrate, the adhesive layer having a first portion formed of a first material and a plurality of second portions formed of a second material, the second material having a larger elastic modulus and a higher thermal conductivity than the first material; and A semiconductor chip is mounted on the side of the adhesive layer opposite to the substrate. The step of forming the adhesive layer comprises the following steps: applying the second material to the substrate to form a plurality of second portions in contact with the substrate; and The first material is applied to the substrate to form the first portion in contact with the substrate, and the plurality of second portions are located inside the first portion. The steps of mounting the semiconductor chip include the following steps: The semiconductor chip is in contact with the first portion and the second portion, and is connected to the substrate via the first portion and the second portion.
8. The method for manufacturing a semiconductor device according to claim 7, The step of forming the second portion includes the step of semi-curing the second material after applying the second material to the substrate.
9. The method for manufacturing a semiconductor device according to claim 7 or 8, When viewed along the direction in which the semiconductor chip and the substrate are arranged, the plurality of second portions are arranged in a lattice pattern at intervals.
10. The method for manufacturing a semiconductor device according to claim 7 or 8, The first portion and the second portion are formed by screen printing respectively.
11. The method for manufacturing a semiconductor device according to claim 7 or 8, The plurality of second portions are each formed into a columnar shape.
12. The method for manufacturing a semiconductor device according to claim 11, The plurality of second portions are each formed into a cylindrical shape.
Citation Information
Patent Citations
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