Block code-based constellation shaping

Abstract

Aspects of the present disclosure provide techniques for block code based constellation shaping. An example method includes generating a first set of bits for transmission; generating a plurality of cyclic redundancy check bits and appending them in the first set to obtain a second set of bits; generating a set of log-likelihood ratios (LLRs) corresponding to the second set of bits, wherein a size of the LLR set depends on a number of physical resource blocks configured for transmitting the second set of bits and a modulation and coding scheme; decoding the LLR set by using a block code according to a shaping code rate to obtain a shaping bit sequence; generating a sequence of shaped symbols based at least in part on the sequence of shaped bits and the second set of bits; and transmitting the shaped symbol sequence to a receiving device.

Description

Background Art Technical Field

[0001] Aspects of the present disclosure relate to wireless communications and, more particularly, to techniques for block code based constellation shaping.

[0002] Description of Related Technology

[0003] Wireless communication systems are widely deployed to provide various telecommunication services, such as telephony, video, data, messaging, broadcasts, or other similar types of services. These wireless communication systems may employ multiple-access technologies capable of supporting communication with multiple users by sharing available wireless communication system resources with the multiple users.

[0004] Despite the tremendous technological advancements in wireless communication systems over the years, challenges remain. For example, complex and dynamic environments can still attenuate or block signals between wireless transmitters and wireless receivers. Consequently, there is a continuing desire to improve the technical performance of wireless communication systems, including, for example, improving the speed and data carrying capacity of communications, improving the efficiency of shared communication media usage, reducing the power used by transmitters and receivers when performing communications, improving the reliability of wireless communications, avoiding redundant transmission and / or reception and related processing, improving the coverage area of ​​wireless communications, increasing the number and types of devices that can access wireless communication systems, increasing the ability of different types of devices to communicate with each other, and increasing the number and types of wireless communication media available for use. Consequently, there is a need for further improvements in wireless communication systems to overcome the aforementioned technical challenges and others. Summary of the Invention

[0005] One aspect provides a method for wireless communication by a transmitting device. The method includes: generating a first set of bits for transmission; generating a plurality of cyclic redundancy check (CRC) bits and appending them to the first set of bits to obtain a second set of bits for transmission; generating a set of log-likelihood ratios (LLRs) corresponding to the second set of bits, wherein a size of the set of LLRs depends on the number of physical resource blocks (PRBs) configured for transmitting the second set of bits and a modulation and coding scheme (MCS) configured for transmitting the second set of bits; decoding the set of LLRs using a block code according to a shaping code rate to obtain a shaped bit sequence; generating a shaped symbol sequence based at least in part on the shaped bit sequence and the second set of bits; and transmitting the shaped symbol sequence to a receiving device.

[0006] Another aspect provides a method for wireless communication by a receiving device. The method includes: receiving a shaped symbol sequence corresponding to a set of bits from a transmitting device; converting the shaped symbol sequence into a bit-level LLR sequence; decoding the bit-level LLR sequence using a forward error correction (FEC) code rate based on a transport block size associated with the set of bits to obtain a set of decoded bits, the set of decoded bits comprising a shaped bit sequence, a shaped bit sequence in the set of bits, and a remaining subset of non-shaped bits in the set of bits; performing a deshaping operation on the shaped bit sequence using the shaping code rate based on the shaped bit sequence to obtain a deshaped bit sequence; and concatenating the deshaped bit sequence with the remaining subset of non-shaped bits to obtain the set of bits.

[0007] Other aspects provide: an apparatus operable to, configured to, or otherwise adapted to perform any one or more of the aforementioned methods and / or those described elsewhere herein; a non-transitory computer-readable medium comprising instructions that, when executed by a processor of the apparatus, cause the apparatus to perform the aforementioned methods and those described elsewhere herein; a computer program product embodied on a computer-readable storage medium comprising code for performing the aforementioned methods and those described elsewhere herein; and / or an apparatus comprising components for performing the aforementioned methods and those described elsewhere herein. By way of example, an apparatus may comprise a processing system, a device having a processing system, or processing systems cooperating through one or more networks.

[0008] For purposes of illustration, the following description and drawings set forth certain features. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The accompanying drawings depict certain features of the various aspects described herein and should not be considered as limiting the scope of the disclosure.

[0010] Figure 1 An example wireless communication network is depicted.

[0011] Figure 2 An example disaggregated base station architecture is depicted.

[0012] Figure 3 Aspects of an example base station and example user equipment are depicted.

[0013] Figure 4A 、 Figure 4B 、 Figure 4C and Figure 4D Various example aspects of data structures for a wireless communication network are described.

[0014] Figure 5 Example implementations of transmitters and receivers are depicted.

[0015] Figure 6 A communication system including a transmitter and a receiver is illustrated, which employs constellation shaping based on block codes.

[0016] Figure 7 A method for wireless communication is described.

[0017] Figure 8 A method for wireless communication is described.

[0018] Figure 9 Aspects of an example communication device are depicted.

[0019] Figure 10 Aspects of an example communication device are depicted. DETAILED DESCRIPTION

[0020] Aspects of the present disclosure provide apparatus, methods, processing systems, and computer-readable media for block code based constellation shaping.

[0021] For example, a technique known as constellation shaping can be used to improve the performance of digital communication systems by shaping the signal's constellation. A signal's constellation refers to the set of possible signal points that can be transmitted, represented by a set of complex numbers in the complex plane.

[0022] In some cases, the goal of constellation shaping is to minimize the average signal power of the transmitted signal and increase the throughput of the wireless communication network. In some cases, a shaping operation can be performed on the original set of bits for transmission to shape the constellation associated with the original set of bits and minimize the average signal power of the transmission of the original set of bits. In some cases, the shaping operation can involve bit-masking a subset of the bits of the original set of bits for transmission based on a shaping codeword. The shaping codeword can be obtained using a shaping bit sequence generated based on the original set of bits and a specific block code.

[0023] While the techniques for constellation shaping described above can help reduce the transmit power associated with transmitting information, these techniques may not be consistent with current channel coding techniques defined by certain wireless communication standards. For example, in some cases, when decoding information, a receiver may need to know the transport block size associated with the set of data bits being transmitted. However, unlike conventional techniques where the transport block size may be equal to the number of bits in the set of bits input to the encoder, when constellation shaping is used, the set of bits input to the encoder includes the original set of bits used for transmission and the shaped bit sequence. Therefore, using existing techniques to determine the transport block size may result in an inaccurate determination of the transport block size, which may cause the decoding process to fail. This failure in the decoding process may, in turn, result in one or more retransmissions of the improperly decoded information, thereby unnecessarily consuming time and frequency resources within the wireless network, as well as power resources at the transmitter and receiver.

[0024] Thus, aspects of the present disclosure provide techniques for block code-based constellation shaping that help reduce or eliminate the problems described above. The techniques presented herein can allow constellation shaping to be adapted to current channel coding techniques associated with certain wireless communication standards. For example, in some cases, these techniques can allow a receiver to appropriately determine the transport block size by considering the number of shaping bits encoded along with the original set of bits. By considering the shaping bits when determining the transport block size, the receiver can increase the likelihood that the set of bits will be correctly decoded, thereby avoiding or reducing unnecessary retransmissions of these bits and the associated wasted time, frequency, and power resources.

[0025] Introduction to wireless communication networks

[0026] The techniques and methods described herein can be used in various wireless communication networks. Although various aspects may be described herein using terms typically associated with 3G, 4G, and / or 5G wireless technologies, various aspects of the present disclosure may also be applicable to other communication systems and standards not explicitly mentioned herein.

[0027] Figure 1 An example of a wireless communication network 100 is depicted in which various aspects described herein may be implemented.

[0028] Generally speaking, the wireless communication network 100 includes various network entities (alternatively, network elements or network nodes). A network entity is typically a communication device and / or a communication function performed by a communication device (e.g., user equipment (UE), base station (BS), a component of a BS, a server, etc.). For example, various functions of a network and various devices associated with and interacting with the network can be considered network entities. In addition, the wireless communication network 100 includes terrestrial aspects, such as ground-based network entities (e.g., BS 102), and non-terrestrial aspects, such as satellites 140 and aircraft 145, which may include onboard network entities (e.g., one or more BSs) capable of communicating with other network elements (e.g., ground BSs) and user equipment.

[0029] In the depicted example, the wireless communication network 100 includes a BS 102, a UE 104, and one or more core networks (such as an evolved packet core (EPC) 160 and a 5G core (5GC) network 190) that interoperate to provide communication services over various communication links (including wired and wireless links).

[0030] Figure 1 Various example UEs 104 are depicted, which may more generally include: a cellular phone, a smartphone, a Session Initiation Protocol (SIP) phone, a laptop computer, a personal digital assistant (PDA), a satellite radio, a global positioning system, a multimedia device, a video device, a digital audio player, a camera, a game console, a tablet computer, a smart device, a wearable device, a vehicle, an electric meter, a gas pump, a large or small kitchen appliance, a healthcare device, an implant, a sensor / actuator, a display, an Internet of Things (IoT) device, an always-on (AON) device, an edge processing device, or other similar devices. A UE 104 may also be more generally referred to as a mobile device, a wireless device, a wireless communication device, a station, a mobile station, a subscriber station, a mobile subscriber station, a mobile unit, a subscriber unit, a wireless unit, a remote unit, a remote device, an access terminal, a mobile terminal, a wireless terminal, a remote terminal, a handset, and others.

[0031] BS 102 wirelessly communicates with (e.g., transmits signals to or receives signals from) UE 104 via communication link 120. Communication link 120 between BS 102 and UE 104 may include uplink (UL) (also known as a reverse link) transmissions from UE 104 to BS 102 and / or downlink (DL) (also known as a forward link) transmissions from BS 102 to UE 104. In various aspects, communication link 120 may utilize multiple-input multiple-output (MIMO) antenna technology, including spatial multiplexing, beamforming, and / or transmit diversity.

[0032] BSs 102 may generally include: a NodeB, an enhanced NodeB (eNB), a next generation enhanced NodeB (ng-eNB), a next generation NodeB (gNB or gNodeB), an access point, a base transceiver station, a radio base station, a radio transceiver, transceiver functionality, a transmit / receive point, and / or the like. Each of BSs 102 may provide communication coverage for a respective geographic coverage area 110, which may sometimes be referred to as a cell, and which may overlap in some cases (e.g., a small cell 102' may have a coverage area 110' that overlaps with the coverage area 110 of a macro cell). For example, a BS may provide communication coverage for a macro cell (covering a relatively large geographic area), a pico cell (covering a relatively small geographic area, such as a stadium), a femto cell (covering a relatively small geographic area, such as a home), and / or other types of cells.

[0033] Although BS102 is depicted in various aspects as a single communication device, BS102 can be implemented in various configurations. For example, one or more components of the base station may be decomposed, including a central unit (CU), one or more distributed units (DUs), one or more radio units (RUs), a near real-time (near-RT) RAN intelligent controller (RIC), or a non-real-time (non-RT) RIC, to name a few examples. In another example, various aspects of the base station may be virtualized. More generally, a base station (e.g., BS102) may include components located at a single physical location or components located at various physical locations. In examples where the base station includes components located at various physical locations, the various components may each perform a function such that the various components collectively implement functionality similar to that of a base station located at a single physical location. In some aspects, a base station including components located at various physical locations may be referred to as a decomposed radio access network architecture (such as an open RAN (O-RAN) or virtualized RAN (VRAN) architecture). Figure 2 An example decomposed base station architecture is depicted and described.

[0034] Different BSs 102 within the wireless communication network 100 may also be configured to support different radio access technologies (such as 3G, 4G, and / or 5G). For example, a BS 102 configured for 4G LTE (collectively referred to as the Evolved Universal Mobile Telecommunications System (UMTS) Terrestrial Radio Access Network (E-UTRAN)) may interface with the EPC 160 via a first backhaul link 132 (e.g., an S1 interface). A BS 102 configured for 5G (e.g., 5G NR or Next Generation RAN (NG-RAN)) may interface with the 5GC 190 via a second backhaul link 184. The BSs 102 may communicate with each other directly or indirectly (e.g., through the EPC 160 or the 5GC 190) over a third backhaul link 134 (e.g., an X2 interface), which may be wired or wireless.

[0035] The wireless communication network 100 may subdivide the electromagnetic spectrum into various categories, frequency bands, channels, or other characteristics. In some aspects, the subdivision is provided based on wavelength and frequency, where frequency may also be referred to as a carrier, subcarrier, channel, tone, or subband. For example, 3GPP currently defines Frequency Range 1 (FR1) as comprising 410 MHz to 7125 MHz, which is often (interchangeably) referred to as "sub-6 GHz." Similarly, 3GPP currently defines Frequency Range 2 (FR2) as comprising 24,250 MHz to 52,600 MHz, which is sometimes (interchangeably) referred to as "millimeter wave" ("mmW" or "mmWave"). A base station configured to communicate using mmWave / near mmWave radio bands (e.g., a mmWave base station such as BS 180) may utilize beamforming (e.g., 182) with a UE (e.g., 104) to improve path loss and range.

[0036] The communication link 120 between the BS 102 and, for example, the UE 104 may be over one or more carriers, which may have different bandwidths (e.g., 5 MHz, 10 MHz, 15 MHz, 20 MHz, 100 MHz, 400 MHz, and / or other MHz) and may be aggregated in various aspects. The carriers may or may not be adjacent to each other. The allocation of carriers may be asymmetric with respect to DL and UL (e.g., more or fewer carriers may be allocated for DL ​​compared to UL).

[0037] Communications using higher frequency bands may have higher path loss and shorter range than communications at lower frequencies. Therefore, some base stations (e.g. Figure 1180) may utilize beamforming 182 with UE 104 to improve path loss and range. For example, BS 180 and UE 104 may each include multiple antennas, such as antenna elements, antenna panels, and / or antenna arrays, to facilitate beamforming. In some cases, BS 180 may transmit beamformed signals to UE 104 in one or more transmit directions 182′. UE 104 may receive beamformed signals from BS 180 in one or more receive directions 182″. UE 104 may also transmit beamformed signals to BS 180 in one or more transmit directions 182″. BS 180 may also receive beamformed signals from UE 104 in one or more receive directions 182′. BS 180 and UE 104 may then perform beam training to determine the best receive direction and transmit direction for each of BS 180 and UE 104. Notably, the transmit direction and receive direction of BS 180 may be the same or may be different. Similarly, the transmit direction and receive direction of the UE 104 may or may not be the same.

[0038] Wireless communication network 100 also includes a Wi-Fi AP 150 that communicates with Wi-Fi stations (STAs) 152 via communication links 154 in, for example, the 2.4 GHz and / or 5 GHz unlicensed spectrum.

[0039] Some of the UEs 104 may communicate with each other using a device-to-device (D2D) communication link 158. The D2D communication link 158 may use one or more sidelink channels, such as a physical sidelink broadcast channel (PSBCH), a physical sidelink discovery channel (PSDCH), a physical sidelink shared channel (PSSCH), a physical sidelink control channel (PSCCH), and / or a physical sidelink feedback channel (PSFCH).

[0040] The EPC 160 may include various functional components, including a mobility management entity (MME) 162, other MMEs 164, a serving gateway 166, a multimedia broadcast multicast service (MBMS) gateway 168, a broadcast multicast service center (BM-SC) 170, and / or a packet data network (PDN) gateway 172, such as in the depicted example. The MME 162 may communicate with a home subscriber server (HSS) 174. The MME 162 is a control node that handles signaling between the UE 104 and the EPC 160. Generally, the MME 162 provides bearer and connection management.

[0041] Generally, user Internet Protocol (IP) packets are delivered through the Serving Gateway 166, which is itself connected to the PDN Gateway 172. The PDN Gateway 172 provides UE IP address allocation and other functions. The PDN Gateway 172 and the BM-SC 170 are connected to the IP Services 176, which may include, for example, the Internet, an intranet, an IP Multimedia Subsystem (IMS), packet-switched (PS) streaming services, and / or other IP services.

[0042] BM-SC 170 can provide functionality for MBMS user service provisioning and delivery. BM-SC 170 can serve as the entry point for content provider MBMS delivery, can be used to authorize and initiate MBMS bearer services within a public land mobile network (PLMN), and / or can be used to schedule MBMS delivery. MBMS Gateway 168 can be used to distribute MBMS services to BSs 102 belonging to a Multicast Broadcast Single Frequency Network (MBSFN) area broadcasting a specific service, and / or can be responsible for session management (start / stop) and collecting eMBMS-related charging information.

[0043] 5GC 190 may include various functional components, including: access and mobility management function (AMF) 192, other AMFs 193, session management function (SMF) 194, and user plane function (UPF) 195. AMF 192 may communicate with unified data management (UDM) 196.

[0044] AMF 192 is a control node that handles signaling between UE 104 and 5GC 190. AMF 192 provides, for example, Quality of Service (QoS) flow and session management.

[0045] Internet Protocol (IP) packets are passed through UPF 195, which connects to IP services 197 and provides IP address allocation for UEs and other functions for 5GC 190. IP services 197 may include, for example, the Internet, intranet, IMS, PS streaming services, and / or other IP services.

[0046] In various aspects, a network entity or network node may be implemented as a converged base station, a decomposed base station, a component of a base station, an integrated access and backhaul (IAB) node, a relay node, a sidelink node, to name a few examples.

[0047] Figure 2An example disaggregated base station 200 architecture is depicted. The disaggregated base station 200 architecture may include one or more central units (CUs) 210 that may communicate directly with a core network 220 via a backhaul link, or indirectly with the core network 220 through one or more disaggregated base station units, such as a near real-time (near-RT) RAN intelligent controller (RIC) 225 via an E2 link, or a non-real-time (non-RT) RIC 215 associated with a service management and orchestration (SMO) framework 205, or both. The CUs 210 may communicate with one or more distributed units (DUs) 230 via corresponding midhaul links, such as an F1 interface. The DUs 230 may communicate with one or more radio units (RUs) 240 via corresponding fronthaul links. The RUs 240 may communicate with corresponding UEs 104 via one or more radio frequency (RF) access links. In some implementations, a UE 104 may be served simultaneously by multiple RUs 240.

[0048] Each of the units (e.g., CU 210, DU 230, RU 240, and near-RT RIC 225, non-RT RIC 215, and SMO framework 205) may include or be coupled to one or more interfaces configured to receive or transmit signals, data, or information (collectively, signals) via a wired or wireless transmission medium. Each of the units, or an associated processor or controller that provides instructions to the communication interface of the unit, may be configured to communicate with one or more of the other units via the transmission medium. For example, the units may include a wired interface configured to receive signals or transmit signals to one or more of the other units via a wired transmission medium. Additionally or alternatively, the units may include a wireless interface that may include a receiver, transmitter, or transceiver (such as a radio frequency (RF) transceiver) configured to receive signals or transmit signals to one or more of the other units via a wireless transmission medium, or both.

[0049] In some aspects, the CU 210 may host one or more higher layer control functions. Such control functions may include radio resource control (RRC), packet data convergence protocol (PDCP), service data adaptation protocol (SDAP), etc. Each control function may be implemented using an interface that is configured to communicate signals with other control functions hosted by the CU 210. The CU 210 may be configured to handle user plane functionality (e.g., central unit-user plane (CU-UP)), control plane functionality (e.g., central unit-control plane (CU-CP)), or a combination thereof. In some specific implementations, the CU 210 may be logically split into one or more CU-UP units and one or more CU-CP units. When implemented in an O-RAN configuration, the CU-UP unit may communicate bidirectionally with the CU-CP unit via an interface (such as an E1 interface). As needed, the CU 210 may be implemented to communicate with the DU 230 for network control and signaling.

[0050] The DU 230 may correspond to a logical unit that includes one or more base station functions for controlling the operation of one or more RUs 240. In some aspects, the DU 230 may host one or more of a radio link control (RLC) layer, a medium access control (MAC) layer, and one or more higher physical (PHY) layers (such as modules for forward error correction (FEC) encoding and decoding, scrambling, modulation and demodulation, etc.) based at least in part on a functional split, such as those defined by the 3rd Generation Partnership Project (3GPP). In some aspects, the DU 230 may also host one or more lower PHY layers. Each layer (or module) may be implemented using an interface configured to communicate signals with other layers (and modules) hosted by the DU 230 or with control functions hosted by the CU 210.

[0051] Lower layer functionality may be implemented by one or more RUs 240. In some deployments, a RU 240 controlled by a DU 230 may correspond to a logical node that hosts RF processing functionality or low PHY layer functionality (such as performing Fast Fourier Transform (FFT), Inverse FFT (iFFT), digital beamforming, Physical Random Access Channel (PRACH) extraction and filtering, etc.), or both, based at least in part on a functional split (such as a lower layer functional split). In such an architecture, the RU 240 may be implemented to handle over-the-air (OTA) communications with one or more UEs 104. In some implementations, real-time and non-real-time aspects of control plane and user plane communications with the RU 240 may be controlled by the corresponding DU 230. In some scenarios, this configuration may enable the implementation of the DU 230 and CU 210 in a cloud-based RAN architecture (such as a vRAN architecture).

[0052] The SMO framework 205 can be configured to support RAN deployment and provisioning of both non-virtualized and virtualized network elements. For non-virtualized network elements, the SMO framework 205 can be configured to support the deployment of dedicated physical resources for RAN coverage requirements, which can be managed via an operations and maintenance interface (such as the O1 interface). For virtualized network elements, the SMO framework 205 can be configured to interact with a cloud computing platform (such as Open Cloud (O-Cloud) 290) to perform network element lifecycle management (such as instantiating virtualized network elements) via a cloud computing platform interface (such as the O2 interface). Such virtualized network elements may include, but are not limited to, the CU 210, DU 230, RU 240, and near-RT RIC 225. In some implementations, the SMO framework 205 can communicate with hardware aspects of the 4G RAN (such as the Open eNB (O-eNB) 211) via the O1 interface. Additionally, in some implementations, the SMO framework 205 can communicate directly with one or more RUs 240 via the O1 interface. The SMO framework 205 may also include a non-RT RIC 215 configured to support the functionality of the SMO framework 205 .

[0053] The non-RT RIC 215 can be configured to include logic functions that enable non-real-time control and optimization of RAN elements and resources, artificial intelligence / machine learning (AI / ML) workflows including model training and updating, or policy-based guidance of applications / features in the near-RT RIC 225. The non-RT RIC 215 can be coupled to or in communication with the near-RT RIC 225 (e.g., via an A1 interface). The near-RT RIC 225 can be configured to include logic functions that enable near-real-time control and optimization of RAN elements and resources through data collection and actions via an interface (e.g., via an E2 interface) that connects one or more CUs 210, one or more DUs 230, or both, and the O-eNB with the near-RT RIC 225.

[0054] In some implementations, the non-RT RIC 215 can receive parameters or external enrichment information from an external server in order to generate an AI / ML model to be deployed in the near-RT RIC 225. Such information can be utilized by the near-RT RIC 225 and can be received from non-network data sources or from network functions at the SMO framework 205 or the non-RT RIC 215. In some examples, the non-RT RIC 215 or the near-RT RIC 225 can be configured to tune RAN behavior or performance. For example, the non-RT RIC 215 can monitor long-term trends and patterns in performance and employ AI / ML models to perform corrective actions through the SMO framework 205 (such as via reconfiguration of O1) or by creating RAN management policies (such as A1 policies).

[0055] Figure 3 Aspects of an example BS 102 and UE 104 are depicted.

[0056] In general, BS 102 includes various processors (e.g., 320, 330, 338, and 340), antennas 334a-334t (collectively 334), transceivers 332a-332t (collectively 332) including modulators and demodulators, and other aspects that enable wireless transmission of data (e.g., data source 312) and wireless reception of data (e.g., data sink 339). For example, BS 102 can transmit and receive data between BS 102 and UE 104. BS 102 includes a controller / processor 340 that can be configured to implement various functions described herein related to wireless communication.

[0057] Generally speaking, the UE 104 includes various processors (e.g., 358, 364, 366, and 380), antennas 352a-352r (collectively 352), transceivers 354a-354r (collectively 354) including modulators and demodulators, and other aspects that enable wireless transmission of data (e.g., retrieved from a data source 362) and wireless reception of data (e.g., provided to a data sink 360). The UE 104 includes a controller / processor 380 that can be configured to implement various functions described herein related to wireless communications.

[0058] Regarding example downlink transmissions, BS 102 includes a transmit processor 320 that can receive data from a data source 312 and control information from a controller / processor 340. The control information can be for a physical broadcast channel (PBCH), a physical control format indicator channel (PCFICH), a physical HARQ indicator channel (PHICH), a physical downlink control channel (PDCCH), a group common PDCCH (GC PDCCH), and / or other. In some examples, the data can be for a physical downlink shared channel (PDSCH).

[0059] The transmit processor 320 may process (e.g., encode and symbol map) data and control information to obtain data symbols and control symbols, respectively. The transmit processor 320 may also generate reference symbols (such as for a primary synchronization signal (PSS), a secondary synchronization signal (SSS), a PBCH demodulation reference signal (DMRS), and a channel state information reference signal (CSI-RS)).

[0060] The transmit (TX) multiple-input multiple-output (MIMO) processor 330 may perform spatial processing (e.g., precoding) on ​​data symbols, control symbols, and / or reference symbols, as applicable, and may provide an output symbol stream to a modulator (MOD) in the transceivers 332a-332t. Each modulator in the transceivers 332a-332t may process a corresponding output symbol stream to obtain an output sample stream. Each modulator may further process (e.g., convert to analog, amplify, filter, and upconvert) the output sample stream to obtain a downlink signal. The downlink signals from the modulators in the transceivers 332a-332t may be transmitted via antennas 334a-334t, respectively.

[0061] To receive downlink transmissions, UE 104 includes antennas 352a-352r that can receive downlink signals from BS 102 and provide received signals to demodulators (DEMODs) in transceivers 354a-354r, respectively. Each demodulator in transceivers 354a-354r can condition (e.g., filter, amplify, downconvert, and digitize) a corresponding received signal to obtain input samples. Each demodulator can further process the input samples to obtain received symbols.

[0062] A MIMO detector 356 may obtain received symbols from all demodulators in transceivers 354a-354r, perform MIMO detection on the received symbols if applicable, and provide detected symbols. A receive processor 358 may process (e.g., demodulate, deinterleave, and decode) the detected symbols, provide decoded data for UE 104 to a data sink 360, and provide decoded control information to a controller / processor 380.

[0063] With respect to example uplink transmissions, the UE 104 also includes a transmit processor 364 that can receive and process data from a data source 362 (e.g., for a PUSCH) and control information from a controller / processor 380 (e.g., for a physical uplink control channel (PUCCH)). The transmit processor 364 can also generate reference symbols for reference signals (e.g., for a sounding reference signal (SRS)). The symbols from the transmit processor 364 can be pre-decoded by a TX MIMO processor 366, if applicable, further processed by a modulator in the transceivers 354a-354r (e.g., for SC-FDM), and transmitted to the BS 102.

[0064] At BS 102, uplink signals from UE 104 may be received by antennas 334 a-334 t, processed by demodulators in transceivers 332 a-332 t, detected by MIMO detector 336 if applicable, and further processed by a receive processor 338 to obtain decoded data and control information transmitted by UE 104. Receive processor 338 may provide the decoded data to a data sink 339 and the decoded control information to a controller / processor 340.

[0065] Memory 342 and memory 382 may store data and program codes for BS 102 and UE 104, respectively.

[0066] A scheduler 344 may schedule UEs for data transmission on the downlink and / or uplink.

[0067] In various aspects, the BS 102 may be described as transmitting and receiving various types of data associated with the methods described herein. In these contexts, "transmitting" may refer to various mechanisms for outputting data, such as from a data source 312, a scheduler 344, a memory 342, a transmit processor 320, a controller / processor 340, a TX MIMO processor 330, transceivers 332a-332t, antennas 334a-334t, and / or other aspects described herein. Similarly, "receiving" may refer to various mechanisms for obtaining data, such as from antennas 334a-334t, transceivers 332a-332t, an RX MIMO detector 336, a controller / processor 340, a receive processor 338, a scheduler 344, a memory 342, and / or other aspects described herein.

[0068] In various aspects, the UE 104 may also be described as sending and receiving various types of data associated with the methods described herein. In these contexts, "sending" may refer to various mechanisms for outputting data, such as from a data source 362, memory 382, ​​a transmit processor 364, a controller / processor 380, a TX MIMO processor 366, transceivers 354a-354t, antennas 352a-352t, and / or other aspects described herein. Similarly, "receiving" may refer to various mechanisms for obtaining data, such as from antennas 352a-352t, transceivers 354a-354t, an RX MIMO detector 356, a controller / processor 380, a receive processor 358, memory 382, ​​and / or other aspects described herein.

[0069] In some aspects, the processor may be configured to perform various operations (such as those associated with the methods described herein) and send (output) data to or receive (obtain) data from another interface configured to send or receive data, respectively.

[0070] Figure 4A 、 Figure 4B 、 Figure 4C and Figure 4D Describes a method for use in wireless communication networks such as Figure 1 Various aspects of the data structure of the wireless communication network 100).

[0071] Specifically, Figure 4A is a diagram 400 illustrating an example of a first subframe within a 5G (e.g., 5G NR) frame structure, Figure 4B is a diagram 430 illustrating an example of a DL channel within a 5G subframe, Figure 4C is a diagram 450 illustrating an example of a second subframe within a 5G frame structure, and Figure 4D FIG480 is a diagram illustrating an example of UL channels within a 5G subframe.

[0072] Wireless communication systems can utilize Orthogonal Frequency Division Multiplexing (OFDM) with a Cyclic Prefix (CP) on both the uplink and downlink. Such systems can also support half-duplex operation using Time Division Duplex (TDD). OFDM and Single Carrier Frequency Division Multiplexing (SC-FDM) will (for example, Figure 4B and Figure 4D The system bandwidth (as depicted in FIG) is divided into multiple orthogonal subcarriers. Each subcarrier can be modulated with data. Modulation symbols can be transmitted in the frequency domain using OFDM and / or in the time domain using SC-FDM.

[0073] The wireless communication frame structure may be frequency division duplex (FDD), where for a particular set of subcarriers, subframes within the set of subcarriers are dedicated to either DL or UL. The wireless communication frame structure may also be time division duplex (TDD), where for a particular set of subcarriers, subframes within the set of subcarriers are dedicated to both DL and UL.

[0074] exist Figure 4A and Figure 4C In the embodiment of the present invention, the wireless communication frame structure is TDD, where D is DL, U is UL, and X is flexibly used between DL / UL. The UE can be configured with a time slot format (dynamically configured by DL control information (DCI) or semi-statically / statically configured by radio resource control (RRC) signaling) through the received time slot format indicator (SFI). In the depicted example, the 10ms frame is divided into 10 equally sized 1ms subframes. Each subframe may include one or more time slots. In some examples, each time slot may include 7 or 14 symbols, depending on the time slot format. The subframe may also include micro slots, which typically have fewer symbols than a full time slot. Other wireless communication technologies may have different frame structures and / or different channels.

[0075] In certain aspects, the number of slots within a subframe is based on the slot configuration and parameter set. For example, for slot configuration 0, different parameter sets (μ) 0 through 5 allow for 1, 2, 4, 8, 16, and 32 slots per subframe, respectively. For slot configuration 1, different parameter sets 0 through 2 allow for 2, 4, and 8 slots per subframe, respectively. Thus, for slot configuration 0 and parameter set μ, there are 14 symbols per slot and 2μ slots per subframe. The subcarrier spacing and symbol length / duration are a function of the parameter set. The subcarrier spacing may be equal to 2 μ × 15kHz, where μ is parameter set 0 to 5. Thus, parameter set μ=0 has a subcarrier spacing of 15kHz, and parameter set μ=5 has a subcarrier spacing of 480kHz. Symbol length / duration is inversely related to subcarrier spacing. Figure 4A 、 Figure 4B 、 Figure 4C and Figure 4D An example is provided for slot configuration 0 with 14 symbols per slot and parameter set μ = 2 with 4 slots per subframe. The slot duration is 0.25 ms, the subcarrier spacing is 60 kHz, and the symbol duration is approximately 16.67 μs.

[0076] like Figure 4A 、 Figure 4B 、 Figure 4C and Figure 4DAs depicted in FIG, a resource grid can be used to represent the frame structure. Each time slot includes a resource block (RB) (also called a physical RB (PRB)) extending over, for example, 12 consecutive subcarriers. The resource grid is divided into a plurality of resource elements (REs). The number of bits carried by each RE depends on the modulation scheme.

[0077] like Figure 4A As illustrated in FIG, some of the REs carry data for UEs (eg, Figure 1 and Figure 3 The RS may include a demodulation RS (DMRS) and / or a channel state information reference signal (CSI-RS) for channel estimation at the UE. The RS may also include a beamforming RS (BRS), a beam refinement RS (BRRS), and / or a phase tracking RS (PT-RS).

[0078] Figure 4B Examples of various DL channels within a subframe of a frame are illustrated. The Physical Downlink Control Channel (PDCCH) carries DCI within one or more Control Channel Elements (CCEs), each CCE comprising, for example, nine RE Groups (REGs), each REG comprising, for example, four consecutive REs in an OFDM symbol.

[0079] The Primary Synchronization Signal (PSS) may be in symbol 2 of a particular subframe of a frame. The PSS is transmitted by a UE (e.g., Figure 1 and Figure 3 104) is used to determine subframe / symbol timing and physical layer identification.

[0080] A Secondary Synchronization Signal (SSS) may be within symbol 4 of a particular subframe of a frame. The SSS is used by the UE to determine the physical layer cell identity group number and radio frame timing.

[0081] Based on the physical layer identity and the physical layer cell identity group number, the UE can determine the physical cell identifier (PCI). Based on the PCI, the UE can determine the location of the aforementioned DMRS. The physical broadcast channel (PBCH) carrying the master information block (MIB) can be logically grouped with the PSS and SSS to form a synchronization signal (SS) / PBCH block. The MIB provides the number of RBs in the system bandwidth and the system frame number (SFN). The physical downlink shared channel (PDSCH) carries user data, broadcast system information not sent via the PBCH (such as the system information block (SIB)) and / or paging messages.

[0082] like Figure 4CAs illustrated in , some of the REs carry DMRS for channel estimation at the base station (indicated as R for a specific configuration, but other DMRS configurations are possible). The UE may send DMRS for PUCCH and DMRS for PUSCH. The PUSCH DMRS may be sent, for example, in the first one or two symbols of the PUSCH. The PUCCH DMRS may be sent in different configurations depending on whether a short PUCCH or a long PUCCH is sent and on the specific PUCCH format used. UE104 may send a sounding reference signal (SRS). The SRS may be sent, for example, in the last symbol of a subframe. The SRS may have a comb structure, and the UE may send the SRS on one of the teeth of the comb. The SRS may be used by the base station for channel quality estimation to achieve frequency-dependent scheduling of the UL.

[0083] Figure 4D Examples of various UL channels within a subframe of a frame are illustrated. The PUCCH may be located at the position indicated in one configuration. The PUCCH carries uplink control information (UCI), such as scheduling requests, channel quality indicators (CQI), precoding matrix indicators (PMI), rank indicators (RI), and HARQ ACK / NACK feedback. The PUSCH carries data and may additionally be used to carry buffer status reports (BSRs), power headroom reports (PHRs), and / or UCI.

[0084] Introduction to Probability Amplitude Shaping

[0085] Figure 5 A communication system employing probability amplitude shaping is illustrated.Probability amplitude shaping (PAS) utilizes reverse concatenation, whereby shaping precedes FEC decoding.

[0086] The communication system 500 includes a wireless transmitter 501 and a wireless receiver 503. For example, an information source 502 may generate k information bits that are received by an amplitude shaper 504. The amplitude shaper 504 may generate a sequence of symbols (e.g., n symbols fixed to a fixed scheme or variable to a fixed scheme). symbols). The symbol sequence (n symbols or Symbols) may be received by amplitude-to-bit component 506 and then received by FEC encoder 508 to produce a set of bits. In some examples, some of these bits are shaped and other bits are evenly distributed. After encoding, these bits are mapped to, for example, quadrature amplitude modulation (QAM) symbols by QAM mapping component 510. Signal 511 (e.g., symbol) is then transmitted to wireless receiver 503 via a wireless medium (e.g., via channel 512).

[0087] At the wireless receiver 503, the signal 511 is received by a bit-by-bit log-likelihood ratio (LLR) demapper component 514 to demap the symbols of the signal 511. The demapped symbols are received by an FEC decoder 516 and then by a bits-to-amplitude component 518 to decode the bits. The decoded bits are provided to an amplitude deshaper 520 to distribute the received bits (e.g., evenly), and the received bits can then be transmitted to their destination.

[0088] The amplitude shaper 504 may also be referred to as a distribution matcher or a specific implementation of a distribution matcher. In some aspects, the distribution matcher includes a decompressor (e.g., a decoder) to convert the information bit sequence (u) into a set of symbols. The information bit sequence (u) may be uniformly distributed. In an example, in 5G NR, the information bit sequence may be uniformly distributed. The decompressor may generate a symbol sequence based on a target probability mass function (PMF) (such as a Maxwell-Boltzmann distribution) and a symbol block length (n). The symbol sequence may be sent to a receiver for processing to determine the transmitted information.

[0089] The distribution matcher may also include a compressor (e.g., an encoder) to convert the symbol set into a compressed information bit sequence In a fixed-to-fixed scheme, the distribution matcher may include a comparator to compare the information bit sequence (u) with the compressed information bit sequence A comparison is performed to determine how many information bits were not converted into a symbol set. In some examples, the distribution matcher can provide the output of the comparator to the receiver so that the receiver can determine how to process the symbol set. For example, based on a compressor at the receiver, the receiver can compress the symbol set to generate information bits based on the target PMF, which may result in additional bits. The receiver can use the output of the comparator (e.g., discard signaling) to determine how many bits to discard.

[0090] Alternatively, the distribution matcher can adopt a variable to fixed scheme, in which the decompressor is configured with a "backoff" limit. The backoff limit can limit the amount of information bits that the decompressor can convert into a set of symbols so that no extra bits are sent to the receiver for discarding. In addition, the variable to fixed scheme can limit the amount of overhead (for example, compared to the fixed to fixed scheme) because no comparator is required, and therefore the distribution matcher can forgo sending discard signaling with information about the number of bits to be discarded at the receiver. In such examples, when the variable to fixed scheme is adopted, the rate loss compared to the target entropy can be improved compared to when the fixed to fixed scheme is adopted.

[0091] Aspects related to constellation shaping based on block codes

[0092] In some cases, a technique called constellation shaping can be used to improve the performance of digital communication systems by shaping the signal's constellation. A signal's constellation refers to the set of possible signal points that can be transmitted, represented by a set of complex numbers in the complex plane.

[0093] The traditional approach for selecting signal points in a constellation is to minimize the average energy of the signal. However, this may not always achieve optimal performance for a communication system. Constellation shaping modifies the signal points in the constellation to improve the performance of the communication system. More specifically, for example, a major benefit of constellation shaping is that it allows the use of non-uniform constellations, which can significantly improve performance compared to traditional uniform constellations. By shaping the constellation in this way, it can improve the performance of the communication system in terms of error rate, capacity, or power efficiency.

[0094] There are two main ways to implement constellation shaping: geometric constellation shaping (GCS) and probabilistic constellation shaping (PCS). GCS focuses on shaping the geometric properties of the signal points, such as their distance to the origin, their distance to other signal points, or their angle relative to a reference axis. The goal of GCS is to optimize the arrangement of the signal points in the complex plane to improve the performance of the communication system. However, GCS may not be the best option for some communication systems because it may be sensitive to channel estimation errors and may not be able to adapt to changing channel conditions. Additionally, GCS has some disadvantages (such as lower gain and high demodulation complexity), which may increase the computational cost of GCS, thereby reducing its attractiveness in some cases.

[0095] On the other hand, PCS modifies the probability distribution of signal points in the constellation to minimize the average energy of the signal and improve the performance of the communication system. This can be achieved by adjusting the probabilities of different signal points or by adding or removing signal points from the constellation, which may result in a non-uniform constellation. In some cases, the adjustment of the probability or the addition / removal of signal points in the constellation can be performed based on the signal-to-noise ratio (SNR) associated with the wireless channel through which the signal will be transmitted. The use of a non-uniform constellation can significantly improve performance compared to a traditional uniform constellation. For example, a non-uniform constellation can have a higher signal point density in areas of the complex plane where the channel noise is low, and a lower signal point density in areas where the channel noise is high. This allows for more efficient use of signal power, resulting in lower bit error rates and higher data rates.

[0096] In some cases, another technique for minimizing the average signal power of a transmitted signal may involve modifying the bit sequence of the transmitted signal. In some cases, modifying the bit sequence of the transmitted signal may involve applying a bit mask to the most significant bit (MSB) of the bit sequence to reduce the average signal power of the transmitted signal. For example, the bit level and symbol transmit power may have a relationship where the first bit (e.g., b0) (excluding the flag bit) may control the transmit power of symbol "s" of the transmitted signal (e.g., assuming Gray mapping), but not other bits. Thus, if bit u0 is transmitted with a bit value of 0 (zero), the transmit power associated with symbol "s" of the transmitted signal may be lower than with a bit value of 1 (one) (e.g., ("1", "9") vs. ("25", "49")), as shown in Table 1 below.

[0097] Table 1

[0098] s -7 -5 -3 -1 1 3 5 7 u0 1 1 0 0 0 0 1 1 u1 0 1 1 0 0 1 1 0 Logo 0 0 0 0 1 1 1 1 Tx power (s^2) 49 25 9 1 1 9 25 49

[0099] In some cases, to perform constellation shaping and bit masking of certain bits of the transmitted signal, the transmitter may first identify the original set of bits for transmission. Thereafter, the transmitter may generate a set of LLRs based on the original set of bits. In some cases, the goal of constellation shaping is to generate a covering code that maximizes power savings after bit masking. In some cases, this can be achieved by generating LLRs for the set of bits based on how much power is saved by flipping the most significant bit (MSB) of the symbol. For example, referring to Table 2 below, assuming that the data bits (u0, u1) in the particular symbol corresponding to the bit set are equal to (1, 1) (e.g., see symbol index 2 in Table 2), flipping u0 (e.g., masking it) causes The power change associated with is 16. For example, as shown in Table 2, The transmit power associated with the original bit value of is the transmit power associated with flipping u0, so is 25. Therefore, flipping u0 to 0 (zero) results in a power (e.g., LLR) reduction of 16 (e.g., 25-9=16). Table 2 below illustrates the additional bit combinations and associated LLRs that can be achieved when flipping u0, as well as the associated LLR and power savings.

[0100] Table 2

[0101] Symbol Index 1 2 3 4 5 6 <![CDATA[u0]]> 0 1 1 0 1 0 <![CDATA[u1]]> 1 1 0 1 0 0 Tx symbol (Gray mapping) 5 3 1 5 1 7 Tx power (raw) 25 9 1 25 1 49 <![CDATA[Tx power in the case of flipping u0]]> 9 25 49 9 49 1 LLR = Tx power (flip) - Tx power (original) -16 16 48 -16 48 -48

[0102] After generating a set of LLRs based on the set of bits, the set of LLRs can then be decoded based on a specific shaping rate to obtain a shaped bit sequence. A shaping encoder can then be used to mask the set of bits based on the shaped bit sequence to generate a shaped data bit sequence. The transmitter can then encode the shaped bit sequence and the shaped data bit sequence (and, in some cases, the remaining set of non-shaped data bits) to generate a set of coded bits. After encoding, the set of coded bits is mapped to, for example, a sequence of shaped symbols (e.g., QAM symbols) and transmitted as a signal over a wireless channel to a receiver.

[0103] At the receiver, the signal is received by a bit-by-bit LLR demapper component that is configured to demap the symbol sequence of the signal. In some cases, demapping the symbol sequence may be based on symbol probabilities associated with QAM symbols. Thereafter, the demapped symbol sequence may then be jointly decoded by an FEC decoder to obtain a sequence of shaped bits and a sequence of shaped data bits. Thereafter, the receiver may then re-encode the decoded shaped bits and perform a bit masking operation on the shaped data bits using the re-encoded shaped bits to obtain the original set of bits. Figure 6 Describe additional details of this process.

[0104] While the techniques described above for constellation shaping involving bit masking of the MSBs can help reduce the transmit power associated with transmitting information, these techniques may not be consistent with current channel coding techniques defined by certain wireless communication standards. For example, in many cases, generating a set of LLRs based on a set of bits may be assumed to be ideal and, therefore, may need to be adapted to non-ideal scenarios associated with current channel coding techniques, as described below with respect to Table 3.

[0105] Additionally, when decoding information, the receiver may need to know the transport block size associated with the transmitted set of bits. In conventional encoding techniques, the transport block size may be equal to the size of the set of bits (and any cyclic redundancy check bits generated based on the set of bits) input to the forward error correction (FEC) encoder. However, when constellation shaping is used, the set of bits is encoded along with the shaping bit sequence. As such, conventional techniques for determining the transport block size associated with the set of bits may be inaccurate when constellation shaping is used because the set of bits and the shaping bit sequence are encoded together.

[0106] In other words, when constellation shaping is used, the transport block size associated with a set of bits is no longer simply equal to the number of bits input to the FEC encoder, as these bits input to the FEC encoder include both data bits and shaping bits. Consequently, using existing techniques to determine the transport block size may result in an inaccurate transport block size determination, which may cause the decoding process to fail. This decoding process failure may, in turn, result in one or more retransmissions of improperly decoded information, thereby unnecessarily consuming time and frequency resources within the wireless network, as well as power resources at the transmitter and receiver.

[0107] Thus, aspects of the present disclosure provide techniques for block code-based constellation shaping that help reduce or eliminate the problems described above. For example, the techniques presented herein may allow constellation shaping to be applicable to current channel coding techniques associated with certain wireless communication standards. For example, in some cases, to better align constellation shaping with current channel coding techniques, generating LLRs (e.g., which are used to generate a shaped bit sequence for constellation shaping) may take into account certain transmission parameters used to transmit a set of bits, such as the number of physical resource blocks (PRBs) configured to transmit the set of bits and the modulation and coding scheme (MCS) configured to transmit the set of bits.

[0108] Additionally, the techniques presented herein can help a receiver appropriately determine the transport block size associated with a set of bits when using constellation shaping. For example, in some embodiments, these techniques can allow a receiver to consider the number of shaping bits encoded with a set of bits when determining the transport block size associated with the set of bits. By considering the shaping bits when determining the transport block size, the receiver can increase the likelihood that the set of bits will be correctly decoded, thereby avoiding or reducing unnecessary retransmissions of these bits and the associated wasted time, frequency, and power resources.

[0109] Example Operations for Block Code-Based Constellation Shaping

[0110] Figure 6 A communication system 600 is illustrated that includes a transmitter 602 and a receiver 604 that employs constellation shaping based on block codes. In some cases, the transmitter 602 may be an example of a network entity, such as a Figure 1 and Figure 3 BS102 as described or as Figure 2 In some cases, the receiver 604 may be an example of user equipment, such as a Figure 1 and Figure 3 UE 104 is depicted. In other cases, transmitter 602 may be an example of UE 104, and receiver 604 may be an example of BS 102 or a decomposed BS.

[0111] As shown, the transmitter 602 may generate a first set of bits 606 for transmission. The first set of bits 606 may include a number of bits equal to A bits (eg, bits a0 . . . a A-1 ). Additionally, in some cases, the first set of bits 606 may include control information and / or data information. As shown at 607, the first set of bits 606 may then be input into a cyclic redundancy check (CRC) encoder that is configured to generate a plurality of CRC bits (e.g., L bits) and append these bits to the first set of bits 606 to obtain a second set of bits 610. After appending the plurality of CRC bits, the first set of bits 606 includes a plurality of bits equal to B bits (e.g., bits b0 ... b1). B-1 ), where B = A + L.

[0112] Thereafter, the second set of bits 610 may be input to an LLR generator 612 of the transmitter 602. The LLR generator 612 is configured to generate a set of LLRs 614 (e.g., r0 . . . r1 . . . ) corresponding to the second set of bits 610 (and the first set of bits 606). H-1 In some cases, LLR generator 612 may be further configured to partition set of LLRs 614 into a plurality of shaped blocks based at least in part on shaping block lengths of the plurality of shaped blocks.

[0113] As shown, the LLR set may have a size H, which may be equal to twice the number of resource elements (REs) allocated for transmitting the second set 610 of bits. In some cases, H may be expressed as where E is the number of bits in the set of encoded bits configured to be output by the FEC encoder 628 of the transmitter 602, and Q m is the modulation order used to transmit the second set of bits 610. In some cases, E and Q m The number of physical resource blocks (N) configured to transmit the second set 610 of bits may depend on the number of physical resource blocks (N PRB ) and the modulation and coding scheme (MCS) configured for transmitting the second set 610 of bits. Therefore, as a result, H may also depend on N configured for transmitting the second set 610 of bits. PRB and MCS.

[0114] In some cases, Q m The MCS index value (I MCS ) specifies that the MCS index value (I MCS ) indicates the modulation order Q in the MCS lookup table m. In addition, E is related to the actual number of REs allocated to a radio channel (such as a physical uplink shared channel (PUSCH), a physical downlink shared channel (PDSCH), etc.) for transmitting the second set of bits 610. For example, assuming that the second set of bits 610 is to be transmitted on the PDSCH, if 10 physical resource blocks (PRBs) are allocated for transmission of the PDSCH, the actual number of REs is the nominal number of REs in the 10 PRBs (10*12 REs*18 symbols=196 REs) minus the number of REs that cannot be used for transmission of the PDSCH (such as REs used for reference signals, synchronization signal blocks (SSBs), etc.).

[0115] Therefore, since both the transmitter 602 and the receiver 604 know the REs that are not available for transmitting PDSCH, when the number of allocated PRBs is known (N PRB ), the transmitter 602 and the receiver 604 may determine the actual number of REs used to transmit the second set 610 of bits and may perform rate matching by skipping these unavailable REs. m *The actual number of REs allocated determines E. Furthermore, because the constellation associated with the transmission of the second set of bits 610 may need to be shaped in both the in-phase (I) branch and the quadrature (Q) branch of the constellation, the number of REs used to transmit the second set of bits 610 may be equal to instead of

[0116] In some cases, generating the set of LLRs 614 may include arranging the second set of bits 610 to have a dimension Q m / 2 and H matrices, as shown in Table 3 below. As shown in Table 1, it can be assumed in this example that Q m is 6. In some cases, columns 0, 2, 4, and 6 may correspond to the I branch of the constellation diagram, and columns 1, 3, 5, and 7 may correspond to the Q branch of the constellation diagram. In some cases, two columns of Table 3 may correspond to one QAM symbol.

[0117] Table 3

[0118] index 0 1 2 …… H-2 H-1 <![CDATA[b0]]> <![CDATA[b1]]> <![CDATA[b2]]> …… <![CDATA[b H-2 ]]> <![CDATA[b H-1 ]]> …… …… …… …… …… …… <![CDATA[b B-6 ]]> <![CDATA[b B-5 ]]> <![CDATA[b B-4 ]]> <![CDATA[b B-3 ]]> <![CDATA[b B-2 ]]> <![CDATA[b B-1 ]]>

[0119] In some cases, the LLR generator 612 of the transmitter 602 can be configured to generate a corresponding LLR for each different column in the matrix. For example, referring to the matrix shown in Table 3, the transmitter 602 can generate a first LLR for the bits in the second set of bits 610 arranged in column 0, a second LLR for the bits in the second set of bits 610 arranged in column 1, and so on.

[0120] In some cases, the LLR generator 612 of the transmitter 602 may generate corresponding LLRs for each different column of the matrix by determining a first power value for a first subset of bits in the second set of bits arranged in each different column of the matrix. For example, as shown in Table 3, the LLR generator 612 may determine a first power value for bits b0 ... b arranged in column 0. B-6 For example, assuming that the first subset of bits arranged in column 0 of Table 3 is 101, the LLR generator 612 may determine the power value for the bits arranged in column 0 of Table 3 (e.g., 101) by squaring the symbols represented by these bits. For example, referring to the last column in Table 1, bit 101 in column 0 of Table 3 represents the symbol 7 in Table 1. Therefore, the LLR generator 612 may determine the first power value for column 0 of Table 3 as 7*7 (e.g., 7 2 ) or 49.

[0121] Thereafter, the LLR generator 612 may be configured to flip the value of the first bit in the subset of bits arranged in the different column of the matrix to obtain a second subset of bits arranged in the different column of the matrix. For example, continuing with the above example, the LLR generator may flip the first bit of column 0 in Table 3 from 1 (e.g., 1) to 0 (e.g., zero). Thus, the second subset of bits arranged in column 0 of Table 3 may be 001.

[0122] Thereafter, LLR generator 612 may determine a second power value for a second subset of bits arranged in the different column of the matrix. For example, continuing the above example, bits 001 represent symbol 1 in the fifth column of Table 1. Thus, LLR generator 612 may determine the second power value as 1*1 (e.g., 1 2 ) or 1.

[0123] Thereafter, LLR generator 612 may generate a corresponding LLR for the different columns of the matrix based on the first power value and the second power value. For example, LLR generator 612 may generate a corresponding LLR (e.g., r0) for column 0 of Table 3 by determining the difference between the second power value and the first power value according to r0=(1*1)-(7*7)=1-49=-48. LLR generator 612 may then repeat this process for the remaining columns of the matrix in Table 3.

[0124] The example shown in Table 3 illustrates a case where LLR generation is ideal and the second set of bits 610 (eg, bits b0 . . . b B-1 ) with dimension Q m / 2 and all entries of the matrix H match. However, there may be situations where LLR generation is not ideal and the second set of bits 610 does not match the entries of the matrix. For example, this scenario may occur when the second set of bits 610 includes fewer bits than the configured number of bits in the set of encoded bits configured to be output by the FEC encoder 628 of the transmitter 602.

[0125] In such cases, the transmitter 602 may be configured to add one or more padding bits to the second set of bits 610 before arranging the second set of bits 610 into the matrix, as indicated by "x" in Table 4 below.

[0126] Table 4

[0127] index 0 1 2 …… H-2 H-1 <![CDATA[b0]]> <![CDATA[b1]]> <![CDATA[b2]]> …… <![CDATA[b H-2 ]]> <![CDATA[b H-1 ]]> …… …… …… …… …… …… x x x x x x

[0128] Therefore, when generating a corresponding LLR for each different column of the matrix, the different columns of the matrix for which the corresponding LLR is generated may include at least one padding bit, and the value of the at least one padding bit may be 0 (zero) or 1 (one). In some cases, because the value of the at least one padding bit may be 0 or 1, the LLR generator 612 may be configured to generate the corresponding LLR for the different columns of the matrix based on an average value between power values ​​determined using these different values ​​of the at least one padding bit.

[0129] For example, as noted above, LLR generator 612 is configured to determine a first power value for a first subset of bits in second set 610 of bits, flip the value of the first bit in the first subset of bits to obtain a second subset of bits in first set 610 of bits, and determine a second power value for the second subset of bits. Thus, when different columns of the matrix for which respective LLRs are being generated include at least one pass bit, determining the first power value for the first subset of bits may be based on the first value of at least one padding bit. Thereafter, once the value of the first bit in the first subset of bits has been flipped, LLR generator 612 may determine a second power value for the second subset of bits based on the first value of the at least one padding bit. Thereafter, LLR generator 612 may determine a third power value for the first subset of bits and a fourth power value for the second subset of bits based on the second value of the at least one bit.

[0130] More specifically, for example, assume that the first subset of bits in column 0 of Table 4 (e.g., bits b0 . . . x) includes bit 101 (e.g., the first value of at least one padding bit is 1). Thus, referring to Table 1, LLR generator 612 may determine the first power value for the first subset of bits to be 49 (e.g., bit 101 corresponds to symbol 7 in Table 1 and 7 2is 49). Thereafter, LLR generator 612 flips the first bit in the first subset of bits to 0 (zero) to obtain a second subset of bits 001. LLR generator 612 may then determine a second power value for the second subset of bits as 1 (e.g., bit 001 corresponds to symbol 1 in Table 1 and 1 2 Yes 1).

[0131] Thereafter, LLR generator 612 may assume a second value for the at least one padding bit (e.g., x=0) such that the first subset of bits includes bit 100. Thus, LLR generator 612 may then determine a third power value for the first subset of bits based on the second value of the at least one padding bit. For example, referring to Table 1, assuming that the first subset of bits includes bit 100, LLR generator 612 may determine the third power value to be 49 (e.g., bit 100 corresponds to symbol -7 in Table 1 and -7 corresponds to 49). 2 is 49). LLR generator 612 may again flip the value of the first bit in the first subset of bits to 0 (zero) to obtain a second subset of bits 000. LLR generator 612 may then determine a fourth power value for the second subset of bits as 1 (e.g., bit 000 corresponds to symbol -1 in Table 1 and -1 2 Yes 1).

[0132] Thus, the LLR generator 612 of the transmitter 602 may then generate a corresponding LLR for column 0 of Table 4 based on the first power value, the second power value, the third power value, and the fourth power value. For example, the LLR generator 612 may determine a first difference between the first power value and the second power value (e.g., 1*1-7*7=-48). The LLR generator 612 may then determine a second difference between the third power value and the fourth power value (e.g., 1*1-7*7=-48). The LLR generator 612 may then generate a corresponding LLR for column 0 of Table 4 based on an average of the first difference and the second difference. For example, the LLR generator 612 may generate a corresponding LLR based on to generate a corresponding LLR (eg, r0) for column 0 of Table 4. The LLR generator 612 may then repeat the process for the remaining columns of the matrix in Table 4.

[0133] Once the LLR set (e.g., r0...r H-1 ), the LLR generator 612 may, for example, divide the LLR set 614 into a plurality of shaped blocks based on the shaped block lengths of the plurality of shaped blocks. Thereafter, the plurality of shaped blocks and the LLR set may be input to a channel decoder 616, which is configured to decode the LLR set according to a block code (e.g., a low-density parity check (LDPC) code, a polar code, a Hamming code, a Bose-Chaudhuri-Hochwengeim (BCH) code, a Reed-Solomon code, etc.) to obtain a shaped bit sequence 618 (e.g., e0 ... eS-1 In some cases, the channel decoder 616 may be configured to generate a bit rate (R s ) to decode the LLR set, the shaping code rate (R s ) can be defined as R s =K s / N s , where K s is the size of the integer bit sequence 618 (eg, s), and N s is the integer block length associated with the number of integer blocks into which the LLR set 614 has been partitioned. In some cases, the integer code rate (R s ) may depend on the subband on which the second set of bits 610 will be sent and may vary for different subbands. For example, in some cases, the shaping code rate (R s ) may be based on a signal-to-noise ratio (SNR) associated with the subbands over which the second set of bits 610 are to be sent.

[0134] After being generated, the shaping bit sequence 618 may be input to the channel encoder 620. The channel encoder 620 may be configured to generate the shaping bit sequence 618 according to the shaping code rate (R s ) (re)encodes the integer bit sequence 618 using a block code to obtain a bit sequence of size H consisting of the bit sequence f0...f H-1 For example, in order to obtain the shaping codeword 622, the channel encoder 620 may generate the shaping codeword according to v=[e0,…,e S-1 ]×G S The shaped bit sequence 618 (e0...e S-1 ) multiplied by the generator matrix (G) of the block code of size S.

[0135] Thereafter, the bit mask component 624 of the transmitter 602 may be configured to perform a shaping operation on a subset of the second set of bits 610 using the shaping codeword to generate a shaped bit sequence. For example, the shaping operation may be performed on the same number of bits in the second set of bits 610 as are included in the shaping codeword. In other words, the bits in the shaping codeword (e.g., f0 ... f H-1 ) may be equal to the bits in the subset of bits in the second set of bits 610 (eg, b0 . . . b H-1 ). Thus, the bit mask component 624 can mask the first number of bits (e.g., f0...f H-1 ) for a second number of bits in the bit subset (e.g., b0...b H-1 ) to perform the shaping operation. For example, the bit mask component 624 can be based on b0⊕f0, ..., b H-1 ⊕f H-1A shaping operation is performed to generate a shaped bit sequence, where ⊕ represents element-wise modulo-2 addition (e.g., exclusive OR (XOR)). As noted above, the goal of shaping is to maximize power savings. Therefore, to maximize power savings, the second number of bits in the bit subset (e.g., b0...b H-1 ) bit masking includes shifting at least some of the second number of bits to zero.

[0136] Once the shaping operation has been performed, the transmitter 602 may be configured to cause the shaped bit sequence (eg, b0 . . . b H-1 ), the remaining subset of the non-shaped bits in the second set of bits 610 (eg, b H ...b B-1 ) and shaped bit sequences (e.g., e0...e S-1 ) are concatenated to obtain a set of information bits 626 (e.g., c0...c K-1 ). Therefore, the information bit set can be expressed as [c0,…,c K-1 ]=[b0⊕f0,…,b H-1 ⊕f H-1 ,b0,…,b H-1 ,e0,…,e S-1 ].

[0137] After performing the shaping operation, the information bit set 626 (e.g., c0, . . . , c K-1 ) (e.g., including the shaped bit sequence, the remaining subset of non-shaped bits, and the shaped bit sequence) can be input into a systematic FEC encoder 628. The FEC encoder 628 can then encode the set of information bits 626 to obtain a set of coded bits. In some cases, the FEC code rate used to encode the set of information bits 626 can be specified by the MCS used to transmit the second set of bits 610, which can be indicated using an MCS table.

[0138] After encoding, the set of coded bits may be passed to a bit-to-symbol mapper 630. The bit-to-symbol mapper 630 is configured to map the coded bits to symbols (e.g., QAM symbols) to generate a shaped symbol sequence from or based on the shaped bit sequence 618. The shaped symbol sequence may then be transmitted to the receiver 604 via a wireless channel 632.

[0139] like Figure 6As shown, a symbol-to-bit demapper 634 of the receiver 604 receives a shaped symbol sequence corresponding to the second set of bits 610. The symbol-to-bit demapper 634 is configured to demap the shaped symbol sequence to generate a bit-level LLR sequence corresponding to the set of coded bits output from the FEC encoder 628 of the transmitter 602, as described above. In some cases, demapping the symbol sequence can be based on symbol probabilities associated with the shaped symbol sequence. For example, in some cases, the receiver 604 can receive the shaped symbol sequence and use the symbol probabilities to perform maximum a posteriori probability (MAP) demodulation to convert the received symbol sequence into bit-level LLRs for the set of coded bits.

[0140] Thereafter, the bit-level LLRs may be input to an FEC decoder 636. The FEC decoder 636 may be configured to decode the sequence of bit-level LLRs using an FEC code rate to obtain a set of decoded bits 638. In some cases, the FEC code rate may be the same as the FEC code rate used by the FEC encoder 628 of the transmitter 602 to encode the set of information bits 626.

[0141] In some cases, the set of decoded bits 638 corresponds to the set of information bits 626 (eg, c0, ..., c K-1 ) and includes an integer bit sequence 640 (e.g., e0...e S-1 ), a shaped bit sequence 642 in the bit set, and a remaining subset 644 of the non-shaped bits in the bit set. The shaped bit sequence 640 corresponds to the shaped bit sequence 618 generated by the transmitter 602. Similarly, the shaped bit sequence 642 corresponds to the shaped bit sequence (e.g., b0 ... b H-1 ), and the subset of non-shaped bits 644 corresponds to the subset of non-shaped bits generated by the transmitter 602 (e.g., b H ...b B-1 ).

[0142] In some cases, FEC decoder 636 may decode the bit-level LLRs based on a transport block size associated with second set of bits 610 (e.g., included within or represented by the bit-level LLRs determined by receiver 604). Additionally, in some cases, FEC decoder 636 may also use the transport block size associated with second set of bits 610 to partition shaped bit sequence 640 from shaped bit sequence 642 and a remaining subset 644 of non-shaped bits.

[0143] As noted above, conventional techniques for determining transport block size may not be accurate when constellation shaping is used, and may result in an incorrect transport block size determination due to the addition of the shaped bit sequence 640 included within the bit-level LLRs. Therefore, in some cases, to accurately determine the transport block size (B) associated with the second set 610 of bits generated by the transmitter 602, the receiver 604 may first determine the size (e.g., K) of the set of information bits 626 configured to be input to the FEC encoder 628 of the transmitter 602. The receiver 604 may determine the size (e.g., K) of the set of information bits 626 configured to be input to the FEC encoder 628 of the transmitter 602. The receiver 604 may determine the size (e.g., K) of the set of information bits 626 configured to be input to the FEC encoder 628 of the transmitter 602 based on the number of physical resource blocks (N) used to transmit the second set 610 of bits. PRB ) and the MCS of the second set 610 of bits configured to be transmitted determine the size of the information bit set 626.

[0144] In some cases, the receiver 604 may receive configuration information from the transmitter 602 indicating the N bits used to transmit the second set 610 of bits. PRB and an MCS index value configured to transmit the MCS of the second set 610 of bits. In some cases, the configuration information may be received in downlink control information (DCI). In some cases, the MCS index value may correspond to an entry in an MCS lookup table that indicates: the modulation order (Q m ) and the FEC code rate associated with the second set 610 of bits.

[0145] Thereafter, the receiver 604 may determine the modulation order (Q m ) and a configured number of encoded bits (E) associated with the FEC encoding (e.g., configured to be output by the FEC encoder 628 of the transmitter 602). In some cases, the receiver may determine the number of resource elements (H) associated with the transport block used to transmit the second set of bits 610. To determine H.

[0146] Thereafter, the receiver 604 may select a resource element based on the number of resource elements (H) and the shaping code rate (R s ) (eg, used by transmitter 602 to generate shaping bit sequence 618) to determine shaping bit sequence 640 (eg, e0 . . . e S-1 ). For example, in some cases, the receiver 604 may To determine S, where is the floor operator. In some cases, the receiver 604 may receive a signal from the transmitter 602 indicating the shaping rate (R s In some cases, the shaping code rate (R s) may be included in the configuration information received from the transmitter 602. For example, information indicating the shaping code rate may be included in the MCS lookup table and may be provided by the MCS index value received in the configuration information from the transmitter 602. In other cases, the configuration information may explicitly indicate the shaping code rate.

[0147] After determining the number of shaping bits (S), the receiver 604 may then determine a transport block size (B) for decoding the bit-level LLR sequence (e.g., associated with the second set of bits 610) based on the number of shaping bits (S) and the size of the information bit set (K). For example, the receiver 604 may determine the transport block size (B) according to B=KS.

[0148] As shown, the shaped bit sequence 640 may be input to a channel encoder 646. The channel encoder 646 may be configured to generate a shaped bit sequence 640 based on a shaped bit rate (R) (e.g., used by the transmitter 602). s ) encodes the shaping bit sequence 640 using a block code to obtain a deshaping codeword. This encoding process may be similar to the encoding process performed by the channel encoder 620 of the transmitter 602. As such, the deshaping codeword may, in some cases, correspond to the shaping codeword generated by the transmitter 602 (e.g., f0 ... f H-1 ).

[0149] Thereafter, the deshaping codeword 649, along with the shaped bit sequence 642 and the remaining subset 644 of non-shaped bits, may be input into a bit mask component 647 of the receiver 604. The bit mask component 647 is configured to perform a deshaping operation on the shaped bit sequence 642. For example, in some cases, the bit mask component 647 may apply the deshaping codeword 649 to the shaped bit sequence 642 to deshape the shaped bit sequence 642 and obtain a deshaped bit sequence. Thereafter, the receiver 604 may concatenate the deshaped bit sequence with the remaining subset 644 of non-shaped bits to obtain a bit set 648 corresponding to the second set 610 of bits generated by the transmitter 602. Thus, the bit set 648 may include the first set 606 of bits and the plurality of CRC bits described above.

[0150] In some cases, the receiver 604 may then use the plurality of CRC bits included in the set of bits 648 to verify that the first set of bits 606 was correctly received and decoded. For example, the receiver 604 may use a CRC encoder to encode the first set of bits 606 included in the set of bits 648 to generate a second plurality of CRC bits. If the second plurality of CRC bits generated by the receiver 604 matches the plurality of CRC bits received in the set of bits 648, the receiver 604 may know that the first set of bits 606 received in the set of bits 648 was correctly received and decoded.

[0151] Example operation of the sending device

[0152] Figure 7 An example of a method 700 for wireless communication by a transmitting device is shown. In some examples, the transmitting device is a user equipment such as Figure 1 and Figure 3 UE 104. In some examples, the sending device is a network entity such as Figure 1 and Figure 3 BS102 or such Figure 2 The decomposed base station in question.

[0153] Method 700 begins at step 705, where a first set of bits for transmission is generated. In some cases, the operation of this step refers to the operation of Figure 9 The circuit for generating and / or the code for generating are described, or can be executed by the circuit and / or the code.

[0154] Then, the method 700 proceeds to step 710, where a plurality of CRC bits are generated and appended to the first set of bits to obtain a second set of bits for transmission. In some cases, the operation of this step refers to the operation of Figure 9 The circuit for generating and / or the code for generating are described, or can be executed by the circuit and / or the code.

[0155] Then, the method 700 proceeds to step 715, where a set of LLRs corresponding to the second set of bits is generated, where the size of the set of LLRs depends on the number of PRBs configured for transmitting the second set of bits and the MCS configured for transmitting the second set of bits. In some cases, the operation of this step refers to the operation of Figure 9 The circuit for generating and / or the code for generating are described, or can be executed by the circuit and / or the code.

[0156] Then, the method 700 proceeds to step 720, where the LLR set is decoded using a block code according to the shaping code rate to obtain a shaping bit sequence. In some cases, the operation of this step refers to the following steps: Figure 9 The circuit for decoding and / or the code for decoding are described, or can be performed by the circuit and / or the code.

[0157] Then, the method 700 proceeds to step 725, where a shaped symbol sequence is generated based at least in part on the shaped bit sequence and the second set of bits. In some cases, the operation of this step refers to the operation of Figure 9 The circuit for generating and / or the code for generating are described, or can be executed by the circuit and / or the code.

[0158] Then, the method 700 proceeds to step 730, wherein the shaped symbol sequence is sent to the receiving device. In some cases, the operation of this step refers to the operation of Figure 9 The circuits for transmitting and / or the code for transmitting are described, or can be performed by the circuits and / or the code.

[0159] In some aspects, the method 700 further includes: encoding the shaped bit sequence using the block code according to the shaped code rate to obtain a shaped codeword. In some cases, the operation of this step refers to the operation of Figure 9 The circuits for encoding and / or the codes for encoding are described, or can be performed by the circuits and / or the codes.

[0160] In some aspects, method 700 further includes: performing a shaping operation on a subset of bits in the second set of bits using the shaping codeword to generate a shaped bit sequence. In some cases, the operation of this step refers to the operation of Figure 9 Circuits for performing and / or code for performing are described, or can be performed by the circuits and / or the code.

[0161] In some aspects, the method 700 further comprises: concatenating the shaped bit sequence, the remaining subset of non-shaped bits in the second set of bits, and the shaped bit sequence to obtain a set of information bits. In some cases, the operation of this step refers to the operation of Figure 9 The circuit for cascading and / or the code for cascading are described, or can be executed by the circuit and / or the code.

[0162] In some aspects, the method 700 further comprises: encoding the information bit set using an FEC code rate. In some cases, the operation of this step refers to the operation of Figure 9 The circuits for encoding and / or the codes for encoding are described, or can be performed by the circuits and / or the codes.

[0163] In some aspects, method 700 further comprises: generating the shaped symbol sequence based on the set of coded bits. In some cases, the operation of this step refers to the operation of Figure 9 The circuit for generating and / or the code for generating are described, or can be executed by the circuit and / or the code.

[0164] In some aspects, a first number of bits in the shaped codeword is equal to a second number of bits in the subset of bits in the second set of bits; and performing the shaping operation includes bit-masking the second number of bits in the subset of bits using the first number of bits in the shaped codeword.

[0165] In some aspects, bit-masking the second number of bits in the subset of bits includes shifting at least some of the second number of bits to zero.

[0166] In some aspects, generating the set of LLRs includes arranging the second set of bits into a matrix having dimensions Qm / 2 and H, where Qm is the modulation order used to transmit the second set of bits, and H is the number of bits in the set of coded bits (E) divided by the modulation order (Qm) multiplied by 2.

[0167] In some aspects, generating the set of LLRs further comprises generating a respective LLR for each different column in the matrix.

[0168] In some aspects, generating the respective LLRs for each different column of the matrix includes: determining a first power value for a second subset of bits in the second set of bits arranged in the different column of the matrix; flipping a value of a first bit in the second subset of bits arranged in the different column of the matrix to obtain a third subset of bits arranged in the different column of the matrix; and determining a second power value for the third subset of bits arranged in the different column of the matrix.

[0169] In some aspects, the respective LLRs are generated for the different columns of the matrix based on the first power value and the second power value.

[0170] In some aspects, method 700 further includes: when the second set of bits includes fewer bits than the number of bits configured for the set of coded bits, adding one or more padding bits to the second set of bits before arranging the second set of bits into the matrix. In some cases, the operation of this step refers to as described in reference to Figure 9 The circuit for adding and / or the code for adding are described, or can be performed by the circuit and / or the code.

[0171] In some aspects, the different column of the matrix for which the respective LLR is generated includes at least one padding bit; determining the first power value for the second subset of bits is based on a first value of the at least one padding bit; and determining the second power value for the third subset of bits is based on the first value of the at least one padding bit.

[0172] In some aspects, method 700 further includes determining a third power value for the second subset of bits based on the second value of the at least one padding bit. In some cases, the operation of this step refers to the operation of Figure 9 The circuit for determining and / or the code for determining are described, or can be performed by the circuit and / or the code.

[0173] In some aspects, method 700 further includes determining a fourth power value for the third subset of bits based on the second value of the at least one padding bit. In some cases, the operation of this step refers to the operation of Figure 9 The circuit for determining and / or the code for determining are described, or can be performed by the circuit and / or the code.

[0174] In some aspects, method 700 further includes determining a first difference between the first power value and the second power value. In some cases, the operation of this step is as described in reference to Figure 9 The circuit for determining and / or the code for determining are described, or can be performed by the circuit and / or the code.

[0175] In some aspects, the method 700 further includes determining a second difference between the third power value and the fourth power value. In some cases, the operation of this step is as described in reference to Figure 9 The circuit for determining and / or the code for determining are described, or can be performed by the circuit and / or the code.

[0176] In some aspects, generating the respective LLRs for the different columns of the matrix is ​​based on an average of the first difference and the second difference.

[0177] In some aspects, method 700 further includes: sending configuration information to the receiving device, the configuration information indicating: the number of PBRs configured for sending the second set of bits; and an MCS index value of the MCS configured for sending the second set of bits, the MCS index value corresponding to an entry in an MCS lookup table, the entry indicating: a modulation order; and the FEC code rate. In some cases, the operation of this step refers to as described in reference Figure 9 The circuits for transmitting and / or the code for transmitting are described, or can be performed by the circuits and / or the code.

[0178] In some aspects, the method 700 further includes: sending information indicating the shaping bit rate to the receiving device. In some cases, the operation of this step refers to the following Figure 9 The circuits for transmitting and / or the code for transmitting are described, or can be performed by the circuits and / or the code.

[0179] In some aspects, the information indicative of the shaping code rate is included in the MCS lookup table and provided via the MCS index value.

[0180] In one aspect, method 700 or any aspect related thereto may be performed by an apparatus such as Figure 9 The method 700 is performed by a communication device 900 comprising various components operable, configured or adapted to perform the method 700. The communication device 900 is described in more detail below.

[0181] Please note that Figure 7 This is merely one example of a method, and other methods including fewer, additional, or alternative steps may also be consistent with the present disclosure.

[0182] Example Operation of a Receiving Device

[0183] Figure 8 An example of a method 800 for wireless communication by a receiving device is shown. In some examples, the receiving device is a user equipment such as Figure 1 and Figure 3 UE 104. In some examples, the receiving device is a network entity such as Figure 1 and Figure 3 BS102 or such Figure 2 The decomposed base station in question.

[0184] Method 800 begins at step 805, where a shaped symbol sequence corresponding to a set of bits is received from a transmitting device. In some cases, the operation of this step refers to the operation of Figure 10 The circuits for receiving and / or code for receiving are described, or can be performed by the circuits and / or code.

[0185] Then, the method 800 proceeds to step 810, where the shaped symbol sequence is converted into a bit-level LLR sequence. In some cases, the operation of this step refers to the operation of Figure 10 The circuit for converting and / or the code for converting are described, or can be executed by the circuit and / or the code.

[0186] Then, the method 800 proceeds to step 815, where the bit-level LLR sequence is decoded using the FEC code rate based on the transport block size associated with the bit set to obtain a set of decoded bits, the set of decoded bits including the shaping bit sequence, the shaped bit sequence in the bit set, and the remaining subset of the non-shaped bits in the bit set. In some cases, the operation of this step refers to the operation described in reference to Figure 10 The circuit for decoding and / or the code for decoding are described, or can be performed by the circuit and / or the code.

[0187] Then, the method 800 proceeds to step 820, wherein a deshaping operation is performed on the shaped bit sequence using the shaping code rate based on the shaped bit sequence to obtain a deshaped bit sequence. In some cases, the operation of this step refers to the operation of Figure 10 Circuits for performing and / or code for performing are described, or can be performed by the circuits and / or the code.

[0188] Then, method 800 proceeds to step 825, where the deshaped bit sequence is concatenated with the remaining subset of non-shaped bits to obtain the bit set. In some cases, the operation of this step refers to the operation of Figure 10 The circuit for cascading and / or the code for cascading are described, or can be executed by the circuit and / or the code.

[0189] In some aspects, the method 800 further comprises: encoding the shaping bit sequence using a block code according to the shaping code rate to obtain a deshaped codeword. In some cases, the operation of this step refers to the operation of Figure 10 The circuits for encoding and / or the codes for encoding are described, or can be performed by the circuits and / or the codes.

[0190] In some aspects, performing the deshaping operation on the shaped bit sequence includes applying the deshaping codeword to the shaped bit sequence to deshape the shaped bit sequence and obtain the deshaped bit sequence.

[0191] In some aspects, the method 800 further includes determining a size (K) of a set of information bits associated with FEC encoding of the set of bits based on the number of PRBs configured to transmit the set of bits and the MCS configured to transmit the set of bits. In some cases, the operation of this step refers to referring to Figure 10 The circuit for determining and / or the code for determining are described, or can be performed by the circuit and / or the code.

[0192] In some aspects, the method 800 further comprises determining a number of resource elements (H) associated with a transport block for transmitting the set of bits based on the modulation order (Qm) and the configured number of coded bits (E) corresponding to the set of information bits. In some cases, the operation of this step refers to the operation of Figure 10 The circuit for determining and / or the code for determining are described, or can be performed by the circuit and / or the code.

[0193] In some aspects, the method 800 further includes determining the number of shaping bits (S) in the shaping bit sequence based on the number of resource elements (H) and the shaping code rate (Rs). In some cases, the operation of this step refers to the operation of Figure 10 The circuit for determining and / or the code for determining are described, or can be performed by the circuit and / or the code.

[0194] In some aspects, the method 800 further comprises: determining the transport block size for decoding the bit-level LLR sequence based on the number of shaping bits (S) and the size (K) of the information bit set associated with the FEC encoding of the bit set. In some cases, the operation of this step refers to as described in reference to Figure 10The circuit for determining and / or the code for determining are described, or can be performed by the circuit and / or the code.

[0195] In some aspects, decoding the bit-level LLR sequence includes partitioning the shaping bit sequence from the shaped bit sequence and the remaining subset of non-shaped bits based on the transport block size associated with the set of bits.

[0196] In some aspects, the method 800 further includes: receiving configuration information from the transmitting device, the configuration information indicating: the number of PBRs configured for transmitting the bit set; and an MCS index value of the MCS configured for transmitting the bit set, the MCS index value corresponding to an entry in an MCS lookup table, the entry indicating: a modulation order; and the FEC code rate. In some cases, the operation of this step refers to as described in reference Figure 10 The circuits for receiving and / or code for receiving are described, or can be performed by the circuits and / or code.

[0197] In some aspects, the method 800 further includes: receiving information indicating the shaping code rate from the transmitting device. In some cases, the operation of this step refers to the following Figure 10 The circuits for receiving and / or code for receiving are described, or can be performed by the circuits and / or code.

[0198] In some aspects, the information indicative of the shaping code rate is included in the MCS lookup table and provided via the MCS index value.

[0199] In one aspect, method 800 or any aspect related thereto may be performed by an apparatus such as Figure 10 The method 800 is performed by a communication device 1000 comprising various components operable, configured or adapted to perform the method 800. The communication device 1000 is described in more detail below.

[0200] Please note that Figure 8 This is merely one example of a method, and other methods including fewer, additional, or alternative steps may also be consistent with the present disclosure.

[0201] Example Communication Device

[0202] Figure 9 Depicted are aspects of an example communication device 900. In some aspects, the communication device 900 is user equipment, such as described above with respect to Figure 1 and Figure 3 The described UE 104. In some aspects, the communication device 900 is a network entity such as Figure 1 and Figure 3 BS102 or such Figure 2 The decomposed base station in question.

[0203] The communication device 900 includes a processing system 902 coupled to a transceiver 942 (e.g., a transmitter and / or a receiver). In some aspects (e.g., when the communication device 900 is a network entity), the processing system 902 can be coupled to a network interface 946 that is configured to communicate with the communication device 900 via a communication link (such as, for example, as described herein). Figure 2 The processing system 902 may be configured to perform processing functions for the communication device 900, including processing signals received by the communication device 900 and / or to be transmitted by the communication device 900.

[0204] The processing system 902 includes one or more processors 904. In various aspects, the one or more processors 904 may represent one or more of the receive processor 358, the transmit processor 364, the TX MIMO processor 366, and / or the controller / processor 380, as described with respect to FIG. Figure 3 In various aspects, the one or more processors 904 may represent one or more of the receive processor 338, the transmit processor 320, the TX MIMO processor 330, and / or the controller / processor 340, as described with respect to FIG. Figure 3 The one or more processors 904 are coupled to the computer readable medium / memory 922 via the bus 940. In some aspects, the computer readable medium / memory 922 is configured to store instructions (e.g., computer executable code) that, when executed by the one or more processors 904, cause the one or more processors 904 to perform operations related to the computer readable medium / memory 922. Figure 7 The method 700 described herein or any aspect thereof; and Figure 8 The described method 800 or any aspects related thereto. Note that references to a processor performing a function of the communication device 900 may include one or more processors 904 performing that function of the communication device 900.

[0205] In the depicted example, computer-readable medium / memory 922 stores code (e.g., executable instructions), such as code for generating 924, code for decoding 926, code for transmitting 928, code for encoding 930, code for executing 932, code for concatenating 934, code for adding 936, and code for determining 938. Processing of code for generating 924, code for decoding 926, code for transmitting 928, code for encoding 930, code for executing 932, code for concatenating 934, code for adding 936, and code for determining 938 may enable the communication device 900 to perform operations related to the communication device 900. Figure 7 The method 700 described herein or any aspect thereof; and Figure 8 The described method 800 or any aspect related thereto.

[0206] The one or more processors 904 include circuits configured to implement (e.g., execute) code stored in the computer-readable medium / memory 922, including circuitry for generating 906, circuitry for decoding 908, circuitry for transmitting 910, circuitry for encoding 912, circuitry for executing 914, circuitry for concatenating 916, circuitry for adding 918, and circuitry for determining 920. Processing using the circuitry for generating 906, circuitry for decoding 908, circuitry for transmitting 910, circuitry for encoding 912, circuitry for executing 914, circuitry for concatenating 916, circuitry for adding 918, and circuitry for determining 920 may enable the communication device 900 to perform operations related to Figure 7 The method 700 described herein or any aspect thereof; and Figure 8 The described method 800 or any aspect related thereto.

[0207] The various components of the communication device 900 may provide means for performing Figure 7 The method 700 described herein or any aspect thereof; and Figure 8 The method 800 described herein or any aspect thereof. For example, components for sending, transmitting, or outputting for sending may include Figure 3 The transceiver 354 and / or antenna 352 of the UE 104 illustrated in FIG. Figure 3 The transceiver 332 and / or antenna 334 and / or Figure 9 The transceiver 942 and antenna 944 of the communication device 900 are shown in FIG. Components for receiving or obtaining may include Figure 3 The transceiver 354 and / or antenna 352 of the UE 104 illustrated in FIG. Figure 3The transceiver 332 and / or antenna 334 and / or Figure 9 942 and antenna 944 of the communication device 900 illustrated in FIG.

[0208] Figure 10 Depicted are aspects of an example communications device 1000. In some aspects, communications device 1000 is user equipment, such as described above with respect to Figure 1 and Figure 3 UE 104 is described. In some aspects, the communication device 1000 is a network entity such as Figure 1 and Figure 3 BS 102 or such Figure 2 The decomposed base station in question.

[0209] The communication device 1000 includes a processing system 1002 coupled to a transceiver 1038 (e.g., a transmitter and / or receiver). In some aspects (e.g., when the communication device 1000 is a network entity), the processing system 1002 can be coupled to a network interface 1042 that is configured to communicate with the communication device 1000 via a communication link (such as, for example, as described herein with respect to FIG. Figure 2 The processing system 1002 may be configured to perform processing functions for the communication device 1000, including processing signals received by the communication device 1000 and / or to be transmitted by the communication device 1000.

[0210] The processing system 1002 includes one or more processors 1004. In various aspects, the one or more processors 1004 may represent one or more of the receive processor 358, the transmit processor 364, the TX MIMO processor 366, and / or the controller / processor 380, as described with respect to FIG. Figure 3 In various aspects, the one or more processors 1004 may represent one or more of the receive processor 338, the transmit processor 320, the TX MIMO processor 330, and / or the controller / processor 340, as described with respect to FIG. Figure 3 The one or more processors 1004 are coupled to the computer readable medium / memory 1020 via the bus 1036. In some aspects, the computer readable medium / memory 1020 is configured to store instructions (e.g., computer executable code) that, when executed by the one or more processors 1004, cause the one or more processors 1004 to perform operations related to the computer readable medium / memory 1020. Figure 7 The method 700 described herein or any aspect thereof; and Figure 8The described method 800 or any aspects related thereto. Note that references to a processor performing a function of the communication device 1000 may include one or more processors 1004 performing that function of the communication device 1000.

[0211] In the depicted example, computer-readable medium / memory 1020 stores code (e.g., executable instructions), such as code for receiving 1022, code for converting 1024, code for decoding 1026, code for executing 1028, code for concatenating 1030, code for encoding 1032, and code for determining 1034. Processing of code for receiving 1022, code for converting 1024, code for decoding 1026, code for executing 1028, code for concatenating 1030, code for encoding 1032, and code for determining 1034 may enable the communication device 1000 to perform operations related to Figure 7 The method 700 described herein or any aspect thereof; and Figure 8 The described method 800 or any aspect related thereto.

[0212] The one or more processors 1004 include circuits configured to implement (e.g., execute) code stored in the computer-readable medium / memory 1020, including circuitry for receiving 1006, circuitry for converting 1008, circuitry for decoding 1010, circuitry for executing 1012, circuitry for concatenating 1014, circuitry for encoding 1016, and circuitry for determining 1018. Processing utilizing the circuitry for receiving 1006, circuitry for converting 1008, circuitry for decoding 1010, circuitry for executing 1012, circuitry for concatenating 1014, circuitry for encoding 1016, and circuitry for determining 1018 may enable the communication device 1000 to perform operations related to Figure 7 The method 700 described herein or any aspect thereof; and Figure 8 The described method 800 or any aspect related thereto.

[0213] The various components of the communication device 1000 may provide means for performing Figure 7 The method 700 described herein or any aspect thereof; and Figure 8 The method 800 described herein or any aspect thereof. For example, components for sending, transmitting, or outputting for sending may include Figure 3 The transceiver 354 and / or antenna 352 of the UE 104 illustrated in FIG. Figure 3 The transceiver 332 and / or antenna 334 and / or Figure 10The transceiver 1038 and antenna 1040 of the communication device 1000 are shown in FIG. Components for receiving or obtaining may include Figure 3 The transceiver 354 and / or antenna 352 of the UE 104 illustrated in FIG. Figure 3 The transceiver 332 and / or antenna 334 and / or Figure 10 10. The transceiver 1038 and antenna 1040 of the communication device 1000 are illustrated in FIG.

[0214] Sample Clauses

[0215] Specific implementation examples are described in the following numbered clauses:

[0216] Clause 1: A method for wireless communication by a transmitting device, the method comprising: generating a first set of bits for transmission; generating a plurality of CRC bits and appending them to the first set of bits to obtain a second set of bits for transmission; generating a set of LLRs corresponding to the second set of bits, wherein a size of the set of LLRs depends on the number of PRBs configured for transmission of the second set of bits and the MCS configured for transmission of the second set of bits; decoding the set of LLRs using a block code according to a shaping code rate to obtain a shaped bit sequence; generating a shaped symbol sequence based at least in part on the shaped bit sequence and the second set of bits; and transmitting the shaped symbol sequence to a receiving device.

[0217] Clause 2: The method of clause 1, further comprising: encoding the shaped bit sequence using the block code according to the shaping code rate to obtain a shaped codeword; performing a shaping operation on a subset of bits in the second set of bits using the shaped codeword to generate a shaped bit sequence; concatenating the shaped bit sequence, the remaining subset of non-shaped bits in the second set of bits, and the shaped bit sequence to obtain a set of information bits; encoding the set of information bits using an FEC code rate; and generating the shaped symbol sequence based on the set of coded bits.

[0218] Clause 3: The method of clause 2, wherein: a first number of bits in the shaped codeword is equal to a second number of bits in the subset of bits in the second set of bits; and performing the shaping operation comprises bit-masking the second number of bits in the subset of bits using the first number of bits in the shaped codeword.

[0219] Clause 4: The method of clause 3, wherein bit-masking the second number of bits in the subset of bits comprises shifting at least some of the second number of bits to zero.

[0220] Clause 5: The method of clause 2, wherein generating the set of LLRs comprises arranging the second set of bits into a matrix having dimensions Qm / 2 and H, where Qm is the modulation order used to transmit the second set of bits, and H is the number of bits in the set of coded bits (E) divided by the modulation order (Qm) multiplied by 2.

[0221] Clause 6: The method of clause 5, wherein generating the set of LLRs further comprises generating a respective LLR for each different column in the matrix.

[0222] Clause 7: A method according to clause 6, wherein generating the corresponding LLR for each different column of the matrix includes: determining a first power value for a second subset of bits in a second set of bits arranged in the different column of the matrix; flipping the value of the first bit in the second subset of bits arranged in the different column of the matrix to obtain a third subset of bits arranged in the different column of the matrix; and determining a second power value for the third subset of bits arranged in the different column of the matrix.

[0223] Clause 8: The method of clause 7, wherein the respective LLRs are generated for the different columns of the matrix based on the first power value and the second power value.

[0224] Clause 9: The method of clause 7, further comprising: when the second set of bits includes fewer bits than the number of bits configured for the set of encoded bits, adding one or more padding bits to the second set of bits before arranging the second set of bits into the matrix.

[0225] Clause 10: A method according to clause 9, wherein: the different columns of the matrix for which the corresponding LLRs are generated include at least one padding bit; determining the first power value for the second subset of bits is based on the first value of the at least one padding bit; and determining the second power value for the third subset of bits is based on the first value of the at least one padding bit.

[0226] Clause 11: The method of clause 10, further comprising: determining a third power value for the second subset of bits based on the second value of the at least one padding bit; and determining a fourth power value for the third subset of bits based on the second value of the at least one padding bit.

[0227] Clause 12: The method of clause 11, further comprising: determining a first difference between the first power value and the second power value; and determining a second difference between the third power value and the fourth power value.

[0228] Clause 13: The method of clause 12, wherein generating the respective LLRs for the different columns of the matrix is ​​based on an average of the first difference value and the second difference value.

[0229] Clause 14: The method according to Clause 2 further includes: sending configuration information to the receiving device, the configuration information indicating: the number of PBRs configured for sending the second set of bits; and the MCS index value of the MCS configured for sending the second set of bits, the MCS index value corresponding to an entry in an MCS lookup table, the entry indicating: the modulation order; and the FEC code rate.

[0230] Clause 15: The method of clause 14, further comprising: sending information indicating the shaping code rate to the receiving device.

[0231] Clause 16: The method of clause 15, wherein the information indicative of the shaping code rate is included in the MCS lookup table and provided by the MCS index value.

[0232] Clause 17: A method for wireless communication by a receiving device, the method comprising: receiving a shaped symbol sequence corresponding to a set of bits from a transmitting device; converting the shaped symbol sequence into a bit-level LLR sequence; decoding the bit-level LLR sequence using an FEC code rate based on a transport block size associated with the set of bits to obtain a set of decoded bits, the set of decoded bits comprising a shaped bit sequence, a shaped bit sequence in the set of bits, and a remaining subset of non-shaped bits in the set of bits; performing a deshaping operation on the shaped bit sequence using the shaping code rate based on the shaped bit sequence to obtain a deshaped bit sequence; and concatenating the deshaped bit sequence with the remaining subset of non-shaped bits to obtain the set of bits.

[0233] Clause 18: The method of clause 17, further comprising: encoding the shaped bit sequence using a block code according to the shaped code rate to obtain a deshaped codeword.

[0234] Clause 19: The method of clause 18, wherein performing the deshaping operation on the shaped bit sequence comprises applying the deshaping codeword to the shaped bit sequence to deshape the shaped bit sequence and obtain the deshaped bit sequence.

[0235] Clause 20: A method according to any one of clauses 17 to 19, the method further comprising: determining a size (K) of a set of information bits associated with FEC encoding of the set of bits based on the number of PRBs configured to transmit the set of bits and the MCS configured to transmit the set of bits; determining a number of resource elements (H) associated with a transport block for transmitting the set of bits based on a modulation order (Qm) and a configured number of coded bits (E) corresponding to the set of information bits; determining a number (S) of shaping bits in the shaped bit sequence based on the number of resource elements (H) and the shaping code rate (Rs); and determining the transport block size for decoding the bit-level LLR sequence based on the number of shaping bits (S) and the size (K) of the set of information bits associated with the FEC encoding of the set of bits.

[0236] Clause 21: The method of clause 20, wherein decoding the bit-level LLR sequence comprises partitioning the shaping bit sequence from the shaped bit sequence and the remaining subset of non-shaped bits based on the transport block size associated with the set of bits.

[0237] Clause 22: The method according to clause 20 further comprising: receiving configuration information from the transmitting device, the configuration information indicating: the number of PBRs configured for transmitting the bit set; and an MCS index value of the MCS configured for transmitting the bit set, the MCS index value corresponding to an entry in an MCS lookup table, the entry indicating: a modulation order; and the FEC code rate.

[0238] Clause 23: The method of clause 22, further comprising: receiving information indicating the shaping code rate from the transmitting device.

[0239] Clause 24: The method of clause 23, wherein the information indicative of the shaping code rate is included in the MCS lookup table and provided by the MCS index value.

[0240] Clause 25: An apparatus comprising: a memory comprising executable instructions; and a processor configured to execute the executable instructions and cause the apparatus to perform the method of any one of clauses 1 to 24.

[0241] Clause 26: An apparatus comprising means for performing the method of any one of clauses 1 to 24.

[0242] Clause 27: A non-transitory computer-readable medium comprising executable instructions that, when executed by a processor of an apparatus, cause the apparatus to perform the method of any one of clauses 1 to 24.

[0243] Clause 28: A computer program product embodied on a computer-readable storage medium, the computer-readable storage medium comprising code for performing the method according to any one of clauses 1 to 24.

[0244] Additional Notes

[0245] The foregoing description is provided to enable any person skilled in the art to practice the various aspects described herein. The examples discussed herein do not limit the scope, applicability, or aspects set forth in the claims. Various modifications to these aspects will be apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects. For example, the functions and arrangements of the elements discussed may be changed without departing from the scope of this disclosure. Various examples may omit, replace, or add various processes or components as appropriate. For example, the methods described may be performed in an order different from that described, and various actions may be added, omitted, or combined. In addition, the features described with respect to some examples may be combined in some other examples. For example, any number of aspects set forth herein may be used to implement a device or practice a method. In addition, the scope of this disclosure is intended to cover such devices or methods practiced using other structures, functionalities, or structures and functionalities that supplement or replace the various aspects of the disclosure set forth herein. It should be understood that any aspect of the disclosure disclosed herein may be embodied by one or more elements of the present invention.

[0246] The various illustrative logical blocks, modules, and circuits described in conjunction with the present disclosure may be implemented or performed using a general purpose processor, a digital signal processor (DSP), an ASIC, a field programmable gate array (FPGA) or other programmable logic device (PLD), discrete gate or transistor logic components, discrete hardware components, or any combination thereof, designed to perform the functions described herein. Although a general purpose processor may be a microprocessor, in an alternative embodiment, the processor may be any commercially available processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, for example, a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, a system on a chip (SoC), or any other such configuration.

[0247] As used herein, a phrase referring to "at least one of" a list of items refers to any combination of those items (including single members). For example, "at least one of a, b, or c" is intended to cover a, b, c, ab, ac, bc, and abc, as well as any combination with multiple identical elements (e.g., aa, aaa, aab, aac, abb, acc, bb, bbb, bbc, cc, and ccc, or any other ordering of a, b, and c).

[0248] As used herein, the term "determining" encompasses a wide variety of actions. For example, "determining" may include calculating, computing, processing, deriving, investigating, searching (e.g., searching in a table, database, or another data structure), ascertaining, and the like. Additionally, "determining" may include receiving (e.g., receiving information), accessing (e.g., accessing data in a memory), and the like. Additionally, "determining" may include resolving, selecting, choosing, establishing, and the like.

[0249] The method disclosed herein includes one or more actions for implementing the method. Method actions can be interchangeable with each other without departing from the scope of the claims. In other words, unless a specified order of actions is specified, the order and / or use of specific actions can be modified without departing from the scope of the claims. In addition, the various operations of the method described above can be performed by any appropriate component that can perform the corresponding function. The component may include various hardware and / or software components and / or modules, including but not limited to circuits, application specific integrated circuits (ASICs) or processors.

[0250] The following claims are not intended to be limited to the aspects shown herein, but should be given the full scope consistent with the language of the claims. Within the claims, unless specifically stated otherwise, reference to an element in the singular is not intended to mean "one and only one", but "one or more". Unless specifically stated otherwise, the term "some" refers to one or more. No claim element is to be interpreted under the provisions of 35 U.S.C. § 112 (f) unless the element is explicitly stated using the phrase "parts for...". All structural and functional equivalents of the elements of the various aspects described throughout this disclosure that are known or will later be known to one of ordinary skill in the art are expressly incorporated herein by reference and are intended to be covered by the claims. In addition, nothing disclosed herein is intended to be dedicated to the public, regardless of whether such disclosure is explicitly stated in the claims.

Claims

1. A method for wireless communication by a transmitting device, the method comprising: generating a first set of bits for transmission; generating a plurality of cyclic redundancy check (CRC) bits and appending them to the first set of bits to obtain a second set of bits for transmission; generating a set of log-likelihood ratios (LLRs) corresponding to the second set of bits, wherein a size of the set of LLRs depends on a number of physical resource blocks (PRBs) configured for transmitting the second set of bits and a modulation and coding scheme (MCS) configured for transmitting the second set of bits; decoding the LLR set using a block code according to a shaped code rate to obtain a shaped bit sequence; generating a shaped symbol sequence based at least in part on the shaping bit sequence and the second set of bits; as well as The shaped symbol sequence is sent to a receiving device.

2. The method according to claim 1, further comprising: encoding the shaping bit sequence using the block code according to the shaping code rate to obtain a shaping codeword; performing a shaping operation on a subset of bits in the second set of bits using the shaping codeword to generate a shaped bit sequence; concatenating the shaped bit sequence, a remaining subset of non-shaped bits in the second set of bits, and the shaped bit sequence to obtain a set of information bits; encoding the set of information bits using a forward error correction (FEC) code rate; as well as The shaped symbol sequence is generated based on the set of coded bits.

3. The method according to claim 2, wherein: a first number of bits in the shaped codeword is equal to a second number of bits in the subset of bits in the second set of bits; and Performing the shaping operation includes bit-masking the second number of bits in the subset of bits using the first number of bits in the shaped codeword.

4. The method of claim 3 , wherein bit-masking the second number of bits in the bit subset comprises: At least some of the second number of bits are shifted to zero.

5. The method of claim 2, wherein generating the set of LLRs comprises: The second set of bits is arranged into a matrix having dimensions Qm / 2 and H, where Qm is the modulation order used to transmit the second set of bits, and H is the number of bits in the set of coded bits (E) divided by the modulation order (Qm) multiplied by 2.

6. The method of claim 5, wherein generating the LLR set further comprises: A respective LLR is generated for each different column in the matrix.

7. The method of claim 6, wherein generating the corresponding LLR for each different column of the matrix comprises: determining a first power value for a second subset of bits in a second set of bits arranged in the different columns of the matrix; flipping a value of a first bit in the second subset of bits arranged in the different column of the matrix to obtain a third subset of bits arranged in the different column of the matrix; as well as A second power value is determined for the third subset of bits arranged in the different columns of the matrix.

8. The method of claim 7, wherein the respective LLRs are generated for the different columns of the matrix based on the first power value and the second power value.

9. The method according to claim 7, further comprising: When the second set of bits includes fewer bits than the number of bits configured for the set of encoded bits, one or more padding bits are added to the second set of bits before arranging the second set of bits into the matrix.

10. The method according to claim 9, wherein: The different columns of the matrix for which the respective LLRs are generated include at least one padding bit; determining the first power value for the second subset of bits is based on a first value of the at least one padding bit; and Determining the second power value for the third subset of bits is based on the first value of the at least one padding bit.

11. The method according to claim 10, further comprising: determining a third power value for the second subset of bits based on a second value of the at least one padding bit; as well as A fourth power value for the third subset of bits is determined based on the second value of the at least one padding bit.

12. The method according to claim 11, further comprising: determining a first difference between the first power value and the second power value; as well as A second difference between the third power value and the fourth power value is determined. 13 . The method of claim 12 , wherein generating the respective LLRs for the different columns of the matrix is ​​based on an average of the first difference value and the second difference value.

14. The method according to claim 2, further comprising: Sending configuration information to the receiving device, the configuration information indicating: said number of PBRs configured for transmitting said second set of bits; and An MCS index value of the MCS configured for transmitting the second set of bits, the MCS index value corresponding to an entry in an MCS lookup table, the entry indicating: Modulation order; and The FEC code rate.

15. The method according to claim 14, further comprising: Information indicating the shaping bit rate is sent to the receiving device.

16. The method of claim 15, wherein the information indicating the shaping code rate is included in the MCS lookup table and provided by the MCS index value.

17. A method for wireless communication by a receiving device, the method comprising: receiving, from a transmitting device, a sequence of shaped symbols corresponding to the set of bits; Converting the shaped symbol sequence into a bit-level log-likelihood ratio (LLR) sequence; decoding the bit-level LLR sequence using a forward error correction (FEC) code rate based on a transport block size associated with the set of bits to obtain a set of decoded bits, the set of decoded bits comprising a shaping bit sequence, a shaped bit sequence in the set of bits, and a remaining subset of non-shaped bits in the set of bits; performing a deshaping operation on the shaped bit sequence using a shaping code rate based on the shaped bit sequence to obtain a deshaped bit sequence; as well as The deshaped sequence of bits is concatenated with the remaining subset of non-shaped bits to obtain the set of bits.

18. The method according to claim 17, further comprising: The shaped bit sequence is encoded using a block code according to the shaped code rate to obtain a deshaped codeword.

19. The method of claim 18, wherein performing the deshaping operation on the shaped bit sequence comprises: The deshaping codeword is applied to the shaped bit sequence to deshape the shaped bit sequence and obtain the deshaped bit sequence.

20. The method according to claim 17, further comprising: determining a size (K) of a set of information bits associated with FEC coding of the set of bits based on a number of physical resource blocks (PRBs) configured to transmit the set of bits and a modulation and coding scheme (MCS) configured to transmit the set of bits; determining a number of resource elements (H) associated with a transport block used to transmit the set of bits based on a modulation order (Qm) and a configured number of coded bits (E) corresponding to the set of information bits; determining a number (S) of shaping bits in the shaping bit sequence based on the number (H) of resource elements and the shaping code rate (Rs); as well as The transport block size for decoding the bit-level LLR sequence is determined based on the number of shaping bits (S) and the size (K) of the set of information bits associated with the FEC encoding of the set of bits.

21. The method of claim 20, wherein decoding the bit-level LLR sequence comprises: The shaping bit sequence is partitioned from the shaped bit sequence and the remaining subset of non-shaped bits based on the transport block size associated with the set of bits.

22. The method according to claim 20, further comprising: Receive configuration information from the sending device, the configuration information indicating: said number of PBRs configured to transmit said set of bits; and An MCS index value configured to transmit the MCS of the set of bits, the MCS index value corresponding to an entry in an MCS lookup table, the entry indicating: Modulation order; and The FEC code rate.

23. The method according to claim 22, further comprising: Information indicating the shaping code rate is received from the transmitting device.

24. The method of claim 23, wherein the information indicating the shaping code rate is included in the MCS lookup table and provided by the MCS index value.

25. A sending device, comprising: a memory comprising executable instructions; and a processor configured to execute the executable instructions and cause the sending device to: generating a first set of bits for transmission; generating a plurality of cyclic redundancy check (CRC) bits and appending them to the first set of bits to obtain a second set of bits for transmission; generating a set of log-likelihood ratios (LLRs) corresponding to the second set of bits, wherein a size of the set of LLRs depends on a number of physical resource blocks (PRBs) configured for transmitting the second set of bits and a modulation and coding scheme (MCS) configured for transmitting the second set of bits; decoding the LLR set using a block code according to a shaped code rate to obtain a shaped bit sequence; generating a shaped symbol sequence based at least in part on the shaping bit sequence and the second set of bits; as well as The shaped symbol sequence is sent to a receiving device.

26. The sending device according to claim 25, wherein the processor is further configured to cause the sending device to: encoding the shaping bit sequence using the block code according to the shaping code rate to obtain a shaping codeword; performing a shaping operation on a subset of bits in the second set of bits using the shaping codeword to generate a shaped bit sequence; concatenating the shaped bit sequence, a remaining subset of non-shaped bits in the second set of bits, and the shaped bit sequence to obtain a set of information bits; encoding the set of information bits using a forward error correction (FEC) code rate; as well as The shaped symbol sequence is generated based on the set of coded bits.

27. The transmitting device according to claim 26, wherein: To generate the set of LLRs, the processor is further configured to cause the transmitting device to: arrange the second set of bits into a matrix having dimensions Qm / 2 and H, where Qm is a modulation order used to transmit the second set of bits, and H is the number of bits in the set of coded bits (E) divided by the modulation order (Qm) multiplied by 2; and To generate the LLR set, the processor is further configured to cause the transmitting device to generate a corresponding LLR for each different column in the matrix.

28. A receiving device, comprising: a memory comprising executable instructions; and a processor configured to execute the executable instructions and cause the receiving device to: receiving, from a transmitting device, a sequence of shaped symbols corresponding to the set of bits; Converting the shaped symbol sequence into a bit-level log-likelihood ratio (LLR) sequence; decoding the bit-level LLR sequence using a forward error correction (FEC) code rate based on a transport block size associated with the set of bits to obtain a set of decoded bits, the set of decoded bits comprising a shaping bit sequence, a shaped bit sequence in the set of bits, and a remaining subset of non-shaped bits in the set of bits; performing a deshaping operation on the shaped bit sequence using a shaping code rate based on the shaped bit sequence to obtain a deshaped bit sequence; as well as The deshaped sequence of bits is concatenated with the remaining subset of non-shaped bits to obtain the set of bits.

29. The receiving device according to claim 28, wherein: The processor is further configured to cause the receiving device to: encode the shaped bit sequence using a block code according to the shaped code rate to obtain a deshaped codeword; and In order to perform the deshaping operation on the shaped bit sequence, the processor is further configured to cause the receiving device to apply the deshaping codeword to the shaped bit sequence to deshape the shaped bit sequence and obtain the deshaped bit sequence.

30. The receiving device of claim 28, wherein the processor is further configured to cause the receiving device to: determining a size (K) of a set of information bits associated with FEC coding of the set of bits based on a number of physical resource blocks (PRBs) configured to transmit the set of bits and a modulation and coding scheme (MCS) configured to transmit the set of bits; determining a number of resource elements (H) associated with a transport block used to transmit the set of bits based on a modulation order (Qm) and a configured number of coded bits (E) corresponding to the set of information bits; determining a number (S) of shaping bits in the shaping bit sequence based on the number (H) of resource elements and the shaping code rate (Rs); and The transport block size for decoding the bit-level LLR sequence is determined based on the number of shaping bits (S) and the size (K) of the set of information bits associated with the FEC encoding of the set of bits.

Images